Video data display method, electronic device and computer program product

By decoding and transmitting video data packets in low-latency mode, and adding error frame identification information to the decoded data frame, the problem of long display time consumption and display abnormalities in the prior art is solved, and efficient low-latency video data display is achieved.

CN119865639AInactive Publication Date: 2025-04-22JINGCHEN SEMICON SHENZHEN CO LTD
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Patent Information

Application Number
CN202510344422.9
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-03-24
Publication Date
2025-04-22
Estimated Expiration
Not applicable · inactive patent

AI Technical Summary

Technical Problem

The overall time between decoding and display in the low-latency mode is consumed by a long time, and the display exceptions caused by error frames are not effectively handled.

Method used

In the low-latency mode, the video data packet is decoded and transmitted, and error frame identification information is added to the decoded data frame for the display to identify and discard the error frame.

Benefits of technology

Through synchronization of decoding and transmission, the overall time consumption of multimedia playback is reduced, the low latency efficiency is improved, and the display abnormality caused by wrong frames is effectively solved.

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Abstract

The invention discloses a video data display method, electronic equipment and a computer program product, the video data display method is used for a decoder, and the video data display method comprises the following steps: in a low-delay mode, decoding and transmitting a video data packet at the same time; wherein error frame identification information is added to each decoded data frame, and the error frame identification information is used for a display end to identify error frames. According to the method, the problem of abnormal display caused by error frames can be solved while the low-delay efficiency is improved.
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Description

Technical Field

[0001] The present invention relates to the field of communication technology, and in particular to a video data display method, electronic equipment and computer program product. Background Art

[0002] In order to ensure the user experience, during the production process of smart TVs, the player must support low-latency display. By reducing time delays during image processing, transmission and display, it ensures that users can see feedback on input or operations in a timely manner, providing a smoother and more instant interactive experience and improving the interactive experience.

[0003] In the related art, since the frame sending work in the low-latency mode can only be started after the decoder completes the decoding of all data packets, the overall time consumption from decoding to display is relatively long, which has a great impact on the user experience, and the transmitted error frames are not effectively handled. Summary of the invention

[0004] The present invention aims to solve at least one of the technical problems existing in the prior art. To this end, one object of the present invention is to provide a video data display method, which can improve the low-latency efficiency while solving the display abnormality problem caused by error frames.

[0005] A second objective of the present invention is to provide an electronic device.

[0006] A third object of the present invention is to provide a computer program product.

[0007] In order to solve the above problems, an embodiment of the first aspect of the present invention proposes a video data display method for a decoder, the method comprising: in a low-latency mode, decoding and transmitting video data packets; wherein error frame identification information is added to each decoded data frame, and the error frame identification information is used for a display terminal to identify error frames.

[0008] According to the video data display method of an embodiment of the present invention, by decoding and transmitting the video data packets in the low-latency mode of the decoder, the decoding and transmission of the video data packets are synchronized, thereby reducing the overall time consumption of multimedia playback and improving the low-latency efficiency. At the same time, error frame identification information is added to the decoded data frames. Therefore, the display end can identify the error frames in the data stream through the error frame identification information, and can discard the error frames to ensure that the error frame information in the data stream will not be displayed, thereby solving the problem of display abnormality caused by the existence of error frames.

[0009] In some embodiments, video data packets are decoded and transmitted simultaneously, including: a frame header parsing step: the frame header of the video data packet is parsed first; a frame body parsing step: the frame body of the video data packet is parsed in units of frames to obtain a decoded data frame; a transmission step: the decoded data frame is transmitted to the display end through a frame buffer; the frame body parsing step and the transmission step are repeated until the decoding of the video data packet is completed.

[0010] In some embodiments, error frame identification information is added to each decoded data frame, including: before executing the transmission step, checking the decoded data frame; if the decoded data frame is an error frame, the error frame identification information added to the decoded data frame is first data; if the decoded data frame is a correct frame, the error frame identification information added to the decoded data frame is second data.

[0011] In some embodiments, it also includes: after receiving a low latency flag sent by an upper layer application, entering the low latency mode.

[0012] In some embodiments, the process further includes: after the decoding of the video data packet is completed, sending a parsing completion notification mark to the display terminal.

[0013] In some embodiments, the method is used for a display end, and the method includes: obtaining a decoded data frame transmitted by a decoder, the decoded data frame carrying error frame identification information; if the decoded data frame is determined to be an error frame according to the error frame identification information, discarding the error frame; if the decoded data frame is determined to be a correct frame according to the error frame identification information, displaying the correct frame.

[0014] A second aspect of the present invention provides an electronic device, comprising: a decoder, the decoder being used to execute the video data display method for the decoder of the above embodiment; and a display end, the display end being used to execute the video data display method for the display end of the above embodiment.

[0015] The electronic device according to the embodiment of the present invention can improve the low-latency efficiency while solving the display abnormality problem caused by error frames.

[0016] In some embodiments, the electronic device further includes: a decoding middleware; and an upper layer application, wherein the upper layer application sends a low latency flag to the decoder by calling an interface of the decoding middleware.

[0017] In some embodiments, in low latency mode, the CPU performance mode of the electronic device is switched to high performance mode.

[0018] A third aspect of the present invention provides a computer program product, comprising a computer program, which, when executed by a processor, implements the steps of the video data display method for a decoder of the above embodiment, or, when executed by a processor, implements the steps of the video data display method for a display terminal of the above embodiment.

[0019] Additional aspects and advantages of the present invention will be given in part in the following description and in part will be obvious from the following description, or will be learned through practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] The above and / or additional aspects and advantages of the present invention will become apparent and easily understood from the description of the embodiments in conjunction with the following drawings, in which: Figure 1 is a flowchart of a video data display method according to an embodiment of the present invention; Figure 2 is a flowchart of a video data display method according to another embodiment of the present invention; Figure 3 is a flowchart of a video data display method according to another embodiment of the present invention; Figure 4 is a workflow diagram for a display terminal according to an embodiment of the present invention; Figure 5 is a structural block diagram of an electronic device according to an embodiment of the present invention; Figure 6 FIG. 4 is a schematic diagram of a video data display process according to an embodiment of the present invention.

[0021] Reference numerals: Electronic device 100; Decoder 10; display terminal 20; player 30; decoding middleware 40; post-processing module 50. DETAILED DESCRIPTION

[0022] Embodiments of the present invention are described in detail below. The embodiments described with reference to the accompanying drawings are exemplary. Embodiments of the present invention are described in detail below.

[0023] At present, in the production process of Android smart TVs, most of the players developed need to support low-latency display technology, which generally refers to the ability to reduce time delays during image processing, transmission, and display. Low-latency display can ensure that users can see the feedback of input or operation in time, provide a smoother and more immediate interactive experience, and enhance the interactive experience. For example, in applications such as video conferencing, cloud games, and screen projection, high latency can cause delays in the picture or sound, causing damage to the user experience, while low-latency display technology can effectively avoid this "lag" feeling, provide a smoother and more natural interactive experience, ensure the synchronization of user operations and screen reactions, and improve the response speed of the picture. In short, low-latency display can ensure smoother and more accurate interaction and response, and enhance the overall user experience.

[0024] But in fact, the overall efficiency of the current low-latency solution is not high. The overall time consumption from decoding to display is relatively long. The delay in scenarios such as screen projection and cloud gaming is still relatively large, affecting the user experience. The efficiency of low latency still needs to be improved. Moreover, in actual use, because the underlying part such as the display in the driver uses a module for multimedia channels such as player channel playback and other channels such as HDMI channel playback, however, the HDMI channel has been designed with low latency in mind. If the player does not exit the low-latency mode for some reason and enters the HDMI channel again, then the delay will be reduced again when the HDMI channel has already been delayed, resulting in display abnormalities. Therefore, the existing low-latency solutions for multimedia channels have low compatibility and are likely to affect the playback of other channels.

[0025] In order to solve the above problems, a first embodiment of the present invention proposes a video data display method for a decoder, which can improve low-latency efficiency while solving display abnormality problems caused by error frames.

[0026] like Figure 1 As shown, the specific step S1 is: in the low-latency mode, the video data packet is decoded and transmitted simultaneously; wherein, error frame identification information is added to each decoded data frame, and the error frame identification information is used for the display end to identify the error frame.

[0027] Specifically, since users have high requirements for the picture in scenarios such as screen projection and cloud gaming, the decoder is set with a low-latency mode to improve the response speed of the picture and make the display smoother. However, the existing low-latency technology can only transmit data frames after all video data packets are decoded. The overall time consumption between decoding and display is still relatively long, resulting in low low-latency efficiency. In order to solve the above problems, the present application controls the decoder to decode and transmit data packets in low-latency mode. That is to say, in low-latency mode, the decoding of the decoder will no longer execute the reordering process, but will transmit a frame of data frame after decoding a frame of data frame, thereby realizing the simultaneous decoding and transmission of video data, and effectively shortening the overall time of decoding and data frame transmission, thereby reducing the time consumed between decoding and screen display and improving low-latency efficiency.

[0028] In addition, when the decoder decodes the video data packet, there may be an error frame. Due to the damage or loss of the data of the error frame, the display end will not be able to correctly display the frame image when displaying the picture according to the error frame, resulting in an abnormal picture. In the prior art, the error frame is processed by the decoder, that is, the decoder will identify the error frame when decoding the data. If it is determined that the data frame is an error frame, the error frame will be directly discarded, and finally all the correct data frames will be transmitted to the display end together, so that there will be no error frame on the display end. However, because the present application controls the decoder to transmit after completing the decoding of a frame of video data, the decoder cannot perform a frame discarding action on the error frame. Therefore, the present application adds error frame identification information to each decoded data frame, thereby sending the data frame carrying the error frame identification information to the display end, so that the display end performs the error frame discarding operation, that is, the display end can identify the data frame through the error frame identification information to discard the error frame in the data stream, thereby ensuring that the error frame information in the data stream will not be displayed, thereby solving the problem of display abnormality caused by the existence of error frames.

[0029] According to the video data display method of an embodiment of the present invention, by decoding and transmitting the video data packets in the low-latency mode of the decoder, the decoding and transmission of the video data packets are synchronized, thereby reducing the overall time consumption of multimedia playback and improving the low-latency efficiency. At the same time, error frame identification information is added to the decoded data frames. Therefore, the display end can identify the error frames in the data stream through the error frame identification information, and can discard the error frames to ensure that the error frame information in the data stream will not be displayed, thereby solving the problem of display abnormality caused by the existence of error frames.

[0030] In some embodiments, the video data packet is decoded and transmitted at the same time, including a frame header parsing step: the frame header of the video data packet is parsed first; a frame body parsing step: the frame body of the video data packet is parsed in units of frames to obtain a decoded data frame; a transmission step: the decoded data frame is transmitted to the display end through a frame buffer; the frame body parsing step and the transmission step are repeated until the decoding of the video data packet is completed.

[0031] Among them, the frame header of the video data packet contains control information, which provides necessary information during decoding or data processing to assist in the correct parsing and processing of the video data packet; the frame body, in data communication, refers to the payload part of the data frame, which carries the data that actually needs to be transmitted; the frame buffer is a memory area for storing data frames, which can store data frames that will be used by the display end for picture display. After the decoder enters the low-latency mode, the decoder starts the synchronization mode to ensure that different tasks or operations are executed in sequence.

[0032] Specifically, the frame header of the video data packet is parsed. After the frame header parsing is completed, the frame body of the video data packet is parsed in units of frames to obtain a decoded data frame, and the decoded data frame is cached in a frame buffer, and transmitted to the display end through the frame buffer, the synchronization mechanism of the display end is started, and then the next data frame is parsed and transmitted, thereby completing the data transmission while decoding. The display end now only needs to wait for the state of the synchronization mechanism. At this time, the synchronization mechanism of the display end is in a sleep state until the decoder completes decoding of the frame body, and the synchronization mechanism of the display end is awakened, so that the display end can display the screen through the decoded data frame in the frame buffer. Therefore, through the above steps, when the time for decoding the frame body is less than the time for data transmission, the time for decoding the frame body can be effectively saved, and when the time for decoding the frame body is greater than the time for data transmission, the time for data transmission can be saved, thereby realizing the concurrent decoding and transmission of the video data packet, reducing the overall time consumption from decoding to screen display.

[0033] For example, Figure 2 As shown, Figure 2 This is a flowchart of a video data display method according to an embodiment of the present invention. The video data display method includes steps S1 to S8. The specific steps are as follows.

[0034] Step S1, the decoder enters low latency mode.

[0035] Step S2: The decoder executes a synchronization mechanism.

[0036] Step S3: frame header parsing is completed.

[0037] Step S4, transmitting the frame buffer to the display end and starting the synchronization mechanism of the display end.

[0038] Step S5, parsing the frame body.

[0039] Step S6, transmitting the decoded data frame to the display end through the frame buffer.

[0040] Step S7, after the frame body is parsed, the display end synchronization mechanism wakes up, and the display end uses the data frame to display the picture.

[0041] In some embodiments, error frame identification information is added to each decoded data frame, including checking the decoded data frame before executing the transmission step; if the decoded data frame is an error frame, the error frame identification information added to the decoded data frame is the first data; if the decoded data frame is a correct frame, the error frame identification information added to the decoded data frame is the second data.

[0042] Specifically, in the prior art, the decoder will identify the error frame when decoding the frame body. If the data frame is an error frame, the frame drop action is executed to discard the error frame, and finally all the correct frames are transmitted to the display end through the frame buffer. Since the present application transmits the data frame through the frame buffer after controlling the decoder to complete the parsing of the frame body, the decoder can only identify whether the data frame is an error frame after completing the parsing of the frame header. However, at this time, since the data frame has been transmitted to the display end, the decoder cannot perform the frame drop action, that is, it cannot discard the error frame. Therefore, the present application controls the decoder to identify the data frame before transmitting the data frame. If the data frame is identified as an error frame, the decoder By adding the error frame identification information as the first data such as -1, the display end receives the data frame, and after identifying that the data frame carries the first data, it can determine that the data frame is an error frame, and the display end discards the error frame, and does not use the error frame for screen display, thereby avoiding the problem of error information in the video data packet being displayed, and effectively preventing the abnormal display of the screen from occurring; if the data frame is identified as a correct frame, the decoder adds the error frame identification information as the second data such as 0, so that the display end receives the data frame, and after identifying that the data frame carries the second data, it can determine that the data frame is a correct frame, and use the data frame normally for screen display. Thus, after each frame of data is parsed, the data frame is identified as an error frame, and the error frame identification information is added, and then the data frame carrying the error frame identification information is transmitted to the display end through the frame buffer, thereby, the display end can identify the error frame in the data stream through the error frame identification information, and can discard the error frame to ensure that the error frame information in the data stream will not be displayed, solving the problem of display abnormality caused by the existence of error frames.

[0043] Among them, for checking the decoded data frame, whether the data frame is legal can be determined through the key frame of the frame header, or verified through a CRC check method, and there is no restriction on this.

[0044] For example, Figure 3 As shown, Figure 3 This is a schematic diagram of a video data display method according to an embodiment of the present invention, and the specific steps are as follows.

[0045] Step S9: the decoder enters the synchronization mechanism.

[0046] Step S10: frame header parsing is completed.

[0047] Step S11, parsing the frame body to obtain a decoded data frame.

[0048] Step S12, whether the data frame is an error frame, if so, execute step S13; if not, execute step S14.

[0049] Step S13: the error frame identification information added to the decoded data frame is the first data.

[0050] Step S14: the error frame identification information added to the decoded data frame is the second data.

[0051] In some embodiments, it also includes entering a low-latency mode after receiving a low-latency flag sent by an upper-layer application.

[0052] Specifically, in order to meet user needs, you can choose whether to enter the low-latency mode according to actual conditions. For example, in application scenarios such as screen projection and cloud gaming, the multimedia channel needs to support low-latency display. Therefore, the upper-level application will send a low-latency flag to the decoder to control the decoder to enter the low-latency mode. At the same time, set the node to shut down the post-processing module that consumes more time, thereby further reducing the overall time consumption of multimedia playback and improving user experience.

[0053] Exemplarily, for a multimedia channel, the display process of the video screen sequentially passes through the player, decoding middleware, decoder, display module and post-processing module. It should be noted that, since the low-latency mode in the prior art will set a low-latency node in the underlying driver, the player and other channels share the same module in the underlying driver, for example, the player and the HDMI channel share the same module, and the design of the HDMI channel has taken into account the low-latency effect. If the player does not exit the low-latency mode, and the video data packet enters the HDMI channel again, then the delay is reduced again when the original HDMI has been delayed, and display abnormalities will occur. Therefore, there is a compatibility problem in the existing low-latency solution. In order to solve the above problem, the present application controls the decoder to enter the low-latency mode through a low-latency flag. The low-latency flag will only act on the decoder, and will not affect other modules except the decoder, so it will not affect the remaining channels except the multimedia channel, thereby solving the compatibility problem of the low-latency technology.

[0054] In some embodiments, the method further includes sending a parsing completion notification flag to a display terminal after the decoding of the video data packet is completed.

[0055] Specifically, if the decoding of the video data packet is completed, the decoder uses the synchronization mechanism of the display end to send the parsing completion notification flag to the display end. After the display end detects the parsing completion notification flag, it can discard the error frame in the frame buffer and display the correct data frame on the screen.

[0056] A second aspect of the present invention provides a method for displaying video data, which is used at a display end and includes: obtaining a decoded data frame transmitted by a decoder, the decoded data frame carrying error frame identification information; if the decoded data frame is determined to be an error frame according to the error frame identification information, the error frame is discarded; if the decoded data frame is determined to be a correct frame according to the error frame identification information, the correct frame is displayed.

[0057] Specifically, in order to avoid the display end using an error frame to display the screen, resulting in abnormal display of the screen, after the decoder is parsed, the display end is awakened, and the display end uses the data in the frame buffer to send and display each data frame. At the same time, the display end will identify the error frame identification information of the current data frame. If the error frame identification information is determined to be the first data, it can be known that the data frame is an error frame, and the display end performs a frame drop action, that is, discards the error frame; conversely, if the error frame identification information is determined to be the second data, it can be known that the data frame is a correct frame, and the display end normally uses the data frame to display the screen. The above process is repeated until all data frames in the frame buffer are displayed.

[0058] For example, Figure 4 As shown, Figure 4 This is a flow chart of a method for displaying video data on a screen according to an embodiment of the present invention, and the specific steps are as follows.

[0059] Step S15: frame body parsing is completed.

[0060] Step S16: The display end synchronization mechanism wakes up.

[0061] Step S17: the display terminal identifies the data frame.

[0062] Step S18, determining whether the decoded data frame is an error frame according to the error frame identification information, if so, executing step S20; if not, executing step S19.

[0063] Step S19: the display terminal uses normal frames to display the picture.

[0064] Step S20: discard the error frame.

[0065] Step S21: the display terminal identifies the next data frame.

[0066] Step S22, whether all data frames are identified, if so, execute step S23; if not, execute step S18.

[0067] Step S23, end.

[0068] In summary, according to the video data display method of the embodiment of the present invention, on the one hand, by decoding and transmitting the video data packets simultaneously, the overall time consumption between decoding and display can be effectively reduced, thereby improving the low-latency efficiency; on the other hand, the error frames are processed to effectively prevent the occurrence of display abnormalities; on the other hand, the method is only effective in the case of multimedia channels and will not affect other channels such as HDMI, thereby effectively solving compatibility issues.

[0069] A second embodiment of the present invention provides an electronic device 100, such as Figure 5 As shown, the electronic device 100 includes a decoder 10 and a display terminal 20 .

[0070] The decoder 10 is used to execute the video data display method for the decoder 10 of the above embodiment; the display terminal 20 is used to execute the video data display method for the display terminal 20 of the above embodiment.

[0071] Specifically, refer to Figure 6 As shown, the video display process of the electronic device of the present application sequentially passes through the player 30, the decoding middleware 40, the decoder 10, the display end 20 and the post-processing module 50. After the decoder 10 receives the low-latency flag sent by the upper-layer application, the electronic device 100 will also control some of the post-processing modules 50 that are more time-consuming to shut down, thereby reducing the overall time consumption of multimedia playback.

[0072] According to the electronic device 100 of the embodiment of the present invention, the decoder 10 decodes and transmits the video data packets in the low-latency mode, so that the decoding and transmission of the video data packets are carried out synchronously, thereby reducing the overall time consumption of multimedia playback and improving the low-latency efficiency. At the same time, the decoder 10 marks the decoded error frames, and the display end 20 identifies the error frames and executes the frame dropping action to discard the error frames, thereby avoiding display abnormalities caused by the existence of error frames in the data.

[0073] In some embodiments, Figure 4 As shown, the electronic device 100 further includes a decoding middleware 40 and an upper layer application.

[0074] The upper layer application sends a low latency flag to the decoder 10 by calling the interface of the decoding middleware 40 .

[0075] Specifically, an upper-layer application such as a player 30 will send a low-latency flag to the decoding middleware 40 , and the decoding middleware 40 will then send the low-latency flag to the decoder 10 to control the low-latency mode of the decoder 10 to start.

[0076] In some embodiments, in low latency mode, the CPU performance mode of the electronic device is switched to high performance mode.

[0077] Specifically, improving CPU performance can improve the data processing speed of the electronic device 100, thereby shortening the data processing time and achieving the purpose of reducing the overall time consumption of multimedia playback. Therefore, when the low-latency mode of the decoder 10 is started, the electronic device 100 switches the CPU performance mode to the high-performance mode to improve the data processing speed of the electronic device 100 and further improve the low-latency efficiency.

[0078] A fourth aspect of the present invention provides a computer program product, comprising a computer program, which, when executed by a processor, implements the steps of the video data display method for a decoder of the above-mentioned embodiment, or, when executed by a processor, implements the steps of the video data display method for a display terminal of the above-mentioned embodiment.

[0079] In the description of this specification, any process or method description in a flowchart or otherwise described herein may be understood to represent a module, fragment or portion of code including one or more executable instructions for implementing the steps of a custom logical function or process, and the scope of the preferred embodiments of the present invention includes alternative implementations in which functions may not be performed in the order shown or discussed, including performing functions in a substantially simultaneous manner or in reverse order depending on the functions involved, which should be understood by technicians in the technical field to which the embodiments of the present invention belong.

[0080] The logic and / or steps represented in the flowchart or otherwise described herein, for example, can be considered as an ordered list of executable instructions for implementing logical functions, and can be embodied in any computer-readable medium for use by an instruction execution system, device or apparatus (such as a computer-based system, a system including a processor, or other system that can fetch instructions from an instruction execution system, device or apparatus and execute instructions), or in combination with these instruction execution systems, devices or apparatuses. For the purposes of this specification, "computer-readable medium" can be any device that can contain, store, communicate, propagate or transmit a program for use by an instruction execution system, device or apparatus, or in combination with these instruction execution systems, devices or apparatuses. More specific examples (non-exhaustive list) of computer-readable media include the following: an electrical connection with one or more wires (electronic device), a portable computer disk box (magnetic device), a random access memory (RAM), a read-only memory (ROM), an erasable and programmable read-only memory (EPROM or flash memory), an optical fiber device, and a portable compact disk read-only memory (CDROM). In addition, the computer-readable medium may even be paper or other suitable medium on which the program is printed, since the program may be obtained electronically, for example, by optically scanning the paper or other medium and then editing, interpreting or processing in other suitable ways if necessary, and then stored in a computer memory.

[0081] It should be understood that the various parts of the present invention can be implemented by hardware, software, firmware or a combination thereof. In the above-mentioned embodiments, multiple steps or methods can be implemented by software or firmware stored in a memory and executed by a suitable instruction execution system. For example, if implemented by hardware, as in another embodiment, it can be implemented by any one of the following technologies known in the art or their combination: a discrete logic circuit having a logic gate circuit for implementing a logic function for a data signal, a dedicated integrated circuit having a suitable combination of logic gate circuits, a programmable gate array (PGA), a field programmable gate array (FPGA), etc.

[0082] A person skilled in the art may understand that all or part of the steps in the method for implementing the above-mentioned embodiment may be completed by instructing related hardware through a program, and the program may be stored in a computer-readable storage medium, which, when executed, includes one or a combination of the steps of the method embodiment.

[0083] In addition, each functional unit in each embodiment of the present invention may be integrated into a processing module, or each unit may exist physically separately, or two or more units may be integrated into one module. The above-mentioned integrated module may be implemented in the form of hardware or in the form of a software functional module. If the integrated module is implemented in the form of a software functional module and sold or used as an independent product, it may also be stored in a computer-readable storage medium.

[0084] The storage medium mentioned above may be a read-only memory, a magnetic disk or an optical disk, etc. Although the embodiments of the present invention have been shown and described above, it can be understood that the above embodiments are exemplary and cannot be understood as limiting the present invention. A person of ordinary skill in the art may change, modify, replace and modify the above embodiments within the scope of the present invention.

[0085] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "illustrative embodiments", "examples", "specific examples", or "some examples" means that the specific features, structures, materials, or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example.

[0086] Although the embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present invention, and that the scope of the present invention is defined by the claims and their equivalents.

Claims

1. A video data display method, characterized in that: For a decoder, the method comprises: In low-latency mode, video data packets are decoded and transmitted simultaneously; Wherein, error frame identification information is added to each decoded data frame, and the error frame identification information is used for the display terminal to identify the error frame.

2. The video data display method according to claim 1, characterized in that: Decode and transmit video data packets simultaneously, including: Frame header parsing step: parsing the frame header of the video data packet first; Frame body parsing step: parsing the frame body of the video data packet in units of frames to obtain decoded data frames; Transmission step: transmitting the decoded data frame to the display end through a frame buffer; The frame body parsing step and the transmission step are repeated until the decoding of the video data packet is completed.

3. The video data display method according to claim 2, characterized in that: Add error frame identification information to each decoded data frame, including: Before executing the transmitting step, checking the decoded data frame; If the decoded data frame is an error frame, the error frame identification information added to the decoded data frame is the first data; If the decoded data frame is a correct frame, the error frame identification information added to the decoded data frame is the second data.

4. The video data display method according to any one of claims 1 to 3, characterized in that: Also includes: After receiving the low latency flag sent by the upper layer application, enter the low latency mode.

5. The video data display method according to claim 4, characterized in that: Also includes: After the decoding of the video data packet is completed, a parsing completion notification mark is sent to the display end.

6. A video data display method, characterized in that: For a display terminal, the method includes: Acquire a decoded data frame transmitted by a decoder, wherein the decoded data frame carries error frame identification information; If it is determined that the decoded data frame is an error frame according to the error frame identification information, discarding the error frame; If the decoded data frame is determined to be a correct frame according to the error frame identification information, the correct frame is displayed.

7. An electronic device, characterized in that: include: A decoder, wherein the decoder is used to execute the video data display method according to any one of claims 1 to 5; The display end is used to execute the video data display method according to claim 6.

8. The electronic device according to claim 7, characterized in that: Also includes: Decoding middleware; An upper layer application, wherein the upper layer application sends a low latency flag to the decoder by calling an interface of the decoding middleware.

9. The electronic device according to claim 7, characterized in that: In the low latency mode, the CPU performance mode of the electronic device is switched to the high performance mode.

10. A computer program product, comprising a computer program, characterized in that When the computer program is executed by a processor, the steps of the video data display method described in any one of claims 1 to 5 are implemented; or, when the computer program is executed by a processor, the steps of the video data display method described in claim 6 are implemented.

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