Electronic equipment and control method of electronic equipment
By designing an electronic device including a single bus interface, a communication unit and multiple circuits, the error wake-up and leakage current problems of host electronic devices and auxiliary electronic devices in the dormant state are solved, and higher energy efficiency and reliability are achieved.
Patent Information
- Application Number
- CN202411745392.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-29
- Publication Date
- 2025-04-25
AI Technical Summary
Existing host electronic devices and auxiliary electronic devices have problems of false wake-up and large leakage current in the sleep state.
An electronic device is designed, including a single bus interface, a communication unit and a plurality of circuits. Through these circuits, the electronic device can switch states when the host device is connected, thereby detecting the connection state and reducing leakage current. Specifically, the first circuit is in a path state when detecting the connected state and in a break state when sleeping or disconnecting to reduce leakage current. The second circuit controls the state of the first circuit based on the power supply voltage of the host device, and the third circuit is configured in the on state when the first circuit is in the off-circuit state to further reduce leakage current.
It effectively solves the problem of false wake-up and leakage current of host electronic devices and auxiliary electronic devices in the dormant state, and improves the energy efficiency and reliability of the system.
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Figure CN119882510A_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to the field of communications, and in particular to an electronic device and a control method of the electronic device. Background Art
[0002] The current host electronic device is connected and communicated with the external electronic device through the 3-wire POGO Pin, which are power, data and ground. This data line is essentially a half-duplex serial port module, a Universal Asynchronous Receiver / Transmitter (UART), including the transmitter UART_Tx and the receiver UART_Rx.
[0003] When the host electronic device is in sleep mode, the auxiliary electronic device also goes into sleep mode. At the same time, the bus level is maintained high for functions such as connection status detection between the host electronic device and the auxiliary electronic device and host wake-up. However, there are problems of false wake-up of the host electronic device and large leakage current of the entire system. Summary of the invention
[0004] The present disclosure provides an electronic device and a control method of the electronic device.
[0005] According to a first aspect of the present disclosure, there is provided an electronic device, comprising: a single bus interface,
[0006] A communication unit, communicating with a host device via the single bus interface;
[0007] A first circuit, one end of which is connected to the ground, and the other end of which is connected to the single bus interface;
[0008] Wherein, the first circuit includes a first state and a second state,
[0009] When the first circuit is in the first state, the first circuit is in a connection state, and is used by the host device to detect the connection state between the electronic device and the host device;
[0010] When the first circuit is in the second state, the first circuit is in an open circuit state to reduce leakage current.
[0011] In one embodiment of the present application, it also includes: a second circuit, one end of which is connected to the single bus interface and the other end is connected to the first circuit, and the second circuit controls the state of the first circuit based on the power supply voltage of the host device obtained from the single bus interface.
[0012] In one embodiment of the present application, the first circuit includes a first resistor and a first switch connected in series, and the second circuit is connected to the first switch of the first circuit; wherein, in response to the electronic device being connected to the host device, the second circuit obtains the power supply voltage of the host device through the single bus interface to control the first switch to switch from a first state to a second state.
[0013] In one implementation of the present application, it also includes: a third circuit, one end of which is connected to the power supply, and the other end is connected to the single bus interface; wherein when the first circuit is in the second state, the third circuit is configured to be in a conductive state to reduce the leakage current.
[0014] In one embodiment of the present application, it includes a plurality of third circuits connected in parallel and a control unit, wherein the control unit is used to configure at least two of the third circuits to be in an on state according to a sleep instruction sent by a host device received from the single bus interface to reduce the leakage current.
[0015] According to a second aspect of the present disclosure, there is provided an electronic device control method, which is applied to an electronic device, wherein the electronic device includes a single bus interface.
[0016] A communication unit, communicating with a host device via the single bus interface;
[0017] A first circuit, one end of which is connected to the ground, and the other end of which is connected to the single bus interface;
[0018] The method comprises: in response to the host device being connected to the electronic device via the single bus interface, controlling the first circuit to switch from a first state to a second state;
[0019] Wherein, when the first circuit is in the first state, the first circuit is in a connection state, and is used by the host device to detect the connection state between the electronic device and the host device through the single bus interface;
[0020] When the first circuit is in the second state, the first circuit is in an open circuit state to reduce leakage current.
[0021] In one embodiment of the present application, the electronic device also includes a second circuit, one end of which is connected to the single bus interface, and the other end is connected to the first circuit. The method includes responding to the host device being connected to the electronic device through the single bus interface, the second circuit controlling the state of the first circuit based on the power supply voltage of the host device obtained from the single bus interface.
[0022] In an implementation of the present application, the electronic device further includes a third circuit, one end of the third circuit is connected to the power supply, and the other end of the third circuit is connected to the single bus interface;
[0023] The method further includes, when the first circuit is in the second state, configuring the third circuit to be in an on state to reduce the leakage current.
[0024] In one embodiment of the present application, the electronic device includes a plurality of the third circuits connected in parallel, and the method further includes, based on a sleep instruction sent by a host device and received by the communication unit from the single bus interface, configuring at least two of the third circuits to be in a conducting state to reduce the leakage current.
[0025] In one implementation of the present application, it also includes: when the electronic device is in a sleep state, in response to receiving a key command, configuring the third circuit to disconnect, and configuring the communication unit to be connected to the single bus interface, so as to send a wake-up command to the host device through the communication unit, so that the host device responds to the key command.
[0026] According to a third aspect of the present disclosure, there is provided an electronic equipment control device, comprising:
[0027] a control module, configured to control the first circuit to switch from a first state to a second state in response to the host device and the electronic device being connected via the single bus interface, wherein when the first circuit is in the first state, the first circuit is in a connection state, and is used for the host device to detect the connection state between the electronic device and the host device via the single bus interface;
[0028] When the first circuit is in the second state, the first circuit is in an open circuit state to reduce leakage current.
[0029] In one embodiment of the present application, the control module is specifically used to respond to the host device being connected to the electronic device through the single bus interface, and the second circuit controls the state of the first circuit based on the power supply voltage of the host device obtained from the single bus interface.
[0030] In an implementation of the present application, the control module is specifically configured to configure the third circuit to be in an on state when the first circuit is in the second state, so as to reduce the leakage current.
[0031] In one embodiment of the present application, the control module is specifically used to configure the at least two third circuits to be in a conducting state based on a sleep instruction sent by a host device and received by the communication unit from the single bus interface to reduce the leakage current.
[0032] In one embodiment of the present application, the control module is specifically used to, in response to receiving a key command when the electronic device is in a sleep state, configure the third circuit to disconnect and configure the communication unit to be connected to the single bus interface, so as to send a wake-up command to the host device through the communication unit, so that the host device responds to the key command.
[0033] According to a fourth aspect of the present disclosure, there is provided an electronic device, including:
[0034] at least one processor; and
[0035] a memory communicatively connected to the at least one processor; wherein,
[0036] The memory stores instructions that can be executed by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to perform the method described in the present disclosure.
[0037] According to a fifth aspect of the present disclosure, a non-transitory computer-readable storage medium storing computer instructions is provided, wherein the computer instructions are used to cause the computer to execute the method described in the present disclosure.
[0038] The electronic device disclosed in the present invention includes: a single bus interface, a communication unit, which communicates with a host device through the single bus interface; a first circuit, one end of which is connected to the ground, and the other end is connected to the single bus interface; wherein the first circuit includes a first state and a second state, when the first circuit is in the first state, the first circuit is in a connection state, which is used for the host device to detect the connection state between the electronic device and the host device; when the first circuit is in the second state, the first circuit is in an open circuit state to reduce leakage current.
[0039] It should be understood that the content described in this section is not intended to identify the key or important features of the embodiments of the present disclosure, nor is it intended to limit the scope of the present disclosure. Other features of the present disclosure will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS
[0040] The above and other objects, features and advantages of the exemplary embodiments of the present disclosure will become readily understood by reading the detailed description below with reference to the accompanying drawings. In the accompanying drawings, several embodiments of the present disclosure are shown in an exemplary and non-limiting manner, in which:
[0041] In the drawings, the same or corresponding reference numerals represent the same or corresponding parts.
[0042] Figure 1 A schematic diagram showing a structure of a connection between an electronic device and a host device provided by an embodiment of the present disclosure Figure 1 ;
[0043] Figure 2 A schematic diagram showing a structure of a connection between an electronic device and a host device provided by an embodiment of the present disclosure Figure 2 ;
[0044] Figure 3 A schematic diagram showing a structure of a connection between an electronic device and a host device provided by an embodiment of the present disclosure Figure 3 ;
[0045] Figure 4 A schematic diagram showing a structure of a connection between an electronic device and a host device provided by an embodiment of the present disclosure Figure 4 ;
[0046] Figure 5 A schematic diagram showing a structure of a connection between an electronic device and a host device provided by an embodiment of the present disclosure Figure 5 ;
[0047] Figure 6 A schematic structural diagram showing an exemplary connection between an electronic device and a host device provided in an embodiment of the present application is shown;
[0048] Figure 7 A schematic diagram showing a structure of an exemplary keyboard and a host device connected according to an embodiment of the present application is shown;
[0049] Figure 8 A schematic diagram of the structure of a device according to an embodiment of the present disclosure is shown. DETAILED DESCRIPTION
[0050] In order to make the purpose, features, and advantages of the present disclosure more obvious and easy to understand, the technical solutions in the embodiments of the present disclosure will be clearly and completely described below in conjunction with the drawings in the embodiments of the present disclosure. Obviously, the described embodiments are only part of the embodiments of the present disclosure, not all of the embodiments. Based on the embodiments in the present disclosure, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present disclosure.
[0051] In the following description, reference is made to “some embodiments”, which describe a subset of all possible embodiments, but it will be understood that “some embodiments” may be the same subset or different subsets of all possible embodiments and may be combined with each other without conflict.
[0052] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used herein are only for the purpose of describing the embodiments of this application and are not intended to limit this application.
[0053] Figure 1A schematic diagram showing a structure of a connection between an electronic device and a host device provided in an embodiment of the present application Figure 1 .
[0054] In the embodiment of the present disclosure, the electronic device 100 of the embodiment of the present application is connected to the host device 200 through the single bus interface 110. The electronic device 100 includes the single bus interface 110, a communication unit 120 and a first circuit 130. The communication unit 120 communicates with the host device 200 through the single bus interface 110; the first circuit 130 has one end connected to the ground and the other end connected to the single bus interface 110;
[0055] Among them, the first circuit 130 includes a first state and a second state. When the first circuit 130 is in the first state, the first circuit 130 is in a connection state, which is used for the host device 200 to detect the connection state between the electronic device 100 and the host device 200; when the first circuit 130 is in the second state, the first circuit 130 is in an open circuit state to reduce leakage current.
[0056] The electronic device in this embodiment can be an auxiliary device such as a keyboard, a mouse, a camera, a scanner, a light pen, a handwriting input board, a joystick, a voice input device, etc.; the host device can be a laptop, a computer, a tablet computer, etc. The communication unit can be configured to meet the serial communication interface protocol, for example, it can include Universal Asynchronous Receiver / Transmitter (UART). Of course, the embodiment of the present application does not limit the specific serial communication interface protocol.
[0057] Exemplarily, when the communication unit is configured to meet UART, the communication unit may include a UART receiving port (UARTRx) and a UART transmitting port (UARTTx). Among them, UARTRx is the receiving port of UART. When the electronic device receives data, the data will be transmitted to the electronic device through the UARTRx pin. In communication, UARTRx is used to receive data from the host device; UARTTx is the transmitting port of UART, which is used to send data to the host device. When the electronic device wants to send data, the data will be transmitted to the host device through the UARTTx pin.
[0058] The first circuit in this embodiment can be in a first state or a second state. When the first circuit is in a connection state, since the host device, the first circuit and the ground are connected to form a connection, the host device can detect the connection state of the electronic device through level changes, thereby meeting the power supply demand or command control of the electronic device. After the host device detects the connection state of the electronic device, it can enter the normal working mode. In the working mode, if the first circuit is controlled to be in an open circuit state, the current flowing into the electronic device in the first circuit can be avoided, thereby reducing leakage current and avoiding unnecessary power consumption.
[0059] This embodiment changes the first circuit to the first state or the second state, so that not only the host device can normally detect the connection state of the electronic device, but also the state of the first circuit can be changed after detecting that the electronic device is connected, thereby reducing leakage current.
[0060] Figure 2 A schematic diagram showing a structure of a connection between an electronic device and a host device provided in an embodiment of the present application Figure 2 .like Figure 2 As shown, it also includes a second circuit 140, one end of which is connected to the single bus interface 110, and the other end is connected to the first circuit 130, and the second circuit 140 controls the state of the first circuit 130 based on the power supply voltage of the host device 200 obtained from the single bus interface 110.
[0061] Among them, this embodiment can be configured with a second circuit, and the second circuit is not limited to specific device composition, as long as the state of the first circuit can be controlled by voltage. In one embodiment, when the device host determines that an electronic device is connected, it can provide a power supply voltage to the electronic device, so that the second circuit can directly obtain the power supply voltage provided by the host device, and control the first circuit to switch from the first state to the second state due to the voltage increase.
[0062] Figure 3 A schematic diagram showing a structure of a connection between an electronic device and a host device provided in an embodiment of the present application Figure 3 .like Figure 3 As shown, the first circuit 130 includes a first switch 1310 and a first resistor 1320 connected in series, and the second circuit 140 is connected to the first switch 1310 of the first circuit 130; wherein, in response to the electronic device 100 being connected to the host device 200, the second circuit 140 obtains the power supply voltage of the host device 200 through the single bus interface 110 to control the first switch 1310 to switch from the first state to the second state.
[0063] The first switch is a switch whose open and closed states can be controlled by voltage.
[0064] Specifically, this embodiment exemplarily provides an internal circuit structure of a first circuit, including a first switch and a first resistor. When the first circuit is in a first state, the first switch is closed, and the first switch and the first resistor are in a connection state; when the first circuit is in a second state, the first switch is opened, and the first switch and the first resistor are in a disconnected state. The second circuit can be directly connected to the first switch, and is used to control the first switch through a supply voltage, thereby switching its different states.
[0065] Figure 4 A schematic diagram showing a structure of a connection between an electronic device and a host device provided in an embodiment of the present application Figure 4 .like Figure 4 As shown, it also includes: a third circuit 150, one end of which is connected to the power supply, and the other end is connected to the single bus interface 110; wherein when the first circuit is in the second state, the third circuit is configured to be in a conducting state to reduce the leakage current.
[0066] Specifically, this embodiment may be configured with a third circuit, and a controllable switch may be provided in the third circuit, which is used to configure the third circuit to be in an on state when the first circuit is in an off state, that is, after the host device is connected to the auxiliary device and is in a working mode. Since a group of electronic components is added, the total circuit resistance is reduced, thereby further reducing the leakage current.
[0067] Figure 5 A schematic diagram showing a structure of a connection between an electronic device and a host device provided in an embodiment of the present application Figure 5 .like Figure 5 As shown, it also includes: a plurality of the third circuits 150 connected in parallel and a control unit 160, wherein the control unit 160 is used to configure at least two of the third circuits 150 to be in a conducting state according to a sleep instruction sent by a host device received from the single bus interface 110 to reduce the leakage current.
[0068] The sleep instruction may be a sleep mode for the host device to be in standby and save power, and may also make the electronic devices connected to it enter a sleep mode for standby and save power. The control unit is used to control whether the third circuit is in a conducting state.
[0069] Specifically, the present embodiment can be configured with a plurality of third circuits. When the host device sends a sleep command, not only the host device is in a standby, power-saving sleep mode, but also the electronic devices connected thereto are in a standby, power-saving sleep mode. The present embodiment can configure a plurality of third circuits to be in a conducting state in the sleep mode, and since the total resistance is reduced, the leakage current can be further reduced. In addition, the present embodiment can also set the communication unit to a shutdown mode, so as to avoid power consumption caused by the operation of too many devices.
[0070] Figure 6 FIG. 1 shows a schematic diagram of a structure of an exemplary electronic device and a host device connected to each other provided in an embodiment of the present application. Figure 6 As shown, the first switch is configured as a MOS tube. The drain of the MOS tube is connected to the first resistor R1, and is used to form a first circuit with the first resistor R1; the gate of the MOS tube is connected to the power supply, and is used to form a second circuit, and the state of the MOS tube is controlled by the power supply voltage provided by the host device; the source of the MOS tube is connected to the single bus interface, and is used to form a circuit with the resistor R3 in the host device due to the conduction of the drain and the source when the electronic device is physically connected to the host device, and the host device can determine the physical connection state of the electronic device according to the reduction of the bus level, and then send a power supply instruction, so that the second circuit responds to the power supply instruction, obtains the power supply voltage to increase the gate voltage, resulting in the drain and the source being cut off, and then blocked with the first resistor R1, and the first circuit state is switched from the first state to the second state.
[0071] like Figure 6 As shown, a control unit MCU is also included, and the third circuit may also include a resistor R2. The control unit MCU is used to configure the circuit where R2 is located to be in a conducting state, thereby reducing leakage current.
[0072] This embodiment adds a MOS tube and utilizes the power supply timing of hot plugging of electronic equipment, that is, the feature of detection first and then power supply, to ensure that the pull-down resistor R1 is also effective when just inserted, and the circuit feature of no longer pulling down after power supply.
[0073] In addition, an embodiment of the present application provides an electronic device control method, which is applied to an electronic device, wherein the electronic device includes a single bus interface, a communication unit, and communicates with a host device through the single bus interface; a first circuit, one end of which is connected to the ground, and the other end is connected to the single bus interface; the method includes:
[0074] In response to the host device being connected to the electronic device via the single bus interface, the first circuit is controlled to switch from a first state to a second state.
[0075] Among them, when the first circuit is in a first state, the first circuit is in a connected state, which is used by the host device to detect the connection status between the electronic device and the host device through the single bus interface; when the first circuit is in a second state, the first circuit is in an open circuit state to reduce leakage current.
[0076] Specifically, when the electronic device is physically connected to the host device, the embodiment can detect a voltage drop in the single bus in the host device through the path state of the first circuit, thereby determining that the electronic device and the host device have entered a connection state. Then, after entering the connection state, the embodiment can control the first circuit to switch from the first state to the second state, that is, to the disconnected state, through the control unit; or it can control the first circuit to switch to the second state through the voltage change through the VCC power supply, thereby switching to the disconnected state.
[0077] The configuration of the first circuit of this embodiment can provide different functions when the electronic device is in different states, which can enable the host device to detect the physical access of the electronic device and reduce leakage current by changing the first circuit to an open circuit state after detecting the physical access.
[0078] In one embodiment of the present application, the electronic device also includes a second circuit, one end of which is connected to the single bus interface, and the other end is connected to the first circuit. The method includes responding to the host device being connected to the electronic device through the single bus interface, the second circuit controlling the state of the first circuit based on the power supply voltage of the host device obtained from the single bus interface.
[0079] In one embodiment of the present application, the electronic device also includes a third circuit, one end of the third circuit is connected to the power supply, and the other end is connected to the single bus interface; the method also includes, when the first circuit is in the second state, configuring the third circuit to be in a conductive state to reduce the leakage current.
[0080] In one embodiment of the present application, the electronic device includes a plurality of the third circuits connected in parallel, and the method further includes, based on a sleep instruction sent by a host device and received by the communication unit from the single bus interface, configuring at least two of the third circuits to be in a conducting state to reduce the leakage current.
[0081] For example, this embodiment is described by taking the electronic device as a keyboard as an example. Figure 7 As shown, Figure 7 The schematic diagram of the structure of an exemplary keyboard and host device connection provided by the embodiment of the present application is shown. The first circuit includes a circuit composed of the drain, source and first resistor R2 of the first switch Pmos tube; the communication unit includes a UART receiving port (UARTRx) and a UART transmitting port (UARTTx); the second circuit includes a circuit composed of the gate and power supply of the Pmos tube; the third circuit includes a switch S1 and R_ 内部上拉1 The circuit consists of switch S2 and R_ 内部上拉2 The control unit of the circuit is a Controller module.
[0082] Specifically, in this embodiment, when the keyboard is physically connected to the host device, since the drain and source of the PMOS tube are turned on, the resistor R1 in the host device can form a circuit with R2. The host device can determine the physical connection state of the electronic device according to the reduction of the bus level, and then send a power supply instruction. The second circuit responds to the power supply instruction, obtains the power supply voltage to increase the gate voltage of the PMOS tube, causing the drain and source to be cut off, and then blocked with R2, and the first circuit state is switched from the first state to the second state.
[0083] In this embodiment, during the entire keyboard connection period, since VCC is always powered, the PMOS tube is equivalent to cutting off the pull-down resistor R2, so the pull-down resistor R2 will never divide the voltage or generate leakage current, so the power consumption will be lower. In addition, because there is no pull-down resistor R2 to divide the voltage, the voltage on Data is also higher during sleep, and it is less likely to be mistakenly identified as a low signal.
[0084] Specifically, when the host device requires the keyboard to sleep, the host device sends the sleep command signal to the keyboard through the Data line. The MCU on the keyboard will receive this signal on the UART module. Specifically, the UART_Rx submodule senses and receives this signal and forwards it to the CPU. After translating this signal, the CPU knows that this signal is a sleep command, so it notifies the controller to control the sleep of each submodule of the system. For example, the controller will cut the Data signal line from the UART_Tx connection to the internal pull-up resistor to ensure that this line can still be at a high level, that is, the control unit controls the switch S1 and R_ 内部上拉1 In addition, the controller will also switch the Data signal line from the connection of UART_Rx to the internal pull-up resistor to ensure a stronger pull-up capability, that is, the control unit controls the switch S2 and R_ 内部上拉2 The second and third circuits are also connected, and UART_Tx / UART_Rx are put into sleep mode to save power consumption.
[0085] In one implementation of the present application, it also includes: when the electronic device is in a sleep state, in response to receiving a key command, configuring the third circuit to disconnect, and configuring the communication unit to be connected to the single bus interface, so as to send a wake-up command to the host device through the communication unit, so that the host device responds to the key command.
[0086] Specifically, the keyboard of this embodiment also includes a scanning module for detecting whether there is a key instruction on the keyboard key core. When a key instruction is scanned, the processor CPU receives the instruction and configures the third circuit to be disconnected, specifically, the controller controls the switch S1 and R_ 内部上拉1 disconnect, connect it to UART_Rx, and the controller controls switch S2 to R_内部上拉2 Then, the CPU of this embodiment sends a wake-up command to the host device via the communication unit such as UART_Tx, so that the host device responds to the key command.
[0087] In this embodiment, the first circuit and the second circuit formed by the PMOS tube are designed without affecting the original keyboard function and can be put into sleep and wake up normally. The PMOS tube can play different roles when the keyboard and the host device are in different modes. It can not only detect the physical connection of the keyboard, but also further reduce the overall leakage current.
[0088] In addition, an embodiment of the present application provides an electronic device control device, which is applied to an electronic device, including:
[0089] a control module, configured to control the first circuit to switch from a first state to a second state in response to the host device and the electronic device being connected via the single bus interface, wherein when the first circuit is in the first state, the first circuit is in a connection state, and is used for the host device to detect the connection state between the electronic device and the host device via the single bus interface;
[0090] When the first circuit is in the second state, the first circuit is in an open circuit state to reduce leakage current.
[0091] In one embodiment of the present application, the control module is specifically used to respond to the host device being connected to the electronic device through the single bus interface, and the second circuit controls the state of the first circuit based on the power supply voltage of the host device obtained from the single bus interface.
[0092] In an implementation of the present application, the control module is specifically configured to configure the third circuit to be in an on state when the first circuit is in the second state, so as to reduce the leakage current.
[0093] In one embodiment of the present application, the control module is specifically used to configure the at least two third circuits to be in a conducting state based on a sleep instruction sent by a host device and received by the communication unit from the single bus interface to reduce the leakage current.
[0094] In one embodiment of the present application, the control module is specifically used to, in response to receiving a key command when the electronic device is in a sleep state, configure the third circuit to disconnect and configure the communication unit to be connected to the single bus interface, so as to send a wake-up command to the host device through the communication unit, so that the host device responds to the key command.
[0095] According to an embodiment of the present disclosure, the present disclosure also provides a device and a readable storage medium.
[0096] Figure 8 A schematic block diagram of an example device 800 that can be used to implement an embodiment of the present disclosure is shown. The electronic device is intended to represent various forms of digital computers, such as laptop computers, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. The electronic device can also represent various forms of mobile devices, such as personal digital processing, cellular phones, smart phones, wearable devices, and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely examples and are not intended to limit the implementation of the present disclosure described and / or required herein.
[0097] like Figure 8 As shown, the device 800 includes a computing unit 801, which can perform various appropriate actions and processes according to a computer program stored in a read-only memory (ROM) 802 or a computer program loaded from a storage unit 808 into a random access memory (RAM) 803. In the RAM 803, various programs and data required for the operation of the device 800 can also be stored. The computing unit 801, the ROM 802, and the RAM 803 are connected to each other via a bus 804. An input / output (I / O) interface 805 is also connected to the bus 804.
[0098] A number of components in the device 800 are connected to the I / O interface 805, including: an input unit 806, such as a keyboard, a mouse, etc.; an output unit 807, such as various types of displays, speakers, etc.; a storage unit 808, such as a disk, an optical disk, etc.; and a communication unit 809, such as a network card, a modem, a wireless communication transceiver, etc. The communication unit 809 allows the device 800 to exchange information / data with other devices through a computer network such as the Internet and / or various telecommunication networks.
[0099] The computing unit 801 may be a variety of general and / or special processing components with processing and computing capabilities. Some examples of the computing unit 801 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various dedicated artificial intelligence (AI) computing chips, various computing units running machine learning model algorithms, digital signal processors (DSPs), and any appropriate processors, controllers, microcontrollers, etc. The computing unit 801 performs the various methods and processes described above, such as the control method of the electronic device. For example, in some embodiments, the control method of the electronic device may be implemented as a computer software program, which is tangibly contained in a machine-readable medium, such as a storage unit 808. In some embodiments, part or all of the computer program may be loaded and / or installed on the device 800 via the ROM 802 and / or the communication unit 809. When the computer program is loaded into the RAM 803 and executed by the computing unit 801, one or more steps of the control method of the electronic device described above may be performed. Alternatively, in other embodiments, the computing unit 801 may be configured to execute the control method of the electronic device by any other appropriate means (e.g., by means of firmware).
[0100] Various implementations of the systems and techniques described above herein can be implemented in digital electronic circuit systems, integrated circuit systems, field programmable gate arrays (FPGAs), application specific integrated circuits (ASICs), application specific standard products (ASSPs), integrated systems on a chip (SOCs), complex programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof. These various implementations can include: being implemented in one or more computer programs that can be executed and / or interpreted on a programmable system including at least one programmable processor, which can be a special purpose or general purpose programmable processor that can receive data and instructions from a storage system, at least one input device, and at least one output device, and transmit data and instructions to the storage system, the at least one input device, and the at least one output device.
[0101] The program code for implementing the method of the present disclosure may be written in any combination of one or more programming languages. These program codes may be provided to a processor or controller of a general-purpose computer, a special-purpose computer, or other programmable data processing device, so that the program code, when executed by the processor or controller, enables the functions / operations specified in the flow chart and / or block diagram to be implemented. The program code may be executed entirely on the machine, partially on the machine, partially on the machine and partially on a remote machine as a stand-alone software package, or entirely on a remote machine or server.
[0102] In the context of the present disclosure, a machine-readable medium may be a tangible medium that may contain or store a program for use by or in conjunction with an instruction execution system, device, or equipment. A machine-readable medium may be a machine-readable signal medium or a machine-readable storage medium. A machine-readable medium may include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, device, or equipment, or any suitable combination of the foregoing. A more specific example of a machine-readable storage medium may include an electrical connection based on one or more lines, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.
[0103] To provide interaction with a user, the systems and techniques described herein can be implemented on a computer having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user; and a keyboard and pointing device (e.g., a mouse or trackball) through which the user can provide input to the computer. Other types of devices can also be used to provide interaction with the user; for example, the feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user can be received in any form (including acoustic input, voice input, or tactile input).
[0104] The systems and techniques described herein may be implemented in a computing system that includes back-end components (e.g., as a data server), or a computing system that includes middleware components (e.g., an application server), or a computing system that includes front-end components (e.g., a user computer with a graphical user interface or a web browser through which a user can interact with implementations of the systems and techniques described herein), or a computing system that includes any combination of such back-end components, middleware components, or front-end components. The components of the system may be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: a local area network (LAN), a wide area network (WAN), and the Internet.
[0105] A computer system may include a client and a server. The client and the server are generally remote from each other and usually interact through a communication network. The relationship of client and server is generated by computer programs running on respective computers and having a client-server relationship with each other. The server may be a cloud server, a server of a distributed system, or a server combined with a blockchain.
[0106] It should be understood that the various forms of processes shown above can be used to reorder, add or delete steps. For example, the steps recorded in this disclosure can be executed in parallel, sequentially or in different orders, as long as the desired results of the technical solutions disclosed in this disclosure can be achieved, and this document does not limit this.
[0107] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of the features. In the description of the present disclosure, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.
[0108] The above is only a specific embodiment of the present disclosure, but the protection scope of the present disclosure is not limited thereto. Any person skilled in the art who is familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed in the present disclosure, which should be included in the protection scope of the present disclosure. Therefore, the protection scope of the present disclosure should be based on the protection scope of the claims.
Claims
1. An electronic device, comprising: Single bus interface, A communication unit, communicating with a host device via the single bus interface; A first circuit, one end of which is connected to the ground, and the other end of which is connected to the single bus interface; Wherein, the first circuit includes a first state and a second state, When the first circuit is in the first state, the first circuit is in a connection state, and is used by the host device to detect the connection state between the electronic device and the host device; When the first circuit is in the second state, the first circuit is in an open circuit state to reduce leakage current.
2. The electronic device according to claim 1, further comprising: A second circuit, one end of which is connected to the single bus interface, and the other end of which is connected to the first circuit, The second circuit controls a state of the first circuit based on a power supply voltage of the host device obtained from the single bus interface.
3. The electronic device according to claim 2, wherein the first circuit comprises a first resistor and a first switch connected in series, and the second circuit is connected to the first switch of the first circuit; in, In response to the electronic device being connected to the host device, the second circuit obtains the power supply voltage of the host device through the single bus interface to control the first switch to switch from the first state to the second state.
4. The electronic device according to any one of claims 1 to 3, further comprising: A third circuit, one end of which is connected to a power supply, and the other end of which is connected to the single bus interface; When the first circuit is in the second state, the third circuit is configured to be in a conducting state to reduce the leakage current.
5. The electronic device according to claim 1 comprises a plurality of the third circuits connected in parallel and a control unit, wherein the control unit is used to configure at least two of the third circuits to be in an on state according to a sleep instruction sent by a host device received from the single bus interface to reduce the leakage current.
6. An electronic device control method, applied to an electronic device, wherein the electronic device comprises a single bus interface, A communication unit, communicating with a host device via the single bus interface; A first circuit, one end of which is connected to the ground, and the other end of which is connected to the single bus interface; The method comprises: in response to the host device being connected to the electronic device via the single bus interface, controlling the first circuit to switch from a first state to a second state; Wherein, when the first circuit is in the first state, the first circuit is in a connection state, and is used by the host device to detect the connection state between the electronic device and the host device through the single bus interface; When the first circuit is in the second state, the first circuit is in an open circuit state to reduce leakage current.
7. The electronic device also includes a second circuit, one end of which is connected to the single bus interface, and the other end is connected to the first circuit. The method includes responding to the host device being connected to the electronic device through the single bus interface, and the second circuit controlling the state of the first circuit based on the power supply voltage of the host device obtained from the single bus interface.
8. The electronic device further comprises a third circuit, one end of which is connected to a power source, and the other end of which is connected to the single bus interface; The method further includes, when the first circuit is in the second state, configuring the third circuit to be in an on state to reduce the leakage current.
9. The electronic device includes a plurality of third circuits connected in parallel, and the method further includes, based on a sleep instruction sent by a host device and received by the communication unit from the single bus interface, configuring at least two of the third circuits to be in a conducting state to reduce the leakage current.
10. The method according to claim 9, further comprising: When the electronic device is in sleep mode, in response to receiving a key command, the third circuit is configured to be disconnected, and the communication unit is configured to be connected to the single bus interface, so as to send a wake-up command to the host device through the communication unit, so that the host device responds to the key command.