Analog quantity telemetering and collecting system for space navigation and control method of analog quantity telemetering and collecting system

Abstract

The invention discloses an analog quantity telemetering acquisition system for space navigation and a control method thereof. The system comprises a lower computer module, a mother board and N sub-modules, wherein the lower computer module comprises M operational amplifier follower circuits, an ADC sampling chip circuit, an ADC power supply circuit, an ADC sampling chip gating circuit and a controller circuit; the mother board comprises an SPI (Serial Peripheral Interface) internal bus circuit and signal lines for connecting different modules, and the N sub-modules comprise slave interfaces of an SPI internal bus and an analog quantity telemetering acquisition circuit; the lower computer module and the N sub-modules are assembled and integrated through a mother board, and the lower computer module and the N sub-modules complete transmission of analog quantity telemetering data through an SPI internal bus. According to the invention, the number of connector nodes is reduced, and the reliability of the connector is improved; the method adapts to a current fast-paced spaceflight launching task; a large amount of analog quantity can be rapidly acquired; and deviation of the analog quantity acquired by the lower computer module due to ground wire pressure difference caused by long analog quantity transmission distance is avoided.

Description

Technical Field

[0001] The invention belongs to the technical field of aerospace power supply control, and in particular relates to an aerospace analog quantity telemetry acquisition system and a control method thereof. Background Art

[0002] In the aerospace power supply system, the power controller, as a key unit of the power subsystem, provides power to the spacecraft during the launch phase, mission phase, and shadow period. The power controller is composed of multiple functional modules, and each functional module has analog quantities that need to be collected. The real-time, fast, and high-precision collection of analog quantities largely determines the reliability of the power controller.

[0003] The analog quantity telemetry collection of the existing satellite power controller is mainly concentrated in the lower computer module. The analog quantities of other modules of the power controller are transmitted to the lower computer module through the electrical connector and the motherboard. The controller output signal in the lower computer module controls the multi-way selection switch and the AD sampling chip to realize the time-sharing polling collection of the analog quantities transmitted from each module to the lower computer module. However, the existing satellite power control circuit and method have the following problems:

[0004] (1) The analog quantities of each module of the satellite power controller are transmitted to the lower computer module through the connector and the motherboard, resulting in too many connector nodes from the lower computer module to the motherboard. Too many connector nodes make it difficult to select a suitable connector. At the same time, too many nodes make it inconvenient to plug and unplug the motherboard and the lower computer module. Repeated plugging and unplugging of the motherboard and the connector may cause the connector point to fail, resulting in loss of satellite power controller function and even spacecraft mission failure.

[0005] (2) The number of analog quantities corresponding to different satellite power controllers is inconsistent, resulting in inconsistent numbers of nodes between each module connector and the motherboard, making it impossible to achieve standardized design of each module, which is not conducive to the rapid design of satellite power controllers and the current fast-paced space launch missions;

[0006] (3) The AD chip sampling rate used in the existing satellite power controller analog quantity collection is slow. When a large amount of analog quantity needs to be collected, the time for one round of collection is relatively long, which cannot meet the demand for fast collection.

[0007] (4) The analog quantities of the existing modules are transmitted to the lower computer module through the connector and the motherboard for centralized collection. Since the analog quantity transmission distance between each module and the lower computer module is long and there is a ground voltage difference, the analog quantity collected by the lower computer module is biased. Summary of the invention

[0008] In order to solve the above problems, the present invention provides an analog quantity telemetry acquisition system for aerospace, and the technical solution is as follows:

[0009] An aerospace analog telemetry acquisition system, characterized in that it comprises: a lower computer module, a motherboard, and N submodules, wherein the lower computer module and the N submodules are assembled and integrated through the motherboard, and the lower computer module and the N submodules complete the transmission of analog telemetry data through an SPI internal bus;

[0010] The lower computer module includes M operational amplifier follower circuits, an ADC sampling chip circuit, an ADC power supply circuit, an ADC sampling chip gating circuit, and a controller circuit; wherein M is a positive integer less than or equal to 8;

[0011] The motherboard includes an SPI internal bus circuit and signal lines connecting different modules;

[0012] The N submodules include a slave interface of the SPI internal bus and an analog telemetry acquisition circuit, wherein N is an integer greater than or equal to 2 and less than or equal to 7;

[0013] Preferably, each of the M operational amplifier follower circuits comprises an operational amplifier DMN-1, a resistor RMN-1, a resistor RMN-4, a resistor RMN-2, a resistor RMN-3 and a capacitor CMN-1, a capacitor CMN-3 and a capacitor CMN-2; wherein:

[0014] The resistor MN-1 and the resistor RMN-2 are current limiting resistors for the power supply input voltage of the operational amplifier DMN-1, and the resistor RMN-3 is a feedback resistor of the operational amplifier DMN-1;

[0015] The capacitors CMN-1 and CMN-2 are filter capacitors for the power supply input voltage of the operational amplifier DMN-1;

[0016] Resistors RMN-4 and CMN-3 form an RC filter circuit, which filters the analog telemetry signal and outputs it to the 8-channel analog telemetry input channel of the ADC sampling chip circuit;

[0017] Preferably, the ADC sampling chip circuit includes a chip UN-1, a resistor RN-5, a resistor RN-6, and capacitors CN-4, CN-5, CN-6, and CN-7, wherein:

[0018] Chip UN-1 is a low-power, eight-channel 12-bit analog-to-digital converter with a maximum input clock frequency of 16MHz and a maximum sampling rate of 1MSPS;

[0019] Resistor RN-5 connects the analog power supply VA and the digital power supply VD of chip UN-1; resistor RN-6 connects the analog ground AGND and the digital ground DGND of chip U1-1;

[0020] Capacitor CN-6 and capacitor CN-7 filter the voltage input to the analog power supply VA terminal of the chip;

[0021] Capacitor CN-4 and capacitor CN-5 filter the voltage input to the digital power supply VD terminal of the chip.

[0022] Preferably, the ADC power supply circuit is composed of chip UN-2 and capacitors CN-8 and CN-9, wherein chip UN-2 is a low-power voltage regulator that converts the input +12V voltage into a +5V voltage to supply the ADC chip; capacitors CN-8 and CN-9 act as input filters.

[0023] Preferably, the ADC sampling chip selection circuit is composed of chip U2, resistor R2 and capacitor C2, wherein chip U2 is a decoder with three-channel input and eight-channel output, which controls which of the eight outputs outputs a low level by inputting eight binary combinations of three address signals A, B and C; resistor R2 is a current limiting resistor for the power supply input voltage of chip U2; capacitor C2 is a filter capacitor for the power supply input voltage of chip U2.

[0024] Preferably, the controller circuit is composed of a chip U1, a resistor R1 and a capacitor C1, wherein the chip U1 is the processor of the entire satellite power controller, and controls the analog telemetry acquisition of each submodule through the SPI internal bus; the resistor R1 is the current limiting resistor of the power supply input voltage of the chip U1; and the capacitor C1 is the filter capacitor of the power supply input voltage of the chip U1.

[0025] Preferably, the SPI internal bus circuit is composed of four buses: SCLK, DIN, DOUT and CS. The digital quantity converted and output by the ADC sampling chip is transmitted to the controller circuit through the cooperation of the four buses to complete the remote sensing collection of the analog quantity.

[0026] Preferably, the SCLK is a digital clock input signal, which directly controls the conversion process and data reading and reading; the DIN is a digital data input signal, and the data of the control register is written through the signal of this port; the DOUT is a digital data output signal; and the CS is a chip select signal of a 12-bit analog-to-digital converter; the operational amplifier is OP07, the analog-to-digital converter is ADC128S102, the voltage regulator is LP2950, ​​the decoder is M54HC138, and the processor is SMJ320F2812.

[0027] Preferably, each submodule includes M′ operational amplifier follower circuits, an ADC sampling chip circuit, and an ADC power supply circuit, where M′ is a positive integer less than or equal to eight.

[0028] The present invention also provides a control method for the above-mentioned aerospace analog quantity telemetry acquisition system, characterized in that it comprises the following steps:

[0029] S1, the three I / O ports of the processor of the controller circuit in the lower computer module (1) respectively output three address signals A, B and C, which are input to the ADC sampling chip pass selection circuit;

[0030] S2, ADC sampling chip gating circuit converts three address signals A, B and C into Y0, Y1, Y2, Y3, Y4, Y5, Y6, Y7 chip selection signals through a three-channel input and eight-channel output decoder and inputs them into the CS port of the 12-bit analog-to-digital converter;

[0031] S3. When the chip select input terminal CS of the 12-bit analog-to-digital converter is high, the chip is in an inoperative state, and the digital output terminal DOUT is in a high impedance state. When the chip select input terminal CS changes from high to low, the DIN signal is sampled from the rising edge of the first clock signal input terminal SCLK, and the chip officially starts to work. Every 16 clocks are a conversion cycle, and a 12-bit serial data is output. In the 16 clock cycles, 1 to 4 clocks output data 0, and 5 to 16 are 12-bit digital serial output data.

[0032] S4. The data of the control register is written through the DIN signal of the SPI bus. The three control bits BIT3, BIT4 and BIT5 are used to determine which input channel signal from IN0 to IN7 will be selected for sampling in the next conversion cycle. The CS signal is used to select each analog-to-digital converter to complete the polling collection of all input analog quantities.

[0033] Compared with the prior art, the aerospace analog quantity telemetry acquisition system and control method thereof provided by the present invention have the following beneficial effects:

[0034] (1) The present invention adopts the method of "centralized processing and distributed collection" to distribute the AD sampling chip ADC128S102 inside each module, thereby avoiding the analog quantity of each module being transmitted to the lower computer module through the connector and the motherboard, reducing the number of connector nodes, and improving the reliability of the connector.

[0035] (2) The present invention adopts an SPI internal bus circuit, and connects each module only through four buses, namely, SCLK, DIN, DOUT and CS, so as to facilitate the standardized design of each module of the satellite power controller, thereby adapting to the current fast-paced space launch missions.

[0036] (3) The AD sampling chip ADC128S102 used in the present invention can achieve a maximum input clock frequency of 16 MHz and a maximum sampling rate of up to 1 MSPS, and can quickly collect a large amount of analog quantities.

[0037] (4) The present invention collects the analog quantities of each module of the satellite power controller inside the module, converts the analog quantities into digital quantities, and transmits them to the lower computer module for centralized processing through the SPI internal bus circuit, thereby avoiding the ground voltage difference caused by the long analog quantity transmission distance, which causes the analog quantity collected by the lower computer module to have deviations. BRIEF DESCRIPTION OF THE DRAWINGS

[0038] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0039] Figure 1 The present invention provides a schematic diagram of the structure of an analog quantity telemetry acquisition system for aerospace use.

[0040] Reference numerals: DMN-1 is an operational amplifier; RMN-1, RMN-4, RMN-2, RMN-3 are resistors; CMN-1, CMN-3, CMN-2 are capacitors;

[0041] UN-1 is a chip; RN-5 is a resistor, RN-6 is a resistor; CN-4 is a capacitor; CN-5 is a capacitor; CN-6 is a capacitor; CN-7 is a capacitor;

[0042] UN-2 is a chip; CN-8 and CN-9 are capacitors;

[0043] U2 is a chip; R2 is a resistor; C2 is a capacitor;

[0044] U1 is the chip, R1 is the resistor and C1 is the capacitor;

[0045] SCLK is a digital clock input signal; DIN is a digital data input signal; DOUT is a digital data output signal, and the CS is a chip select signal of the 12-bit analog-to-digital converter.

[0046] Specific implementation methods

[0047] The present invention will be further described below in conjunction with the accompanying drawings.

[0048] The aerospace analog quantity telemetry acquisition system of the present invention comprises: a lower computer module, a motherboard, and N sub-modules, wherein the lower computer module comprises M operational amplifier follower circuits, an ADC sampling chip circuit, an ADC power supply circuit, an ADC sampling chip gating circuit, and a controller circuit; and the motherboard comprises an SPI internal bus circuit and a signal line connecting different modules. The lower computer module serves as a control core, and transmits the telemetry data in the N sub-modules to the controller circuit in real time through the SPI internal bus, completes the acquisition of the analog quantity of the entire satellite power controller, reduces the number of nodes from the sub-module to the lower computer module connector, improves the sampling accuracy and speed, avoids the analog quantity transmission distance being far, and the ground line voltage difference is caused, resulting in the deviation of the analog quantity collected by the lower computer module, and is easy to realize the standardized design of each module of the satellite power controller, and adapts to the current fast-paced space launch mission.

[0049] An aerospace analog telemetry acquisition system includes: a lower computer module, a motherboard, and N submodules, wherein: the lower computer module and the N submodules are assembled and integrated through the motherboard, and the lower computer module and the N submodules complete the transmission of analog telemetry data through an SPI internal bus;

[0050] The lower computer module includes M operational amplifier follower circuits, an ADC sampling chip circuit, an ADC power supply circuit, an ADC sampling chip gating circuit, and a controller circuit; wherein M is a positive integer less than or equal to 8;

[0051] The motherboard includes an SPI internal bus circuit and signal lines connecting different modules;

[0052] The N submodules include a slave interface of the SPI internal bus, an analog telemetry acquisition circuit and other functional circuits, wherein N is an integer greater than or equal to 2 and less than or equal to 7, and each submodule includes M' op amp follower circuits, an ADC sampling chip circuit, and an ADC power supply circuit, and M' is a positive integer less than or equal to 8;

[0053] Preferably, each of the M operational amplifier follower circuits comprises an operational amplifier DMN-1, a resistor RMN-1, a resistor RMN-4, a resistor RMN-2, a resistor RMN-3 and a capacitor CMN-1, a capacitor CMN-3 and a capacitor CMN-2; wherein:

[0054] The resistor MN-1 and the resistor RMN-2 are current limiting resistors for the power supply input voltage of the operational amplifier DMN-1, and the resistor RMN-3 is a feedback resistor of the operational amplifier DMN-1;

[0055] The capacitors CMN-1 and CMN-2 are filter capacitors for the power supply input voltage of the operational amplifier DMN-1;

[0056] Resistors RMN-4 and CMN-3 form an RC filter circuit, which filters the analog telemetry signal and outputs it to the 8-channel analog telemetry input channel of the ADC sampling chip circuit.

[0057] Preferably, the ADC sampling chip circuit includes a chip UN-1, a resistor RN-5, a resistor RN-6, and capacitors CN-4, CN-5, CN-6, and CN-7, wherein:

[0058] Chip UN-1 is a low-power, eight-channel 12-bit analog-to-digital converter with a maximum input clock frequency of 16MHz and a maximum sampling rate of 1MSPS;

[0059] Resistor RN-5 connects the analog power supply VA and the digital power supply VD of chip UN-1; resistor RN-6 connects the analog ground AGND and the digital ground DGND of chip U1-1;

[0060] Capacitor CN-6 and capacitor CN-7 filter the voltage input to the analog power supply VA terminal of the chip;

[0061] Capacitor CN-4 and capacitor CN-5 filter the voltage input to the digital power supply VD terminal of the chip.

[0062] Preferably, the ADC power supply circuit is composed of chip UN-2 and capacitors CN-8 and CN-9. Chip UN-2 is a low-power voltage regulator that converts the input +12V voltage into +5V voltage to supply the ADC chip; capacitors CN-8 and CN-9 play the role of input filtering.

[0063] Preferably, the ADC sampling chip selection circuit is composed of chip U2, resistor R2 and capacitor C2, wherein chip U2 is a decoder with three-channel input and eight-channel output, which controls which of the eight outputs outputs a low level by inputting eight binary combinations of three address signals A, B and C; resistor R2 is a current limiting resistor for the power supply input voltage of chip U2; capacitor C2 is a filter capacitor for the power supply input voltage of chip U2.

[0064] Preferably, the controller circuit is composed of a chip U1, a resistor R1 and a capacitor C1, wherein the chip U1 is the processor of the entire satellite power controller, and controls the analog telemetry acquisition of each submodule through the SPI internal bus; the resistor R1 is the current limiting resistor of the power supply input voltage of the chip U1; and the capacitor C1 is the filter capacitor of the power supply input voltage of the chip U1.

[0065] Preferably, the SPI internal bus circuit is composed of four buses: SCLK, DIN, DOUT and CS. The digital quantity converted and output by the ADC sampling chip is transmitted to the controller circuit through the cooperation of the four buses to complete the remote sensing collection of the analog quantity.

[0066] Preferably, the SCLK is a digital clock input signal, which directly controls the conversion process and data reading in and out. The DIN is a digital data input signal, and the data of the control register is written through the signal of this port. The DOUT is a digital data output signal, and the CS is a chip select signal of the 12-bit analog-to-digital converter.

[0067] Preferably, the operational amplifier is OP07, the analog-to-digital converter is ADC128S102, the voltage regulator is LP2950, ​​the decoder is M54HC138, and the processor is SMJ320F2812.

[0068] Although the present invention has been disclosed as a preferred embodiment, it is not intended to limit the present invention. Any person skilled in the art can make possible changes and modifications to the technical solution of the present invention by using the above disclosed methods and technical contents without departing from the spirit and scope of the present invention. Therefore, any simple modification, equivalent change and modification made to the above embodiments according to the technical essence of the present invention without departing from the content of the technical solution of the present invention shall fall within the protection scope of the technical solution of the present invention. The contents not described in detail in the specification of the present invention belong to the known technology of professional and technical personnel in this field.

Claims

1. An analog quantity telemetry acquisition system for aerospace, characterized in that: include: A lower computer module, a motherboard, and N sub-modules, wherein the lower computer module includes M operational amplifier follower circuits, an ADC sampling chip circuit, an ADC power supply circuit, an ADC sampling chip gating circuit, and a controller circuit; wherein M is a positive integer less than or equal to 8; The motherboard includes an SPI internal bus circuit and signal lines connecting different modules; The N submodules include a slave interface of the SPI internal bus and an analog telemetry acquisition circuit, wherein N is an integer greater than or equal to 2 and less than or equal to 7; The lower computer module and the N sub-modules are assembled and integrated through a motherboard, and the lower computer module and the N sub-modules complete the transmission of analog telemetry data through an SPI internal bus.

2. The aerospace analog quantity telemetry acquisition system according to claim 1, characterized in that: Each of the M operational amplifier follower circuits comprises an operational amplifier DMN-1, a resistor RMN-1, a resistor RMN-4, a resistor RMN-2, a resistor RMN-3 and a capacitor CMN-1, a capacitor CMN-3 and a capacitor CMN-2; wherein: The resistor MN-1 and the resistor RMN-2 are current limiting resistors for the power supply input voltage of the operational amplifier DMN-1, and the resistor RMN-3 is a feedback resistor of the operational amplifier DMN-1; The capacitors CMN-1 and CMN-2 are filter capacitors for the power supply input voltage of the operational amplifier DMN-1; Resistors RMN-4 and CMN-3 form an RC filter circuit, which filters the analog telemetry signal and outputs it to the 8-channel analog telemetry input channel of the ADC sampling chip circuit.

3. The aerospace analog quantity telemetry acquisition system according to claim 1 is characterized in that: The ADC sampling chip circuit includes a chip UN-1, a resistor RN-5, a resistor RN-6, and capacitors CN-4, CN-5, CN-6, and CN-7, wherein: Chip UN-1 is a low-power, eight-channel 12-bit analog-to-digital converter with a maximum input clock frequency of 16MHz and a maximum sampling rate of 1MSPS; Resistor RN-5 connects the analog power supply VA and the digital power supply VD of chip UN-1; resistor RN-6 connects the analog ground AGND and the digital ground DGND of chip U1-1; Capacitor CN-6 and capacitor CN-7 filter the voltage input to the analog power supply VA terminal of the chip; Capacitor CN-4 and capacitor CN-5 filter the voltage input to the digital power supply VD terminal of the chip.

4. The aerospace analog quantity telemetry acquisition system according to claim 1, characterized in that: The ADC power supply circuit is composed of chip UN-2 and capacitors CN-8 and CN-9, wherein the chip UN-2 is a low-power voltage regulator that converts the input +12V voltage into a +5V voltage to supply the ADC chip; capacitors CN-8 and CN-9 act as input filters.

5. The aerospace analog quantity telemetry acquisition system according to claim 1, characterized in that: The ADC sampling chip selection circuit is composed of chip U2, resistor R2 and capacitor C2, wherein chip U2 is a decoder with three-channel input and eight-channel output, which controls which of the eight outputs outputs a low level by inputting eight binary combinations of three address signals A, B and C; resistor R2 is a current limiting resistor for the power supply input voltage of chip U2; capacitor C2 is a filter capacitor for the power supply input voltage of chip U2.

6. The aerospace analog quantity telemetry acquisition system according to claim 1, characterized in that: The controller circuit is composed of a chip U1, a resistor R1 and a capacitor C1, wherein the chip U1 is the processor of the entire satellite power controller, and controls the analog telemetry acquisition of each submodule through the SPI internal bus; the resistor R1 is the current limiting resistor of the power supply input voltage of the chip U1; and the capacitor C1 is the filter capacitor of the power supply input voltage of the chip U1.

7. The aerospace analog quantity telemetry acquisition system according to claim 1, characterized in that: The SPI internal bus circuit consists of SCLK, DIN, DOUT and It consists of four buses, through which the digital quantity converted and output by the ADC sampling chip is transmitted to the controller circuit to complete the remote sensing collection of the analog quantity.

8. The aerospace analog quantity telemetry acquisition system according to claim 7, characterized in that: The SCLK is a digital clock input signal, which directly controls the conversion process and data reading and reading; the DIN is a digital data input signal, and the data of the control register is written through the signal of this port; the DOUT is a digital data output signal. This is the chip select signal for the 12-bit analog-to-digital converter.

9. The aerospace analog quantity telemetry acquisition system according to claim 1, characterized in that: Each submodule includes M' operational amplifier follower circuits, an ADC sampling chip circuit, and an ADC power supply circuit, where M' is a positive integer less than or equal to 8.

10. The control method of the aerospace analog quantity telemetry acquisition system according to any one of claims 1 to 9, characterized in that: It includes the following steps: S1, the three I / O ports of the processor of the controller circuit in the lower computer module (1) respectively output three address signals A, B and C, which are input to the ADC sampling chip pass selection circuit; S2, ADC sampling chip selection circuit converts the three address signals A, B and C into Chip select signal input to the 12-bit analog-to-digital converter port; S3, when the 12-bit analog-to-digital converter chip select input When it is high, the chip is not working, the digital output terminal DOUT is in high impedance state, and when the chip select input terminal The chip starts to work from high to low, starting from the rising edge of the first clock signal input terminal SCLK, when the DIN signal is input. Every 16 clocks are a conversion cycle, and a 12-bit serial data is output. In the 16 clock cycles, 1 to 4 clocks output data 0, and 5 to 16 are 12-bit digital serial output data. S4, write the data of the control register through the DIN signal of the SPI internal bus, where the three control bits BIT3, BIT4 and BIT5 are used to determine which input channel signal among IN0~IN7 will be selected for sampling in the next conversion cycle. The signal selects each analog-to-digital converter to complete the polling acquisition of all input analog quantities.

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