Jitter Analysis Method and System for High-Speed ​​Serial Signals

Abstract

This invention belongs to the field of signal processing technology, specifically relating to a jitter analysis method and system for high-speed serial signals. By identifying and separating the data jitter sequence DDJ from the total jitter sequence TIE in a high-speed serial signal, a first jitter sequence containing random jitter data RJ is obtained. A first spectrum is obtained by spectral transformation of the first jitter sequence, and a first power spectrum is calculated from the first spectrum. The total power and root mean square (RMS) value of the random jitter are obtained by calculating a portion of the first power spectrum, thus achieving RMS estimation of random jitter in high-speed serial systems, improving accuracy, and being applicable to signals with various code types. By selectively accumulating power spectrum segments, stable random jitter estimation is achieved, reducing estimation complexity and saving system resources.

Description

Technical Field

[0001] This invention belongs to the field of signal processing technology, specifically relating to a jitter analysis method and system for high-speed serial signals. Background Technology

[0002] Jitter refers to the amount of time a signal actually transitions ahead or behind its expected transition time. In electronic devices, jitter is typically caused by factors such as clock source instability, noise interference during signal transmission, and nonlinearity of circuit components. In high-speed serial systems, jitter is usually measured by time interval error (TIE). TIE represents a direct measurement of jitter and includes all types of jitter components. By isolating the random jitter in TIE and characterizing the random jitter of the signal under test using an oscilloscope, the quality of high-speed serial signals during transmission can be evaluated, thereby ensuring the reliability of data transmission.

[0003] Traditional methods for jittering high-speed serial signals typically rely on setting a fixed threshold to distinguish between periodic and random jitter. The basic idea is to compare the jitter components in the TIE data with the set threshold; jitter components exceeding the threshold are considered periodic jitter, while those below are considered random jitter. However, this method has some problems in practical applications.

[0004] First, obtaining the threshold value is quite complex. In practical systems, due to the influence of various factors, such as system noise and signal transmission loss, determining the threshold value requires comprehensive consideration of multiple factors, which makes obtaining the threshold value relatively complex.

[0005] Secondly, the threshold value is easily affected by the magnitude of periodic jitter. When the periodic jitter is large, the threshold value may need to be increased accordingly to avoid misclassifying too many periodic jitters as random jitters; conversely, when the periodic jitter is small, the threshold value needs to be decreased accordingly to avoid misclassifying too many random jitters as periodic jitters. This dependence on the threshold value makes the root mean square value estimation result of random jitter easily affected by the magnitude of periodic jitter, thus leading to inaccurate estimation results.

[0006] Therefore, traditional methods for estimating the root mean square value of random jitter have certain limitations in practical applications. To address these issues, a more accurate and reliable method for estimating the root mean square value of random jitter is needed to achieve precise measurement and analysis of random jitter. Summary of the Invention

[0007] The purpose of this invention is to provide a jitter analysis method and system for high-speed serial signals, thereby solving at least one problem existing in the background art.

[0008] To achieve the above objectives, the present invention provides a method and system for jitter analysis of high-speed serial signals.

[0009] In a first aspect, embodiments of this application provide a jitter analysis method for high-speed serial signals, used by a high-speed serial interface tester to analyze high-speed serial signals. The high-speed serial interface tester includes a signal generator and a digital oscilloscope. The digital oscilloscope includes a signal recovery module, a jitter analysis module, and a display module. The jitter analysis module includes a TIE data storage module, a jitter separation module, a spectrum conversion module, a power spectrum selection module, and a power spectrum calculation module. The signal generator generates an input signal to the device under test (DUT), and the DUT outputs a test signal to the signal recovery module. The method includes the following steps:

[0010] The signal recovery module obtains the total jitter sequence TIE based on the time interval error of the measured signal, and sends the total jitter sequence TIE to the TIE data storage module. The total jitter sequence TIE includes a deterministic jitter sequence DJ and a random jitter sequence RJ. The deterministic jitter sequence DJ includes a data-correlated jitter sequence DDJ and a periodic jitter PJ.

[0011] The jitter separation module separates the data-related jitter sequence DDJ in the total jitter sequence TIE to obtain a first jitter sequence, and sends the first jitter sequence to the spectrum conversion module. The first jitter sequence includes the random jitter sequence RJ and the periodic jitter PJ.

[0012] The spectrum conversion module calculates and obtains a first spectrum based on the first jitter sequence, the first spectrum including the amplitude of the random jitter sequence RJ and the periodic jitter PJ in the frequency domain;

[0013] The spectrum conversion module calculates and obtains the first power spectrum based on the first spectrum and sends it to the dithering power calculation module;

[0014] The power spectrum selection module selects and extracts the first power spectrum according to the first preset rule to obtain a first power spectrum segment, and sends the first power spectrum segment to the power spectrum calculation module. The first power spectrum segment includes the amplitude of the random jitter sequence RJ on the power spectrum.

[0015] The power spectrum calculation module performs cumulative calculation on the first power spectrum segment to obtain the total power and root mean square value of the random jitter sequence RJ, and outputs it to the display module.

[0016] In conjunction with the first aspect, in some embodiments, the power spectrum selection module extracts any spectral segment from 3 / 4 to 1 of the first power spectrum.

[0017] In some implementations, the signal recovery module obtains the total jitter sequence TIE by performing clock recovery calculations on the measured signal with a symbol period of N bits, and the length of the TIE is L.

[0018] In some implementations, the signal recovery module is further included to operate according to the following method steps:

[0019] Obtain the actual edge of the signal under test with a symbol period of N bits, obtain the ideal edge of clock recovery establishment, and subtract the ideal edge from the actual edge of the signal under test with a symbol period of N bits to obtain the total jitter sequence TIE.

[0020] The clock recovery method is a phase-locked loop clock recovery method.

[0021] In some implementations, separating the data-related jitter sequence DDJ in the total jitter sequence TIE to obtain a first jitter sequence further includes: dividing the total jitter sequence TIE into multiple groups according to the symbol period N bits, with each group containing TIE sequences with the same symbol number;

[0022] Extract the TIE sequences with the same symbol number contained in each group to obtain the jitter sequence of each N-bit TIE. i Let i = 1, 2, ..., N bits, with a length of ... Where i represents the symbol number, and TIE1 represents the jitter sequence composed of the first jitter sequence within each symbol period;

[0023] The data-related jitter sequence DDJ is obtained by averaging the jitter sequence of each N-bit bit.

[0024] In some implementations, the jitter separation module further includes concatenating the data-related jitter sequence DDJ into a length identical to the total jitter sequence TIE.

[0025] In some implementations, the spectrum conversion module performs a discrete Fourier transform on the first jitter sequence to obtain the first spectrum, which is used to represent the frequency domain variation of the measured signal.

[0026] In some implementations, the spectrum conversion module calculates and obtains the first power spectrum based on the first spectrum, and further includes: the spectrum conversion module taking a one-sided power spectrum from the first power spectrum.

[0027] Secondly, this application also provides a jitter analysis system for high-speed serial signals, including a signal recovery module, a jitter analysis module, and a display module. The jitter analysis module includes a TIE data storage module, a jitter separation module, a spectrum conversion module, a power spectrum selection module, and a power spectrum calculation module. When the jitter analysis system executes the program or the instructions, it implements a jitter analysis method for high-speed serial signals as described in any of the foregoing embodiments.

[0028] Thirdly, this application also provides a computer-readable storage medium having a computer program stored thereon, which, when executed, can implement the jitter analysis method for a high-speed serial signal as described in any of the foregoing embodiments.

[0029] This application provides a method and system for jitter analysis of high-speed serial signals. It identifies and separates the data jitter sequence DDJ from the total jitter sequence TIE in a high-speed serial signal to obtain a first jitter sequence containing random jitter data RJ. A first spectrum is obtained by spectral transformation of the first jitter sequence, and a first power spectrum is calculated from the first spectrum. The total power and root mean square (RMS) value of random jitter are obtained by calculating a portion of the first power spectrum, thus achieving RMS estimation of random jitter in high-speed serial systems and improving accuracy. Furthermore, by selectively accumulating power spectrum segments, stable estimation of random jitter is achieved, reducing estimation complexity and saving system resources. Attached Figure Description

[0030] Figure 1 This is a flowchart of a jitter analysis method for high-speed serial signals provided in an embodiment of the first aspect of the present invention;

[0031] Figure 2 This is a principle block diagram provided in an embodiment of the first aspect of the present invention;

[0032] Figure 3 This is a power spectrum provided in an embodiment of the present invention;

[0033] Figure 4 This is a flowchart of a method provided in another embodiment of the first aspect of the present invention;

[0034] Figure 5 This is a flowchart of a method provided by another embodiment of the first aspect of the present invention. Detailed Implementation

[0035] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0036] Traditional random jitter root mean square estimation methods typically rely on setting a fixed threshold to distinguish between periodic jitter and random jitter. However, obtaining the threshold is complex, and the value of the threshold is easily affected by the magnitude of the periodic jitter.

[0037] Therefore, this application provides a jitter analysis method and system for high-speed serial signals.

[0038] The technical solutions in the embodiments of this application will now be described with reference to the accompanying drawings.

[0039] As used in this specification, the terms "component," "unit," "system," etc., are used to refer to computer-related entities, hardware, firmware, combinations of hardware and software, software, or software in execution. For example, a component can be, but is not limited to, a process running on a processor, a processor, an object, an executable file, an execution thread, a program, and / or a computer. As illustrated, applications running on computing devices and computing devices can both be components. One or more components may reside in a process and / or an execution thread, and components may be located on a single computer and / or distributed among two or more computers. Furthermore, these components can be executed from various computer-readable media on which various data structures are stored. Components can communicate, for example, via local and / or remote processes based on signals having one or more data packets (e.g., data from two components interacting with another component between a local system, a distributed system, and / or a network, such as the Internet interacting with other systems via signals).

[0040] To facilitate understanding of the embodiments of this application, the terminology involved in the embodiments of this application will be briefly introduced below.

[0041] Noise is a natural process that always accompanies signal transmission and reception. Any signal unintentionally superimposed on an ideal signal can be collectively referred to as noise. The deviation of noisy signals from their ideal state can be analyzed from two aspects: timing offset and amplitude offset. This invention relates to timing offset. Timing offset, also known as timing jitter, affects system performance at the moment of signal edge transitions. In electronic devices, jitter is typically caused by factors such as clock source instability, noise interference during signal transmission, and nonlinearity of circuit components. To evaluate the performance stability and signal quality of communication systems, jitter testing is crucial. The principle of jitter testing is to capture and analyze the time changes of a signal using an oscilloscope. In jitter testing, the oscilloscope samples and records the time changes of the signal, and then uses mathematical algorithms to calculate and display the jitter parameters of the signal, such as jitter amplitude, jitter period, and jitter spectrum.

[0042] 1. Measurement of jitter

[0043] Jitter is defined as the short-term variation of a signal relative to its ideal time position, and it is an important parameter for evaluating signal quality in the time domain. Jitter can be measured in three ways: Time Interval Error (TIE), Period Jitter (PJ), and Cycle-to-Cycle Jitter (CCJ). These three measurements are essentially equivalent. Time Interval Error represents the deviation between each actual clock edge and the ideal clock edge. Cycle Jitter represents the deviation between each actual clock period and the ideal clock period, and can also be expressed as the difference between the Time Interval Error and the Cycle-to-Cycle Jitter. Cycle-to-Cycle Jitter represents the difference between the current period and the previous period of the actual clock.

[0044] 2. Classification of jitter

[0045] Total jitter (TJ) can be divided into deterministic jitter (DJ) and random jitter (RJ).

[0046] Deterministic jitter includes all bounded jitter components of the probability density function and is described using peak-to-peak values. Based on different generation mechanisms, deterministic jitter can be further divided into data-dependent jitter (DDJ) and bounded-uncorrelated jitter (BUJ). Data-dependent jitter mainly consists of duty-cycle distortion jitter (DCD) and intersymbol interference (ISI). Bounded-uncorrelated jitter is bounded but unrelated to the transmitted data, caused by crosstalk between adjacent channels, and can be further divided into periodic jitter (PJ) and non-periodic jitter.

[0047] Random jitter encompasses all jitter components of probability density distribution functions that are unbounded, meaning their range grows infinitely with the increase in the number of jitter samples measured. In electronic systems, random jitter is generated by the device's electronic noise (thermal noise, flicker noise, and shot noise), exhibiting a Gaussian distribution and described by the root-mean-square (rms) value.

[0048] 3. Decomposition of jitter

[0049] To understand the root cause of jitter, it is essential to separate and identify each jitter component. This invention primarily introduces the identification and estimation of random jitter in high-speed serial signals during jitter decomposition.

[0050] The specific implementation method is as follows:

[0051] Example 1

[0052] This embodiment provides a jitter analysis method for high-speed serial signals, which can be used in a digital oscilloscope in a high-speed serial interface tester, or other devices with signal analysis functions, such as a spectrum analyzer, a data acquisition system, etc.

[0053] In this embodiment, the total jitter sequence (TIE) of the measured signal includes two jitter components: a deterministic jitter sequence (DJ) and a random jitter sequence (RJ), based on two assumptions. First, it is assumed that the random jitter (RJ) is Gaussian, characterized by a wide frequency spectrum that is distributed across all frequencies. Second, the deterministic jitter (DJ) consists of one or more jitter components, each characterized by a finite width in the frequency spectrum, exhibiting periodic variations, and possessing corresponding peaks.

[0054] Figure 1This is a flowchart of a high-speed serial signal jitter analysis method provided in an embodiment of the first aspect of the present invention.

[0055] Figure 2 This is a principle block diagram provided by an embodiment of the first aspect of the present invention.

[0056] like Figure 2 As shown, the high-speed serial interface tester includes a signal generator and a digital oscilloscope. The digital oscilloscope includes a signal recovery module 100, a jitter analysis module 200, and a display module 300. The jitter analysis module 200 includes a TIE data storage module 210, a jitter separation module 220, a spectrum conversion module 230, a power spectrum selection module 240, and a power spectrum calculation module 250. Figure 1 As shown, the method includes the following steps:

[0057] Step S1: The signal recovery module 100 obtains the total jitter sequence TIE based on the time interval error of the measured signal and sends the total jitter sequence TIE to the TIE data storage module 210. The total jitter sequence TIE includes a deterministic jitter sequence DJ and a random jitter sequence RJ. The deterministic jitter sequence DJ includes a data-correlated jitter sequence DDJ and a periodic jitter PJ.

[0058] Step S2, the jitter separation module 220 separates the data-related jitter sequence DDJ in the total jitter sequence TIE to obtain the first jitter sequence, and sends the first jitter sequence to the spectrum conversion module 230. The first jitter sequence includes the random jitter sequence RJ and the periodic jitter PJ.

[0059] Step S3, the spectrum conversion module 230 calculates and obtains the first spectrum based on the first jitter sequence. The first spectrum includes the amplitude of the random jitter sequence RJ and the periodic jitter PJ in the frequency domain.

[0060] Step S4: The spectrum conversion module 230 calculates and obtains the first power spectrum based on the first spectrum and sends it to the power spectrum selection module 240;

[0061] Step S5, the power spectrum selection module 240 selects and extracts the first power spectrum according to the first preset rule to obtain the first power spectrum segment, and sends the first power spectrum segment to the power spectrum calculation module 250. The first power spectrum segment includes the amplitude of the random jitter sequence RJ on the power spectrum.

[0062] In step S6, the power spectrum calculation module 250 performs cumulative calculation on the first power spectrum segment to obtain the total power and root mean square value of the random jitter sequence RJ, and outputs it to the display module 300.

[0063] This embodiment first separates the data jitter sequence DDJ in the total jitter sequence TIE to obtain a first jitter sequence containing a random jitter sequence RJ. Then, it performs spectral transformation on the first jitter sequence to obtain a power spectrum containing random jitter RJ and periodic jitter PJ. By using the power spectrum characteristics, it accumulates and calculates the first power spectrum segment containing only random jitter RJ, and then estimates the total power and root mean square value of the random jitter sequence RJ. This method is not affected by the magnitude of periodic jitter, resulting in higher estimation accuracy and improving the testing performance of the high-speed serial interface tester.

[0064] In this embodiment, before separating the data-related jitter sequence DDJ from the total jitter sequence TIE, the jitter separation module 220 further includes concatenating the data-related jitter sequence DDJ into a length that is the same as the total jitter sequence TIE for subsequent calculations.

[0065] Specifically, the length of the data-related jitter (DDJ) is N bits, which is concatenated to the same length as the TIE, i.e., ... Each DDJ is concatenated into a vector to obtain the data-related jitter sequence DDJ. expand DDJ expand =[DDJ1,DDJ2,DDJ3,…,DDJ Nbit Isolate the data-related jitter (DDJ) from the total jitter sequence (TIE), i.e., DDJ. expand The specific calculation formula is as follows:

[0066]

[0067] in, This represents the first jitter sequence.

[0068] In this embodiment, the spectrum conversion module 230 performs a discrete Fourier transform on the first jitter sequence to obtain a first spectrum. The first spectrum represents the frequency domain variation of the measured signal and includes the amplitudes of random jitter RJ and periodic jitter PJ in the frequency domain. The specific calculation formula is as follows.

[0069]

[0070] Where F(m) represents the first spectrum, Let l represent the first jitter sequence, l be the sequence number of the time-domain sequence, and m be the sequence number of the frequency-domain sequence.

[0071] It should also be understood that using other frequency domain transformation algorithms, such as Fourier transform and fast Fourier transform, to obtain the first spectrum is also feasible, and this application does not impose any restrictions.

[0072] In this embodiment, the spectrum conversion module 230 calculates and obtains the first power spectrum based on the first spectrum. The specific calculation formula is as follows:

[0073] P(m)=|F(m)| 2 (1-3);

[0074] Where P(m) represents the first power spectrum;

[0075] The spectrum conversion module 230 calculates and obtains the single-sided power spectrum based on the first power spectrum. The specific calculation formula is as follows.

[0076]

[0077] Where S(m) represents the single-sided power spectrum, and its length is

[0078] In this embodiment, using a single-sided power spectrum allows us to focus only on the positive frequency portion, simplifying the calculation process and thus improving computational efficiency. It also significantly reduces the required storage space and makes it easier to identify and analyze the frequency components and intensities in the signal.

[0079] Figure 3 This is a power spectrum provided in an embodiment of the present invention.

[0080] In this embodiment, the power spectrum selection module 240 extracts any spectral segment from 3 / 4 to 1 of the first power spectrum. For example... Figure 3 As shown, taking the last quarter of the first power spectrum as an example, since this position has a high frequency and will not experience periodic jitter, and is also some distance from periodic jitter, the impact of spectral leakage from periodic jitter is relatively small. Therefore, the last quarter of the first power spectrum is used to estimate random jitter. The power spectrum calculation module 250 then accumulates the last quarter of the single-sided power spectrum, and the specific calculation formula is as follows.

[0081]

[0082] Where, σ 2 The total power of random jitter across the entire power spectrum bandwidth;

[0083] Next, the root mean square value of the random jitter is calculated. The specific calculation formula is as follows:

[0084]

[0085] Where σ is the root mean square value of the random jitter.

[0086] The power spectrum calculation module 250 outputs the calculation results to the display module 300.

[0087] This embodiment provides a jitter analysis method for high-speed serial signals. It separates the data jitter sequence DDJ from the total jitter sequence TIE to obtain a first jitter sequence including a random jitter sequence RJ. A first spectrum is obtained by performing a spectrum transformation on the first jitter sequence, followed by a first power spectrum. Subsequent segments of the first power spectrum are accumulated to calculate the total power and root mean square (RMS) value of the random jitter sequence RJ, thus estimating the RMS value of random jitter in a high-speed serial system. By selectively accumulating power spectrum segments, stable random jitter estimation is achieved, reducing estimation complexity and saving system resources. Furthermore, separating the components of the total jitter sequence TIE before performing spectrum transformation improves estimation accuracy.

[0088] Example 2

[0089] Figure 4 A flowchart provided for an embodiment of the first aspect of the present invention.

[0090] In this embodiment, as Figure 4 As shown, the signal recovery module 100 obtains the total jitter sequence TIE by performing clock recovery calculation on the N-bit measured signal with a symbol period of L. The specific steps are as follows:

[0091] Step S11: Obtain the actual edge of the signal under test with a symbol period of N bits and the ideal edge established by clock recovery, respectively.

[0092] Step S12: Subtract the ideal edge from the actual edge of the measured signal with a symbol period of N bits to obtain the total jitter sequence TIE.

[0093] In this embodiment, an ideal clock edge is provided through clock recovery. Specifically, this example uses a phase-locked loop (PLL) for clock recovery. It is understood that other methods such as digital phase-locked loops (DPLL) and direct digital synthesis (DDS) can also be used for clock recovery, and this application is not limited thereto.

[0094] Example 3

[0095] Figure 5 This is a flowchart provided by another embodiment of the first aspect of the present invention.

[0096] like Figure 5 As shown, in this embodiment, the jitter separation module 220 separates the data-related jitter sequence DDJ in the total jitter sequence TIE to obtain the first jitter sequence, and further includes:

[0097] Step S21: Divide the total jitter sequence TIE into multiple groups according to the symbol period Nbit, and each group contains TIE sequences with the same symbol number.

[0098] Step S22: Extract the TIE sequences with the same symbol number contained in each group to obtain...

[0099] TIE1=[TIE(1), TIE(1+Nbit), TIE(1+2*Nbit)…TIE(1+L-Nbit)],

[0100] TIE2=[TIE(2), TIE(2+Nbit), TIE(2+2*Nbit)…TIE(2+L-Nbit)],

[0101] TIE3=[TIE(3), TIE(3+Nbit), TIE(3+2*Nbit)…TIE(3+L-Nbit)]

[0102] ...

[0103] TIENbit=[TIE(Nbit),TIE(Nbit+Nbit),TIE(Nbit+2*Nbit)…TIE(L)],

[0104] Obtain the jitter sequence of each N-bit bit as a TIE. i Let i = 1, 2, ..., N bits, with a length of ... Where i represents the symbol number, and TIE1 represents the jitter sequence composed of the first jitter sequence within each symbol period;

[0105] Step S23: Calculate the data-related jitter sequence DDJ by averaging the jitter sequence of each N-bit bit. The specific calculation formula is shown below.

[0106]

[0107] Among them, DDJ (i) The length is N bits, where n represents the jitter sequence number in each N bits.

[0108] This embodiment simplifies the jitter separation process and improves data processing efficiency by extracting and grouping the jitter sequence of each symbol period, and then averaging the jitter sequence of each symbol period. At the same time, it has high accuracy.

[0109] Example 4

[0110] This application also provides a jitter analysis system for high-speed serial signals, including a signal recovery module 100, a jitter analysis module 200, and a display module 300. The jitter analysis module 200 includes a TIE data storage module 210, a jitter separation module 220, a spectrum conversion module 230, a power spectrum selection module 240, and a power spectrum calculation module 250. When the jitter analysis system executes the program or the instructions, it implements a jitter analysis method for high-speed serial signals as described in any of the above embodiments.

[0111] Example 5

[0112] This application also provides a computer storage medium storing a computer program. When the computer program is executed, it implements the steps of a high-speed serial signal jitter analysis method described in any of the above embodiments.

[0113] In the above embodiments, implementation can be achieved, in whole or in part, through software, hardware, firmware, or any combination thereof. When implemented in software, it can be implemented, in whole or in part, as a computer program product. This computer program product includes one or more computer instructions. When these computer instructions are loaded and executed on a computer, all or part of the flow or function according to the embodiments of this application is generated. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another, for example, from one website, computer, server, or data center to another website, computer, server, or data center via wired (e.g., coaxial cable, fiber optic, digital subscriber line (DSL)) or wireless (e.g., infrared, microwave, etc.) means. The computer-readable storage medium can be any available medium accessible to a computer or a data storage device such as a server or data center that integrates one or more available media. The available medium can be a magnetic medium (e.g., floppy disk, hard disk, magnetic tape, etc.), an optical medium (e.g., DVD), or a semiconductor medium (e.g., solid-state drive), etc.

[0114] Although embodiments of the invention have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the appended claims and their equivalents.

Claims

1. A jitter analysis method for high-speed serial signals, characterized in that, This method is used for analyzing high-speed serial signals using a high-speed serial interface tester. The high-speed serial interface tester includes a signal generator and a digital oscilloscope. The digital oscilloscope includes a signal recovery module, a jitter analysis module, and a display module. The jitter analysis module includes a TIE data storage module, a jitter separation module, a spectrum conversion module, a power spectrum selection module, and a power spectrum calculation module. The signal generator generates an input signal to the device under test (DUT), and the DUT outputs a test signal to the signal recovery module. The test signal includes a clock signal. The method includes the following steps: The signal recovery module obtains the total jitter sequence TIE based on the time interval error of the measured signal, and sends the total jitter sequence TIE to the TIE data storage module. The total jitter sequence TIE includes a deterministic jitter sequence DJ and a random jitter sequence RJ. The deterministic jitter sequence DJ includes a data-correlated jitter sequence DDJ and a periodic jitter PJ. The jitter separation module separates the data-related jitter sequence DDJ in the total jitter sequence TIE to obtain a first jitter sequence, and sends the first jitter sequence to the spectrum conversion module. The first jitter sequence includes the random jitter sequence RJ and the periodic jitter PJ. The spectrum conversion module calculates and obtains a first spectrum based on the first jitter sequence, the first spectrum including the amplitude of the random jitter sequence RJ and the periodic jitter PJ in the frequency domain; The spectrum conversion module calculates and obtains the first power spectrum based on the first spectrum and sends it to the power spectrum selection module; The power spectrum selection module selects and extracts the first power spectrum to obtain a first power spectrum segment, and sends the first power spectrum segment to the power spectrum calculation module. The first power spectrum segment includes the amplitude of the random jitter sequence RJ on the power spectrum. The power spectrum calculation module performs cumulative calculation on the first power spectrum segment to obtain the total power and root mean square value of the random jitter sequence RJ, and outputs it to the display module.

2. The jitter analysis method for high-speed serial signals according to claim 1, characterized in that, The power spectrum selection module extracts any spectral segment from 3 / 4 to 1 of the first power spectrum.

3. The jitter analysis method for high-speed serial signals according to claim 1, characterized in that: The signal recovery module recovers the signal by adjusting the symbol period. The total jitter sequence (TIE) is obtained by performing clock recovery calculation on the tested signal, and its length is [missing information]. .

4. The jitter analysis method for high-speed serial signals according to claim 3, characterized in that, The signal recovery module also operates according to the following steps: The code acquisition period is The actual edge of the measured signal is used to obtain the ideal edge of clock recovery establishment; The symbol period is The total jitter sequence TIE is obtained by subtracting the ideal edge from the actual edge of the measured signal. The clock recovery method is a phase-locked loop clock recovery method.

5. The jitter analysis method for high-speed serial signals according to claim 3, characterized in that, The jitter separation module separates the data-related jitter sequence DDJ in the total jitter sequence TIE to obtain a first jitter sequence, and further includes: The total jitter sequence TIE is divided according to the symbol period. Divide into multiple groups, each group containing TIE sequences with the same symbol number; Extract each TIE sequence containing the same symbol number from each group. The jitter sequence is , length is ,in The sequence number represents the symbol number. TIE1 represents the jitter sequence consisting of the first jitter sequence within each symbol period. Each of the above The average value of the jitter sequence is used to calculate the data-related jitter sequence DDJ.

6. The jitter analysis method for high-speed serial signals according to claim 1, characterized in that, Also includes: The jitter separation module concatenates the data-related jitter sequence DDJ into a sequence of the same length as the total jitter sequence TIE.

7. The jitter analysis method for high-speed serial signals according to claim 1, characterized in that, The spectrum conversion module performs a discrete Fourier transform on the first jitter sequence to obtain the first spectrum, which is used to represent the changes of the measured signal in the frequency domain.

8. The jitter analysis method for high-speed serial signals according to claim 1, characterized in that, The spectrum conversion module calculates and obtains the first power spectrum based on the first spectrum, and further includes: the spectrum conversion module takes a one-sided power spectrum from the first power spectrum.

9. A jitter analysis system for high-speed serial signals, characterized in that, The system includes a signal recovery module, a jitter analysis module, and a display module. The jitter analysis module includes a TIE data storage module, a jitter separation module, a spectrum conversion module, a power spectrum selection module, and a power spectrum calculation module. When the jitter analysis system executes a program or instruction, it implements a jitter analysis method for high-speed serial signals as described in any one of claims 1 to 8.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed, it can implement a jitter analysis method for high-speed serial signals as described in any one of claims 1 to 8.

Images