Turbo code decoding termination iteration method, decoding method, related device and equipment

Abstract

The invention provides a Turbo code decoding iteration termination method, a Turbo code decoding method, a related device and equipment, and the method comprises the steps: in a Turbo code decoding process, when each iteration is executed, decoding information outputted by a second decoder is obtained, and decoding is carried out; obtaining a maximum initial state index and a maximum termination state index respectively corresponding to the maximum backward probability value of the initial state and the maximum forward probability value of the termination state output by the second decoder; judging whether the maximum initial state index is consistent with the maximum termination state index or not; if yes, decoding information output by the second decoder is verified, and then decoding is ended or next iterative decoding continues to be executed according to a verification result; if not, directly continuing to execute next iterative decoding; according to the method, under the condition that the decoding performance is not influenced, the number of iterations is effectively reduced, meanwhile, the number of times of verification is reduced, hardware resources are saved, and decoding time delay is reduced; the method is suitable for communication technology.

Description

Technical Field

[0001] The present application relates to the field of communication technology, and in particular to a decoding termination iteration method, a decoding method, and related devices and equipment for a Turbo code. Background Art

[0002] In modern communication systems, error correction coding technology is often required to ensure reliable and effective transmission of various data in channels. Especially with the development of wireless digital communications and the emergence of various high-speed and bursty services, higher and higher requirements are placed on error correction code technology.

[0003] Turbo codes, also known as parallel cascade convolutional codes, have excellent performance because they use an iterative decoding algorithm to improve decoding reliability by exchanging soft information between component decoders. Various studies and simulation results show that Turbo codes not only have superior performance in resisting additive white Gaussian noise, but also have strong anti-fading and anti-interference capabilities, and their error correction performance is close to the Shannon limit. Therefore, they are widely used in various communication systems.

[0004] The existing Turbo code decoding method uses a preset maximum number of iterations to make the decision to stop iteration, and the preset maximum number of iterations is generally large enough to adapt to poor channel environments. Although the higher the number of iterations, the lower the bit error rate and the better the decoding performance, the longer the decoding process will take, the more hardware resources will be required, and the decoding complexity will increase accordingly, affecting communication performance.

[0005] Therefore, it is of great significance to effectively reduce the number of iterations, reduce decoding complexity and reduce decoding delay without affecting decoding performance. Summary of the invention

[0006] In order to solve one of the above technical defects, the present application provides a decoding termination iteration method, a decoding method, and related devices and equipment for a Turbo code.

[0007] According to a first aspect of an embodiment of the present application, a decoding termination iteration method is provided for a decoding process of a Turbo code, wherein the decoding process of the Turbo code comprises: iteratively performing the following steps: inputting initial information obtained according to the decoding into a first decoder and a second decoder in sequence to obtain decoding information output by the second decoder;

[0008] The decoding termination iteration method comprises: in the decoding process of the Turbo code, when executing each iteration, after obtaining the decoding information output by the second decoder, first obtaining the maximum initial state index and the maximum terminal state index corresponding to the maximum backward probability value of the initial state and the maximum forward probability value of the terminal state output by the second decoder respectively;

[0009] Then determine whether the maximum initial state index and the maximum final state index are consistent;

[0010] If they are consistent, the decoded information output by the second decoder is verified, and then the decoding is terminated or the next iterative decoding is continued according to the verification result;

[0011] If they are inconsistent, the next iterative decoding will be performed directly.

[0012] In an optional embodiment of the present application, when the maximum initial state index and the maximum termination state index are consistent, the decoding information output by the second decoder is verified, and then the decoding is terminated or the next iterative decoding is continued according to the verification result, specifically including:

[0013] Deinterleaving the decoded information output by the second decoder to obtain deinterleaved information;

[0014] Performing hard decision processing on the deinterleaved information to obtain a hard decision result;

[0015] Perform CRC check on the hard decision result, and make a judgment on the CRC check result;

[0016] If the CRC check passes, the hard decision result and CRC check result are output, and the decoding ends;

[0017] If the CRC check fails, determine whether the current number of iterations is equal to the maximum number of iterations. If so, output the hard decision result and CRC check result and end decoding. If not, continue to perform the next iterative decoding.

[0018] In an optional embodiment of the present application, when the maximum initial state index and the maximum terminal state index are inconsistent, directly continuing to perform the next iterative decoding specifically includes:

[0019] Determine whether the current number of iterations is equal to the maximum number of iterations;

[0020] If they are equal, firstly deinterleave the decoded information output by the second decoder to obtain deinterleaved information, then perform hard decision processing on the deinterleaved information to obtain a hard decision result, then directly set the CRC check result of the hard decision result as CRC check failure, finally output the hard decision result and CRC check result, and end the decoding;

[0021] If not, continue to execute the next iterative decoding.

[0022] In an optional embodiment of the present application, the obtaining of the maximum initial state index and the maximum terminal state index respectively corresponding to the maximum backward probability value of the initial state and the maximum forward probability value of the terminal state output by the second decoder specifically includes:

[0023] Calculate and obtain a backward probability set of an initial state and a forward probability set of a terminal state output by the second decoder;

[0024] The backward probability set and the forward probability set are compared respectively to obtain the maximum backward probability value in the backward probability set and the maximum forward probability value in the forward probability set;

[0025] According to the maximum backward probability value and the maximum forward probability value, the corresponding maximum initial state index and the maximum terminal state index are obtained.

[0026] In an optional embodiment of the present application, after obtaining the backward probability set of the initial state and the forward probability set of the terminal state output by the second decoder, the backward probability set and the forward probability set are stored as one of the iteration information input into the second decoder when performing the next iterative decoding.

[0027] In an optional embodiment of the present application, the decoding termination iteration method further includes the following steps:

[0028] When executing each iteration, the backward probability set of the initial state and the forward probability set of the terminal state output by the first decoder are obtained, and the backward probability set and the forward probability set are stored as one of the iteration information input into the first decoder when executing the next iterative decoding.

[0029] In an optional embodiment of the present application, the initial information includes first system information, first verification information, and second verification information;

[0030] The step of sequentially inputting the initial information to be decoded into the first decoder and the second decoder to obtain the decoded information output by the second decoder specifically includes:

[0031] Inputting the first system information, the first verification information and the first prior information into the first decoder to obtain the first external information output by the first decoder;

[0032] Interleaving the first system information and the first external information respectively to obtain second system information and second prior information;

[0033] Inputting the second system information, the second verification information and the second prior information into the second decoder to obtain the second external information output by the second decoder and the decoding information of this iteration;

[0034] Among them, the first system information, the first check information and the second check information are obtained after encoding processing to be decoded, and the first prior information is obtained after deinterleaving processing of the second external information obtained in the previous iteration process, and the first prior information input in the first iteration process is initialized to 0.

[0035] A second aspect of an embodiment of the present application provides a Turbo code decoding method, comprising: iteratively executing the following steps: inputting initial information obtained according to the to-be-decoded information into a first decoder and a second decoder in sequence to obtain decoding information output by the second decoder; during the decoding process, executing the decoding termination iteration method as described in any one of the above items.

[0036] According to a third aspect of the embodiments of the present application, a decoding termination iteration device is provided, comprising a module for implementing the decoding termination iteration method as described above.

[0037] According to a fourth aspect of the embodiments of the present application, a Turbo code decoding device is provided, comprising a module for implementing the Turbo code decoding method as described above.

[0038] According to a fifth aspect of the embodiments of the present application, a computer device is provided, including a memory and a processor, wherein the memory stores a computer program, and when the processor executes the computer program, the steps of the decoding termination iteration method as described in any one of the above items are implemented, or the steps of the Turbo code decoding method as described above are implemented.

[0039] A sixth aspect of the embodiments of the present application provides a computer-readable storage medium having a computer program stored thereon, wherein when the computer program is executed by a processor, the computer program implements the steps of the decoding termination iteration method as described in any one of the above items, or implements the steps of the Turbo code decoding method as described above.

[0040] The decoding termination iteration method provided in the present application determines whether to verify the decoding information output by the second decoder by comparing whether the maximum initial state index and the maximum termination state index are consistent. When the maximum initial state index and the maximum termination state index are inconsistent, the next iterative decoding is directly continued; when the maximum initial state index and the maximum termination state index are consistent, the decoding information output by the second decoder is verified. This method can ensure that the number of decoding iterations is minimized each time without affecting the decoding performance, effectively reducing the number of iterations, and reducing the number of verifications, effectively saving hardware resources, reducing decoding complexity, and at the same time reducing the decoding delay of the Turbo code and improving the decoding efficiency of the Turbo code. In addition, this method can also reduce the number of decoding iterations and the number of verifications under medium and low signal-to-noise ratio conditions, saving hardware and time overhead, thereby improving the performance of the entire system.

[0041] Other features and advantages of the present application will be described in the following description, and partly become apparent from the description, or understood by practicing the present application. The purpose and other advantages of the present application can be realized and obtained by the contents indicated in the written description and the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] The drawings described herein are used to provide a further understanding of the present application and constitute a part of the present application. The illustrative embodiments of the present application and their descriptions are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings:

[0043] Figure 1 The process of the decoding termination iteration method provided in one embodiment of the present application Figure 1 ;

[0044] Figure 2 The process of the decoding termination iteration method provided in one embodiment of the present application Figure 2 ;

[0045] Figure 3 A comparison chart of the average CRC times performance curve of Turbo decoding provided by an embodiment of the present application; wherein A means that a CRC check is performed in each iteration, and B means that the decoding termination iteration method provided by the present application is adopted;

[0046] Figure 4 A schematic diagram of the structure of a Turbo decoder provided in one embodiment of the present application;

[0047] Figure 5 A schematic diagram of a decoding termination iteration device provided in an embodiment of the present application Figure 1 ;

[0048] Figure 6 A schematic diagram of a decoding termination iteration device provided in an embodiment of the present application Figure 2 ;

[0049] Figure 7 A schematic diagram of the structure of a first processing module in a decoding termination iteration device provided in one embodiment of the present application;

[0050] Figure 8 A schematic diagram of the structure of a second processing module in a decoding termination iteration device provided in one embodiment of the present application;

[0051] Fig. 9 A schematic diagram of the structure of a state index acquisition module in a decoding termination iteration device provided in an embodiment of the present application Figure 1 ;

[0052] Fig.10A schematic diagram of the structure of a state index acquisition module in a decoding termination iteration device provided in an embodiment of the present application Figure 2 ;

[0053] Fig.11 A schematic diagram of the structure of a Turbo code decoding device provided in one embodiment of the present application;

[0054] Fig.12 A schematic diagram of the structure of a decoding module in a Turbo code decoding device provided in one embodiment of the present application;

[0055] Fig.13 A schematic diagram of the computer device structure provided for one embodiment of the present application;

[0056] In the figure: 1 is an initial information input module, 2 is a decoding module, 3 is a decoding termination iteration module; 10 is a state index acquisition module, 20 is a judgment module, 30 is a first processing module, 40 is a second processing module, 50 is a probability set acquisition module, 60 is a storage module; 21 is a first decoding unit, 22 is a second decoding unit, 23 is a third decoding unit, 101 is a probability set acquisition unit, 102 is a maximum value acquisition unit, 103 is a state index acquisition unit, 104 is a storage unit, 30 ... is the first deinterleaving unit, 302 is the first hard decision unit, 303 is the first CRC check unit, 304 is the judgment unit, 305 is the first decoding result acquisition unit, 306 is the first judgment unit, 307 is the second decoding result acquisition unit, 308 is the first execution unit, 401 is the second judgment unit, 402 is the second execution unit, 403 is the second deinterleaving unit, 404 is the second hard decision unit, 405 is the second CRC check unit, and 406 is the third decoding result acquisition unit. DETAILED DESCRIPTION

[0057] In the process of implementing the present application, the inventors found that the iterative decoding in the current Turbo code decoding method has a large number of iterations, the decoding time is prolonged, and a large amount of hardware resources and time resources are consumed.

[0058] In response to the above problems, a decoding termination iteration method is provided in an embodiment of the present application.

[0059] The solutions in the embodiments of the present application can be implemented using various computer languages, for example, the object-oriented programming language Java and the interpreted scripting language JavaScript.

[0060] In order to make the technical solutions and advantages in the embodiments of the present application more clearly understood, the exemplary embodiments of the present application are further described in detail below in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present application, rather than an exhaustive list of all the embodiments. It should be noted that the embodiments in the present application and the features in the embodiments can be combined with each other without conflict.

[0061] The following is a brief description of the application environment of the decoding termination iteration method provided in the embodiment of the present application: During the iterative decoding process, the more iterations there are, the longer the decoding delay is, and each iterative decoding process requires log-likelihood ratio LLR calculation, hard decision processing and CRC check, especially under the condition of relatively low signal-to-noise ratio, the number of decoding iterations is large. In the existing technical solution of Turbo decoding, the maximum number of decoding iterations is set to 8 times. The traditional method is to perform hard decision processing and output decision bits after each decoding iteration is full of 8 times, and then perform CRC check on the decision bits to determine whether the decoding result is correct. Since the scheme requires relatively large hardware resources and time resources for one iterative decoding, it has been improved. The improved technical scheme is to perform hard decision and CRC check after each iterative decoding. If the CRC check passes, no more iterations are performed, the decoding is terminated and the hard bit sequence is output. This can minimize the number of iterations, but the technical scheme requires hard decision processing and CRC check for each iteration, which will also occupy certain resources. In particular, when the decoding iterations require multiple times to pass the CRC check, or when the check still fails when the maximum number of iterations is reached, the system's requirements for decoding delay are still not met. Therefore, it is necessary to further shorten the decoding time without affecting the decoding performance.

[0062] Among them, the CRC check refers to the Cyclic Redundancy Check (CRC). The sending device (such as the component encoder of the Turbo code) adds a CRC redundant code to each data frame during encoding, and then performs Turbo encoding on this extended data frame. The receiving device (such as the Turbo decoder) also executes a similar algorithm to perform a CRC check on the received data during decoding to ensure the correctness and integrity of data transmission. Since the missed detection rate of the CRC check is low enough, the decoding result output that meets the CRC check can be considered reliable. The CRC check is simple, convenient and easy to implement in hardware; the hard decision processing refers to a simple quantization of the signal, where the value above the threshold is considered to be 1 and the value below the threshold is considered to be 0, and the quantization result is converted into a decision result consisting of 0 and 1.

[0063] The decoding termination iteration method provided in the embodiment of the present application can be executed by a decoding termination iteration device or a computer device, or by a component configured inside the decoding termination iteration device or the computer device, such as a chip, a chip system, etc., or by a logic module or software having some or all functions of the decoding termination iteration device or the computer device, etc. This application does not limit this.

[0064] See also Figure 1 and Figure 2 Exemplarily, the decoding termination iteration method is used in a decoding process of a Turbo code, and the decoding process of the Turbo code includes: iteratively performing the following steps: inputting initial information obtained according to the decoding into a first decoder and a second decoder in sequence to obtain decoding information output by the second decoder; in a specific implementation, the decoding information output by the second decoder is a log-likelihood ratio LLR;

[0065] The decoding termination iteration method comprises: in the decoding process of the Turbo code, when executing each iteration, after obtaining the log likelihood ratio LLR output by the second decoder, first obtaining the maximum initial state index and the maximum terminal state index corresponding to the maximum backward probability value of the initial state and the maximum forward probability value of the terminal state output by the second decoder respectively;

[0066] Then determine whether the maximum initial state index and the maximum final state index are consistent;

[0067] If they are consistent, the log-likelihood ratio LLR output by the second decoder is checked, and then the decoding is terminated or the next iterative decoding is continued according to the check result;

[0068] If they are inconsistent, the next iterative decoding will be performed directly.

[0069] In the specific implementation, the Turbo coding method adopts the dual binary Turbo code of the DVB-RCS2 standard, which will not be described in detail here. Since the component encoder of the Turbo code of DVB-RCS2 adopts a cyclic recursive system convolutional code, based on the self-truncation mechanism, the initial state and the terminal state of the encoder are the same. Therefore, after each iterative decoding, the maximum initial state index and the maximum terminal state index corresponding to the maximum backward probability value of the initial state and the maximum forward probability value of the terminal state after this iteration are compared to see whether they are consistent, that is, whether the maximum initial state index and the maximum terminal state index are consistent, and it is determined whether to check the log-likelihood ratio LLR output by the second decoder, thereby reducing the number of checks and achieving the purpose of reducing the decoding delay.

[0070] Based on the above scheme, by comparing whether the maximum initial state index and the maximum termination state index are consistent, it is decided whether to verify the log-likelihood ratio LLR output by the second decoder. When the maximum initial state index and the maximum termination state index are inconsistent, the next iterative decoding is directly continued; when the maximum initial state index and the maximum termination state index are consistent, the decoding information output by the second decoder is verified. This method can ensure that the number of decoding iterations is minimized without affecting the decoding performance, effectively reducing the number of iterations, and reducing the number of verifications, effectively saving hardware resources, reducing decoding complexity, and at the same time reducing the decoding delay of the Turbo code and improving the decoding efficiency of the Turbo code. In addition, this method can also reduce the number of decoding iterations and the number of verifications under medium and low signal-to-noise ratio conditions, saving hardware and time overhead, thereby improving the performance of the entire system.

[0071] In an optional embodiment of the present application, when the maximum initial state index and the maximum termination state index are consistent, the log-likelihood ratio LLR output by the second decoder is checked, and then the decoding is terminated or the next iterative decoding is continued according to the check result, specifically including:

[0072] Deinterleaving the log-likelihood ratio LLR output by the second decoder to obtain deinterleaved information;

[0073] Performing hard decision processing on the deinterleaved information to obtain a hard decision result;

[0074] Perform CRC check on the hard decision result, and make a judgment on the CRC check result;

[0075] If the CRC check passes, the hard decision result and CRC check result are output, and the decoding ends;

[0076] If the CRC check fails, determine whether the current number of iterations is equal to the maximum number of iterations. If so, output the hard decision result and CRC check result and end decoding. If not, continue to perform the next iterative decoding.

[0077] In an optional embodiment of the present application, when the maximum initial state index and the maximum terminal state index are inconsistent, directly continuing to perform the next iterative decoding specifically includes:

[0078] Determine whether the current number of iterations is equal to the maximum number of iterations;

[0079] If they are equal, firstly deinterleave the log-likelihood ratio LLR output by the second decoder to obtain deinterleaved information, then perform hard decision processing on the deinterleaved information to obtain a hard decision result, then directly set the CRC check result of the hard decision result as CRC check failure, finally output the hard decision result and CRC check result, and end decoding;

[0080] If not, continue to execute the next iterative decoding.

[0081] Specifically, the maximum number of iterations is 8.

[0082] Based on the above scheme, when the maximum initial state index and the maximum termination state index are inconsistent, there is no need to deinterleave, hard-determine and CRC check the log-likelihood ratio LLR output by the second decoder, and the next iterative decoding is directly performed; when the maximum initial state index and the maximum termination state index are consistent, the log-likelihood ratio LLR output by the second decoder is deinterleaved, hard-determined and CRC checked. If the CRC check fails, the iteration continues and the above steps are repeated until the maximum number of iterations is reached. If the CRC check passes, the decoding is terminated.

[0083] The present application uses state index consistency as a condition for deinterleaving, hard decision and CRC check of the log-likelihood ratio LLR. When the maximum initial state index and the maximum terminal state index are consistent, correct decoding is possible. When the maximum initial state index and the maximum terminal state index are inconsistent, the decoding result is most likely wrong, so there is no need to perform CRC check, and the hardware resources and time required for this operation are much less than the hardware resources and time required for performing LLR deinterleaving + hard decision + CRC check, so the hardware resources and decoding time required for decoding can be reduced.

[0084] In an optional embodiment of the present application, the obtaining of the maximum initial state index and the maximum terminal state index respectively corresponding to the maximum backward probability value of the initial state and the maximum forward probability value of the terminal state output by the second decoder specifically includes:

[0085] The backward probability set β0(S) of the initial state and the forward probability set α of the terminal state output by the second decoder are calculated. N (S); where S is the state index and N is the codeword length; in the iterative decoding process, the backward probability set of the initial state and the forward probability set of the terminal state are both one more than the number of codewords, so the state index is from 0 to N.

[0086] For the backward probability set β0(S) and the forward probability set α N (S) to obtain the maximum backward probability value in the backward probability set β0(S) and the forward probability set α N (S) the maximum forward probability value;

[0087] According to the maximum backward probability value and the maximum forward probability value, the corresponding maximum initial state index and the maximum terminal state index are obtained.

[0088] In the specific implementation, there are 16 register states based on the Turbo code of DVB-RCS2, and the state index S = 0, 1, 2...15, then β0(S) = {β0(0), β0(1),..., β0(15)}, a total of 16 backward probability values ​​corresponding to S = 0, 1, 2...15, a total of 16 states, α N (S) = {α N (0),α N (1),…,α N (15)}, a total of 16 forward probability values ​​corresponding to S = 0, 1, 2 ... 15, a total of 16 states; when judging whether the maximum initial state index and the maximum terminal state index are consistent, that is, find the S corresponding to the maximum backward probability value in β0(0) ... β0(15), denoted as S1, and find α N (0)…α N The S corresponding to the maximum forward probability value in (15) is denoted as S2, and then it is determined whether S1 is equal to S2.

[0089] In an optional embodiment of the present application, when the backward probability set β0(S) of the initial state output by the second decoder and the forward probability set α of the terminal state are obtained, N (S), the backward probability set β0(S) and the forward probability set α N (S) is stored as one of the iteration information input into the second decoder when performing the next iteration decoding. In specific implementation, the current iteration calculation result β0(S) and α N (S) directly assign β N (S) and α0(S) as the initial value of the state measurement for the next iteration, that is, β N (S) = β0(S), α0(S) = α N (S).

[0090] Specifically, in the first iteration, the method of initializing all states with equal probability is adopted to determine the initial value of the state metric, that is, α0(S) = β N (S) = log(1 / 16);

[0091] Starting from the second iteration, the initial value of the state metric is obtained by the corresponding final state of the previous iteration, that is, α0(S) = α N (S), β N (S) = β0(S).

[0092] In an optional embodiment of the present application, the decoding termination iteration method further includes the following steps:

[0093] When executing each iteration, the backward probability set β'0(S) of the initial state and the forward probability set α' of the terminal state output by the first decoder are obtained. N(S), and the backward probability set β'0(S) and the forward probability set α' N (S) is stored as one of the iteration information input into the first decoder when performing the next iteration decoding, thereby improving the accuracy of the loop state and improving the iterative decoding performance. In specific implementation, the current iteration calculation results β'0(S) and α' N (S) directly assign β' N (S) and α'0(S) as the initial value of the state metric for the next iteration, i.e., β' N (S) = β'0(S), α'0(S) = α' N (S).

[0094] Specifically, in the first iteration, the method of initializing all states equally is used to determine the initial value of the state metric, that is, α'0(S) = β' N (S) = log(1 / 16);

[0095] Starting from the second iteration, the initial value of the state metric is obtained by the corresponding final state of the previous iteration, that is, α'0(S) = α' N (S), β' N (S) = β'0(S).

[0096] More specifically, β0(S) and β'0(S) are obtained by a backward recursive method, α N (S) and α'0(S) are obtained by the forward recursive method.

[0097] In an optional embodiment of the present application, the initial information includes first system information, first verification information, and second verification information;

[0098] The step of sequentially inputting the initial information to be decoded into the first decoder and the second decoder to obtain the decoded information output by the second decoder specifically includes:

[0099] Inputting the first system information, the first verification information and the first prior information into the first decoder to obtain the first external information output by the first decoder;

[0100] Interleaving the first system information and the first external information respectively to obtain second system information and second prior information;

[0101] Inputting the second system information, the second verification information and the second prior information into the second decoder to obtain the second external information output by the second decoder and the decoding information of this iteration;

[0102] Among them, the first system information, the first check information and the second check information are obtained after encoding processing to be decoded, and the first prior information is obtained after deinterleaving processing of the second external information obtained in the previous iteration process, and the first prior information input in the first iteration process is initialized to 0.

[0103] In the specific implementation, the first system information, the first verification information, the second system information and the second verification information of the next iterative decoding process are not changed, only the first a priori information, the second a priori information, α' N (S), β'0(S), α N (S) and β0(S) gradually converge with the cycle of the iterative decoding process until the current number of iterations reaches the preset maximum number of iterations or the maximum initial state index is equal to the maximum terminal state index and the hard decision result satisfies the CRC check, and the decoding is completed.

[0104] In addition, this application uses different methods to simulate scenarios with different signal-to-noise ratios, such as Figure 3 As shown in the figure, when the quality of the received signal is poor, the decoding termination iteration method and device of the present application can effectively reduce the number of decoding iterations, reduce hardware overhead, and shorten the decoding time.

[0105] In summary, in low to medium signal-to-noise ratio scenarios, or when the number of iterations required for decoding is large, the decoding termination iteration method of the present application can effectively reduce the number of LLR deinterleaving, hard decisions, and CRC checks. For example, after 7 decoding iterations, the decoding is correct and the CRC check passes. In this case, the traditional solution will perform 7 LLR deinterleaving, hard decisions, and CRC checks, while the present application can avoid at least 5 LLR deinterleaving, hard decisions, and CRC checks by judging whether the maximum initial state index and the maximum termination state index are consistent, greatly reducing the hardware resources and decoding time required for decoding.

[0106] In an optional embodiment of the present application, the decoding process of the Turbo code further includes a process of decoding components of the Turbo code, which specifically includes the following steps:

[0107] Receive and demodulate the data to be decoded according to the scheduling configuration to obtain decoded input data; and calculate the code rate and modulation order of the decoded input data;

[0108] Calculating, according to the modulation order and code rate of the decoded input data, an adjustment value of the decoded input data and a bit width shift value of a posterior probability branch metric parameter within the decoder;

[0109] The numerical value of the decoded input data is adjusted by the adjustment value to obtain first decoded input data;

[0110] Performing component decoding on the first decoding input data to obtain a calculation result of a posterior probability branch metric inside the decoder;

[0111] The calculation result of the posterior probability branch metric inside the decoder is shifted by the bit width shift value to obtain a component decoding output value.

[0112] In an optional embodiment of the present application, calculating the code rate and modulation order of the decoded input data includes:

[0113] Performing rate matching on the decoded input data and outputting a multi-channel soft information sequence;

[0114] Calculating the code rate of the decoded input data according to the length of the input sequence of the decoded input data before de-rate matching and the length of each soft information sequence output by de-rate matching;

[0115] According to the data symbol of the decoded input data in the scheduling configuration, the modulation order of the decoded input data is obtained.

[0116] In an optional embodiment of the present application, the adjustment value of the decoded input data and the bit width shift value of the posterior probability branch metric parameter inside the decoder are calculated according to the modulation order and code rate of the decoded input data; including:

[0117] Determining the modulation order of the decoded input data;

[0118] If the modulation order of the decoded input data is the first high-order modulation order, determine whether the code rate of the decoded input data is greater than or equal to the first code rate threshold; if so, set the adjustment value of the decoded input data equal to the first adjustment value, and the shift value of the branch metric parameter of the internal a posteriori probability of the decoder equal to the first shift value; otherwise, set the adjustment value of the decoded input data and the shift value of the branch metric parameter of the internal a posteriori probability of the decoder to 0;

[0119] If the modulation order of the decoded input data is lower than the first high-order modulation order, then the shift value of the branch metric parameter of the posterior probability inside the decoder is set to 0; and according to the modulation order and code rate value corresponding to the decoded input data, the adjustment value corresponding to the decoded input data is output; wherein: different modulation orders or code rate values ​​correspond to different adjustment values, and the lower the code rate or modulation order, the larger the corresponding adjustment value.

[0120] In an optional embodiment of the present application, outputting the adjustment value of the decoded input data according to the modulation order and code rate of the decoded input data includes:

[0121] Determine whether the modulation order of the decoded input data is the second highest modulation order, or whether the code rate of the decoded input data is greater than or equal to the second code rate threshold; if so, set the adjustment value of the decoded input data to 0; otherwise, execute the following steps;

[0122] Determine whether the modulation order of the decoded input data is a third high-order modulation order, or whether the code rate of the decoded input data is greater than or equal to the third code rate threshold and less than the second code rate threshold; if so, set the adjustment value of the decoded input data equal to the second adjustment value; otherwise, execute the following steps;

[0123] Determine whether the modulation order of the decoded input data is a low-order modulation order, or whether the code rate of the decoded input data is less than a third code rate threshold; if so, set the adjustment value of the decoded input data equal to the third adjustment value;

[0124] Wherein, the second high-order modulation order is greater than the third high-order modulation order, and the third high-order modulation order is greater than the low-order modulation order;

[0125] The third adjustment value is greater than the second adjustment value, and the second adjustment value is greater than the first adjustment value.

[0126] In an optional embodiment of the present application, the first shift value is equal to a negative first adjustment value.

[0127] In an optional embodiment of the present application, the demodulation method of the decoded input data is simplified demodulation; the bit-level processing bit width during the simplified demodulation is the same as the internal bit width of the TURBO decoder.

[0128] It should be understood that, although the various steps in the flow chart are displayed in sequence according to the indication of the arrows, these steps are not necessarily executed in sequence according to the order indicated by the arrows. Unless there is a clear description in this article, the execution of these steps is not strictly limited in order, and these steps can be executed in other orders. Moreover, at least a portion of the steps in the figure may include multiple sub-steps or multiple stages, and these sub-steps or stages are not necessarily executed at the same time, but can be executed at different times, and the execution order of these sub-steps or stages is not necessarily to be carried out in sequence, but can be executed in turn or alternately with other steps or at least a portion of the sub-steps or stages of other steps.

[0129] See also Figure 4The embodiment of the present application provides a schematic diagram of the structure of a turbo decoder, and the above method is applied to the turbo decoder for decoding. The turbo decoding device mainly includes two soft-input and soft-output component decoders: a first decoder and a second decoder. When the turbo decoder is initialized, the first prior information is cleared, the first system information, the first check information and the cleared first prior information are input to the input end of the first decoder, and the first external information, α' are output to the output end of the first decoder. N (S) and β'0(S), and α' N (S) and β'0(S) are stored in a register; the turbo decoder interleaves the first external information with a first interleaver to obtain the second prior information, and interleaves the first system information with a second interleaver to obtain the second system information; the second system information, the second check information and the second prior information are input to the input end of the second decoder, and the second external information, the log-likelihood ratio LLR, α N (S) and β0(S), and α N (S) and β0(S) are stored in the register, and the state judgment is performed at the same time, that is, the maximum termination state index and the maximum initial state index are judged, and according to the judgment result, the current number of iterations and the preset maximum number of iterations, it is determined whether to perform deinterleaving, hard decision and CRC check operations on the LLR output by the second decoder, and finally obtain the decoding result and output it. In addition, the turbo decoder uses the deinterleaved information obtained by the first deinterleaver after deinterleaving the second external information as the first prior information input to the first decoder in the next iterative decoding process, thereby completing an iterative cycle.

[0130] An embodiment of the present application provides a Turbo code decoding method, comprising: iteratively performing the following steps: inputting initial information obtained according to the to-be-decoded information into a first decoder and a second decoder in sequence, to obtain decoded information output by the second decoder;

[0131] During the decoding process, the decoding termination iteration method as described above is executed.

[0132] An embodiment of the present application provides a decoding termination iteration device, which includes a module for implementing the decoding termination iteration method as described above.

[0133] See also Figure 5 , illustratively, the decoding termination iteration device comprises:

[0134] The state index acquisition module 10 is used to acquire the maximum initial state index and the maximum terminal state index respectively corresponding to the maximum backward probability value of the initial state and the maximum forward probability value of the terminal state output by the second decoder after obtaining the decoding information output by the second decoder during each iteration of the Turbo code decoding process;

[0135] A judging module 20 is used to judge whether the maximum initial state index and the maximum final state index are consistent;

[0136] The first processing module 30 is used to verify the decoding information output by the second decoder when the maximum initial state index and the maximum termination state index are consistent, and then terminate the decoding or continue to perform the next iterative decoding according to the verification result;

[0137] The second processing module 40 is used to directly continue to perform the next iterative decoding when the maximum initial state index and the maximum final state index are inconsistent.

[0138] See also Figure 6 In an optional embodiment of the present application, the decoding termination iteration device further includes:

[0139] A probability set acquisition module 50, used for acquiring a backward probability set of an initial state and a forward probability set of a terminal state output by the first decoder when executing each iteration;

[0140] The storage module 60 is used to store the backward probability set and the forward probability set to serve as one of the iteration information input into the first decoder when performing the next iteration decoding.

[0141] See also Figure 7 In an optional embodiment of the present application, the first processing module 30 specifically includes:

[0142] A first deinterleaving unit 301 is used to perform deinterleaving processing on the decoded information output by the second decoder to obtain deinterleaved information;

[0143] A first hard decision unit 302, configured to perform hard decision processing on the deinterleaved information to obtain a hard decision result;

[0144] A first CRC check unit 303, configured to perform a CRC check on the hard decision result to obtain a CRC check result;

[0145] The determination unit 304 is used to determine the CRC check result;

[0146] The first decoding result obtaining unit 305 is used to output the hard decision result and the CRC check result when the CRC check passes, and end the decoding;

[0147] A first judgment unit 306, configured to judge whether the current number of iterations is equal to the maximum number of iterations when the CRC check fails;

[0148] The second decoding result obtaining unit 307 is used to output the hard decision result and the CRC check result and end the decoding when the current number of iterations is equal to the maximum number of iterations;

[0149] The first execution unit 308 is configured to continue to execute the next iterative decoding when the current iteration number is not equal to the maximum iteration number.

[0150] See also Figure 8 In an optional embodiment of the present application, the second processing module 40 specifically includes:

[0151] The second judging unit 401 is used to judge whether the current number of iterations is equal to the maximum number of iterations;

[0152] The second execution unit 402 is used to continue to execute the next iterative decoding when the current iteration number is not equal to the maximum iteration number;

[0153] A second deinterleaving unit 403 is configured to, when the current number of iterations is equal to the maximum number of iterations, perform deinterleaving processing on the decoded information output by the second decoder to obtain deinterleaved information;

[0154] A second hard decision unit 404 is used to perform hard decision processing on the deinterleaved information to obtain a hard decision result;

[0155] The second CRC check unit 405 is used to directly set the CRC check result of the hard decision result as CRC check failure;

[0156] The third decoding result obtaining unit 406 is used to output the hard decision result and the CRC check result, and end the decoding.

[0157] See also Fig. 9 In an optional embodiment of the present application, the state index acquisition module 10 specifically includes:

[0158] The probability set acquisition unit 101 is used to calculate the backward probability set of the initial state and the forward probability set of the terminal state output by the second decoder;

[0159] A maximum value acquisition unit 102, used to compare the backward probability set and the forward probability set respectively, to obtain a maximum backward probability value in the backward probability set and a maximum forward probability value in the forward probability set;

[0160] The state index obtaining unit 103 is used to obtain the corresponding maximum initial state index and maximum terminal state index according to the maximum backward probability value and the maximum forward probability value.

[0161] See also Fig.10 In an optional embodiment of the present application, the state index acquisition module 10 further includes:

[0162] The storage unit 104 is used to store the backward probability set of the initial state and the forward probability set of the terminal state output by the second decoder after obtaining the backward probability set and the forward probability set, so as to serve as one of the iteration information input into the second decoder when performing the next iterative decoding.

[0163] An embodiment of the present application provides a Turbo code decoding device, which includes a module for implementing the Turbo code decoding method as described above.

[0164] See also Fig.11 , illustratively, the Turbo code decoding device includes:

[0165] The initial information input module 1 is used to input the initial information obtained after the encoding process to be decoded;

[0166] Decoding module 2, used for inputting the initial information to be decoded into the first decoder and the second decoder in sequence to obtain the decoded information output by the second decoder;

[0167] The decoding termination iteration module 3 is the decoding termination iteration device mentioned above, which is used to output the decoding result and terminate the iterative decoding.

[0168] See also Fig.12 In an optional embodiment of the present application, the decoding module 2 specifically includes:

[0169] A first decoding unit 21, used for inputting the first system information, the first verification information and the first prior information into a first decoder to obtain first external information output by the first decoder;

[0170] The second decoding unit 22 is used to interleave the first system information and the first external information to obtain the second system information and the second prior information;

[0171] The third decoding unit 23 is used to input the second system information, the second verification information and the second prior information into the second decoder to obtain the second external information output by the second decoder and the decoding information of this iteration.

[0172] For the specific definition of the above-mentioned decoding termination iteration device, please refer to the definition of the decoding termination iteration method mentioned above. Similarly, for the specific definition of the above-mentioned Turbo code decoding device, please refer to the definition of the Turbo code decoding method mentioned above, which will not be repeated here. Each module in the above-mentioned decoding termination iteration device and the Turbo code decoding device can be implemented in whole or in part by software, hardware and a combination thereof. The above-mentioned modules can be embedded in or independent of the processor in the computer device in the form of hardware, or can be stored in the memory of the computer device in the form of software, so that the processor can call and execute the operations corresponding to the above modules.

[0173] In one embodiment, a computer device is provided, the internal structure diagram of which can be as follows: Fig.13 As shown. The computer device includes a processor, a memory, a network interface and a database connected through a system bus. Among them, the processor of the computer device is used to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system, a computer program and a database. The internal memory provides an environment for the operation of the operating system and the computer program in the non-volatile storage medium. The database of the computer device is used to store data. The network interface of the computer device is used to communicate with an external terminal through a network connection. When the computer program is executed by the processor, the above decoding termination iteration method or the Turbo code decoding method is implemented. It includes a memory and a processor, the memory stores a computer program, and when the processor executes the computer program, any step in the above decoding termination iteration method or the Turbo code decoding method is implemented.

[0174] In one embodiment, a computer-readable storage medium is provided, on which a computer program is stored. When the computer program is executed by a processor, any step in the above decoding termination iteration method or Turbo code decoding method can be implemented.

[0175] Those skilled in the art will appreciate that the embodiments of the present application may be provided as methods, systems, or computer program products. Therefore, the present application may adopt the form of a complete hardware embodiment, a complete software embodiment, or an embodiment in combination with software and hardware. Moreover, the present application may adopt the form of a computer program product implemented in one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) that include computer-usable program code.

[0176] The present application is described with reference to the flowcharts and / or block diagrams of the methods, devices (systems), and computer program products according to the embodiments of the present application. It should be understood that each process and / or box in the flowchart and / or block diagram, as well as the combination of the processes and / or boxes in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0177] These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.

[0178] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing instructions for implementing the process. Figure 1 A process or multiple processes and / or boxes Figure 1 The steps for the functions specified in one or more boxes.

[0179] Although the preferred embodiments of the present application have been described, those skilled in the art may make other changes and modifications to these embodiments once they have learned the basic creative concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications falling within the scope of the present application.

[0180] Obviously, those skilled in the art can make various changes and modifications to the present application without departing from the spirit and scope of the present application. Thus, if these modifications and variations of the present application fall within the scope of the claims of the present application and their equivalents, the present application is also intended to include these modifications and variations.

Claims

1. A decoding termination iteration method, characterized in that: A decoding process for a Turbo code, the decoding process for the Turbo code comprising: iteratively performing the following steps: inputting initial information obtained according to the to-be-decoded information into a first decoder and a second decoder in sequence, to obtain decoded information output by the second decoder; The decoding termination iteration method comprises: in the decoding process of the Turbo code, when executing each iteration, after obtaining the decoding information output by the second decoder, first obtaining the maximum initial state index and the maximum terminal state index corresponding to the maximum backward probability value of the initial state and the maximum forward probability value of the terminal state output by the second decoder respectively; Then determine whether the maximum initial state index and the maximum final state index are consistent; If they are consistent, the decoded information output by the second decoder is verified, and then the decoding is terminated or the next iterative decoding is continued according to the verification result; If they are inconsistent, the next iterative decoding will be performed directly.

2. The decoding termination iteration method according to claim 1, characterized in that: When the maximum initial state index and the maximum termination state index are consistent, the decoding information output by the second decoder is verified, and then the decoding is terminated or the next iterative decoding is continued according to the verification result, specifically including: Deinterleaving the decoded information output by the second decoder to obtain deinterleaved information; Performing hard decision processing on the deinterleaved information to obtain a hard decision result; Perform CRC check on the hard decision result, and make a judgment on the CRC check result; If the CRC check passes, the hard decision result and CRC check result are output, and the decoding ends; If the CRC check fails, determine whether the current number of iterations is equal to the maximum number of iterations. If so, output the hard decision result and CRC check result and end decoding. If not, continue to perform the next iterative decoding.

3. The decoding termination iteration method according to claim 1, characterized in that: When the maximum initial state index and the maximum terminal state index are inconsistent, directly continuing to perform the next iterative decoding specifically includes: Determine whether the current number of iterations is equal to the maximum number of iterations; If they are equal, firstly deinterleave the decoded information output by the second decoder to obtain deinterleaved information, then perform hard decision processing on the deinterleaved information to obtain a hard decision result, then directly set the CRC check result of the hard decision result as CRC check failure, finally output the hard decision result and CRC check result, and end the decoding; If not, continue to perform the next iterative decoding.

4. The decoding termination iteration method according to claim 1, characterized in that: The obtaining of the maximum initial state index and the maximum terminal state index respectively corresponding to the maximum backward probability value of the initial state and the maximum forward probability value of the terminal state output by the second decoder specifically includes: Calculate and obtain a backward probability set of an initial state and a forward probability set of a terminal state output by the second decoder; The backward probability set and the forward probability set are compared respectively to obtain the maximum backward probability value in the backward probability set and the maximum forward probability value in the forward probability set; According to the maximum backward probability value and the maximum forward probability value, the corresponding maximum initial state index and the maximum terminal state index are obtained.

5. The decoding termination iteration method according to claim 4, characterized in that: After obtaining the backward probability set of the initial state and the forward probability set of the terminal state output by the second decoder, the backward probability set and the forward probability set are stored as one of the iteration information input into the second decoder when performing the next iterative decoding.

6. A method for decoding a Turbo code, characterized in that: include: Iteratively executing the following steps: inputting the initial information obtained according to the to-be-decoded into the first decoder and the second decoder in sequence, and obtaining the decoded information output by the second decoder; During the decoding process, the decoding termination iteration method as claimed in any one of claims 1 to 5 is executed.

7. A decoding termination iteration device, characterized in that: The invention comprises a module for implementing the decoding termination iteration method as claimed in any one of claims 1 to 5.

8. A Turbo code decoding device, characterized in that: The method comprises a module for implementing the Turbo code decoding method as claimed in claim 7.

9. A computer device comprising a memory and a processor, wherein the memory stores a computer program, wherein: When the processor executes the computer program, the processor implements the steps of the decoding termination iteration method according to any one of claims 1 to 5, or implements the steps of the Turbo code decoding method according to claim 6.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the decoding termination iteration method according to any one of claims 1 to 5 are implemented, or the steps of the Turbo code decoding method according to claim 6 are implemented.

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