An FEC code evaluation optimization method and system suitable for various application scenarios

Abstract

The application discloses a FEC code evaluation optimization method and system suitable for various application scenarios, and comprises selecting optimal FEC codes respectively for various FEC code evaluation delay performances T, wherein the FEC code evaluation delay performance T comprises the following steps: obtaining a plurality of data blocks FEC(k, t) with k data units and capable of correcting t data units after using FEC codes on data packets, calculating the loss probability of the data packets after using the FEC codes, calculating the packet loss rate P of the data packets after using the FEC codes according to the loss probability, and calculating the delay performance T of the data packets after using the FEC codes according to the packet loss rate P. The application aims to abandon the traditional method of obtaining data by statistically simulating a full chain for multiple times, and adopts an analytical method to quickly obtain a large amount of data by directly calculating a formula, so as to obtain results in various application scenarios and realize FEC scheme performance evaluation optimization.

Description

TECHNICAL FIELD

[0001] The present application belongs to the field of communication, and particularly relates to a FEC code evaluation optimization method and system suitable for various application scenarios. BACKGROUND

[0002] With the rapid development of information technologies such as cloud computing, big data, and the Internet, the emergence of super-large-scale data centers has increased the demand for data transmission.

[0003] With the explosive development of intelligent computing such as artificial intelligence generated content (AIGC), the communication bandwidth of medium-short-distance interconnection within super-large-scale systems has also increased significantly. With the acceleration of the chip grain process, the bandwidth of intra-package ultra-short-distance interconnection has also increased rapidly. In this case, whether it is long-distance, medium-short-distance, or ultra-short-distance, the data transmission rate of optical and electrical interconnection has increased significantly. However, optical and electrical interconnection communication is limited by various noises such as amplified spontaneous emission (ASE) and additional optical and electrical damage, and the link raw error rate has increased significantly, seriously affecting the reliability of communication. Forward error correction (FEC) coding can obtain high error correction capability through redundant coding, so FEC systems with different transmission overheads, implementation complexities, coding gains, error performance, burst error correction capabilities, and error floors have been widely used in various application scenarios.

[0004] Various existing communication protocols also recommend different error correction schemes according to their respective application requirements, such as RS(544,514), RS(272,257,10), and RS(528,514) used by the Ethernet (Ethernet 802.3) protocol, BCH(320,260), BCH(288,260), and BCH(320,260) used by the Gen-Z specification, and a near-zero retransmission scheme proposed by PCIe Gen6 and its FEC configuration scheme. These FEC schemes usually take error correction gain as the single target, and if new intelligent computing and high-performance computing are considered for specific application scenarios, communication delay, effective bandwidth, and other composite targets also need to be considered. However, there is no efficient performance evaluation method for how to select the optimal error correction coding for specific scenarios in combination with retransmission. Traditional schemes for researching FEC performance all assume full-link simulation on different types of channels such as binary symmetric channel (BSC), additive white Gaussian noise channel (AWGN), and chi-square channel. Different application scenarios use different models, and each simulation can only obtain the result of a single specific scenario set. If an algorithm is used to explore the probability model, multiple simulations of different full-link transmission models are required to obtain the simulation results, which not only consumes time but also makes it difficult to evaluate performance in the same dimension under the same performance in a wide range. SUMMARY

[0005] The present application aims to abandon the traditional method of obtaining data by statistical multiple full-chain simulation, and uses a direct formula to calculate a large amount of data quickly at one time, so as to obtain the results in various application scenarios and realize FEC scheme performance evaluation optimization.

[0006] To solve the above technical problems, the technical scheme adopted by the present application is:

[0007] A FEC code evaluation optimization method and system suitable for various application scenarios, comprising selecting the optimal FEC code for a plurality of FEC code evaluation delay performance T, wherein the FEC code evaluation delay performance T comprises:

[0008] S1, calculating the loss probability of the data packet using the FEC code under the current application scenario, wherein the FEC code is used to obtain a plurality of data blocks FEC(k, t) with k data units and t correctable data units.

[0009] S2, calculating the packet loss rate P of the data packet using the FEC code according to the loss probability

[0010] S3, calculating the delay performance T of the data packet using the FEC code according to the packet loss rate P.

[0011] Optionally, in step S1, the FEC code adopts the DFE mechanism under the current application scenario, and the loss probability of the data packet using the FEC code under the current application scenario is calculated as follows: comprising: calculating the probability p of the data unit itself being erroneous, and the probability q of the next data unit being erroneous due to the error of the previous data unit, for a plurality of data blocks FEC(k, t) obtained after the FEC code is used for the data packet. l l ; calculating the loss probability of the data packet using the FEC code under the current application scenario according to the following formula

[0012]

[0013]

[0014] In the above formula, S i is an inner loop approximation variable; is a binomial coefficient, representing the number of ways to select i+1 data units from k-t+1 data units; ​​is a binomial coefficient, representing the number of ways to choose i data units from i+j data units; i and j are loop variables, k is the number of data units in each data block FEC(k, t), and t is the number of correctable data units of each data block FEC(k, t).

[0015] Optionally, the function expression of the probability p of the data unit itself being erroneous l and the probability q of the previous data unit error causing the next data unit to be erroneous lr is as follows:

[0016]

[0017]

[0018] q s = (r-1) / r, (5)

[0019] In the above formula, u is the number of bits in the data block FEC(k, t), p b is the bit error rate of each bit, q s is the probability of the previous bit causing the next bit to be erroneous, s is the number of bits contained in one data unit, r is the number of electrical energies, and i is a loop variable.

[0020] Optionally, in step S1, the FEC code used in the current application scenario adopts a pre-encoding mechanism, and the loss probability of the data packet after using the FEC code in the current application scenario is calculated When the data block FEC(k, t) can correct an odd number of data units, the loss probability of the data packet after using the FEC code is calculated according to formula (6) When the data block FEC(k, t) can correct an even number of data units, the loss probability of the data packet after using the FEC code is calculated according to formula (7)

[0021]

[0022]

[0023] In the above formula, k is the number of data units in each data block FEC(k, t), t is the number of correctable data units of each data block FEC(k, t), i and j are loop variables, u qs,i is the probability of string-like erroneous data units with i data units, is the loss probability of the data block FEC(k-1-i, t-2) with k-1-i data units and t-2 correctable data units, t is the number of correctable data units of each data block FEC(k, t), and n is a positive integer variable, is a positive integer, and p iis the probability of a string of data units with the number of data units i, is the loss probability of a data block FEC(ki,t-2) with ki data units and capable of correcting errors in t-2 data units.

[0024] Optionally, the probability ρ of a string of data units with i data units is i The calculation function expression is:

[0025]

[0026]

[0027] In the above formula, ρ i is the probability of a string of data units with the number of data units i, p b The bit error rate for each bit, q s is the probability that the previous bit causes the next bit to be wrong, and i is the number of data units.

[0028] Optionally, in step S1, the FEC code in the current application scenario adopts a general mechanism that is not a DFE mechanism and a precoding mechanism, and the loss probability of the data packet after using the FEC code in the current application scenario is calculated. The function expression is:

[0029]

[0030] In the above formula, p l The error rate of each data unit, p b represents the bit error rate of each bit, k is the number of data units in each data block FEC(k,t), t is the number of data units that can be corrected by each data block FEC(k,t), i is the loop variable, is the binomial coefficient, which represents the number of ways to select i data units from k-t+i-1 data units, and has:

[0031] p l =1-(1-p b ) s , (11)

[0032] In the above formula, s is the number of bits contained in a data unit.

[0033] Optionally, the calculation function expression of the packet loss rate P in step S2 is:

[0034]

[0035] In the above formula, is the loss probability, n is the number of bits in a data packet, and m is the number of FEC blocks in a single data packet;

[0036] The calculation function expression of the delay performance T in step S3 is:

[0037]

[0038] In the above formula, P is the packet loss rate, t0 is the time spent for transmission distance, t n is the time required for FEC code encoding and decoding.

[0039] In addition, the application also provides an FEC code evaluation optimization method and system suitable for various application scenarios, which comprises a microprocessor and a memory connected with each other, and the microprocessor is programmed or configured to execute the FEC code evaluation optimization method and system suitable for various application scenarios.

[0040] In addition, the application also provides a computer readable storage medium, which stores a computer program or instructions, and the computer program or instructions are programmed or configured to execute the FEC code evaluation optimization method and system suitable for various application scenarios by a processor.

[0041] In addition, the application also provides a computer program product, which comprises a computer program or instructions, and the computer program or instructions are programmed or configured to execute the FEC code evaluation optimization method and system suitable for various application scenarios by a processor.

[0042] Compared with the prior art, the application mainly has the following advantages: the application comprises selecting the optimal FEC code by evaluating the delay performance T of various FEC codes respectively, wherein the evaluation of the delay performance T of the FEC code comprises: S1, calculating the loss probability of the data packet after using the FEC code under the current application scenario by using the FEC code to obtain a plurality of data blocks FEC(k, t) with k data units and t correctable data units S2, calculating the packet loss rate P of the data packet after using the FEC code according to the loss probability S3, calculating the delay performance T of the data packet after using the FEC code according to the packet loss rate P, the application discards the traditional method of obtaining data by statistics, adopts the analytical method to quickly obtain a large amount of data by directly calculating the formula, and obtains the results under various application scenarios to realize the performance evaluation optimization of the FEC scheme. BRIEF DESCRIPTION OF DRAWINGS

[0043] Figure 1 It is a basic flowchart of the embodiment method of the application. DETAILED DESCRIPTION

[0044] In view of the above problems of the prior art, especially the time-consuming of obtaining large-range multi-dimensional FEC encoding performance data, the present application provides an FEC code evaluation optimization method and system suitable for various application scenarios, aiming to solve the time-consuming and low efficiency of the existing full-link simulation. Figure 1 As shown in the embodiment, the present application provides an FEC code evaluation optimization method suitable for various application scenarios, which comprises selecting the optimal FEC code for the delay performance T of the FEC code evaluation for various FEC codes, wherein the delay performance T of the FEC code evaluation comprises:

[0045] S1, calculating the loss probability of the data packet using the FEC code under the current application scenario, wherein the loss probability is calculated by using the FEC(k, t) obtained by using the FEC code on the data packet, and k data units and t correctable data units are included in the FEC(k, t).

[0046] S2, calculating the packet loss rate P of the data packet using the FEC code according to the loss probability

[0047] S3, calculating the delay performance T of the data packet using the FEC code according to the packet loss rate P.

[0048] In the embodiment, the loss probability of the data packet using the FEC code under various application scenarios is provided respectively, which comprises two special application scenarios of the FEC code using the DFE mechanism (generally suitable for simulating long-distance transmission models of strong error correction FEC codes, such as Ethernet) and the FEC code using the pre-coding mechanism (generally suitable for long-distance transmission models of weak error correction FEC codes, such as Gen-Z specification), and a general application scenario (generally suitable for short-distance transmission, such as AI transmission) other than the two special application scenarios of the FEC code using the DFE mechanism and the FEC code using the pre-coding mechanism. The packet loss rate of the data packet using the FEC code can be directly obtained according to the relationship between the data packet and the FEC block. The delay performance of the data packet using the FEC code is obtained according to the characteristics of the system, the retransmission of the data packet, the coding time of the FEC code, and the data transmission time. In the embodiment, the simulated transmission distance is set to 0-1000 kilometers, and the error rate range is set to 10 -10 ~ 10 -2 , which can describe the transmission system with good or poor performance; and the data amount of the data packet is 4096 bits.

[0049] As an optional embodiment, in step S1 of the present application, the FEC code uses the DFE mechanism under the current application scenario, and the data unit error rate of the FEC code under the DFE mechanism can be roughly divided into two cases due to the DFE mechanism. One is the probability p l ​, and the other is the probability q that the previous data unit error leads to the error of the next data unit l Therefore, the loss probability of the data packet using the FEC code in the current application scenario is calculated in this embodiment , which includes: calculating the probability p that the data unit itself is erroneous l and the probability q that the previous data unit error leads to the error of the next data unit l ; and calculating the loss probability of the data packet using the FEC code in the current application scenario according to the following formula

[0050]

[0051]

[0052] In the above formula, S i is an inner loop approximation variable; is a binomial coefficient, representing the number of ways of selecting i+1 data units from k-t+1 data units; is a binomial coefficient, representing the number of ways of selecting i data units from i+j data units; i and j are loop variables, k is the number of data units in each data block FEC(k, t), and t is the number of correctable data units of each data block FEC(k, t). According to the above formula, the block failure rate calculation formula of the FEC code under the DFE mechanism in this embodiment is calculated using a recursive formula, and the inner loop of the recursive formula is simplified using an approximation method to improve the operation efficiency.

[0053] In this embodiment, the function expression of the probability p that the data unit itself is erroneous l and the probability q that the previous data unit error leads to the error of the next data unit l is as follows:

[0054]

[0055]

[0056] q s = (r-1) / r, (5)

[0057] In the above formula, u is the number of bits in the data block FEC(k, t), p b is the bit error rate of each bit, q s is the probability that the previous bit leads to the error of the next bit, s is the number of bits contained in a data unit, r is the number of electrical energy, and i is a loop variable. According to the above formula, the probability q that the previous data unit leads to the error of the next data unit under the DFE mechanism of the FEC codel The data amount of the data block FEC(k, t) is related. The data unit of the FEC code under the DFE mechanism has a probability p of error due to interference l The data amount of the data block FEC(k, t) is related. The data unit of the FEC code under the DFE mechanism has a probability p of error due to interference l The data amount of the data block FEC(k, t) is related. The data unit of the FEC code under the DFE mechanism has a probability p of error due to interference

[0058] As an optional embodiment, the FEC code in the current application scenario in step S1 of the embodiment adopts a pre-coding mechanism, and the loss probability of the data packet after using the FEC code in the current application scenario is calculated When the data block FEC(k, t) can correct an odd number of data units, the loss probability of the data packet after using the FEC code is according to formula (6) When the data block FEC(k, t) can correct an even number of data units, the loss probability of the data packet after using the FEC code is according to formula (7)

[0059]

[0060] In the above formula, k is the number of data units in each data block FEC(k, t), t is the number of data units that can be corrected in each data block FEC(k, t), i and j are loop variables, u qs,i is the probability of a string of erroneous data units with i data units, is the loss probability of the data block FEC(k-1-i, t-2) with k-1-i data units and t-2 data units that can be corrected, t is the number of data units that can be corrected in each data block FEC(k, t), n is a positive integer variable, is a positive integer, and p i is the probability of a string of data unit groups with i data units, is the loss probability of the data block FEC(k-i, t-2) with k-i data units and t-2 data units that can be corrected. The block failure rate calculation formula of the FEC code under the pre-coding mechanism can be quickly completed using the recursive formula to reduce the operation time and improve the operation efficiency according to the current pre-coding technology range.

[0061] Under the pre-coding mechanism of the FEC code, the adjacent string of correct data units and string of erroneous data units generated by the DFE mechanism are called a string of data unit groups. In the embodiment, the calculation function expression of the probability p i of the string of data unit groups with i data units is:

[0062]

[0063]

[0064] In the above formula, p iP (i) is the probability of a string of data units with i data units b q is the bit error rate of each bit s P (i) is the probability of a string of data units with i data units

[0065] As an optional embodiment, the FEC code in the current application scenario in step S1 of the embodiment adopts a general mechanism other than the DFE mechanism and the pre-encoding mechanism. For the characteristics of the general mechanism FEC code, a recursive formula is used to iteratively calculate the relationship between the number of data units in the FEC block and the error correction capability. Specifically, the function expression of the loss probability of the data packet after using the FEC code in the current application scenario in the embodiment is

[0066]

[0067] In the above formula, p l is the error rate of each data unit, p b represents the bit error rate of each bit, k is the number of data units in each data block FEC(k, t), t is the number of data units that can be corrected in each data block FEC(k, t), i is a loop variable, is a binomial coefficient, indicating the number of ways to choose i data units from k-t+i-1 data units, 5, the block failure rate of the general FEC code, the error rate of each data unit needs to be obtained, which is related to the aggregation method of data and the transmission performance of data. In the embodiment, we have

[0068] p l = 1-(1-p b ) s , (11)

[0069] In the above formula, s is the number of bits contained in a data unit.

[0070] The function expression for calculating the packet loss rate P in step S2 of the embodiment is

[0071]

[0072] In the above formula, ​is the loss probability, n is the number of bits in a data packet, and m is the number of FEC blocks in a single data packet; according to the above formula, the packet loss rate after the data packet uses the FEC code, the packet loss rate is related to the number of FEC blocks and the loss probability of each FEC. The delay performance of the data packet after using the FEC code, when the receiver does not receive the correct data packet, the system will retransmit the data packet, thereby increasing the time delay of the system, considering the relationship between the retransmission times and the packet loss rate, the calculation function expression of the delay performance T in step S3 of the embodiment is:

[0073]

[0074] In the above formula, P is the packet loss rate, t0 is the time spent for transmission distance, t n is the time required for FEC code encoding and decoding.

[0075] The loss probability of formula (1) in the embodiment is The derivation process of the calculation function expression is as follows: under the DFE mechanism, the data block located after an error data unit The loss probability of the data block

[0076]

[0077] In the above formula, p l is the probability that the data unit itself is wrong, q l is the probability that the error of the previous data unit leads to the error of the next data unit; Q i is the inner loop approximation variable; is the binomial coefficient, representing the number of ways to choose i data units from k-t-1 data units; is the binomial coefficient, representing the number of ways to choose i data units from i+j data units; i and j are loop variables; k is the number of data units in the data block located after an error data unit, and t is the number of data units that can be corrected in each data block When the data block only has one data unit and has no error correction capability, the loss probability is:

[0078]

[0079] Assuming that the data block wherein The loss probability of the data block

[0080]

[0081] In the above formula, S iis the inner loop approximate variable; The data block following an erroneous data unit The number of data units in For each data block The number of error-correctable data units, and

[0082] By satisfying data block The formula that satisfies The data block loss probability formula is:

[0083]

[0084] Simplifying the above formula, we have:

[0085]

[0086] For the loop variable S i and Q i , the following relationship exists:

[0087]

[0088] Substitute the simplified formula into the loop variable S i and Q i Then we have:

[0089]

[0090] Therefore, it can be proved that under the DFE mechanism, the The data block loss probability formula (1) is established. Probability of data block loss Formula (1) derives the FEC (k, t) loss probability under the DFE mechanism. The function expression is:

[0091]

[0092] In the above formula, m is the loop variable; k is the number of data units in each data block FEC(k,t), and t is the number of data units that can be corrected by each data block FEC(k,t). Simplifying the above formula, we get:

[0093]

[0094] In the above formula, is the binomial coefficient, which represents the number of ways to select i data units from ktm-1 data units; m and i are loop variables. Use the binomial theorem to simplify the formula:

[0095]

[0096] the loss probability of the data block FEC(k, t) can be obtained The calculation function expression (1) of the loss probability of the data block FEC(k, t) can be obtained. At the same time, only the q in the formula of the loss probability of the data block FEC(k, t) shown in the formula (1) is substituted into p l , the function expression (10) of the loss probability of the data block FEC(k, t) in the current application scene in the step S1 in the embodiment can be obtained, which is not expanded here. l , the function expression (10) of the loss probability of the data block FEC(k, t) in the current application scene in the step S1 in the embodiment can be obtained, which is not expanded here.

[0097] In summary, the FEC code evaluation and optimization method suitable for various application scenes in the embodiment is mainly based on the error rate calculation formula of the FEC code. All the error rate calculation formulas of the FEC code are mainly based on the single variable of the bit error rate, and the entire FEC code error rate calculation formula system is derived according to different mechanisms, and the FEC code error rate model is formed according to the performance target of the system. The FEC code evaluation and optimization method suitable for various application scenes in the embodiment uses the method of analytical expression to obtain the formula, uses the principle of recursive iteration to obtain the expression, and uses the mathematical approximation principle to further improve the operation efficiency. Therefore, according to the correlation between the bit error rate and the FEC code error rate in the typical scene, a fast evaluation method for the performance of the FEC code is provided. The traditional full-link simulation has single, and only a few FEC codes in one scene can be obtained by one simulation, and the simulation range is limited. The optimal FEC code can be obtained by statistically and organizing all the data, which is very time-consuming. The mathematical analysis method in the embodiment directly calculates the required data using mathematical formulas, has high running efficiency, can obtain a large range of multi-dimensional FEC code data at one time, and thus the optimal FEC code can be quickly obtained.

[0098] In addition, the embodiment also provides an FEC code evaluation and optimization method suitable for various application scenes, which comprises a microprocessor and a memory connected with each other. The microprocessor is programmed or configured to execute the FEC code evaluation and optimization method suitable for various application scenes.

[0099] In addition, the embodiment also provides a computer readable storage medium, which stores a computer program or instructions. The computer program or instructions are programmed or configured to execute the FEC code evaluation and optimization method suitable for various application scenes by the processor.

[0100] ​In addition, the embodiment further provides a computer program product comprising a computer program or instructions programmed or configured to execute the FEC code evaluation optimization method suitable for various application scenarios by a processor.

[0101] Those skilled in the art should understand that the technical solutions provided by the embodiments of the present application can be in the form of a method, a system, or a computer program product. Therefore, the present application can be in the form of an entirely hardware embodiment, an entirely software embodiment, or an embodiment combining software and hardware aspects. Moreover, the present application can be in the form of a computer program product implemented on one or more computer-readable storage media (including but not limited to disk storage, CD-ROMs, optical storage, etc.) containing computer usable program code. The present application is described with reference to flowcharts and / or block diagrams of the methods, devices (systems), and computer program products according to the embodiments of the present application. It should be understood that each flow and / or block in the flowcharts and / or block diagrams, as well as combinations of flows and / or blocks in the flowcharts and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing apparatus to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing apparatus produce a device that implements the functions specified in the flowcharts and / or block diagrams. Figure 1 one or more flows and / or blocks Figure 1 an apparatus that tangibly embodies (or realizes) the functions specified in one or more flows and / or blocks. Such computer program instructions can also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instructions means that implement the function specified in the flowcharts and / or block diagrams. Figure 1 one or more flows and / or blocks Figure 1 an apparatus that tangibly embodies (or realizes) the functions specified in one or more flows and / or blocks. Such computer program instructions can also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instructions means that implement the function specified in the flowcharts and / or block diagrams. Figure 1 one or more flows and / or blocks Figure 1 an apparatus that tangibly embodies (or realizes) the functions specified in one or more flows and / or blocks. Such computer program instructions can also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instructions means that implement the function specified in the flowcharts and / or block diagrams.

[0102] The above description is only the preferred embodiments of the present application, and the protection scope of the present application is not limited to the above-mentioned embodiments. Any improvements and refinements made by those skilled in the art without departing from the principles of the present application should also be considered within the protection scope of the present application.

Claims

1. A FEC code evaluation and optimization method applicable to various application scenarios, characterized in that: Including evaluation of delay performance for various FEC codes To select the optimal FEC code, the delay performance of the FEC code is evaluated include: S1, after applying FEC code to the data packet, several data blocks with k data units and t data units of error correction are obtained. , calculate the loss probability of data packets after using FEC code in the current application scenario ; S2, according to the loss probability Calculate the packet loss rate after using FEC code ; S3, based on packet loss rate Calculate the delay performance of data packets after using FEC code ; In step S1, the FEC code in the current application scenario adopts the DFE mechanism, and the loss probability of the data packet after using the FEC code in the current application scenario is calculated. Includes: Several data blocks obtained after applying FEC code to data packets , calculate the probability that the data unit itself is wrong And the probability that the error of the previous data unit will cause the error of the next data unit ; Calculate the loss probability of data packets after using FEC code in the current application scenario according to the following formula: : ，（1） ，（2） In the above formula, is the inner loop approximate variable; is the binomial coefficient, indicating that Select from data units The number of methods per data unit; is the binomial coefficient, indicating that Select from data units The number of methods per data unit; and is the loop variable; For each data block The number of data units in For each data block The number of data units that can be corrected.

2. The FEC code evaluation and optimization method applicable to various application scenarios according to claim 1, characterized in that: The probability of error in the calculation data unit itself And the probability that the error of the previous data unit will cause the error of the next data unit The function expression is: ，（3） ，（4） ，（5） In the above formula, For data blocks The number of bits in is the bit error rate for each bit, is the probability that the previous bit causes the next bit to be wrong, is the number of bits contained in a data unit, is the amount of electrical energy, Is the loop variable.

3. The FEC code evaluation and optimization method applicable to various application scenarios according to claim 1, characterized in that: In step S1, the FEC code in the current application scenario adopts a precoding mechanism, and the loss probability of the data packet after using the FEC code in the current application scenario is calculated. When the data block When an odd number of data units can be corrected, the loss probability of the data packet after using the FEC code according to formula (6) is , when the data block When an even number of data units can be corrected, the probability of data packet loss after using FEC code is as follows (7): : ，（6） ，（7） In the above formula, For each data block The number of data units in For each data block The number of error-correctable data units, and is the loop variable, is the probability of a string of error data units with the number of data units i, To have data units and error correctable data unit data block The probability of loss, For each data block The number of error-correctable data units, is a positive integer variable, is a positive integer, The number of data units is The probability of a string of data units, To have data units and error correctable data unit data block probability of loss.

4. The FEC code evaluation and optimization method applicable to various application scenarios according to claim 3, characterized in that: The number of data units is The probability of a string of data units The calculation function expression is: ，（8） ，（9） In the above formula, The number of data units is The probability of a string of data units, is the bit error rate for each bit, is the probability that the previous bit causes the next bit to be wrong, is the number of data units.

5. The FEC code evaluation and optimization method applicable to various application scenarios according to claim 3, characterized in that: In step S1, the FEC code in the current application scenario adopts a general mechanism that is not a DFE mechanism and a precoding mechanism, and calculates the loss probability of the data packet after using the FEC code in the current application scenario The function expression is: ，（10） In the above formula, is the error rate of each data unit, Represents the bit error rate of each bit, For each data block The number of data units in For each data block The number of error-correctable data units, is the loop variable, is the binomial coefficient, indicating that Select from data units The number of methods for each data unit, and: ，（11） In the above formula, The number of bits contained in a data unit.

6. The FEC code evaluation and optimization method applicable to various application scenarios according to claim 1, characterized in that: Packet loss rate in step S2 The calculation function expression is: ，（12） In the above formula, is the loss probability, n is the number of bits in a data packet, and m is the number of FEC blocks in a single data packet; Delay performance in step S3 The calculation function expression is: ，（13） In the above formula, is the packet loss rate, The time it takes to transmit the distance, The time required to encode the FEC code.

7. An FEC code evaluation and optimization system suitable for various application scenarios, comprising a microprocessor and a memory connected to each other, characterized in that: The microprocessor is programmed or configured to execute the FEC code evaluation optimization method applicable to multiple application scenarios as described in any one of claims 1 to 6.

8. A computer-readable storage medium having a computer program or instruction stored therein, characterized in that: The computer program or instruction is programmed or configured to execute, through a processor, the FEC code evaluation and optimization method applicable to multiple application scenarios as recited in any one of claims 1 to 6.

9. A computer program product comprising a computer program or instructions, characterized in that The computer program or instruction is programmed or configured to execute, through a processor, the FEC code evaluation and optimization method applicable to multiple application scenarios as recited in any one of claims 1 to 6.

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