Display panel and display device

Abstract

The invention provides a display panel and a display device. The display panel comprises a pixel driving circuit, the pixel driving circuit comprises a driving module, a first light-emitting control module and a first initialization module, the driving module is electrically connected with the first light-emitting control module and the first initialization module, the first light-emitting control module comprises a fifth transistor, and the fifth transistor is electrically connected with the first initialization module. The driving module comprises a first transistor, the first initialization module comprises an eighth transistor, an active layer of the eighth transistor, an active layer of the fifth transistor and an active layer of the first transistor are in the same layer and are connected, and the active layer of the fifth transistor is arranged in the first direction. The pixel driving circuit further comprises grid electrodes arranged in the second direction, the grid electrodes of the fifth transistors of the adjacent pixel driving circuits in the first direction are arranged at intervals, and the first direction is perpendicular to the second direction. Therefore, the wiring space is saved, and the requirement of high PPI pixel wiring can be met.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a display panel and a display device. Background Art

[0002] Organic Light Emitting Diode (OLED) display technology is regarded as the most promising new flat panel display technology of the next generation. Compared with liquid crystal display technology, OLED display technology has the advantages of low energy consumption, low cost, self-luminescence, wide viewing angle and fast response speed. When the current display panel is applied to high resolution, how to set the driving circuit under the reduced pixel unit area and improve the performance of the driving circuit and reduce power consumption is a direction worth studying.

[0003] To this end, existing display panels need to be improved. Summary of the invention

[0004] In view of this, the purpose of the present application is to provide a display panel and a display device, aiming to improve the performance of the display panel and meet the requirements of high PPI pixel occasions.

[0005] To achieve the above objectives, this application adopts the following technical solutions.

[0006] A display panel comprising: a pixel driving circuit,

[0007] A pixel driving circuit, wherein the pixel driving circuit comprises a driving module, a first light emitting control module and a first initialization module,

[0008] The driving module is electrically connected to the first light emitting control module and the first initialization module.

[0009] The first light emitting control module includes a fifth transistor, the driving module includes a first transistor, the first initialization module includes an eighth transistor, the active layer of the eighth transistor, the active layer of the fifth transistor and the active layer of the first transistor are in the same layer and are connected to each other,

[0010] The active layer of the fifth transistor extends along the first direction, the fifth transistor further includes a gate extending along the second direction, and the gates of the fifth transistors of the adjacent pixel driving circuits in the first direction are arranged at intervals, wherein the first direction intersects the second direction. This can save wiring space, which is equivalent to reducing the distance between adjacent pixels, and can meet the requirements of high PPI pixel wiring.

[0011] In a preferred embodiment, the display panel further comprises: a second light emitting control module, the second light emitting control module being electrically connected between the driving module and the light emitting module;

[0012] Preferably, it also includes a data writing module, a threshold compensation module, a second initialization module and a third initialization module, the data writing module is electrically connected to the first end of the driving module, and is used to transmit a data voltage to the driving module, the threshold compensation module is electrically connected between the second end and the control end of the driving module, the second initialization module is electrically connected to the control end of the driving module, and the third initialization module is electrically connected to the light-emitting module.

[0013] In a preferred embodiment, the display panel includes:

[0014] substrate;

[0015] a first metal layer located at one side of the substrate, the first metal layer comprising a first metal portion, at least a portion of the first metal portion being used as a gate of the fifth transistor, and the first metal portions of adjacent pixel driving circuits are arranged at intervals in the first direction;

[0016] Preferably, the first metal parts of adjacent pixel driving circuits are arranged at intervals in the second direction, wherein the first direction is perpendicular to the second direction;

[0017] Preferably, the first metal portion is L-shaped;

[0018] Preferably, the first metal portion includes a first sub-metal portion extending along the first direction and a second sub-metal portion extending along the second direction, and the first sub-metal portion and the second sub-metal portion are connected as one body.

[0019] Preferably, the material of the first metal layer includes molybdenum.

[0020] In a preferred embodiment, the display panel includes:

[0021] A second metal layer, which is located at a side of the first metal layer away from the substrate, and the second metal layer includes a first initialization signal line;

[0022] Preferably, the first initialization signal line extends along the first direction;

[0023] Preferably, the second metal layer comprises a third initialization signal line, and the third initialization signal line is used to provide a third initialization signal to the pixel driving circuit;

[0024] Preferably, the first initialization signal line and the third initialization signal line extend along the first direction respectively.

[0025] In a preferred embodiment, the display panel includes:

[0026] an interlayer insulating layer and a third metal layer stacked in sequence in a direction away from the substrate, the interlayer insulating layer and the third metal layer are both located on a side of the second metal layer away from the substrate, the third metal layer comprises a light emitting control signal line, and the light emitting control signal line is electrically connected to the gate of the fifth transistor through a via hole in the interlayer insulating layer;

[0027] Preferably, the first metal portion includes a lapped end, and the light emitting control signal line is electrically connected to the lapped end through a via hole of the interlayer insulating layer;

[0028] Preferably, the material of the light emitting control signal line comprises titanium aluminum titanium;

[0029] Preferably, the light emitting control signal line extends along the first direction.

[0030] In a preferred embodiment, the display panel includes a fourth metal layer, which is located on a side of the third metal layer away from the substrate, and the fourth metal layer includes a power signal line and a data signal line, wherein the power signal line is used to provide a power signal to the pixel driving circuit, and the data signal line is used to provide a data signal to the pixel driving circuit;

[0031] Preferably, the power signal line extends along the second direction;

[0032] Preferably, the data signal line extends along the second direction.

[0033] In a preferred embodiment, the display panel includes an inorganic insulating layer and a second metal layer stacked in sequence in a direction away from the substrate, the inorganic insulating layer and the second metal layer are both located on a side of the first metal layer away from the substrate, the second metal layer includes a light emitting control signal line for providing a light emitting control signal to the pixel driving circuit, and the light emitting control signal line is electrically connected to the gate of the fifth transistor through a via hole in the inorganic insulating layer;

[0034] Preferably, the first metal portion includes a lap portion, and the light emitting control signal line is electrically connected to the lap portion through a via hole in the inorganic insulating layer;

[0035] Preferably, the material of the light emitting control signal line comprises titanium aluminum titanium;

[0036] Preferably, the light emitting control signal line extends along the first direction.

[0037] In a preferred embodiment, the display panel includes a third metal layer located on a side of the second metal layer away from the substrate, the third metal layer includes a power signal line and a data signal line, the power signal line is used to provide a power signal to the pixel driving circuit, and the data signal line is used to provide a data signal to the pixel driving circuit;

[0038] Preferably, the power signal line extends along the second direction;

[0039] Preferably, the data signal line extends along the second direction.

[0040] In a preferred embodiment, in the display panel, the active layer of the eighth transistor, the active layer of the fifth transistor and the active layer of the first transistor are directly connected.

[0041] Based on the same inventive concept, the present application proposes a display device, which includes the above-mentioned display panel.

[0042] Compared with the prior art, the display panel proposed in the present application optimizes the wiring of the driving module, the first light-emitting control module and the first initialization module. Specifically, the active layer of the eighth transistor, the fifth transistor and the active layer of the first transistor in the pixel driving circuit are arranged in the same layer and directly connected. The fifth transistor includes an active layer configured along a first direction (X direction) and a gate configured along a second direction (Y direction), and the gates of the fifth transistors of the adjacent pixel driving circuits in the first direction are configured at intervals. Such a design realizes that the drain of the eighth transistor is directly connected to the source of the first transistor without passing through a cross-line and a via of the third metal layer and a Psi film layer, thereby saving wiring space, and further reducing the wiring space of the pixel driving circuit in a variable manner, which is equivalent to reducing the distance between adjacent pixels, thus meeting the requirements of high PPI pixel wiring. BRIEF DESCRIPTION OF THE DRAWINGS

[0043] In order to more clearly illustrate the technical solutions in the present application or related technologies, the drawings required for use in the embodiments or related technical descriptions are briefly introduced below. Obviously, the drawings described below are only embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0044] Figure 1 A schematic diagram of wiring of a pixel driving circuit of an existing pixel;

[0045] Figure 2 A topological diagram of an existing pixel driving circuit;

[0046] Figure 3 A schematic diagram of the structure of a display panel according to an embodiment of the present application;

[0047] Figure 4 for Figure 3 A schematic cross-sectional view of a display panel shown;

[0048] Figure 5 A topological diagram of a pixel driving circuit according to an embodiment of the present application;

[0049] Figure 6 A schematic diagram of the wiring of a pixel driving circuit in a light-emitting unit according to an embodiment of the present application;

[0050] Figure 7 for Figure 6 A schematic diagram of the wiring of the semiconductor layer in FIG.

[0051] Figure 8 for Figure 6 A schematic diagram of the wiring of the first metal layer in FIG.

[0052] Fig. 9 for Figure 6 A schematic diagram of the wiring of the second metal layer in FIG.

[0053] Fig.10 for Figure 6 Schematic diagram of the wiring of the interlayer insulation layer;

[0054] Fig.11 for Figure 6 Schematic diagram of wiring of the third metal layer;

[0055] Fig.12 for Fig.11 Schematic diagram of the wiring of the upper stacked planarization layer;

[0056] Fig.13 For Fig.12 Schematic diagram of the wiring of the fourth metal layer stacked on top. DETAILED DESCRIPTION

[0057] In order to make the objectives, technical solutions and advantages of the present application more clearly understood, the present application is further described in detail below in combination with specific embodiments and with reference to the accompanying drawings.

[0058] It should be noted that, unless otherwise defined, the technical terms or scientific terms used in the embodiments of the present application should be the usual meanings understood by people with ordinary skills in the field to which the present application belongs. The "first", "second" and similar words used in the embodiments of the present application do not represent any order, quantity or importance, but are only used to distinguish different components. "Including" or "comprising" and similar words mean that the elements or objects appearing in front of the word cover the elements or objects listed after the word and their equivalents, without excluding other elements or objects. "Connect" or "connected" and similar words are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. "Up", "down", "left", "right" and the like are only used to indicate relative positional relationships. When the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0059] The display panel includes a substrate, a driving layer and a light-emitting functional layer. The driving layer is arranged on the substrate. The driving layer includes a pixel driving circuit, which is electrically connected to the pixels in the corresponding light-emitting units in the light-emitting functional layer and driven by the pixel driving circuit to light up the light-emitting units. The pixel driving circuit used in the display panel currently installed in the existing mid-to-high-end display devices includes 8 transistors and a storage capacitor C1 (also called 8T1C circuit), which has one more transistor (TFT, Thin-Film Transistor) than the traditional 7-transistor pixel circuit (also called 7T1C circuit), and has the problem of occupying more space. This problem is particularly prominent when applied to high PPI display devices.

[0060] The applicant found that when studying the wiring layout of the existing pixel driving circuit using 8 transistors, Figure 1 As shown, the wiring diagram of the existing 8-transistor pixel driving circuit is as follows: Figure 2As shown, a schematic diagram of the topology of the pixel driving circuit. The pixel driving circuit includes: a driving module, a data writing module, a threshold compensation module, a first initialization module, a second initialization module, a third initialization module and a light-emitting module. The driving module generates a driving current according to the voltage of the control terminal to drive the light-emitting module to emit light. The data writing module is used to write a data voltage to the control terminal of the driving module. The driving module includes a first transistor T10, the first electrode of the first transistor T10 is connected to the second electrode of the transistor T50 and the third initialization module tube, the first electrode of the transistor T50 is electrically connected to the storage capacitor C1 and the ELVDD terminal, the second electrode of the first transistor T10 is connected to the first electrode of the transistor T60 and the second initialization module, and the second electrode of the transistor T60 is connected to the second initialization module and the light-emitting module; the data writing module includes a second transistor T20; the threshold compensation module includes a third transistor module 30, which includes a double transistor; the first initialization module includes a fourth transistor module 40, which includes a double transistor; the second initialization module includes a seventh transistor T70; the third initialization module includes an eighth transistor T80, and the storage capacitor module includes a storage capacitor C1. The working principle of the pixel driving circuit ("8T1C") is prior art and will not be described in detail here.

[0061] In the pixel driving circuit, the transistor T50 is formed by a metal routing (as a gate) in the first metal layer along the first direction and combined with a Psi film layer (also called a Psi routing or an active layer) in the semiconductor layer along the second direction (vertical direction). The source and drain of the transistor T50 are in ohmic contact with the Psi film layer, respectively, and the Psi film layer serves as the channel of the transistor T50. The drain of the transistor T80 is connected to the source of the transistor T10 through the Psi film layer and the contact hole of the third metal and then crosses the line through the gate of the transistor T50. The transistor T80 is used to initialize the source of the transistor T10. Under the wiring / routing structure, the wiring from the drain end of the transistor T80 to the gate of the transistor T50 is long and needs to cross the line, which increases the wiring space of the pixel driving circuit, which is not conducive to the use of the pixel driving circuit of this topology on a high PPI display device.

[0062] Based on this discovery, the applicant improved the routing layout of the existing pixel driving circuit using 8 transistors to reduce the wiring space occupied by each pixel and meet the requirements of high PPI (pixel density unit, Pixels Per Inch, high PPI usually refers to PPI greater than 300) occasions.

[0063] Next, the display panel and the display device proposed in the present application are described with reference to the accompanying drawings.

[0064] like Figure 3 FIG. 4 is a schematic diagram of a display panel according to an embodiment of the present application.

[0065] The display panel 1000 includes a display area 1100 (also called AA area) and a non-display area 1200 (also called frame area / NA area) at least located on one side of the display area 1100. The non-display area 1200 is provided with a binding area (not shown) for carrying binding components in subsequent processes.

[0066] The display area 1100 includes light-emitting units 1101 arranged in an array, each light-emitting unit 1101 includes a plurality of pixels, such as red pixels, green pixels and blue pixels. The arrangement of the red pixels, green pixels and blue pixels is not limited in this embodiment. Each pixel is matched with a pixel driving circuit and a light-emitting module.

[0067] like Figure 4 Shown Figure 3 A schematic cross-section of the display panel.

[0068] The display panel includes a substrate 1300 , a driving layer 1400 and a light-emitting functional layer 1500 in the thickness direction (z direction).

[0069] The substrate 1300 covers the display area and the non-display area. It is a flexible substrate. Its material can be selected from polyimide (PI), polyethylene naphthalate (PEN) or polyethylene terephthalate (PET), etc. The material can also be a mixture of the above materials, or the substrate 1300 can be a hard substrate, such as a glass material.

[0070] The driving layer 1400 is disposed on one side of the substrate 1300. The driving layer 1400 includes a pixel driving circuit located in the display area, the pixel driving circuit matches the corresponding pixel, is connected to the light emitting module thereof, and emits light through the driving of the pixel driving circuit.

[0071] The light-emitting layer 1500 is disposed on a side of the driving layer 1400 away from the substrate 1300. The light-emitting layer 1500 includes a light-emitting unit, each of which includes a plurality of pixels (e.g., 3 pixels, each of which includes a light-emitting module). In one embodiment, in the display area 1100, a plurality of light-emitting units are provided, which are arranged in an array along a first direction (X direction) and a second direction (Y direction) perpendicular to each other, and the pixel driving circuits in the same light-emitting unit are arranged along the first direction X. The pixel driving circuit includes a power signal line ELVDD and an initialization signal line. In other embodiments, the first direction may be the Y direction, and the second direction may be the X direction.

[0072] The driving layer includes a semiconductor layer, a first metal layer, a second metal layer, a third metal layer, a fourth metal layer, and an interlayer insulating film layer arranged between two adjacent conductive film layers. The combination of the semiconductor layer and the wiring in the first metal layer forms a transistor, the combination of the wiring in the first metal layer and the wiring in the second metal layer forms a storage capacitor, and the second metal layer, the third metal layer, and the fourth metal layer are each provided with a plurality of signal lines with different directions, and the corresponding signal lines are respectively matched to electrically connect the transistors and the storage capacitors, thereby forming a pixel driving circuit. In this embodiment, the signal lines in the second metal layer and the third metal layer extend along the first direction (X direction), and the signal lines in the fourth metal layer extend along the second direction (Y direction).

[0073] Next, combine Figure 5 And refer to Figure 6-Figure 13 A schematic diagram for describing the wiring of the pixel driving circuit of the present application is shown in FIG.

[0074] like Figure 5 FIG. 8 is a topological diagram of a pixel driving circuit (8T1C) according to an embodiment of the present application.

[0075] The pixel driving circuit includes: a driving module, a data writing module, a threshold compensation module, a first initialization module, a second initialization module, a third initialization module, a first light-emitting control module, a second light-emitting control module and a light-emitting module. The data writing module is electrically connected to the first end of the driving module and is used to transmit a data voltage to the driving module. The threshold compensation module is electrically connected between the second end and the control end of the driving module. The second initialization module is electrically connected to the control end of the driving module. The third initialization module is electrically connected to the light-emitting module. The second light-emitting control module is electrically connected between the driving module and the light-emitting module.

[0076] The driving module includes a first transistor T1; the data writing module includes a second transistor T2; the threshold compensation module includes a third transistor module T3; the first initialization module includes an eighth transistor T8; the second initialization module includes a fourth transistor module T4; the third initialization module includes a seventh transistor T7; the first light-emitting control module includes a fifth transistor T5; and the second light-emitting control module includes a sixth transistor T6.

[0077] The gate of the first transistor T1 is electrically connected to the first end of the storage capacitor Cst, the second electrode of the fourth transistor module T4 and the second electrode of the third transistor module T3 .

[0078] The first electrode of the fourth transistor module T4 is electrically connected to the first initialization signal line Vrefn1, and the gate of the fourth transistor module T4 is electrically connected to the first scan line SP1 to receive the selection signal. The fourth transistor module T4 includes two transistors, and their gates are electrically connected to the first scan line SP1 respectively.

[0079] The first electrode of the third transistor module T3 is electrically connected to the second electrode of the first transistor T1 and the first electrode of the sixth transistor T6, and the gate of the third transistor module T3 is electrically connected to the second scan line SP2 to receive the selection signal. The third transistor module T3 includes two transistors, and their gates are electrically connected to the second scan line SP2 respectively.

[0080] The second electrode of the sixth transistor T6 is electrically connected to the light emitting module (such as the anode of the OLED) and the second electrode of the seventh transistor T7. The first electrode of the seventh transistor T7 is electrically connected to the second initialization signal line Vrefn2. The gate of the seventh transistor T7 is electrically connected to the third scan line SP3 to receive the signal.

[0081] The first electrode of the first transistor T1 is electrically connected to the second electrode of the second transistor T2, the second electrode of the eighth transistor T8, the second electrode of the fifth transistor T5 and the first end of the storage capacitor Cst. The first electrode of the fifth transistor T5 is electrically connected to the second end of the storage capacitor Cst and the ELVDD end.

[0082] The first electrode of the eighth transistor T8 is electrically connected to the third initialization signal line Vrefn3, and the gate of the eighth transistor T8 is electrically connected to the third scan line SP3. The gate of the fifth transistor T5 and the gate of the sixth transistor T6 are electrically connected to the emission control terminal to receive the emission control signal EM. The driving timing of the pixel driving circuit ("8T1C") is a prior art and will not be elaborated in detail here.

[0083] like Figure 6 The following is a diagram of a light emitting unit. Figure 5 The wiring diagram of the pixel driving circuit of the topology shown in FIG. The wiring of the light-emitting pixel driving circuit in each light-emitting unit is similar, and one of them is taken as an example for description. The pixel driving circuit is located in the driving layer.

[0084] The driving layer includes a semiconductor layer 100 , a first metal layer 200 , a second metal layer 300 , a third metal layer 500 , a fourth metal layer 700 , and an interlayer insulating film layer disposed between two adjacent conductive film layers.

[0085] The semiconductor layer 100 includes an active layer 110 for a first transistor, an active layer 120 for a second transistor, an active layer 130 for a third transistor module, an active layer 140 for a fourth transistor module, an active layer 150 for a fifth transistor, an active layer 160 for a sixth transistor, an active layer 170 for a seventh transistor, and an active layer 180 for an eighth transistor, wherein the active layer 180 for the eighth transistor, the active layer 150 for the fifth transistor, and the active layer 110 for the first transistor are in the same layer and connected, and preferably, the active layer 110 for the first transistor is connected to the active layer 120 for the second transistor. Preferably, the active layer of the eighth transistor, the active layer of the fifth transistor, and the active layer of the first transistor are directly connected. For example, the drain of the eighth transistor, the drain of the fifth transistor, and the source of the first transistor are directly connected through the active layer, so that the drain of the transistor T8 is directly connected to the source of the transistor T1 (the advantage is that it does not interfere with the wiring in the first metal layer to generate a new transistor). Compared with the existing 8T1C pixel driving circuit, it does not need to pass through the cross-line and the third metal M3 via and Psi film layer, saving wiring space and reducing the variable phase (pixel pitch), which can meet the requirements of high PPI pixel wiring. In this embodiment, the active layer of the fifth transistor is configured in the first direction (X direction).

[0086] The first metal layer 200 includes a first metal portion 250 extending along a first direction, the first metal portion 250 is used as a gate of a fifth transistor T5, and the first metal portion 250 is configured so that the first metal portions 250 of adjacent pixel driving circuits in the same light-emitting unit are arranged at intervals (X direction). Preferably, the first metal portion is L-shaped; preferably, the material of the first metal layer includes molybdenum; preferably, the first metal portion includes a lap portion 251. Preferably, the first metal portion includes a first sub-metal portion 252 extending along the first direction and a second sub-metal portion 253 extending along the second direction. Preferably, the first sub-metal portion and the second sub-metal portion are designed as one piece. Preferably, the length of the second sub-metal portion extending along the second direction is less than the length of the first sub-metal portion extending along the first direction.

[0087] The first metal part 250 and the active layer 150 (also called Psi film layer) provided in the semiconductor layer on the lower side thereof form the fifth transistor T5. Preferably, the first metal part 250 and the active layer 160 (also called Psi film layer) provided in the semiconductor layer on the lower side thereof form the sixth transistor T6. Such a design optimizes the gate wiring layout of the fifth transistor T5, so that the active layer of the eighth transistor, the active layer of the fifth transistor and the active layer of the first transistor are in the same layer and connected. In this way, the drain of the eighth transistor does not need to be directly connected to the source of the first transistor through the cross-line and the via and Psi film layer of the third metal layer, which saves wiring space and can reduce the wiring space of the pixel driving circuit in a variable manner, which is equivalent to reducing the distance between adjacent pixels.

[0088] The first metal layer 200 further includes a second metal line 240 , a third metal line 220 , and a fourth metal line 270 extending along a first direction.

[0089] The second metal line 240 is used to form a fourth transistor module T4 with an active layer 140 (also called a Psi film layer) disposed in the semiconductor layer below the second metal line 240 .

[0090] The third metal line 220 is used to connect the second transistor module T2 and the third transistor module T3 with the active layer 120 and the active layer 130 (also called Psi film layer) disposed in the semiconductor layer below it.

[0091] The fourth metal line 270 also serves as the third scan line SP3 and is used to form a seventh transistor module T7 and an eighth transistor module T8 respectively with the active layer 170 and the active layer 180 (also called Psi film layer) disposed in the semiconductor layer below the fourth metal line 270 .

[0092] The first metal layer 200 includes a first electrode plate 290 arranged along a first direction and serving as a first end of a storage capacitor Cst.

[0093] The second metal layer 300 includes a second electrode 390 arranged along the first direction, which serves as the first end of the storage capacitor Cst. A first initialization signal line Vrefn1 and a third initialization signal line Vrefn3 are arranged along the first direction. Then, an interlayer insulating layer 400 is provided on the second metal layer 300. Fig.10 Then, a third metal layer 500 is disposed on the interlayer insulating layer 400 .

[0094] The third metal layer 500 includes a light-emitting control signal line (EM), which is electrically connected to the gate of the fifth transistor through a via hole in the interlayer insulating layer 400 (also called an interlayer dielectric layer), and transmits an EM signal to the gate of the fifth transistor T5 (such a light-emitting control signal line has a small impedance (the impedance is lower than the impedance of the existing light-emitting control signal line when it is set in the first metal layer), which can effectively reduce the load and improve the uniformity of the display). Preferably, the light-emitting control signal line is electrically connected to the overlapping portion 251 through the via hole in the interlayer insulating layer 400. Preferably, the material of the light-emitting control signal line includes titanium aluminum titanium. Preferably, the light-emitting control signal line extends along the first direction.

[0095] The third metal layer 500 further includes a second initialization signal line Vrefn2, a first scan line SP1, a second scan line SP2 and a power signal line ELVDD extending along the first direction.

[0096] A planarization layer 600 is disposed on the side of the third metal layer 500 away from the second metal layer 300. Fig.12 shown.

[0097] The fourth metal layer 700 is disposed on the side of the planarization layer 600 away from the third metal layer 500 to include a power signal line ELVDD and a data signal line Data. Preferably, the power signal line extends along the second direction, and the data signal line extends along the second direction.

[0098] With such a design, the signal lines in the second metal layer and the third metal layer extend along the first direction (X direction), and the signal lines in the fourth metal layer extend along the second direction (Y direction), thereby saving wiring space.

[0099] As a variation of the above embodiment, the driving layer includes a semiconductor layer, a first metal layer, a second metal layer, a third metal layer and an insulating layer arranged between two adjacent metal layers, and the insulating layer includes an inorganic insulating layer, which is located between the first metal layer and the second metal layer. Among them, the semiconductor layer, the first metal layer and the second metal layer are combined to form a transistor and a storage capacitor, and the second metal layer and the third metal layer are provided with a plurality of signal lines with different directions, and the corresponding signal lines are respectively matched to electrically connect the transistors and the storage capacitors to form a pixel driving circuit. Preferably, the signal lines in the first metal layer and the second metal layer are along the first direction (X direction). For example, the second metal layer includes a light-emitting control signal line, and the light-emitting control signal line is electrically connected to the gate of the fifth transistor through a via in the inorganic insulating layer on its lower side. Preferably, the first metal portion in the first metal layer includes a lap portion (see the structure for details). Figure 8 ), the light-emitting control signal line passes through the via hole of the inorganic insulating layer on the lower side thereof and is electrically connected to the overlapped portion. Preferably, the material of the light-emitting control signal line includes titanium aluminum titanium (which can reduce impedance to improve display performance). Preferably, the light-emitting control signal line extends along the first direction. The signal routing in the third metal layer extends along the second direction (Y direction). In this way, the manufacturing process of one metal layer (the fourth metal layer) and one organic process are reduced, thereby reducing the manufacturing cost.

[0100] Based on the same inventive concept, the embodiment of the present application also provides a display device, which includes the display panel provided in the embodiment of the present application. Therefore, the display device has the technical features of the display panel provided in the embodiment of the present application, and can achieve the beneficial effects of the display panel provided in the embodiment of the present application. For the similarities, please refer to the above description of the display panel provided in the embodiment of the present application, and no further description will be given here.

[0101] Although the present invention is described herein with reference to specific embodiments, it should be understood that these embodiments are merely examples of the principles and applications of the present invention. It should therefore be understood that many modifications may be made to the exemplary embodiments and that other arrangements may be devised without departing from the spirit and scope of the present invention as defined by the appended claims. It should be understood that the various dependent claims and features described herein may be combined in a manner different from that described in the original claims. It should also be understood that features described in conjunction with individual embodiments may be used in other described embodiments.

Claims

1. A display panel, characterized in that: include: A pixel driving circuit, wherein the pixel driving circuit comprises a driving module, a first light emitting control module and a first initialization module, The driving module is electrically connected to the first light emitting control module and the first initialization module. The first light emitting control module includes a fifth transistor, the driving module includes a first transistor, the first initialization module includes an eighth transistor, the active layer of the eighth transistor, the active layer of the fifth transistor and the active layer of the first transistor are in the same layer and are connected to each other, The active layer of the fifth transistor extends along a first direction, the fifth transistor further includes a gate extending along a second direction, and the gates of the fifth transistors of the pixel driving circuits adjacent in the first direction are spaced apart, wherein the first direction intersects the second direction.

2. The display panel according to claim 1, wherein: It also includes: a second light-emitting control module, the second light-emitting control module is electrically connected between the driving module and the light-emitting module; Preferably, it also includes a data writing module, a threshold compensation module, a second initialization module and a third initialization module, the data writing module is electrically connected to the first end of the driving module, and is used to transmit a data voltage to the driving module, the threshold compensation module is electrically connected between the second end and the control end of the driving module, the second initialization module is electrically connected to the control end of the driving module, and the third initialization module is electrically connected to the light-emitting module.

3. The display panel according to claim 1, wherein: include: substrate; a first metal layer located at one side of the substrate, the first metal layer comprising a first metal portion, at least a portion of the first metal portion being used as a gate of the fifth transistor, and the first metal portions of adjacent pixel driving circuits are arranged at intervals in the first direction; Preferably, the first metal parts of adjacent pixel driving circuits are arranged at intervals in the second direction, wherein the first direction is perpendicular to the second direction; Preferably, the first metal portion is L-shaped; Preferably, the first metal portion includes a first sub-metal portion extending along the first direction and a second sub-metal portion extending along the second direction, and the first sub-metal portion and the second sub-metal portion are connected as a whole; Preferably, the material of the first metal layer includes molybdenum.

4. The display panel according to claim 3, wherein: include: A second metal layer, located on a side of the first metal layer away from the substrate, the second metal layer comprising a first initialization signal line, the first initialization signal line being used to provide a first initialization signal to the pixel driving circuit; Preferably, the first initialization signal line extends along the first direction; Preferably, the second metal layer comprises a third initialization signal line, and the third initialization signal line is used to provide a third initialization signal to the pixel driving circuit; Preferably, the first initialization signal line and the third initialization signal line extend along the first direction respectively.

5. The display panel according to claim 4, wherein: comprising an interlayer insulating layer and a third metal layer stacked in sequence in a direction away from the substrate, the interlayer insulating layer and the third metal layer are both located on a side of the second metal layer away from the substrate, the third metal layer comprises a light emitting control signal line, and the light emitting control signal line is electrically connected to the gate of the fifth transistor through a via hole provided in the interlayer insulating layer; Preferably, the first metal portion includes a lap portion, and the light emitting control signal line is electrically connected to the lap portion through a via hole of the interlayer insulating layer; Preferably, the material of the light emitting control signal line includes titanium aluminum titanium; Preferably, the light emitting control signal line extends along the first direction.

6. The display panel according to claim 4, wherein: comprising a fourth metal layer, which is located on a side of the third metal layer away from the substrate, the fourth metal layer comprising a power signal line and a data signal line, the power signal line is used to provide a power signal to the pixel driving circuit, and the data signal line is used to provide a data signal to the pixel driving circuit; Preferably, the power signal line extends along the second direction; Preferably, the data signal line extends along the second direction.

7. The display panel according to claim 3, wherein: comprising an inorganic insulating layer and a second metal layer stacked in sequence in a direction away from the substrate, the inorganic insulating layer and the second metal layer are both located on a side of the first metal layer away from the substrate, the second metal layer comprises a light emitting control signal line for providing a light emitting control signal to the pixel driving circuit, the light emitting control signal line is electrically connected to the gate of the fifth transistor through a via hole in the inorganic insulating layer; Preferably, the first metal portion includes a lap portion, and the light emitting control signal line is electrically connected to the lap portion through a via hole in the inorganic insulating layer; Preferably, the material of the light emitting control signal line comprises titanium aluminum titanium; Preferably, the light emitting control signal line extends along the first direction.

8. The display panel according to claim 7, wherein: comprising a third metal layer, which is located on a side of the second metal layer away from the substrate, the third metal layer comprising a power signal line and a data signal line, the power signal line is used to provide a power signal to the pixel driving circuit, and the data signal line is used to provide a data signal to the pixel driving circuit; Preferably, the power signal line extends along the second direction; Preferably, the data signal line extends along the second direction.

9. The display panel according to claim 1, wherein: The active layer of the eighth transistor, the active layer of the fifth transistor, and the active layer of the first transistor are directly connected.

10. A display device, characterized in that: The invention comprises a display panel as claimed in any one of claims 1 to 9.

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