Processing method and device, computer equipment and storage medium

Abstract

The invention relates to a processing method and device, computer equipment and a storage medium. The method comprises the following steps: receiving configuration data; performing preset verification processing on the configuration data, and outputting a verification result; and when the verification result meets a preset condition, transmitting the configuration data to a second flash memory area so as to read the configuration data from the second flash memory area. By adopting the method, correct output of the configuration data can be ensured, and the reliability and the stability of the Zynq system are improved.

Description

Technical Field

[0001] The present application relates to the field of electronic information technology, and in particular to a processing method, apparatus, computer equipment and storage medium. Background Art

[0002] With the development of electronic information technology, the widespread application of Zynq system has become a trend. However, the existing method of updating application programs in off-chip Flash memory of Zynq system is relatively cumbersome. It is necessary to transmit the update package of the program to the Zynq system, and then the Zynq PS end in the Zynq system stores the update package in the off-chip Flash memory connected to the Zynq PS end.

[0003] To execute an application update, the program update needs to be completed based on data storage. However, when the satellite payload is in orbit, the Zynq system is easily affected by the radiation environment of outer space and suffers from the single particle upset effect, which in turn causes memory data flips, program anomalies, and even system failures, seriously affecting the stability and reliability of application updates. Summary of the invention

[0004] Based on this, it is necessary to provide a processing method, apparatus, computer device and storage medium for the above technical problems, which can ensure the correct output of configuration data and improve the reliability and stability of the Zynq system.

[0005] A processing method is applied to a Zynq PL end, the method comprising: Receive configuration data; Performing a preset verification process on the configuration data and outputting a verification result; When the verification result meets a preset condition, the configuration data is transmitted to the second flash memory area so as to read the configuration data from the second flash memory area.

[0006] In one embodiment, it also includes: In response to triggering a program loading or updating operation, enabling a preset first switch element to conduct a preset communication link; Based on the communication link, a preset second switch component or a third switch component is enabled to read the configuration data.

[0007] In one embodiment, the preset check adopts triple-module redundancy check; the steps of the triple-module redundancy check include: storing the configuration data at three different locations in the first flash memory area; Within a predetermined period, respectively performing the same second preset operation on the configuration data in different positions, and outputting the operation result; When the operation result is the same as the preset result, it is determined that the configuration data meets the preset condition.

[0008] In one of the embodiments, the second flash memory area includes a second solidified area and a second reconstruction area; The step of transferring the configuration data to the second flash memory area comprises: Compare the configuration data with the pre-stored data in the second flash memory area and output a comparison result; When the comparison result is the same, the configuration data is stored in the second reconstruction area, otherwise it is stored in the second solidification area.

[0009] In one embodiment, the step of enabling the preset second switch element or the third switch element includes: When the configuration data is stored in the second solidification area, enabling the second switch element; When the configuration data is stored in the second reconstruction area, the third switch is enabled.

[0010] In one embodiment, before the step of enabling the preset second switch or third switch element, the step includes: Determine whether the configuration data exists in the second flash memory area, and output a determination result; If the configuration data is included in the judgment result, the configuration data is chip-selected to load and generate a target application program, otherwise the program loading or updating operation step is terminated.

[0011] In one embodiment, the first flash memory area includes a first fixed area and a first reconstruction area; the configuration data includes reconstruction program data and fixed program data; The step of receiving configuration data includes at least one of the following: receiving the curing program data through the first curing area so as to transmit it to the second curing area; The reconstruction procedure data is received by the first reconstruction zone for transmission to the second reconstruction zone.

[0012] A processing device, comprising: A data receiving module, used for receiving configuration data; A data verification module, used to perform a preset verification process on the configuration data and output a verification result; The data transmission module is used for transmitting the configuration data to the second flash memory area when the verification result meets the preset condition, so as to read the configuration data from the second flash memory area.

[0013] A computer device comprises a memory and a processor, wherein the memory stores a computer program, and when the processor executes the computer program, the following steps are implemented: Receive configuration data; Performing a preset verification process on the configuration data and outputting a verification result; When the verification result meets a preset condition, the configuration data is transmitted to the second flash memory area so as to read the configuration data from the second flash memory area.

[0014] A computer-readable storage medium stores a computer program, which, when executed by a processor, implements the following steps: Receive configuration data; Performing a preset verification process on the configuration data and outputting a verification result; When the verification result meets a preset condition, the configuration data is transmitted to the second flash memory area so as to read the configuration data from the second flash memory area.

[0015] The above processing method, device, computer equipment and storage medium receive configuration data; perform preset verification processing on the configuration data and output the verification result; when the verification result meets the preset condition, the configuration data is transmitted to the second flash memory area so as to read the configuration data from the second flash memory area. When the verification result of the configuration data meets the preset condition, it is transmitted to the second flash memory area, thereby ensuring the correct output of the configuration data and greatly improving the reliability of the Zynq system. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 It is a structural schematic diagram of the processing system in the first embodiment; Figure 2 is a flow chart of the processing method in the second embodiment; Figure 3 A schematic diagram of the process of triple modular redundancy check steps in the second embodiment; Figure 4 A schematic flow chart of a processing method in the third embodiment; Figure 5 A schematic flow chart of a processing method in the fourth embodiment; Figure 6 A schematic flow chart of another processing method in the fourth embodiment; Figure 7 is a structural block diagram of a processing device in one embodiment; Figure 8 FIG. 4 is a diagram showing the internal structure of a computer device in one embodiment. DETAILED DESCRIPTION

[0017] In order to make the purpose, technical solution and advantages of the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0018] First embodiment The processing method provided in this application can be applied to Figure 1 In the Zynq system shown in FIG. 1 , the Zynq system includes a Zynq PL terminal 100 and a Zynq PS terminal 200, and the Zynq PL terminal 100 and the Zynq PS terminal 200 are integrated on the same chip. The Zynq system has both the high parallel computing capability of the programmable logic of the Zynq PL terminal 100 and the data and signal processing capability of the ARM of the Zynq PS terminal 200, and can achieve the requirements of low power consumption, small size, high bandwidth, high communication capacity, strong exchange capability, and support for signal diversity.

[0019] In the existing method of updating the application program on the off-chip Flash memory of the Zynq system, the program update package is transmitted to the Zynq system through the transmission medium such as CAN bus, Ethernet, 422 bus, and then the Zynq PS end in the Zynq system stores the program update package in the off-chip Flash memory connected to the Zynq PS end. The boot program solidified in the Zynq PS end guides the configuration of the Zynq PL end and the execution of the Zynq PS end program. If the program is to be updated, it needs to be transmitted to the Flash memory through the Zynq PS end. After the boot program and the application program are stored, the Zynq system is restarted or a "switch loader partition" command is sent to the preset loading and reconstruction circuit to reset and restart the Zynq platform, and then the update program is executed. Therefore, when the Zynq system updates the application program in the external Flash memory, the Zynq PS end needs to transfer the upgrade package to the Flash memory, reset the Zynq system, and then perform the update operation. It is necessary to integrate the upgrade function in the business application of the Zynq system, and the software upgrade is not decoupled from the business function. Existing Zynq systems have been used in spacecraft. For example, when satellite payloads are operating in orbit, they are affected by the radiation environment of outer space and are prone to single-particle upset effects, causing data flips in the Flash memory, program anomalies, and even system failures, thus having a serious impact on satellite stability and reliability.

[0020] Based on this, the Zynq system designed in this embodiment separates business requirements such as program loading and upgrading from the Zynq PS end. The Zynq PS end only needs to complete independent business function tasks, and does not need to drive the Zynq system to reset and restart to execute program updates and upgrades. Instead, the FPGA device in the Zynq PL end is used to complete the loading, updating and upgrading of the control program. After the upgrade is completed, the corresponding switch is enabled so that the Zynq PS end can read the configuration data of the program.

[0021] Optionally, the Zynq PL terminal 100 includes an FPGA device 110, a first flash memory area, a second flash memory area, and a switch component. The switch component includes at least three switch components, and the switch component in this embodiment includes a first switch component 120, a second switch component 130, and a third switch component 140. The first switch component 120 is connected to the Zynq PS terminal 200 and the FPGA device 110, respectively, and the FPGA device 110 can enable the first switch component 120; the second switch component 130 is connected to the Zynq PS terminal 200, and the FPGA device 110 can enable the second switch component 130; the third switch component 140 is connected to the Zynq PS terminal 200, and the FPGA device 110 can enable the third switch component 140. The FPGA device 110 connects the first flash memory area, the second flash memory area, and the first switch component 120.

[0022] The first flash memory area is a Flash memory based on the QSPI protocol connected to the outside of the FPGA device. The first flash memory area includes a first solidification area 150 and a first reconstruction area 160. The first solidification area 150 and the first reconstruction area 160 are independent Flash memories. The second flash memory area uses a Flash memory based on the QSPI protocol. The second flash memory area includes a second solidification area 170 and a second reconstruction area 180. The second solidification area 170 and the second reconstruction area 180 are independent Flash memories.

[0023] Through the Zynq system design provided in this embodiment, the Zynq PS end only needs to complete independent business function tasks, and there is no need to use the Zynq system reset and restart to execute the program loading or updating business. Instead, the FPGA device is used to execute the program loading or updating business, and after the program loading or updating business is completed, the communication link between the Zynq PS end and the FPGA device is turned on through the preset switch component, so that the Zynq PS end can read the configuration data of the corresponding program.

[0024] Second embodiment In one embodiment, Figure 2 As shown, a processing method is provided, which is applied to Figure 1 The ZynqPL end in the example is used to illustrate, including the following steps: S110, receiving configuration data; S120, performing a preset verification process on the configuration data and outputting a verification result; S130, when the verification result meets a preset condition, transferring the configuration data to a second flash memory area, so as to read the configuration data from the second flash memory area.

[0025] Optionally, the configuration data includes fixed program data and reconstructed program data. The fixed program data in this embodiment refers to the program code burned into the Flash memory, which can remain unchanged even if a power outage occurs, and the program can be directly loaded and executed from the Flash memory the next time the computer is turned on. The reconstructed program data in this embodiment refers to optimizing and improving the program code based on the existing program code without changing the observable behavior of the program, so as to improve the quality and performance of the application, make its design pattern and architecture more reasonable, and improve scalability and maintainability.‌

[0026] Optionally, the preset check in step S120 adopts triple module redundancy check. Figure 3 As shown, a schematic flow chart of a triple-module redundancy check step is provided. The triple-module redundancy check step includes: S121: storing the configuration data in three different locations in the first flash memory area; S122: performing the same second preset operation on the configuration data in different positions within a predetermined period, and outputting the operation result; S123: When the operation result is the same as the preset result, it is determined that the configuration data meets the preset condition.

[0027] It is further explained that the first flash memory area includes a first solidification area and a first reconstruction area. For example, in the satellite production process, three identical solidification program data are stored in the first solidification area, corresponding to different addresses. Correspondingly, three identical reconstruction program data are stored in the first reconstruction area, also corresponding to different addresses. It is further explained that due to the single-event upset (SEU) effect, the logical state of the register and memory associated with the FPGA device in the Zynq PL end on the satellite will change. If the first flash memory area is not processed by triple-mode redundancy check, it may cause the configuration of the Flash memory where the core data is located to be reversed, and as time goes by, the error accumulation causes functional failure. Based on this, this embodiment performs triple-mode redundancy check on the configuration data stored in the first flash memory area within a predetermined period. Usually, the check result samples two out of three, that is, under the same operation, as long as two identical errors do not occur at the same time, the error where the fault is located can be masked, thereby ensuring correct output. Since the three copies of configuration data are independent of each other, the probability of errors in two copies of configuration data is extremely small. Therefore, the use of triple-mode redundancy verification can improve the overall reliability of the system. When the verification result of the triple-mode redundancy verification meets the preset requirements, the configuration data can be transmitted to the second flash memory area for business use.

[0028] It is further explained that the operating frequency of existing communication satellites is getting higher and higher, and the operating voltage is relatively low, which makes the main control CPU more sensitive to single particle effects. The satellite operating environment is full of various high-energy particles, such as protons, α ions, heavy ions, γ rays, electrons, etc. Any particle may cause a single particle effect. As a commercial device, the Zynq system has a weak ability to resist single particle upsets and is easily affected by high-energy particles to cause SEU / SEFI phenomena, which in turn causes data flips in the Flash memory, program anomalies, and even system failures, which has a serious impact and harm on the stability and reliability of the satellite. Based on this, this embodiment samples triple-module redundancy check to ensure the stability of the configuration data before the program is loaded / updated.

[0029] In one embodiment, the second flash memory area includes a second solidified area and a second reconstruction area. In step S130, the step of transferring the configuration data to the second flash memory area includes: Compare the configuration data with the pre-stored data in the second flash memory area and output a comparison result; When the comparison result is the same, the configuration data is stored in the second reconstruction area, otherwise it is stored in the second solidification area.

[0030] In one embodiment, the step of receiving configuration data includes at least one of the following: receiving the curing program data through the first curing area so as to transmit it to the second curing area; The reconstruction procedure data is received by the first reconstruction zone for transmission to the second reconstruction zone.

[0031] Further explanation: the first flash memory area is divided into a first solidification area and a first reconstruction area, the solidification program data is stored in the first solidification area, and the reconstruction program data is stored in the first reconstruction area, when the configuration data in the first solidification area or the first reconstruction area meets the triple-module redundancy check, the corresponding configuration data is transferred to the second solidification area or the second reconstruction area, and the configuration data of the first solidification area is transferred to the second solidification area, and the configuration data of the first reconstruction area is transferred to the second reconstruction area. Further explanation: the solidification program generally does not need to be upgraded and updated after loading, therefore, when the configuration data is compared with the pre-stored data, if it is a program upgrade and update, then the comparison result is the same, if it is a program loading, then it is a newly added program, then the comparison result is different.

[0032] Based on this, when the satellite payload is in orbit, when the configuration data in the first reconstruction area has a function upgrade, the configuration data in the second reconstruction area can be directly upgraded online to update the original configuration data.

[0033] Third embodiment In one embodiment, Figure 4 As shown, this embodiment is applied to the Zynq PL end. This embodiment provides a processing method, which also includes the following steps: S140, in response to triggering a program loading or updating operation, enabling a preset first switch element to conduct a preset communication link; S150: Based on the communication link, enable a preset second switch or a third switch element to read the configuration data.

[0034] To further illustrate, the Zynq PL side is connected to the Zynq PS side and integrated on the same Zynq chip.

[0035] Step S140 further includes: in response to triggering a program loading or updating operation, enabling a preset first switch element to conduct a communication link between the Zynq PS terminal and the Zynq PL terminal.

[0036] Step S150 further includes: in response to a first preset operation of the Zynq PS terminal, enabling a preset second switch element or a preset third switch element to read the configuration data.

[0037] Optionally, when a program loading service or a program updating service is triggered on the Zynq PL side, the configuration data in the second flash memory area needs to be read. The first preset operation on the Zynq PS side includes: scanning a preset storage location in the second flash memory area based on the communication link to determine that the preset storage location stores the configuration data; and chip selecting the configuration data in the storage location.

[0038] In step S150, before the step of enabling the preset second switch or third switch element, the following steps are included: Determine whether the configuration data exists in the second flash memory area, and output a determination result; If the configuration data is included in the judgment result, the configuration data is chip-selected to load and generate a target application program, otherwise the program loading or updating operation step is terminated.

[0039] Optionally, the step of enabling the preset second switch element or the third switch element includes: When the configuration data is stored in the second solidification area, enabling the second switch element; When the configuration data is stored in the second reconstruction area, the third switch is enabled.

[0040] In the above processing method, since a preset first switch is enabled in response to a triggering program loading or updating operation to conduct a preset communication link; based on the communication link, a preset second switch or third switch is enabled to read the configuration data, it is possible to separate the business function tasks of the Zynq PL end and the Zynq PS end when the program is loaded and upgraded, and there is no need to reset the Zynq system. By enabling the corresponding switch in the Zynq PL end to control the Zynq PS end to read the configuration data, the program upgrade and the business function are decoupled, and the stability and reliability impact caused by the single particle upset effect are reduced.

[0041] Fourth embodiment In one embodiment, Figure 5 As shown, a processing method is provided, which is applied to Figure 1 The ZynqPL end in the example is used to illustrate, including the following steps: S210, based on the verification result of the configuration data satisfying the preset condition, transmitting the configuration data to the second curing area; S220, enabling a preset first switch element to conduct a communication link between the Zynq PS terminal and the Zynq PL terminal; S230, in response to the scanning operation of the Zynq PS end on the second solidification area, obtaining a scanning result; S240, if the second solidification area does not have configuration data in the scanning result, the program loading step is terminated, otherwise the preset second switch is enabled, and the chip selection operation of the Zynq PS terminal is received to load the configuration data.

[0042] In another embodiment, Figure 6 As shown, a processing method is provided, which is applied to Figure 1 The following steps are used to illustrate the Zynq PL end in the example: S310, based on the verification result of the configuration data satisfying a preset condition, transmitting the configuration data to the second reconstruction area; S320, enabling a preset first switch element to conduct a communication link between the Zynq PS terminal and the Zynq PL terminal; S330, in response to the scanning operation of the Zynq PS end on the second reconstruction area, obtaining a scanning result; S340, if the scanning result shows that the second reconstruction area does not have the configuration data, the program update step is terminated, otherwise the preset third switch is enabled, and the chip selection operation of the Zynq PS end is received, and the configuration data is loaded to update the application program.

[0043] In the above processing method, the solidified configuration data is stored in the first solidified area, the reconstructed configuration data is stored in the first reconstruction area, and then the configuration data solidified in the first solidified area is received by the second solidified area, and the configuration data reconstructed in the first reconstruction area is received by the second reconstruction area. The configuration data is stored in correspondence with multiple partitions, so that when the first solidified area or the first reconstruction area loads the update program, the second solidified area or the second reconstruction area can complete the loading of the update program online.

[0044] It should be understood that although the steps in the flowchart are shown in sequence as indicated by the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless otherwise specified herein, there is no strict order restriction for the execution of these steps, and these steps can be executed in other orders. Figure 2-6 At least part of the steps may include multiple sub-steps or multiple stages. These sub-steps or stages are not necessarily executed at the same time, but can be executed at different times. The execution order of these sub-steps or stages is not necessarily sequential, but can be executed in turn or alternately with other steps or at least part of the sub-steps or stages of other steps.

[0045] In one embodiment, Figure 7 As shown, a processing device is provided, comprising: a data receiving module 10, a data checking module 20 and a data transmission module 30, wherein: The data receiving module 10 is used to receive configuration data; The data verification module 20 is used to perform a preset verification process on the configuration data and output the verification result; The data transmission module 30 is used for transmitting the configuration data to the second flash memory area when the verification result meets a preset condition, so as to read the configuration data from the second flash memory area.

[0046] For the specific definition of the processing device, please refer to the definition of the processing method above, which will not be repeated here. Each module in the above processing device can be implemented in whole or in part by software, hardware and a combination thereof. Each of the above modules can be embedded in or independent of the processor in the computer device in the form of hardware, or can be stored in the memory of the computer device in the form of software, so that the processor can call and execute the operations corresponding to each of the above modules.

[0047] In one embodiment, a computer device is provided. The computer device may be a server, and its internal structure diagram may be as follows: Figure 8 As shown. The computer device includes a processor, a memory, a network interface and a database connected through a system bus. Among them, the processor of the computer device is used to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system, a computer program and a database. The internal memory provides an environment for the operation of the operating system and the computer program in the non-volatile storage medium. The database of the computer device is used to store processing data. The network interface of the computer device is used to communicate with an external terminal through a network connection. When the computer program is executed by the processor, a processing method is implemented.

[0048] Those skilled in the art will understand that Figure 8 The structure shown in the figure is only a block diagram of a part of the structure related to the solution of the present application, and does not constitute a limitation on the computer device to which the solution of the present application is applied. The specific computer device may include more or fewer components than those shown in the figure, or combine certain components, or have a different arrangement of components.

[0049] In one embodiment, a computer device is provided, including a memory and a processor, wherein a computer program is stored in the memory, and when the processor executes the computer program, the following steps are implemented: receiving configuration data; performing a preset verification process on the configuration data and outputting a verification result; when the verification result meets a preset condition, transmitting the configuration data to a second flash memory area so as to read the configuration data from the second flash memory area.

[0050] In one embodiment, a computer readable storage medium is provided, on which a computer program is stored, and when the computer program is executed by a processor, the following steps are implemented: receiving configuration data; performing a preset verification process on the configuration data and outputting a verification result; when the verification result meets a preset condition, transmitting the configuration data to a second flash memory area so as to read the configuration data from the second flash memory area.

[0051] Those of ordinary skill in the art can understand that all or part of the processes in the above-mentioned embodiment methods can be implemented by instructing the relevant hardware through a computer program, and the computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to memory, storage, database or other media used in the embodiments provided in this application may include non-volatile and / or volatile memory. Non-volatile memory may include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM) or flash memory. Volatile memory may include random access memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in many forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link (Synchlink) DRAM (SLDRAM), memory bus (Rambus) direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM), etc.

[0052] The technical features of the above embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0053] The above-mentioned embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the invention patent. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent of the present application shall be subject to the attached claims.

Claims

1. A processing method, applied to the Zynq PL end, characterized in that: The method comprises: Receive configuration data; Performing a preset verification process on the configuration data and outputting a verification result; When the verification result meets a preset condition, the configuration data is transmitted to the second flash memory area so as to read the configuration data from the second flash memory area.

2. The method according to claim 1, characterized in that Also includes: In response to triggering a program loading or updating operation, enabling a preset first switch element to conduct a preset communication link; Based on the communication link, a preset second switch component or a third switch component is enabled to read the configuration data.

3. The method according to claim 1, characterized in that The preset check adopts triple-mode redundancy check; the steps of the triple-mode redundancy check include: storing the configuration data at three different locations in the first flash memory area; Within a predetermined period, respectively performing the same second preset operation on the configuration data in different positions, and outputting the operation result; When the operation result is the same as the preset result, it is determined that the configuration data meets the preset condition.

4. The method according to claim 2, characterized in that: The second flash memory area includes a second solidification area and a second reconstruction area; The step of transferring the configuration data to the second flash memory area comprises: Compare the configuration data with the pre-stored data in the second flash memory area and output a comparison result; When the comparison result is the same, the configuration data is stored in the second reconstruction area, otherwise it is stored in the second solidification area.

5. The method according to claim 4, characterized in that The step of enabling the preset second switch element or the third switch element comprises: When the configuration data is stored in the second solidification area, enabling the second switch element; When the configuration data is stored in the second reconstruction area, the third switch is enabled.

6. The method according to claim 2, characterized in that Before the step of enabling the preset second switch or third switch element, the method includes: Determine whether the configuration data exists in the second flash memory area, and output a determination result; If the configuration data is included in the judgment result, the configuration data is chip-selected to load and generate a target application program, otherwise the program loading or updating operation step is terminated.

7. The method according to claim 4, characterized in that The first flash memory area includes a first solidification area and a first reconstruction area; the configuration data includes reconstruction program data and solidification program data; The step of receiving configuration data includes at least one of the following: receiving the curing program data through the first curing area so as to transmit it to the second curing area; The reconstruction procedure data is received by the first reconstruction zone for transmission to the second reconstruction zone.

8. A processing device, characterized in that: The device comprises: A data receiving module, used for receiving configuration data; A data verification module, used to perform a preset verification process on the configuration data and output a verification result; The data transmission module is used for transmitting the configuration data to the second flash memory area when the verification result meets the preset condition, so as to read the configuration data from the second flash memory area.

9. A computer device comprising a memory and a processor, wherein the memory stores a computer program, wherein: When the processor executes the computer program, the steps of the method according to any one of claims 1 to 7 are implemented.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 7 are implemented.

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