Intelligent Optical Computing Chip On-Chip Learning Training Method, Architecture and System

Abstract

The present disclosure relates to the field of optical computing technologies, and particularly to an intelligent optical computing on-chip meta-learning training method, architecture, and system. The optoelectronic computing system includes at least one optoelectronic hybrid chip architecture, and the optoelectronic hybrid chip architecture includes a diffraction module and a Mach-Zehnder interferometer array. The method includes: pre-training the diffraction neural network in the diffraction module based on a target data domain, and solidifying the pre-trained diffraction neural network to obtain a non-reconfigurable diffraction module; in response to receiving a target optical computing task corresponding to the target data domain, obtaining a target data set corresponding to the target optical computing task in the target data domain; training the phase of each Mach-Zehnder interferometer in the Mach-Zehnder interferometer array based on the target data set to obtain a trained Mach-Zehnder interferometer array. The present disclosure adopting the above solution can improve the training efficiency of the optoelectronic computing system.

Description

Technical Field

[0001] The present disclosure relates to the field of optical computing technologies, and particularly to an intelligent optical computing in-chip meta-learning training method, architecture, and system. Background Art

[0002] With the rapid development of the fields of artificial intelligence and scientific computing, the complexity and scale of computing requirements are also constantly increasing. However, existing electronic computing technologies are limited by Moore's Law, and their performance is gradually approaching saturation, making it difficult to effectively meet the increasingly stringent requirements for computing power and power consumption of large-scale complex algorithms. Light has natural advantages such as high throughput and low latency during propagation. Optical computing technologies that use photons instead of electrons as computing carriers are regarded as the key to breaking the existing computing bottleneck. Summary of the Invention

[0003] The present disclosure aims to at least partly solve one of the technical problems in the related art.

[0004] To this end, the first object of the present disclosure is to propose an intelligent optical computing in-chip meta-learning training method to improve the training efficiency of an optoelectronic computing system.

[0005] The second object of the present disclosure is to propose an optoelectronic hybrid chip architecture.

[0006] The third object of the present disclosure is to propose an optoelectronic computing system.

[0007] To achieve the above object, an embodiment of the first aspect of the present disclosure proposes an intelligent optical computing in-chip meta-learning training method, which is applied to an optoelectronic computing system. The optoelectronic computing system includes at least one optoelectronic hybrid chip architecture, and the optoelectronic hybrid chip architecture includes a diffraction module and a Mach-Zehnder interferometer array. The method includes:

[0008] Pre-training the diffraction neural network in the diffraction module based on a target data domain, and solidifying the pre-trained diffraction neural network to obtain a non-reconfigurable diffraction module;

[0009] In response to receiving a target optical computing task corresponding to the target data domain, obtaining a target data set corresponding to the target optical computing task in the target data domain;

[0010] Training the phase of each Mach-Zehnder interferometer in the Mach-Zehnder interferometer array based on the target data set to obtain a trained Mach-Zehnder interferometer array, so that the optoelectronic hybrid chip architecture executes the target optical computing task according to the non-reconfigurable diffraction module and the trained Mach-Zehnder interferometer array.

[0011] Optionally, training the phase of each Mach-Zehnder interferometer in the Mach-Zehnder interferometer array based on the target data set includes:

[0012] Dividing the target data set into a support set and a query set;

[0013] Initializing the phase of each Mach-Zehnder interferometer in the Mach-Zehnder interferometer array using the support set to obtain an initialized Mach-Zehnder interferometer array;

[0014] Training the phase of each Mach-Zehnder interferometer in the initialized Mach-Zehnder interferometer array using the query set.

[0015] Optionally, training the phase of each Mach-Zehnder interferometer in the Mach-Zehnder interferometer array based on the target data set includes:

[0016] Performing one-dimensional processing on the target data set to obtain a one-dimensional target data set;

[0017] Inputting the one-dimensional target data set into the non-reconfigurable diffraction module for feature extraction to obtain a target feature data set;

[0018] Training the phase of each Mach-Zehnder interferometer in the Mach-Zehnder interferometer array based on the target feature data set.

[0019] Optionally, training the phase of each Mach-Zehnder interferometer in the Mach-Zehnder interferometer array based on the target data set includes:

[0020] Using the gradient descent algorithm to train the phase of each Mach-Zehnder interferometer in the Mach-Zehnder interferometer array on the target data set.

[0021] Optionally, training the phase of each Mach-Zehnder interferometer in the Mach-Zehnder interferometer array based on the target data set includes:

[0022] Based on the target data set, training the input voltage of each Mach-Zehnder interferometer in the Mach-Zehnder interferometer array to implement training of the phase of each Mach-Zehnder interferometer in the Mach-Zehnder interferometer array.

[0023] Optionally, solidifying the pre-trained diffraction neural network includes:

[0024] Using lithography technology to solidify the pre-trained diffraction neural network in the diffraction module.

[0025] Optionally, the optoelectronic computing system includes multiple optoelectronic hybrid chip architectures, and the method further includes:

[0026] Connect the diffraction neural networks in the multiple optoelectronic hybrid chip architectures to obtain a gradient synthesis network;

[0027] Pre-train the gradient synthesis network based on the target data domain, and solidify the pre-trained gradient synthesis network.

[0028] Optionally, at least one of the following connection methods is used to connect the diffraction neural networks in the multiple optoelectronic hybrid chip architectures:

[0029] Series connection;

[0030] Parallel connection.

[0031] To achieve the above object, an embodiment of the second aspect of the present disclosure provides an optoelectronic hybrid chip architecture, including:

[0032] A diffraction module, configured to solidify the pre-trained diffraction neural network, and control the pre-trained diffraction neural network to perform feature extraction on the optical input signal to obtain an optical feature signal when receiving the optical input signal, where the pre-trained diffraction neural network is obtained by pre-training the diffraction neural network based on the target data domain;

[0033] A Mach-Zehnder interferometer array, configured to be trained based on the target optical computing task corresponding to the target data domain to obtain a trained Mach-Zehnder interferometer array, and control the trained Mach-Zehnder interferometer array to perform optical computing on the optical feature signal to obtain an optical output signal when receiving the optical feature signal.

[0034] To achieve the above object, an embodiment of the third aspect of the present disclosure provides an optoelectronic computing system, including: at least one optoelectronic hybrid chip architecture as shown in the foregoing second aspect.

[0035] In summary, the method, architecture, and system provided by the present disclosure combine the high data throughput capability of diffraction and the reconfigurability of the interference network by introducing the design concept of combining a pre-trained non-reconfigurable diffraction module with an adaptable reconfigurable MZI array, combine the high data throughput capability of photons and the flexibility of electrons, provide hardware advantages and improve training efficiency, and can solve the problems of frequent retraining, poor generalization ability, and low learning efficiency of current optical computing systems when facing different data domains.

[0036] Additional aspects and advantages of the present disclosure will be given in part in the following description, become apparent in part from the following description, or be learned through the practice of the present disclosure. Description of the Drawings

[0037] The above-mentioned and / or additional aspects and advantages of the present disclosure will become apparent and be readily understood from the following description of embodiments in conjunction with the accompanying drawings, where:

[0038] Figure 1 It is a training flowchart of an existing optical computing architecture provided by an embodiment of the present disclosure;

[0039] Figure 2 It is a schematic flowchart of a method for in-situ learning training of an intelligent optical computing chip provided by an embodiment of the present disclosure;

[0040] Figure 3 It is a schematic flowchart of a method for in-situ learning training of an intelligent optical computing chip provided by another embodiment of the present disclosure;

[0041] Figure 4 It is an experimental flowchart of in-task training provided by an embodiment of the present disclosure;

[0042] Figure 5 It is a schematic flowchart of a method for MZI training provided by an embodiment of the present disclosure;

[0043] Figure 6 It is a schematic flowchart of a method for in-situ learning training of an intelligent optical computing chip provided by yet another embodiment of the present disclosure. Detailed Description of the Embodiment

[0044] The embodiments of the present disclosure will be described in detail below. The examples of the embodiments are shown in the accompanying drawings, where the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are intended to explain the present disclosure, but should not be construed as limiting the present disclosure.

[0045] In the field of optical computing, a series of research and development on optical neural network processors have been disclosed. These studies mainly focus on the technology of using photons instead of electrons for information processing, aiming to construct a high-speed and high energy efficiency artificial neural network system through optical propagation characteristics. For example, some studies have shown how to use integrated photonics technology to implement complex matrix multiplication operations, which is one of the basic operations for constructing deep neural networks; others have explored the implementation methods of different types of non-linear activation functions in the optical domain to enhance the model expression ability.

[0046] However, at the current stage, most of the reported optical computing architectures face a common technical challenge: that is, they usually need to train the entire network structure from scratch for a specific task or dataset, such as Figure 1As shown. This means that every time the application scenario is changed, the long processes of data collection, model design, and optimization must be repeated. This method is not only time-consuming and laborious, but it is also very difficult to ensure that the newly trained model can generalize well to unseen data, especially when facing diverse practical problems. In addition, due to the lack of an effective transfer learning mechanism, the flexibility of photon-based artificial intelligence (AI) solutions in practical applications is greatly reduced, limiting the possibility of their wider adoption. Therefore, improving the adaptability of optical computing systems to different tasks and accelerating the learning speed have become one of the key problems to be solved urgently.

[0047] The present disclosure will be described in detail below with reference to specific embodiments.

[0048] In the first embodiment, as Figure 2 shown, Figure 2 is a schematic flowchart of an intelligent optical computing chip on-chip meta-learning training method provided by an embodiment of the present disclosure. This method can be applied to an optoelectronic computing system, and the optoelectronic computing system includes at least one optoelectronic hybrid chip architecture, and the optoelectronic hybrid chip architecture includes a diffraction module and a Mach–Zehnder interferometer (MZI) array.

[0049] Exemplarily, the intelligent optical computing chip on-chip meta-learning training method includes the following steps:

[0050] S101, pre-train the diffraction neural network in the diffraction module based on the target data domain, and solidify the pre-trained diffraction neural network to obtain a non-reconfigurable diffraction module;

[0051] According to some embodiments, the target data domain refers to the data domain where the optoelectronic computing system will perform optical computing tasks subsequently.

[0052] In some embodiments, lithography technology can be used to solidify the pre-trained diffraction neural network in the diffraction module.

[0053] It should be noted that after solidifying the pre-trained diffraction neural network, the parameters in the obtained non-reconfigurable diffraction module cannot be changed again and belong to fixed parameters.

[0054] Among them, the diffraction module can also be called a data processing unit (DPU).

[0055] Taking one scenario as an example, Figure 3 is a schematic flowchart of an intelligent optical computing chip on-chip meta-learning training method provided by another embodiment of the present disclosure. As Figure 3As shown, a four-layer diffractive neural network can be pre-trained on the first four classes of the MNIST and Fashion-MNIST datasets, and the pre-trained diffractive neural network can be solidified on the DPU. Among them, the input image is adjusted to a size of 4×4 and flattened into a vector to match the scale and shape of the input modulation.

[0056] S102. In response to receiving the target optical computing task corresponding to the target data domain, obtain the target data set corresponding to the target optical computing task in the target data domain;

[0057] According to some embodiments, the target optical computing task refers to the optical computing task that the optoelectronic hybrid chip architecture needs to execute.

[0058] S103. Based on the target data set, train the phase of each Mach-Zehnder interferometer in the Mach-Zehnder interferometer array to obtain the trained Mach-Zehnder interferometer array, so that the optoelectronic hybrid chip architecture can execute the target optical computing task according to the non-reconfigurable diffractive module and the trained Mach-Zehnder interferometer array.

[0059] According to some embodiments, the gradient descent algorithm can be used to train the phase of each Mach-Zehnder interferometer in the Mach-Zehnder interferometer array on the target data set, as Figure 3 shown.

[0060] In some embodiments, since the phase of the Mach-Zehnder interferometer is related to its input voltage, therefore, based on the target data set, the input voltage of each Mach-Zehnder interferometer in the Mach-Zehnder interferometer array can be trained to realize the training of the phase of each Mach-Zehnder interferometer in the Mach-Zehnder interferometer array.

[0061] It should be noted that by using lithography technology to solidify the diffractive module parameters of the DPU and configuring the MZI phase through voltage, high-speed neural network configuration and video rate inference capabilities can be achieved.

[0062] According to some embodiments, as Figure 1 shown, the cross-task training adopted in the prior art focuses on optimizing the fixed diffractive backbone. However, since the diffractive neural network in the diffractive module has been pre-trained in the present disclosure, therefore, only the task-internal training of the reconfigurable MZI array needs to be performed subsequently. Compared with training the entire network from scratch, it requires less parameter adjustment and shorter training time to achieve high performance on the target data domain, which significantly reduces the training cost and improves the learning efficiency. Task-internal training can be achieved only by using few-shot learning, which can not only quickly adapt to various data domains under the condition of few samples, but also significantly reduce the required amount of parameter adjustment and shorten the overall training time, thus overcoming one of the main obstacles encountered by traditional optical neural networks in practical applications.

[0063] In some embodiments, during the process of training the phase of each Mach-Zehnder interferometer in the Mach-Zehnder interferometer array based on a target data set, the target data set can be divided into a support set and a query set; the support set is used to initialize the phase of each Mach-Zehnder interferometer in the Mach-Zehnder interferometer array to obtain the initialized Mach-Zehnder interferometer array; the query set is used to train the phase of each Mach-Zehnder interferometer in the initialized Mach-Zehnder interferometer array. Therefore, it can quickly adapt to a new data field under limited data samples, is particularly suitable for the deployment of high-performance devices that need to learn through computationally efficient local training data, and has a wide range of application scenarios.

[0064] In some embodiments, the ability of the optoelectronic computing system to quickly adapt to different data fields can be verified through few-shot learning experiments. Figure 4 FIG. is an experimental flowchart of in-task training provided by an embodiment of the present disclosure. Figure 4 As shown, 5-way 1-shot and 20-way 1-shot experiments are carried out on the Omniglot data set, few-shot learning experiments are carried out using the CIFAR-FS and Mini-ImageNet data sets, and the adjustable classification weights are experimentally demonstrated by repeatedly using the MZI array. The experimental results show its efficiency in few-shot learning tasks and demonstrate efficient learning capabilities.

[0065] According to some embodiments, Figure 5 FIG. is a schematic flowchart of MZI training provided by an embodiment of the present disclosure. Figure 5 As shown, during the process of training the phase of each Mach-Zehnder interferometer in the Mach-Zehnder interferometer array based on a target data set, the target data set can be one-dimensionalized to obtain a one-dimensionalized target data set; the one-dimensionalized target data set is input into an irreconfigurable diffraction module for feature extraction to obtain a target feature data set; the phase of each Mach-Zehnder interferometer in the Mach-Zehnder interferometer array is trained based on the target feature data set. Among them, this process is applicable to the process of initializing the phase of each Mach-Zehnder interferometer in the Mach-Zehnder interferometer array using the support set and training the phase of each Mach-Zehnder interferometer in the initialized Mach-Zehnder interferometer array using the query set described above.

[0066] In summary, the method provided in this embodiment combines the high data throughput capability of diffraction and the reconfigurability of the interference network by introducing the design concept of combining a pre-trained non-reconfigurable diffraction module with an adaptable reconfigurable MZI array, combines the high data throughput capability of photons and the flexibility of electrons, provides hardware advantages and improves training efficiency, and can solve the problems of frequent retraining, poor generalization ability, and low learning efficiency in current optical computing systems when facing different data domains. Secondly, by adjusting the diffraction module parameters and MZI phases, the optimization of the optoelectronic computing system can also be achieved, realizing higher computing speed and lower energy consumption.

[0067] This embodiment also provides another on-chip meta-learning training method for intelligent optical computing. This method can be applied to an optoelectronic computing system, and the optoelectronic computing system includes multiple optoelectronic hybrid chip architectures.

[0068] Exemplarily, the on-chip meta-learning training method for intelligent optical computing may include the following steps:

[0069] S201, Connect the diffraction neural networks in multiple optoelectronic hybrid chip architectures to obtain a gradient synthesis network;

[0070] In some embodiments, the following at least one connection method may be used to connect the diffraction neural networks in multiple optoelectronic hybrid chip architectures:

[0071] Series connection;

[0072] Parallel connection.

[0073] It should be noted that by connecting the diffraction neural networks in multiple optoelectronic hybrid chip architectures, multiple optoelectronic hybrid chip architectures can be combined into a large feature extraction backbone.

[0074] S202, Pre-train the gradient synthesis network based on the target data domain and solidify the pre-trained gradient synthesis network.

[0075] It should be noted that by using the synthetic gradient network to replace the electronic components for backpropagation, this method allows for faster backpropagation and supports the processing of more complex datasets, can improve the generality and adaptability of on-chip meta-learning, and thus expands the application scope of the optoelectronic computing system.

[0076] Taking a scenario as an example, Figure 6 is a schematic flowchart of an on-chip meta-learning training method for intelligent optical computing provided by another embodiment of the present disclosure. As Figure 6As shown, it connects the diffraction neural networks in multiple optoelectronic hybrid chip architectures in series and in parallel to obtain a gradient synthesis network. Moreover, the classification parameters corresponding to the MZI array are initialized with features using the support set and optimized through inductive learning on the query set.

[0077] In summary, the method provided in this embodiment can effectively improve the performance and flexibility of the optoelectronic computing system, reduce the training cost, meet the requirements of different application scenarios, and further enhance the model's support for complex pattern recognition tasks through the optimized synthetic gradient network design, making the present invention an important step in promoting the development of optical computing technology.

[0078] To implement the above embodiment, the present disclosure also proposes an optoelectronic hybrid chip architecture.

[0079] Exemplarily, the optoelectronic hybrid chip architecture includes:

[0080] A diffraction module for solidifying the pre-trained diffraction neural network and, when receiving an optical input signal, controlling the pre-trained diffraction neural network to extract features from the optical input signal to obtain an optical feature signal, where the pre-trained diffraction neural network is obtained by pre-training the diffraction neural network based on the target data domain;

[0081] A Mach-Zehnder interferometer array for training based on the target optical computing task corresponding to the target data domain to obtain a trained Mach-Zehnder interferometer array and, when receiving the optical feature signal, controlling the trained Mach-Zehnder interferometer array to perform optical computing on the optical feature signal to obtain an optical output signal.

[0082] According to some embodiments, the electrical layer in the optoelectronic hybrid chip architecture is located between units and can be used for data rearrangement and / or non-linear calculation.

[0083] It should be noted that the foregoing explanation of the intelligent optical computing chip on-chip learning training method embodiment also applies to the optoelectronic hybrid chip architecture of this embodiment and will not be elaborated here.

[0084] In summary, the optoelectronic hybrid chip architecture provided in the embodiments of the present disclosure integrates a pre-trained non-reconfigurable diffraction module and an adaptable reconfigurable MZI array through the implementation of a hybrid structure, which can not only make full use of the high-efficiency photon transmission characteristics but also have good adaptability and flexibility, not only improving the computing efficiency of the optoelectronic hybrid chip architecture but also enhancing its adaptability in different application scenarios.

[0085] To implement the above embodiment, the present disclosure also proposes an optoelectronic computing system, including: at least one optoelectronic hybrid chip architecture provided in the foregoing embodiment.

[0086] The collection, storage, use, processing, transmission, provision, and disclosure of the user's personal information involved in this disclosure all comply with the provisions of relevant laws and regulations and do not violate public order and good customs.

[0087] It should be noted that personal information from users should be collected for legal and reasonable purposes and should not be shared or sold outside of these legal uses. In addition, such collection / sharing should be carried out after obtaining the informed consent of the user, including but not limited to notifying the user to read the user agreement / user notice and signing an agreement / authorization including authorizing relevant user information before the user uses this function. In addition, any necessary steps should be taken to safeguard and protect access to such personal information data and ensure that others with access to personal information data comply with their privacy policies and procedures.

[0088] This disclosure anticipates providing embodiments where users can selectively block the use or access of personal information data. That is, this disclosure anticipates providing hardware and / or software to prevent or block access to such personal information data. Once personal information data is no longer needed, the risk can be minimized by restricting data collection and deleting the data. In addition, when applicable, personal identifiers are removed from such personal information to protect the privacy of the user.

[0089] In the descriptions of the foregoing embodiments, the descriptions referring to the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples", etc. mean that the specific features, structures, materials, or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of this disclosure. In this specification, the schematic descriptions of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described can be combined in a suitable manner in any one or more embodiments or examples. In addition, without contradiction, those skilled in the art can combine and combine the different embodiments or examples described in this specification and the features of different embodiments or examples.

[0090] In addition, the terms "first" and "second" are only used for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly indicating the quantity of the indicated technical features. Thus, the features defined with "first" and "second" can explicitly or implicitly include at least one of such features. In the description of this disclosure, "a plurality" means at least two, such as two, three, etc., unless otherwise specifically defined.

[0091] Any process or method description represented in a flowchart or otherwise described herein can be understood to represent a module, segment, or portion of code including one or more executable instructions for implementing a customized logical function or process, and the scope of the preferred embodiments of the present disclosure includes additional implementations in which functions may be executed not in the order shown or discussed, including in a substantially simultaneous manner according to the involved functions or in a reverse order, which should be understood by those skilled in the art to which the embodiments of the present disclosure pertain.

[0092] The logic and / or steps represented in a flowchart or otherwise described herein, for example, can be considered as a sequenced list of executable instructions for implementing a logical function and can be specifically implemented in any computer-readable medium for use by or in connection with an instruction execution system, apparatus, or device, such as a computer-based system, a system including a processor, or other systems that can fetch and execute instructions from the instruction execution system, apparatus, or device. As used in this specification, a "computer-readable medium" can be any device that can contain, store, communicate, propagate, or transport a program for use by or in connection with an instruction execution system, apparatus, or device. More specific examples (a non-exhaustive list) of the computer-readable medium include the following: an electrical connection portion having one or more wirings (electronic device), a portable computer diskette (magnetic device), a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM) or a flash memory, an optical fiber device, and a portable compact disc read-only memory (CDROM). Additionally, the computer-readable medium can even be paper or other suitable media on which a program can be printed, as the program can be obtained electronically, for example, by optically scanning the paper or other media, followed by editing, interpretation, or otherwise appropriate processing as necessary, and then storing it in a computer memory.

[0093] It should be understood that various parts of the present disclosure can be implemented by hardware, software, firmware, or a combination thereof. In the above embodiments, multiple steps or methods can be implemented by software or firmware stored in a memory and executed by a suitable instruction execution system. For example, if implemented in hardware, as in another embodiment, any one or a combination of the following technologies well known in the art can be used: discrete logic circuits with logic gate circuits for implementing logical functions on data signals, application specific integrated circuits with appropriate combinational logic gate circuits, programmable gate arrays (PGAs), field programmable gate arrays (FPGAs), and the like.

[0094] Those of ordinary skill in the art can understand that all or part of the steps carried by the method of the above embodiments can be completed by instructing relevant hardware through a program. The program can be stored in a computer-readable storage medium. When the program is executed, it includes one or a combination of the steps of the method embodiments.

[0095] In addition, in each of the various embodiments of the present disclosure, the functional units can be integrated into a processing module, or each unit can exist physically alone, or two or more units can be integrated into one module. The above integrated module can be implemented in the form of hardware or in the form of a software functional module. When the integrated module is implemented in the form of a software functional module and sold or used as an independent product, it can also be stored in a computer-readable storage medium.

[0096] The above-mentioned storage medium can be a read-only memory, a magnetic disk, an optical disk, or the like. Although the embodiments of the present disclosure have been shown and described above, it can be understood that the above embodiments are exemplary and should not be construed as limitations on the present disclosure. Those of ordinary skill in the art can make changes, modifications, substitutions, and variations to the above embodiments within the scope of the present disclosure.

Claims

1. An on-chip meta-learning training method for intelligent optical computing, characterized in that Applied to an optoelectronic computing system, the optoelectronic computing system includes at least one optoelectronic hybrid chip architecture, and the optoelectronic hybrid chip architecture includes a diffraction module and a Mach-Zehnder interferometer array. The method includes: Pre-training the diffraction neural network in the diffraction module based on a target data domain, and solidifying the pre-trained diffraction neural network to obtain a non-reconfigurable diffraction module; In response to receiving a target optical computing task corresponding to the target data domain, obtaining a target data set corresponding to the target optical computing task in the target data domain; Training the phase of each Mach-Zehnder interferometer in the Mach-Zehnder interferometer array based on the target data set to obtain a trained Mach-Zehnder interferometer array, so that the optoelectronic hybrid chip architecture executes the target optical computing task according to the non-reconfigurable diffraction module and the trained Mach-Zehnder interferometer array.

2. The method according to claim 1, characterized in that, The training the phase of each Mach-Zehnder interferometer in the Mach-Zehnder interferometer array based on the target data set includes: Dividing the target data set into a support set and a query set; Initializing the phase of each Mach-Zehnder interferometer in the Mach-Zehnder interferometer array using the support set to obtain an initialized Mach-Zehnder interferometer array; Training the phase of each Mach-Zehnder interferometer in the initialized Mach-Zehnder interferometer array using the query set.

3. The method according to claim 1, characterized in that The training the phase of each Mach-Zehnder interferometer in the Mach-Zehnder interferometer array based on the target data set includes: Performing one-dimensional processing on the target data set to obtain a one-dimensional target data set; Inputting the one-dimensional target data set into the non-reconfigurable diffraction module for feature extraction to obtain a target feature data set; Training the phase of each Mach-Zehnder interferometer in the Mach-Zehnder interferometer array based on the target feature data set.

4. The method according to claim 1, wherein The training the phase of each Mach-Zehnder interferometer in the Mach-Zehnder interferometer array based on the target data set includes: Using a gradient descent algorithm to train the phase of each Mach-Zehnder interferometer in the Mach-Zehnder interferometer array on the target data set.

5. The method according to claim 1, characterized in that, The training the phase of each Mach-Zehnder interferometer in the Mach-Zehnder interferometer array based on the target data set includes: Based on the target data set, training the input voltage of each Mach-Zehnder interferometer in the Mach-Zehnder interferometer array to implement training of the phase of each Mach-Zehnder interferometer in the Mach-Zehnder interferometer array.

6. The method according to claim 1, wherein The solidifying the pre-trained diffraction neural network includes: Using a lithography technique to solidify the pre-trained diffraction neural network in the diffraction module.

7. The method according to claim 1, characterized in that The optoelectronic computing system includes multiple optoelectronic hybrid chip architectures, and the method further includes: Connecting the diffraction neural networks in the multiple optoelectronic hybrid chip architectures to obtain a gradient synthesis network; Pre-training the gradient synthesis network based on the target data domain and solidifying the pre-trained gradient synthesis network.

8. The method according to claim 7, wherein Connect the diffraction neural networks in the multiple optoelectronic hybrid chip architectures by using at least one of the following connection methods: Series connection; Parallel connection.

9. An optoelectronic hybrid chip architecture, characterized in that, Comprising: A diffraction module, configured to solidify the pre-trained diffraction neural network, and control the pre-trained diffraction neural network to perform feature extraction on the optical input signal to obtain an optical feature signal when receiving the optical input signal, wherein the pre-trained diffraction neural network is obtained by pre-training the diffraction neural network based on the target data domain; A Mach-Zehnder interferometer array, configured to be trained based on the target optical calculation task corresponding to the target data domain to obtain a trained Mach-Zehnder interferometer array, and control the trained Mach-Zehnder interferometer array to perform optical calculation on the optical feature signal to obtain an optical output signal when receiving the optical feature signal.

10. An optoelectronic computing system, characterized in that, Comprising: At least one optoelectronic hybrid chip architecture as described in claim 9.

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