Image sensor based on single photon avalanche diode and driving method thereof
By estimating the total number of photons using the overflow time point of the counter in the image sensor and counting only some of the photons, the increase in power consumption caused by multi-bit counters is solved, and a low-power and high-quality image sensor is realized.
Patent Information
- Application Number
- CN202280100212.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2022-12-12
- Filing Date
- 2022-12-22
- Publication Date
- 2025-05-06
AI Technical Summary
When multiple photons are counted using a multi-bit counter, the circuit size increases, resulting in an increase in power consumption.
By estimating the total pulse (i.e., total photons) by using the overflow time point of the counter, only the received photons are counted, thereby reducing power consumption.
It significantly reduces the power consumed by the counter and can obtain images of excellent image quality in different illumination environments.
Smart Images

Figure CN119948885A_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to an image sensor based on a single photon avalanche diode and a driving method thereof. Background Art
[0002] Single-Photon Avalanche Diode (SPAD) is a sensor technology that detects weak light signals at the photon level. In particular, since SPAD uses the avalanche multiplication effect to amplify incident single photons, it has very high sensitivity and is very easy to capture even in dark environments.
[0003] On the other hand, it is necessary to count the trigger pulses generated by photons in such a single-photon avalanche diode. However, when a multi-bit counter is used to count multiple photons, the circuit scale increases, resulting in a problem of increased power consumption.
[0004] The invention of this application is derived from research conducted as part of Global Shutter's 20x20cm large-area Hybrid X-ray video detector development (project unique number: 1711138024, project number: KMDF_PR_20200901_0048-01, research project name: Cross-departmental full-cycle medical device research and development project (R&D) (Ministry of Science, Technology and ICT, Ministry of Welfare, Ministry of Industry), project management organization: Cross-departmental full-cycle medical device research and development group, project execution organization: Rays Co., Ltd., research period: 2021.03.01~2022.12.31).
[0005] On the other hand, the Korean government has no property benefits in any aspect of the present invention. Summary of the invention
[0006] Technical problems to be solved
[0007] In the present disclosure, in order to solve the above problems, an image sensor based on a single-photon avalanche diode is provided, which reduces power consumption by estimating the total number of pulses (ie, total photons) using the overflow time point of a counter.
[0008] Effects of the Invention
[0009] According to some embodiments of the present disclosure, only a portion of all photons received by a single-photon avalanche diode may be counted, and the overflow time point of the counter may be used to estimate the total number of photons, thereby significantly reducing the power consumed by the counter.
[0010] According to some embodiments of the present disclosure, an image with excellent image quality can be acquired according to the illumination environment. BRIEF DESCRIPTION OF THE DRAWINGS
[0011] Figure 1 is a block diagram showing the structure of an image sensor based on a single photon avalanche diode according to an embodiment of the present disclosure;
[0012] Figure 2 is a diagram for explaining a method for calculating the total number of photons received by an image sensor based on a single photon avalanche diode according to an embodiment of the present disclosure;
[0013] Figure 3 is a diagram showing clock pulses of a global clock set for providing clock pulses to a front-end circuit according to an embodiment of the present disclosure;
[0014] Figure 4 is an example of the timing of the global clock of an embodiment of the present disclosure;
[0015] Figure 5a and Figure 5b is a graph showing gains (ExtrapolatedGain) of different types of global clocks according to an embodiment of the present disclosure.
[0016] Preferred Embodiments of the Invention
[0017] According to one embodiment of the present disclosure, an image sensor based on a single-photon avalanche diode may include: a single-photon avalanche diode (SPAD), which generates multiple pulses corresponding to each photon of a plurality of photons received during a predetermined exposure time; a front-end circuit, which receives a pulse group received during a portion of the exposure time among the plurality of pulses; a counter, which counts the number of pulses in the pulse group; and a global clock, which provides multiple clock pulses to the front-end circuit starting after the portion of the time; the image quality of an image acquired using the single-photon avalanche diode is determined based on the timing of the global clock.
[0018] According to an embodiment, at least a portion of the timing of the global clock may be determined based on the number of bits of the counter.
[0019] According to an embodiment, at least a portion of the timing of the global clock may be configured to have a positive linear relationship with the timing of the exposure time.
[0020] According to an embodiment, at least a portion of the timing of the global clock may be configured to have a positive linear relationship with a square root of the timing of the exposure time.
[0021] According to an embodiment, at least a portion of the timing of the global clock may be configured to have a positive linear relationship with a logarithm (log) of the timing of the exposure time.
[0022] According to an embodiment, at least a portion of the timing of the global clock may be configured to have a negative linear relationship with the timing of the exposure time.
[0023] According to an embodiment, a processor may be further included, and the processor determines the timing of the global clock based on the number of multiple photons received during the exposure time.
[0024] According to an embodiment, the end point of the partial time may be based on an overflow time point of a counter that counts the number of pulses in the pulse group.
[0025] According to another embodiment of the present disclosure, an image sensor driving method based on a single-photon avalanche diode may include: a step of generating a plurality of pulses corresponding to each of a plurality of photons received during a predetermined exposure time through a single-photon avalanche diode; a step of receiving a pulse group received during a portion of the exposure time among the plurality of pulses through a front-end circuit; a step of counting the number of pulses in the pulse group through a counter; and a step of providing a plurality of clock pulses to the front-end circuit starting from after the portion of the time through a global clock, wherein the image quality of the image acquired using the single-photon avalanche diode is determined based on the timing of the global clock.
[0026] According to yet another embodiment of the present disclosure, a computer-readable non-transitory storage medium storing a program for executing a single-photon avalanche diode-based image sensor driving method may be provided. DETAILED DESCRIPTION
[0027] Hereinafter, the specific contents of implementing the present disclosure will be described in detail with reference to the accompanying drawings. However, in the following description, if there is a possibility that the gist of the present disclosure may be unnecessarily obscured, the specific description of the well-known functions or structures will be omitted.
[0028] In the accompanying drawings, the same reference numerals are given to the same or corresponding components. In addition, in the description of the following embodiments, repeated descriptions of the same or corresponding components may be omitted. However, even if the description of the components is omitted, it does not mean that such components are not included in a certain embodiment.
[0029] The advantages, features and methods of implementing the embodiments of the present disclosure will become clear if reference is made to the accompanying drawings and the embodiments described below. However, the present disclosure is not limited to the embodiments disclosed below and can be implemented in a variety of different forms. This embodiment is intended to make the present disclosure complete and to fully reveal the scope of the invention to those skilled in the art.
[0030] Before describing the embodiments of the present disclosure in detail, a brief description of the terms used in this specification is given. The terms used in this specification are all common terms that are currently widely used, and are selected as much as possible after considering the functions of the present disclosure. However, the terms may change due to the intentions of technicians in the field or precedents, the emergence of new technologies, etc. In addition, in certain cases, there are also terms selected by the applicant, and their meanings will be explained in detail in the corresponding specific embodiments. Therefore, the terms used in this disclosure should be defined based on their connotations and the full text of the disclosure, rather than simply based on the names of the terms.
[0031] In this specification, for expressions in singular form, unless the context clearly indicates the singular, the plural meaning is included. In addition, for expressions in plural form, unless the context clearly indicates the plural, the singular meaning is included. In the entire specification, when a part is said to "include" a certain constituent element, unless there is a special record to the contrary, the expression means that other constituent elements may be further included, rather than excluding other constituent elements.
[0032] Figure 1 is a block diagram showing the structure of an image sensor 100 based on a single-photon avalanche diode according to an embodiment of the present disclosure. In simple terms, the image sensor 100 can generate an image in the following manner, namely, receiving multiple photons (Photon) from the outside and counting the number of the received multiple photons (Photon). At this time, the image sensor 100 can consume a considerable amount of power to count (multiple) photons. To this end, in the present disclosure, an image sensor 100 is provided, which only counts a predetermined number of photons and uses information related to the time point when the count ends to estimate the total number of photons received to reduce power consumption. As shown in the figure, the image sensor 100 may include at least one of a single-photon avalanche diode 110, a front-end circuit 120, and a counter 130.
[0033] The single-photon avalanche diode 110 may receive multiple photons from the outside and generate multiple pulses corresponding to each of the received multiple photons. For example, when the single-photon avalanche diode 110 receives N (where N is a natural number) photons, the single-photon avalanche diode 110 may generate N pulses. Then, the generated multiple pulses may be transmitted to the front-end circuit.
[0034] The single-photon avalanche diode 110 can receive a plurality of photons from the outside during a predetermined exposure time and generate a plurality of pulses corresponding to each of the received photons. For example, when the single-photon avalanche diode 110 receives N (where N is a natural number) photons from 0 [ms] to 16 [ms], the single-photon avalanche diode 110 can generate N pulses. Then, at least a part of the generated plurality of pulses can be transmitted to the front-end circuit.
[0035] The front-end circuit 120 can receive the plurality of pulses generated by the single-photon avalanche diode 110. In this case, the plurality of pulses can refer to the plurality of pulses generated by the single-photon avalanche diode 110 during the exposure time. For example, when the single-photon avalanche diode 110 receives N (where N is a natural number) photons from 0 [ms] to 16 [ms], the front-end circuit 120 can receive N pulses from the single-photon avalanche diode 110. Additionally or alternatively, the front-end circuit 120 can receive at least a part of the plurality of pulses generated by the single-photon avalanche diode 110. For example, when the single-photon avalanche diode 110 receives N (where N is a natural number) photons from 0 [ms] to 16 [ms], the front-end circuit 120 can receive N pulses generated from 0 [ms] to T OF [ms] (where T OF <16) generated N OF (where N OF <N) pulses. Another example, when the single-photon avalanche diode 110 receives N (where N is a natural number) photons from 0 [ms] to 16 [ms], the front-end circuit 120 can receive N pulses generated from T OF1 [ms] to T OF2 [ms] (where 0 < T OF1 <T OF2 <= 16) generated N OF (where N OF <N) pulses.
[0036] The front-end circuit 120 can receive a plurality of clock pulses generated by an external device (such as a global clock). In this case, the plurality of clock pulses can refer to the plurality of clock pulses generated during the exposure time. For example, the front-end circuit 120 can receive M clock pulses from 0 [ms] to 16 [ms]. Additionally or alternatively, the front-end circuit 120 can receive the plurality of clock pulses generated during a partial time period of the entire exposure time. For example, the front-end circuit 120 can receive the clock pulses generated from T OF [ms] to 16 [ms] after 0 [ms] to 16 [ms] of the exposure time. Another example, the front-end circuit 120 can receive the clock pulses generated from 0 [ms] to T OF[ms] between the generated clock pulses.
[0037] The front-end circuit 120 may start receiving a plurality of clock pulses generated by an external device in response to a signal received from the counter 130. In this case, the signal received from the counter 130 may refer to a signal generated in response to an overflow of the counter 130. More specifically, the signal received from the counter 130 may refer to a signal transmitted to the front-end circuit 120 in response to an overflow of the counter 130, wherein the counter 130 counts a plurality of pulses received from the single-photon avalanche diode 110 through the front-end circuit 120. For example, when the exposure time is 0 [ms] to 16 [ms], the N-bit counter 130 may start from 0 [ms] and use N-1 bits to count the 2 pulses received from the single-photon avalanche diode 110 through the front-end circuit 120. (N-1) In this case, the value indicating the overflow is input to the remaining 1 bit (bit) not used for counting in the N bits (bit) of the counter 130, and the counter 130 can respond to this by counting at T OF [ms] transmits the signal to the front-end circuit 120. Then, the front-end circuit 120 may stop receiving pulses from the single-photon avalanche diode 110 in response to the signal received from the counter 130, and start receiving clock pulses from the external device. That is, the front-end circuit 120 may transmit the signal to the front-end circuit 120 from 0 [ms] to T OF [ms] ago, multiple pulses are received from the single photon avalanche diode 110 and can be OF [ms] to 16 [ms], a plurality of clock pulses are received from an external device. On the other hand, as described above, a MUX element may be used to switch from the first action, which is an action of counting the pulses received by the front-end circuit 120 from the single-photon avalanche diode 110, to the second action, which is an action of receiving a clock pulse from an external device.
[0038] The counter 130 may count the number of pulses input to the front-end circuit 120. For example, the counter 130 may count the number of pulses from 0 [ms] to T OF The counter 130 counts the number of pulses of the plurality of pulses input from the single photon avalanche diode 110 to the front-end circuit 120 before [ms]. As an additional or alternative example, the counter 130 may count the number of pulses of the plurality of pulses input from the single photon avalanche diode 110 to the front-end circuit 120 before [ms]. OF The number of multiple clock pulses input to the front-end circuit 120 from [ms] to 16 [ms] is counted.
[0039] On the other hand, although Figure 1, but the image sensor 100 may further include a global clock (not shown) for generating the above clock pulses. In this case, the total number of clock pulses generated by the global clock during the exposure time may be equal to the number of N-bit counter 130 (at this time, only N-1 bits of the counter 130 are used for counting) overflowing (i.e., T in the above example). OF That is, when the N-bit counter 130 is used, the total number of clock pulses generated by the global clock during the exposure time can be pre-set to 2. (N-1) This will be described in detail in Figure 3 To be described later.
[0040] In addition, Figure 1 In the figure, for the sake of convenience, the image sensor 100 is shown as including one single photon avalanche diode 110, but is not limited thereto. That is, the image sensor 100 may include multiple single photon avalanche diodes. For example, the front-end circuit 120 may be connected to multiple single photon avalanche diodes of each pixel configured in the multiple pixels.
[0041] Figure 2 200 is a diagram for explaining a method for calculating the total number of photons received by an image sensor (e.g., image sensor 100) based on a single-photon avalanche diode according to an embodiment of the present disclosure. Here, a counter (e.g., counter 130) provided for counting pulses generated by a single-photon avalanche diode (e.g., single-photon avalanche diode 110) and / or a global clock is composed of N bits, and it is assumed that only N-1 bits are used for counting. In addition, Figure 2 T OF Indicates the time point at which the counter overflows as a result of counting a number of pulses received from the single-photon avalanche diode.
[0042] like Figure 1 As shown in the figure, the counter only counts from 0 to T OF The time period between the single photon avalanche diode generated 2 (N -1) In this case, since the image sensor is exposed to the light source for a time T EXP has a predetermined value, so the total number of photons N received by the image sensor during the exposure time can be calculated according to the following mathematical formula 1 PH In this case, you can save PH / N OF The corresponding amount of power to count photons. Here, N OFIt refers to the number of photons received by the image sensor from the time when the image sensor is exposed to the light source to the time when the counter overflows. However, in order to calculate the total number of photons N using Mathematical Formula 1, PH First, we need to know T, which represents the time point when the counter overflows. OF . Estimated T OF The method is Figure 3 To be described later.
[0043]
Mathematical formula 1
[0044]
[0045] Figure 3 300 is a diagram showing clock pulses of a global clock provided for providing clock pulses to a front-end circuit according to an embodiment of the present disclosure. Similarly, a counter (e.g., counter 130) provided for counting pulses generated by a single-photon avalanche diode (e.g., single-photon avalanche diode 110) and / or a global clock is composed of N bits, and it is assumed that only N-1 bits are used for counting. In addition, T OF and T EXP and Figure 2 T OF and T EXP Similarly, they represent the counter overflow time point and the time when the single photon avalanche diode is exposed to the light source, respectively.
[0046] As in Figure 1 As described above, the total number of clock pulses M generated during the exposure time is set to be equal to 0 to T OF The number of multiple pulses generated by the single-photon avalanche diode between (N-1) In addition, the respective timings of all clock pulses are set to have at least one of a logarithmic function, a linear function, or a square-root function relative to the exposure time. For example, from 0 to T OF The clock pulse is provided in the form of a linear function between T OF to T EXP The clock pulses are provided in the form of a logarithmic function. That is, the respective time points of all clock pulses have predetermined values based on the selected function shape. Therefore, it is possible to OF The serial number of the first clock pulse generated afterwards (here, n+1) and the time point T n+1 To calculate T OF The time point T of the latest clock pulse generated before n At this time, since the overflow of the counter occurs at T n and T n+1 The time points between PHIt can be estimated as N OF *(T EXP / T n ) and N OF *(T EXP / T n+1 ), as shown in the following mathematical formula 2.
[0047]
Mathematical formula 2
[0048]
[0049] Figure 4 is an example of the timing of the global clock according to an embodiment of the present disclosure. GCLK It may refer to a device that generates the above-mentioned clock pulses at a prescribed timing. Figure 4 In the example, N represents the number of bits used by the counter for pulse counting. EX Indicates the time from the start point of the exposure time to the end point of the exposure time (for example Figure 2 T EXP ) is the number of photons received by the single-photon avalanche diode up to the time when the photon was received. The following will explain how to estimate N based on various forms of global clocks. EX method.
[0050] Figure 4 (a) represents an example in which at least a portion of the timing of the global clock is configured to have a positive linear relationship with the logarithm (or logarithmic value) of the timing of the exposure time. Specifically, the timing of the global clock is related to the exposure time T EXP The logarithmic value of can have a positive proportional relationship. In this case, it is proportional to the number of (multiple) clock pulses of the global clock counted by the counter (M LOG ) The corresponding counter overflow time point T SAT is obtained by looking up the table, as shown in the following mathematical formula 3, and the overflow time point T can be obtained by using the obtained overflow time point T SAT The reciprocal of N is used to determine EX On the other hand, in the present disclosure, T SAT Explained as T OF Same meaning.
[0051]
Mathematical formula 3
[0052]
[0053] Figure 4(b) represents an example in which at least a portion of the timing of the global clock is configured to have a positive linear relationship with respect to the timing of the exposure time. Specifically, the interval between the first clock pulse (e.g., 65.1us) and the next second clock pulse (e.g., 66.5us) generated by the global clock can have a total exposure time T EXP Divide by 2 N In this case, as shown in the following mathematical formula 4, the number M of (multiple) clock pulses of the global clock counted by the counter can be used. EQ The reciprocal of N is used to calculate EX .
[0054]
Mathematical formula 4
[0055]
[0056] Figure 4 (c) represents an example in which at least a portion of the timing of the global clock is configured to have a positive linear relationship with the square root of the timing of the exposure time. Specifically, the timing of the global clock is related to the exposure time T EXP The square root of can have a directly proportional relationship. In this case, it is proportional to the number of (multiple) clock pulses of the global clock counted by the counter. SQRT The corresponding counter overflow time point T SAT It is obtained by looking up the table, as shown in the following mathematical formula 5, and the overflow time point T can be obtained by using SAT The reciprocal of N is used to determine EX .
[0057]
Mathematical formula 5
[0058]
[0059] Additionally or alternatively, although not in Figure 4 , but at least a portion of the timing of the global clock may be configured to have a negative linear relationship with the timing of the exposure time. In this case, N is calculated according to the following mathematical formula 6: EX .
[0060]
Mathematical formula 6
[0061]
[0062] Figure 5a and 5bA graph showing the gain (ExtrapolatedGain) of different types of global clocks according to an embodiment of the present disclosure. As shown in the figure, for an EQ type global clock, since the gain can be kept constant, it is beneficial to obtain images in low illumination and / or medium illumination conditions. Figure 5a and 5b However, if the global clock corresponds to Mathematical Formula 6, on the contrary, it is advantageous to obtain images in medium illumination and / or high illumination conditions. On the contrary, although the SQRT type global clock shows a trend of increasing gain, the gain change rate is reduced. In addition, the LOG type global clock shows a trend of increasing gain, and the gain change rate also increases.
[0063] The image sensor based on a single-photon avalanche diode of the present disclosure can determine the type of global clock based on the gains of different types of the above-mentioned global clocks and according to the illumination environment. Specifically, the image sensor based on a single-photon avalanche diode may include a processor that determines the timing of the global clock based on the number of multiple photons received during the exposure time. At this time, the processor can select an EQ type global clock as a global clock connected to the front-end circuit (e.g., front-end circuit 120) in a low-illuminance environment. In addition, the processor can select a global clock corresponding to mathematical formula 6 as a global clock in a high-illuminance environment.
[0064] Additionally or alternatively, the processor may use the above four types of global clocks in combination according to the illumination environment. For example, during the time when the counter counts the global clock, the processor may decide to use an EQ type global clock from the starting point to the middle time point, and to use an SQRT type global clock from the middle time point to the end point. That is, the processor may determine the timing of the global clock based on the number of photons received during the exposure time.
[0065] The foregoing description of the present disclosure is provided to enable a person of ordinary skill to perform or use the present disclosure. Various modifications of the present disclosure are easy and self-explanatory for a person of ordinary skill, and the general principles defined in the present application can be applied to various modifications without exceeding the subject matter or scope of the present disclosure. Therefore, the purpose of the present disclosure is not to be limited to the examples described in the present application, but to give the widest scope consistent with the principles and new features disclosed in the present application.
[0066] Although the present disclosure is described in connection with some embodiments in this specification, it should be understood that various modifications and changes can be made within the scope of the present disclosure as understood by a person of ordinary skill in the art to which the present invention belongs. In addition, such modifications and changes should be considered to fall within the scope of the claims attached to this specification.
Claims
1. An image sensor based on a single photon avalanche diode, comprising: a single photon avalanche diode that generates a plurality of pulses corresponding to respective ones of a plurality of photons received during a predetermined exposure time; A front-end circuit receives a pulse group among the plurality of pulses received during a portion of the exposure time; A counter, for counting the number of pulses in the pulse group; as well as A global clock, starting from the part of time, provides a plurality of clock pulses to the front-end circuit, The quality of an image acquired using the single photon avalanche diode is determined based on the timing of the global clock.
2. The single photon avalanche diode based image sensor according to claim 1, wherein: At least a portion of the timing of the global clock is determined based on the number of bits of the counter.
3. The single photon avalanche diode based image sensor according to claim 1, wherein: At least a portion of the timing of the global clock is configured to have a positive linear relationship with respect to the timing of the exposure time.
4. The single photon avalanche diode based image sensor according to claim 1, wherein: At least a portion of the timing of the global clock is configured to have a positive linear relationship with respect to a square root of the timing of the exposure time.
5. The single photon avalanche diode based image sensor according to claim 1, wherein: At least a portion of the timing of the global clock is configured to have a positive linear relationship with a logarithm of the timing of the exposure time.
6. The single photon avalanche diode based image sensor according to claim 1, wherein: At least a portion of the timing of the global clock is configured to have a negative linear relationship with respect to the timing of the exposure time.
7. The single photon avalanche diode based image sensor according to claim 1, wherein: Also included is a processor that determines a timing of the global clock based on a number of the plurality of photons received during the exposure time.
8. The single photon avalanche diode based image sensor according to claim 1, wherein: The end point of the partial time is based on the overflow time point of the counter for counting the number of pulses in the pulse group.
9. A method for driving an image sensor based on a single photon avalanche diode, comprising: The step of generating, by a single photon avalanche diode, a plurality of pulses corresponding to each of a plurality of photons received during a predetermined exposure time; The step of receiving, by a front-end circuit, a group of pulses among the plurality of pulses received during a portion of the exposure time; The step of counting the number of pulses in the pulse group by a counter; as well as The step of providing a plurality of clock pulses to the front-end circuit by a global clock starting from after the part of time, The quality of an image acquired using the single photon avalanche diode is determined based on the timing of the global clock. 10 . A computer-readable non-transitory storage medium storing a program for executing the image sensor driving method based on a single photon avalanche diode according to claim 9 .