Integrated circuit design evaluation method and system based on model analysis

Abstract

The present invention discloses an integrated circuit design evaluation method and system based on model analysis. First, the processing image data of N processing flows are obtained and preprocessed and standardized, and then divided into multiple regions according to the circuit design. Based on a processing flow, the color, texture, and contour features of each circuit area are extracted, a DBSCAN clustering model is constructed, and the parameters are initialized. Subsequently, the feature data of each circuit area are imported for clustering, continuous areas are merged, a merged image area is generated, and the image window is dynamically set. Finally, based on the image window of each processing flow, the SSIM similarity index calculation is introduced to compare the circuit feature data with the defect features, and evaluate the circuit design processing defects of different processing flows. Through the present invention, it is possible to achieve a refined evaluation of circuit processing defects, realize information mining and change analysis of defect features in multiple processing flows, and effectively realize processing early warning and design optimization.

Description

Technical Field

[0001] The present invention relates to the field of model analysis, and more specifically, to an integrated circuit design evaluation method and system based on model analysis. Background Art

[0002] The integrated circuit (IC) design process requires a comprehensive evaluation of both design and processing to ensure performance, reliability, and stability during manufacturing and use. Traditional evaluation methods rely primarily on manual experience and simple analysis. Furthermore, these technologies often lack refined IC defect monitoring and regional circuit processing evaluation, making it difficult to achieve automated, intelligent IC production defect assessment and design optimization. Therefore, there is an urgent need for an efficient and intelligent IC design and processing evaluation method. Summary of the Invention

[0003] The present invention overcomes the defects of the prior art and proposes an integrated circuit design evaluation method and system based on model analysis.

[0004] A first aspect of the present invention provides an integrated circuit design evaluation method based on model analysis, comprising:

[0005] According to N integrated circuit processing processes, processing image data of each processing process is obtained;

[0006] Perform image preprocessing and standardization on the processed image data, and divide the circuit diagram into multiple regions based on the circuit design to form multiple circuit regions;

[0007] Based on a processing flow, a feature extraction based on color, texture, and contour is performed on each circuit area to obtain circuit feature data, a clustering model based on DBSCAN is constructed, and the clustering model parameters are initialized. The circuit processing reference features corresponding to the processing flow are obtained, the circuit processing reference features are imported into the clustering model and a data point is generated, and the data point is used as the initial core point;

[0008] The circuit feature data of each circuit area is imported into the clustering model and the data points in the clustering model are clustered based on the initial core point. Based on the clustering results, multiple area groups are obtained. Continuous area merging is performed based on the multiple area groups to generate multiple merged image areas. Window positioning is performed based on the merged image areas, and the image window is dynamically set.

[0009] Based on the corresponding image window set for each processing flow, the SSIM similarity index calculation method is introduced through the image window to calculate the integrated circuit defects of different processing flows. The calculation process is to extract the corresponding circuit feature data and the defect comparison features based on the set image window to perform SSIM similarity analysis. According to the calculation results, the circuit design and processing defects of different processing flows are evaluated.

[0010] In this solution, the processing image data of each processing flow is obtained according to N integrated circuit processing flows, specifically:

[0011] Obtaining an overall processing task for a target integrated circuit, dividing the overall processing task into multiple processes, and forming N integrated circuit processing processes;

[0012] Acquire processed image data for each processing step.

[0013] In this solution, the image data is pre-processed and standardized, and the circuit diagram is divided into multiple regions based on the circuit design to form multiple circuit regions, specifically:

[0014] Perform image denoising, transformation, enhancement preprocessing and image standardization on processed image data;

[0015] Selecting a circuit diagram area based on the processed image data, and dividing the circuit diagram into multiple areas based on circuit design information to form multiple circuit areas;

[0016] Each circuit region includes at least one circuit element.

[0017] In this solution, the area size and outline of each of the multiple circuit regions are within a preset range.

[0018] In this solution, the analysis is performed based on a processing flow, and features based on color, texture, and contour are extracted for each circuit area to obtain circuit feature data. A clustering model based on DBSCAN is constructed, and the clustering model parameters are initialized. The circuit processing reference features corresponding to the processing flow are obtained, and the circuit processing reference features are imported into the clustering model to generate data points. The data points are used as the initial core points. Specifically:

[0019] Select a processing flow to analyze;

[0020] Get the current processing image data corresponding to a processing flow,

[0021] Based on the current processed image data, the edge detection operator is used to extract features based on color, texture, and contour for each circuit area to form circuit feature data;

[0022] Obtain design layout information of a processing flow, and obtain circuit processing reference features from the system database through the design layout information;

[0023] Construct a clustering model based on DBSCAN and initialize the clustering model parameters, including the radiation radius of the sample point and the minimum number of neighbors;

[0024] The circuit processing reference features are imported into the clustering model to form reference data points, and the reference data points are used as the initial core points of the clustering model.

[0025] In this solution, the reference data point and the initial core point each include at least one.

[0026] In this solution, the circuit feature data of each circuit area is imported into the clustering model and the data points in the clustering model are clustered based on the initial core point. Based on the clustering results, multiple area groups are obtained. Continuous area merging is performed based on the multiple area groups to generate multiple merged image areas. Window positioning is performed based on the merged image areas, and the image window is dynamically set. Specifically,

[0027] Importing circuit feature data of each circuit area into a clustering model to form multiple cluster data points;

[0028] In the clustering model, for each cluster data point and the initial core point, find all the data points that can be reached by density, label these data points and their core points to form a cluster, calculate all the data points, divide the boundary points and remove the noise points, and finally form the clustering result;

[0029] Based on the clustering results, mapping the division results of the multiple circuit regions is performed to form multiple region groups, each region group including at least one circuit region;

[0030] Analyze each area group and merge the circuit areas with continuous positions in a area group to form a merged image area;

[0031] forming a plurality of merged image regions according to the plurality of region groups;

[0032] Pixel window positioning is performed based on the merged image area, and the image window is dynamically set in the circuit diagram area.

[0033] In this solution, a corresponding image window is set based on each processing flow. Through the image window, the SSIM similarity index calculation method is introduced to calculate the integrated circuit defects of different processing flows. The calculation process is to extract the corresponding circuit feature data and the defect comparison features based on the set image window to perform SSIM similarity analysis. According to the calculation results, the circuit design and processing defects of different processing flows are evaluated. Specifically:

[0034] Set the corresponding image window based on each processing flow;

[0035] Obtain defect comparison features from the system database;

[0036] Perform unified image transformation and standardization on circuit feature data and defect comparison features;

[0037] Based on the SSIM similarity index calculation method, in the set image window, the average brightness, variance, and covariance of the window pixels of the circuit feature data and the defect comparison features are calculated, and the SSIM similarity index is obtained through the average brightness, variance, and covariance;

[0038] The similarity index of different machining processes is calculated, and a comprehensive defect evaluation is performed on each machining process based on the SSIM similarity index.

[0039] A second aspect of the present invention further provides an integrated circuit design evaluation system based on model analysis, the system comprising: a memory and a processor, wherein the memory includes an integrated circuit design evaluation program based on model analysis, and when the integrated circuit design evaluation program based on model analysis is executed by the processor, the following steps are implemented:

[0040] According to N integrated circuit processing processes, processing image data of each processing process is obtained;

[0041] Perform image preprocessing and standardization on the processed image data, and divide the circuit diagram into multiple regions based on the circuit design to form multiple circuit regions;

[0042] Based on a processing flow, a feature extraction based on color, texture, and contour is performed on each circuit area to obtain circuit feature data, a clustering model based on DBSCAN is constructed, and the clustering model parameters are initialized. The circuit processing reference features corresponding to the processing flow are obtained, the circuit processing reference features are imported into the clustering model and a data point is generated, and the data point is used as the initial core point;

[0043] The circuit feature data of each circuit area is imported into the clustering model and the data points in the clustering model are clustered based on the initial core point. Based on the clustering results, multiple area groups are obtained. Continuous area merging is performed based on the multiple area groups to generate multiple merged image areas. Window positioning is performed based on the merged image areas, and the image window is dynamically set.

[0044] Based on the corresponding image window set for each processing flow, the SSIM similarity index calculation method is introduced through the image window to calculate the integrated circuit defects of different processing flows. The calculation process is to extract the corresponding circuit feature data and the defect comparison features based on the set image window to perform SSIM similarity analysis. According to the calculation results, the circuit design and processing defects of different processing flows are evaluated.

[0045] The third aspect of the present invention also provides a computer-readable storage medium, which includes an integrated circuit design evaluation program based on model analysis. When the integrated circuit design evaluation program based on model analysis is executed by a processor, the steps of the integrated circuit design evaluation method based on model analysis as described in any one of the above items are implemented.

[0046] The present invention discloses an integrated circuit design evaluation method and system based on model analysis. First, the processing image data of N processing flows are obtained and preprocessed and standardized, and then divided into multiple regions according to the circuit design. Based on a processing flow, the color, texture, and contour features of each circuit area are extracted, a DBSCAN clustering model is constructed, and the parameters are initialized. Subsequently, the feature data of each circuit area are imported for clustering, continuous areas are merged, a merged image area is generated, and the image window is dynamically set. Finally, based on the image window of each processing flow, the SSIM similarity index calculation is introduced to compare the circuit feature data with the defect features, and evaluate the circuit design processing defects of different processing flows. Through the present invention, it is possible to achieve a refined evaluation of circuit processing defects, realize information mining and change analysis of defect features in multiple processing flows, and effectively realize processing early warning and design optimization. BRIEF DESCRIPTION OF THE DRAWINGS

[0047] Figure 1 A flow chart of an integrated circuit design evaluation method based on model analysis according to the present invention is shown;

[0048] Figure 2 A block diagram of an integrated circuit design evaluation system based on model analysis according to the present invention is shown. DETAILED DESCRIPTION

[0049] In order to more clearly understand the above-mentioned objects, features and advantages of the present invention, the present invention is further described in detail below in conjunction with the accompanying drawings and specific embodiments. It should be noted that, in the absence of conflict, the embodiments of the present application and the features therein can be combined with each other.

[0050] In the following description, many specific details are set forth to facilitate a full understanding of the present invention. However, the present invention may also be implemented in other ways different from those described herein. Therefore, the scope of protection of the present invention is not limited to the specific embodiments disclosed below.

[0051] Figure 1 A flow chart of an integrated circuit design evaluation method based on model analysis of the present invention is shown.

[0052] like Figure 1 As shown, the first aspect of the present invention provides an integrated circuit design evaluation method based on model analysis, comprising:

[0053] S102, acquiring processing image data of each processing flow according to N integrated circuit processing flows;

[0054] S104, performing image preprocessing and standardization on the processed image data, and dividing the circuit diagram into multiple regions based on the circuit design to form multiple circuit regions;

[0055] S106, analyzing a processing flow, extracting features based on color, texture, and contour for each circuit region to obtain circuit feature data, constructing a clustering model based on DBSCAN, initializing clustering model parameters, obtaining circuit processing reference features corresponding to the processing flow, importing the circuit processing reference features into the clustering model and generating data points, and using the data points as initial core points;

[0056] S108, importing the circuit feature data of each circuit region into the clustering model and clustering the data points in the clustering model based on the initial core point, obtaining multiple region groups based on the clustering results, merging continuous regions based on the multiple region groups, and generating multiple merged image regions, performing window positioning based on the merged image regions, and dynamically setting the image window;

[0057] S110, based on each processing flow, a corresponding image window is set, and the SSIM similarity index calculation method is introduced through the image window to calculate the integrated circuit defects of different processing flows. The calculation process is to extract the corresponding circuit feature data and the defect comparison features based on the set image window to perform SSIM similarity analysis. According to the calculation results, the circuit design and processing defects of different processing flows are evaluated.

[0058] According to an embodiment of the present invention, the step of obtaining the processed image data of each processing flow according to N integrated circuit processing flows is as follows:

[0059] Obtaining an overall processing task for a target integrated circuit, dividing the overall processing task into multiple processes, and forming N integrated circuit processing processes;

[0060] Acquire processed image data for each processing step.

[0061] It should be noted that the overall processing task of the target integrated circuit includes the entire processing flow. Since integrated circuits often include multiple processing flows, splitting and analyzing each sub-flow enables refined inference and analysis of processing defects. The design and processing of integrated circuits generally include design, layout analysis, printed circuit boards, component installation, welding, cleaning, packaging, etc. Different processing steps produce different circuit states and design layout states. In N integrated circuit processing flows, the component states and processing states corresponding to different processing steps generally differ. The characteristics and types of defects produced by different processing flows also differ.

[0062] According to an embodiment of the present invention, the image preprocessing and standardization of the processed image data is performed, and the circuit diagram is divided into multiple regions based on the circuit design to form multiple circuit regions, specifically:

[0063] Perform image denoising, transformation, enhancement preprocessing and image standardization on processed image data;

[0064] Selecting a circuit diagram area based on the processed image data, and dividing the circuit diagram into multiple areas based on circuit design information to form multiple circuit areas;

[0065] Each circuit region includes at least one circuit element.

[0066] It should be noted that the division of circuit areas is used to perform detailed analysis on the processing elements in the subdivided circuits.

[0067] According to an embodiment of the present invention, the area size and outline of each of the plurality of circuit regions are within a preset range.

[0068] It should be noted that the preset range is a range set by the user, which is used to ensure that the divided area meets the expected analysis standards.

[0069] According to an embodiment of the present invention, the analysis is performed based on a processing flow, and features based on color, texture, and contour are extracted for each circuit area to obtain circuit feature data. A clustering model based on DBSCAN is constructed, and clustering model parameters are initialized. The circuit processing reference features corresponding to the processing flow are obtained, and the circuit processing reference features are imported into the clustering model to generate data points, which are used as initial core points. Specifically,

[0070] Select a processing flow to analyze;

[0071] Get the current processing image data corresponding to a processing flow,

[0072] Based on the current processed image data, the edge detection operator is used to extract features based on color, texture, and contour for each circuit area to form circuit feature data;

[0073] Obtain design layout information of a processing flow, and obtain circuit processing reference features from the system database through the design layout information;

[0074] Construct a clustering model based on DBSCAN and initialize the clustering model parameters, including the radiation radius of the sample point and the minimum number of neighbors;

[0075] The circuit processing reference features are imported into the clustering model to form reference data points, and the reference data points are used as the initial core points of the clustering model.

[0076] It should be noted that the circuit processing reference features are the circuit image features corresponding to the circuit under standardized design, and have certain reference significance. In the present invention, the reference features are used as the initial core data points of the clustering model. During the clustering process, the collected feature data can be automatically clustered with core features, thereby screening out the core image analysis areas in the circuit design, realizing the clustering grouping of dynamic key areas, and dynamically setting the corresponding image windows in the subsequent process.

[0077] According to an embodiment of the present invention, the reference data point and the initial core point each include at least one.

[0078] According to an embodiment of the present invention, the circuit feature data of each circuit area is imported into a clustering model and the data points in the clustering model are clustered based on the initial core point. Based on the clustering results, multiple area groups are obtained. Continuous area merging is performed based on the multiple area groups to generate multiple merged image areas. Window positioning is performed based on the merged image areas, and the image window is dynamically set. Specifically, the following steps are performed:

[0079] Importing circuit feature data of each circuit area into a clustering model to form multiple cluster data points;

[0080] In the clustering model, for each cluster data point and the initial core point, find all the data points that can be reached by density, label these data points and their core points to form a cluster, calculate all the data points, divide the boundary points and remove the noise points, and finally form the clustering result;

[0081] Based on the clustering results, mapping the division results of the multiple circuit regions is performed to form multiple region groups, each region group including at least one circuit region;

[0082] Analyze each region group and merge the circuit regions with consecutive positions in a region group to form a merged image region;

[0083] forming a plurality of merged image regions according to the plurality of region groups;

[0084] Pixel window positioning is performed based on the merged image area, and the image window is dynamically set in the circuit diagram area.

[0085] It should be noted that in each processing flow, due to the difference in processed image data, it corresponds to an independent clustering process, and different processing flows correspond to different regional classification results.

[0086] It is worth mentioning that in traditional technology, circuit processing design and defect analysis often rely on manual experience, and for different processing processes, due to the differences in the corresponding core analysis areas, the corresponding defect characteristics and processing component characteristics are different, so the core analysis area has certain changes, and the current technology lacks the annotation and analysis extraction of the corresponding core analysis areas, and lacks the mining of useful information on the circuit area, resulting in low defect analysis efficiency and poor analysis results. Therefore, the present invention divides each processing process, obtains corresponding reference features for the corresponding design conditions, constructs a clustering model and forms core data points based on the reference features. In the clustering model, the features of different areas are clustered. Through the clustering process, the core analysis areas of the circuit areas of different processing processes can be aggregated and extracted. Further, by clustering the corresponding areas, the corresponding window size can be dynamically set. Subsequently, the SSIM index calculation and circuit defect analysis are performed based on the window information, effectively improving the precision defect analysis capability of complex circuits. Traditional technology often relies on manual experience to analyze the circuit area and lacks intelligent means. The present invention can dynamically set image windows for different processing flows and perform defect feature comparison analysis, thereby improving the defect recognition rate of complex circuits. At the same time, it can subsequently realize serialized defect prediction, thereby improving the accuracy of defect analysis for different processing flows and the ability to mine defect information and defect areas.

[0087] According to an embodiment of the present invention, a corresponding image window is set based on each processing flow, and the SSIM similarity index calculation method is introduced through the image window to calculate integrated circuit defects for different processing flows. The calculation process is to extract the corresponding circuit feature data and the defect comparison feature based on the set image window to perform SSIM similarity analysis. According to the calculation results, the circuit design and processing defect assessment is performed for different processing flows, specifically:

[0088] Set the corresponding image window based on each processing flow;

[0089] Obtain defect comparison features from the system database;

[0090] Perform unified image transformation and standardization on circuit feature data and defect comparison features;

[0091] Based on the SSIM similarity index calculation method, in the set image window, the average brightness, variance, and covariance of the window pixels of the circuit feature data and the defect comparison features are calculated, and the SSIM similarity index is obtained through the average brightness, variance, and covariance;

[0092] The similarity index of different machining processes is calculated, and a comprehensive defect evaluation is performed on each machining process based on the SSIM similarity index.

[0093] It should be noted that the circuit feature data and defect comparison features undergo unified image transformation and standardization to ensure consistency in image format, size, and image attributes, facilitating the calculation of the SSIM index. The defect comparison features are image feature data corresponding to potential defects in the corresponding processing flow, used for SSIM similarity comparison analysis.

[0094] According to an embodiment of the present invention, the further embodiment includes:

[0095] Among N integrated circuit process flows, a comprehensive defect evaluation is performed on each process flow using the SSIM similarity index, with the evaluation order based on the process time dimension.

[0096] The SSIM similarity index is judged in real time. If the similarity index is greater than the preset range, the image window based on the judgment process is marked to obtain the defect window area;

[0097] Judging N integrated circuit processing flows to obtain multiple defect window areas;

[0098] Obtain circuit feature data for each processing flow, extract corresponding defect features from the circuit feature data according to multiple defect window areas, and generate multiple marking feature data;

[0099] Sorting the plurality of marking feature data based on the processing time dimension to form ordered marking feature data;

[0100] Through the autoencoder model, feature learning is performed on the ordered labeled feature data, and the ordered labeled feature data is mapped to a preset low-dimensional space for data representation and data reconstruction to generate low-dimensional feature data;

[0101] Serialize low-dimensional feature data to form feature sequence data, perform feature learning and prediction on the feature sequence data through the LSTM prediction model, and generate predicted feature sequence data;

[0102] Based on the predicted feature sequence data, the distribution and type of processing defects of integrated circuits are evaluated for early warning, and circuit processing early warning evaluation information is generated.

[0103] It should be noted that multiple defect window areas correspond one-to-one to multiple marker feature data. Low-dimensional feature data still has the orderliness of the time dimension. The predicted feature sequence data is the defect feature data obtained by prediction based on the corresponding serialized feature data, which is used to simulate the defect feature changes of the circuit and perform defect warning analysis. The present invention screens the window areas for defect assessment and learns and serializes based on the corresponding features to achieve information mining and change analysis of defect features in multiple processing flows, effectively performing processing warning and design optimization.

[0104] According to an embodiment of the present invention, the further embodiment includes:

[0105] In a second processing cycle, second circuit characteristic data of each processing flow is obtained; the second circuit characteristic data is imported into a clustering model to generate a plurality of second data points;

[0106] Obtain the clustering results of the clustering model in the first processing cycle;

[0107] Obtaining a plurality of clustered data points based on the clustering results, and calculating an average deviation of the plurality of clustered data points and a plurality of second data points;

[0108] The deviation calculation is specifically to calculate the spatial distance between each cluster data point and the second data point closest to it, and average the multiple distance values ​​to obtain the average deviation;

[0109] If the average deviation is greater than the preset value, the initial core point of the clustering model is reset.

[0110] It should be noted that the same integrated circuit and product processing tasks generally include multiple repeated processing cycles. During multiple processing cycles, due to the complexity of the processing environment and circuits, the defect characteristics will change to a certain extent, and the core area analysis process of the complex circuit requires certain dynamic adjustments. The present invention extracts features from the processing flow image data under the second cycle, and analyzes whether there is a deviation between the corresponding core points and the historical clustering results in the clustering model. If there is a large deviation, it means that the initial state of the clustering model is difficult to meet the current processing cycle, and the clustering effect may be unsatisfactory. It is necessary to reset the core points of the clustering model or adjust the parameters. For example, the clustering core points are reinitialized based on the corresponding features to ensure the applicability of the clustering model.

[0111] The second data point is a second cluster data point.

[0112] Figure 2 A block diagram of an integrated circuit design evaluation system based on model analysis according to the present invention is shown.

[0113] A second aspect of the present invention further provides an integrated circuit design evaluation system 2 based on model analysis, the system comprising: a memory 21 and a processor 22, wherein the memory 21 includes an integrated circuit design evaluation program based on model analysis, and when the integrated circuit design evaluation program based on model analysis is executed by the processor 22, the following steps are implemented:

[0114] According to N integrated circuit processing processes, processing image data of each processing process is obtained;

[0115] Perform image preprocessing and standardization on the processed image data, and divide the circuit diagram into multiple regions based on the circuit design to form multiple circuit regions;

[0116] Based on a processing flow, a feature extraction based on color, texture, and contour is performed on each circuit area to obtain circuit feature data, a clustering model based on DBSCAN is constructed, and the clustering model parameters are initialized. The circuit processing reference features corresponding to the processing flow are obtained, the circuit processing reference features are imported into the clustering model and a data point is generated, and the data point is used as the initial core point;

[0117] The circuit feature data of each circuit area is imported into the clustering model and the data points in the clustering model are clustered based on the initial core point. Based on the clustering results, multiple area groups are obtained. Continuous area merging is performed based on the multiple area groups to generate multiple merged image areas. Window positioning is performed based on the merged image areas, and the image window is dynamically set.

[0118] Based on the corresponding image window set for each processing flow, the SSIM similarity index calculation method is introduced through the image window to calculate the integrated circuit defects of different processing flows. The calculation process is to extract the corresponding circuit feature data and the defect comparison features based on the set image window to perform SSIM similarity analysis. According to the calculation results, the circuit design and processing defects of different processing flows are evaluated.

[0119] According to an embodiment of the present invention, the step of obtaining the processed image data of each processing flow according to N integrated circuit processing flows is as follows:

[0120] Obtaining an overall processing task for a target integrated circuit, dividing the overall processing task into multiple processes, and forming N integrated circuit processing processes;

[0121] Acquire processed image data for each processing step.

[0122] It should be noted that the overall processing task of the target integrated circuit includes the entire processing flow. Since integrated circuits often include multiple processing flows, splitting and analyzing each sub-flow enables refined inference and analysis of processing defects. The design and processing of integrated circuits generally include design, layout analysis, printed circuit boards, component installation, welding, cleaning, packaging, etc. Different processing steps produce different circuit states and design layout states. In N integrated circuit processing flows, the component states and processing states corresponding to different processing steps generally differ. The characteristics and types of defects produced by different processing flows also differ.

[0123] According to an embodiment of the present invention, the image preprocessing and standardization of the processed image data is performed, and the circuit diagram is divided into multiple regions based on the circuit design to form multiple circuit regions, specifically:

[0124] Perform image denoising, transformation, enhancement preprocessing and image standardization on processed image data;

[0125] Selecting a circuit diagram area based on the processed image data, and dividing the circuit diagram into multiple areas based on circuit design information to form multiple circuit areas;

[0126] Each circuit region includes at least one circuit element.

[0127] It should be noted that the division of circuit areas is used to perform detailed analysis on the processing elements in the subdivided circuits.

[0128] According to an embodiment of the present invention, the area size and outline of each of the plurality of circuit regions are within a preset range.

[0129] It should be noted that the preset range is a range set by the user, which is used to ensure that the divided area meets the expected analysis standards.

[0130] According to an embodiment of the present invention, the analysis is performed based on a processing flow, and features based on color, texture, and contour are extracted for each circuit area to obtain circuit feature data. A clustering model based on DBSCAN is constructed, and clustering model parameters are initialized. The circuit processing reference features corresponding to the processing flow are obtained, and the circuit processing reference features are imported into the clustering model to generate data points, which are used as initial core points. Specifically,

[0131] Select a processing flow to analyze;

[0132] Get the current processing image data corresponding to a processing flow,

[0133] Based on the current processed image data, the edge detection operator is used to extract features based on color, texture, and contour for each circuit area to form circuit feature data;

[0134] Obtain design layout information of a processing flow, and obtain circuit processing reference features from the system database through the design layout information;

[0135] Construct a clustering model based on DBSCAN and initialize the clustering model parameters, including the radiation radius of the sample point and the minimum number of neighbors;

[0136] The circuit processing reference features are imported into the clustering model to form reference data points, and the reference data points are used as the initial core points of the clustering model.

[0137] It should be noted that the circuit processing reference features are the circuit image features corresponding to the circuit under standardized design, and have certain reference significance. In the present invention, the reference features are used as the initial core data points of the clustering model. During the clustering process, the collected feature data can be automatically clustered with core features, thereby screening out the core image analysis areas in the circuit design, realizing the clustering grouping of dynamic key areas, and dynamically setting the corresponding image windows in the subsequent process.

[0138] According to an embodiment of the present invention, the reference data point and the initial core point each include at least one.

[0139] According to an embodiment of the present invention, the circuit feature data of each circuit area is imported into a clustering model and the data points in the clustering model are clustered based on the initial core point. Based on the clustering results, multiple area groups are obtained. Continuous area merging is performed based on the multiple area groups to generate multiple merged image areas. Window positioning is performed based on the merged image areas, and the image window is dynamically set. Specifically, the following steps are performed:

[0140] Importing circuit feature data of each circuit area into a clustering model to form multiple cluster data points;

[0141] In the clustering model, for each cluster data point and the initial core point, find all the data points that can be reached by density, label these data points and their core points to form a cluster, calculate all the data points, divide the boundary points and remove the noise points, and finally form the clustering result;

[0142] Based on the clustering results, mapping the division results of the multiple circuit regions is performed to form multiple region groups, each region group including at least one circuit region;

[0143] Analyze each area group and merge the circuit areas with continuous positions in a area group to form a merged image area;

[0144] forming a plurality of merged image regions according to the plurality of region groups;

[0145] Pixel window positioning is performed based on the merged image area, and the image window is dynamically set in the circuit diagram area.

[0146] It should be noted that in each processing flow, due to the difference in processed image data, it corresponds to an independent clustering process, and different processing flows correspond to different regional classification results.

[0147] It is worth mentioning that in traditional technology, circuit processing design and defect analysis often rely on manual experience, and for different processing processes, due to the differences in the corresponding core analysis areas, the corresponding defect characteristics and processing component characteristics are different, so the core analysis area has certain changes, and the current technology lacks the annotation and analysis extraction of the corresponding core analysis areas, and lacks the mining of useful information on the circuit area, resulting in low defect analysis efficiency and poor analysis results. Therefore, the present invention divides each processing process, obtains corresponding reference features for the corresponding design conditions, constructs a clustering model and forms core data points based on the reference features. In the clustering model, the features of different areas are clustered. Through the clustering process, the core analysis areas of the circuit areas of different processing processes can be aggregated and extracted. Further, by clustering the corresponding areas, the corresponding window size can be dynamically set. Subsequently, the SSIM index calculation and circuit defect analysis are performed based on the window information, effectively improving the precision defect analysis capability of complex circuits. Traditional technology often relies on manual experience to analyze the circuit area and lacks intelligent means. The present invention can dynamically set image windows for different processing flows and perform defect feature comparison analysis, thereby improving the defect recognition rate of complex circuits. At the same time, it can subsequently realize serialized defect prediction, thereby improving the accuracy of defect analysis for different processing flows and the ability to mine defect information and defect areas.

[0148] According to an embodiment of the present invention, a corresponding image window is set based on each processing flow, and the SSIM similarity index calculation method is introduced through the image window to calculate integrated circuit defects for different processing flows. The calculation process is to extract the corresponding circuit feature data and the defect comparison feature based on the set image window to perform SSIM similarity analysis. According to the calculation results, the circuit design and processing defect assessment is performed for different processing flows, specifically:

[0149] Set the corresponding image window based on each processing flow;

[0150] Obtain defect comparison features from the system database;

[0151] Perform unified image transformation and standardization on circuit feature data and defect comparison features;

[0152] Based on the SSIM similarity index calculation method, in the set image window, the average brightness, variance, and covariance of the window pixels of the circuit feature data and the defect comparison features are calculated, and the SSIM similarity index is obtained through the average brightness, variance, and covariance;

[0153] The similarity index of different machining processes is calculated, and a comprehensive defect evaluation is performed on each machining process based on the SSIM similarity index.

[0154] It should be noted that the circuit feature data and defect comparison features undergo unified image transformation and standardization to ensure consistency in image format, size, and image attributes, facilitating the calculation of the SSIM index. The defect comparison features are image feature data corresponding to potential defects in the corresponding processing flow, used for SSIM similarity comparison analysis.

[0155] The third aspect of the present invention also provides a computer-readable storage medium, which includes an integrated circuit design evaluation program based on model analysis. When the integrated circuit design evaluation program based on model analysis is executed by a processor, the steps of the integrated circuit design evaluation method based on model analysis as described in any one of the above items are implemented.

[0156] The present invention discloses an integrated circuit design evaluation method and system based on model analysis. First, the processing image data of N processing flows are obtained and preprocessed and standardized, and then divided into multiple regions according to the circuit design. Based on a processing flow, the color, texture, and contour features of each circuit area are extracted, a DBSCAN clustering model is constructed, and the parameters are initialized. Subsequently, the feature data of each circuit area are imported for clustering, continuous areas are merged, a merged image area is generated, and the image window is dynamically set. Finally, based on the image window of each processing flow, the SSIM similarity index calculation is introduced to compare the circuit feature data with the defect features, and evaluate the circuit design processing defects of different processing flows. Through the present invention, it is possible to achieve a refined evaluation of circuit processing defects, realize information mining and change analysis of defect features in multiple processing flows, and effectively realize processing early warning and design optimization.

[0157] In the several embodiments provided in this application, it should be understood that the disclosed devices and methods can be implemented in other ways. The device embodiments described above are merely schematic. For example, the division of the units is merely a logical function division. In actual implementation, there may be other division methods, such as: multiple units or components can be combined, or can be integrated into another system, or some features can be ignored or not executed. In addition, the coupling, direct coupling, or communication connection between the components shown or discussed can be through some interfaces, and the indirect coupling or communication connection of the devices or units can be electrical, mechanical or other forms.

[0158] The units described above as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units; they may be located in one place or distributed across multiple network units; some or all of the units may be selected according to actual needs to achieve the purpose of the scheme of this embodiment.

[0159] In addition, all functional units in the embodiments of the present invention may be integrated into one processing unit, or each unit may be separately used as a unit, or two or more units may be integrated into one unit; the above-mentioned integrated units may be implemented in the form of hardware or in the form of hardware plus software functional units.

[0160] Those skilled in the art will appreciate that all or part of the steps of the above-mentioned method embodiments may be implemented by hardware associated with program instructions, and the aforementioned program may be stored in a computer-readable storage medium. When the program is executed, the program executes the steps of the above-mentioned method embodiments. The aforementioned storage medium includes various media that can store program codes, such as mobile storage devices, read-only memories (ROMs), random access memories (RAMs), magnetic disks, or optical disks.

[0161] Alternatively, if the above-mentioned integrated unit of the present invention is implemented in the form of a software functional module and sold or used as an independent product, it can also be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the embodiment of the present invention, or the part that contributes to the prior art, can be embodied in the form of a software product. The computer software product is stored in a storage medium and includes a number of instructions for enabling a computer device (which can be a personal computer, server, or network device, etc.) to execute all or part of the methods described in each embodiment of the present invention. The aforementioned storage medium includes: various media that can store program codes, such as mobile storage devices, ROM, RAM, magnetic disks or optical disks.

[0162] The above description is only a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any technician familiar with this technical field can easily think of changes or replacements within the technical scope disclosed by the present invention, which should be covered by the scope of protection of the present invention.

Claims

1. A method for evaluating integrated circuit design based on model analysis, characterized in that: include: According to N integrated circuit processing processes, processing image data of each processing process is obtained; Perform image preprocessing and standardization on the processed image data, and divide the circuit diagram into multiple regions based on the circuit design to form multiple circuit regions; Select a processing flow to analyze; Get the current processing image data corresponding to a processing flow, Based on the current processed image data, the edge detection operator is used to extract features based on color, texture, and contour for each circuit area to form circuit feature data; Obtain design layout information of a processing flow, and obtain circuit processing reference features from the system database through the design layout information; Construct a clustering model based on DBSCAN and initialize the clustering model parameters, including the radiation radius of the sample point and the minimum number of neighbors; Importing circuit processing reference features into the clustering model to form reference data points, and using the reference data points as the initial core points of the clustering model; Importing circuit feature data of each circuit area into a clustering model to form multiple cluster data points; In the clustering model, for each cluster data point and the initial core point, find all the data points that can be reached by density, label these data points and their core points to form a cluster, calculate all the data points, divide the boundary points and remove the noise points, and finally form the clustering result; Based on the clustering results, mapping the division results of the multiple circuit regions is performed to form multiple region groups, each region group including at least one circuit region; Analyze each area group and merge the circuit areas with continuous positions in a area group to form a merged image area; forming a plurality of merged image regions according to the plurality of region groups; Position the pixel window based on the merged image area and dynamically set the image window in the circuit diagram area; Based on the corresponding image window set for each processing flow, the SSIM similarity index calculation method is introduced through the image window to calculate the integrated circuit defects of different processing flows. The calculation process is to extract the corresponding circuit feature data and the defect comparison features based on the set image window to perform SSIM similarity analysis. According to the calculation results, the circuit design and processing defects of different processing flows are evaluated.

2. The integrated circuit design evaluation method based on model analysis according to claim 1, characterized in that: The process of obtaining the processed image data of each processing flow according to the N integrated circuit processing flows is specifically as follows: Obtaining an overall processing task for a target integrated circuit, dividing the overall processing task into multiple processes, and forming N integrated circuit processing processes; Acquire processed image data for each processing step.

3. The integrated circuit design evaluation method based on model analysis according to claim 1, characterized in that: The image data is pre-processed and standardized, and the circuit diagram is divided into multiple regions based on the circuit design to form multiple circuit regions, specifically: Perform image denoising, transformation, enhancement preprocessing and image standardization on processed image data; Selecting a circuit diagram area based on the processed image data, and dividing the circuit diagram into multiple areas based on circuit design information to form multiple circuit areas; Each circuit region includes at least one circuit element.

4. The integrated circuit design evaluation method based on model analysis according to claim 1, characterized in that: Among the multiple circuit regions, the area size and outline of each circuit region are within a preset range.

5. The integrated circuit design evaluation method based on model analysis according to claim 1, characterized in that: The reference data point and the initial core point each include at least one.

6. The integrated circuit design evaluation method based on model analysis according to claim 1, characterized in that: The method sets a corresponding image window for each processing flow, introduces the SSIM similarity index calculation method through the image window, and calculates integrated circuit defects for different processing flows. The calculation process is to extract the corresponding circuit feature data and the defect comparison feature based on the set image window to perform SSIM similarity analysis. According to the calculation results, the circuit design and processing defect evaluation of different processing flows is carried out, specifically: Set the corresponding image window based on each processing flow; Obtain defect comparison features from the system database; Perform unified image transformation and standardization on circuit feature data and defect comparison features; Based on the SSIM similarity index calculation method, in the set image window, the average brightness, variance, and covariance of the window pixels of the circuit feature data and the defect comparison features are calculated, and the SSIM similarity index is obtained through the average brightness, variance, and covariance; The similarity index of different machining processes is calculated, and a comprehensive defect evaluation is performed on each machining process based on the SSIM similarity index.

7. An integrated circuit design evaluation system based on model analysis, characterized in that: The system includes: a memory and a processor, wherein the memory includes an integrated circuit design evaluation program based on model analysis, and when the integrated circuit design evaluation program based on model analysis is executed by the processor, the steps of the integrated circuit design evaluation method based on model analysis as described in claim 1 are implemented.

8. A computer-readable storage medium, characterized in that The computer-readable storage medium includes an integrated circuit design evaluation program based on model analysis. When the integrated circuit design evaluation program based on model analysis is executed by a processor, the steps of the integrated circuit design evaluation method based on model analysis as described in any one of claims 1 to 6 are implemented.

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