Variable gain ultra wide band low noise amplifier with wide tuning range

By adopting a tunable input matching circuit and a two-stage cascade cascade circuit in VG-LNA, the problems of unstable input impedance, small gain tuning range and inconsistent gain change step length in traditional VG-LNA in broadband applications are solved, and the wide tuning range and gain stability are improved.

CN119995529APending Publication Date: 2025-05-13XI'AN POLYTECHNIC UNIVERSITY
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Patent Information

Application Number
CN202510118293.1
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-01-24
Publication Date
2025-05-13

AI Technical Summary

Technical Problem

In broadband applications, traditional VG-LNAs have problems such as unstable input impedance, small gain tuning range and inconsistent gain change step length during gain switching.

Method used

Using a design that includes a tunable input matching circuit and an LNA core amplifier circuit, gain tuning and input impedance matching are achieved through a two-stage cascade cascade circuit and a tunable input matching circuit. The tunable input matching circuit includes a two-order Chebishev bandpass filter and a capacitor array, which is used to compensate for parasitic capacitance at the input and ensure stable input impedance.

Benefits of technology

Gain control with a wide tuning range is realized, ensuring the stability of input impedance during gain switching, and expanding the gain tuning range to make the gain change step length consistent.

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Abstract

The invention discloses a variable gain ultra wide band low noise amplifier with a wide tuning range, which comprises a tunable input matching circuit and an LNA core amplification circuit which are connected together, the tunable input matching circuit is used for input impedance and noise matching, the LNA core amplification circuit is used for gain tuning, and the tunable input matching circuit is used for input impedance and noise matching. The LNA core amplification circuit comprises two cascade cascade circuits, a signal enters the LNA core amplification circuit through the tunable input matching circuit, is amplified through a first cascade amplifier, is further amplified through a second cascade amplifier, and is finally output through an output end. According to the VG-LNA, the problems that the input impedance is unstable, the gain tuning range is small and the gain change step length is inconsistent when a traditional VG-LNA is used for gain tuning in broadband application are solved.
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Description

Technical Field

[0001] The invention belongs to the technical field of radio frequency integrated circuits and relates to a variable gain ultra-wideband low noise amplifier with a wide tuning range. Background Art

[0002] With the rapid development of wireless communication technology, people's demand for short-distance wireless transmission is increasing. Ultra Wide Band (UWB) technology uses nanosecond narrow pulse signals to achieve centimeter-level high-precision positioning. Compared with traditional wireless connection technologies such as Bluetooth, WiFi, and ZigBee, UWB technology is widely used in wireless personal area networks, smart homes, vehicle-mounted radars, medical monitoring, and other fields due to its high transmission rate, low power consumption, large bandwidth, and strong anti-interference ability.

[0003] In traditional RF receivers, low noise amplifiers (LNA) used in UWB sidebands usually operate in multi-GHz frequency bands such as 7~10GHz. In order to meet different communication distance requirements, this requires the RF front end to have a wide gain dynamic tuning range to adapt to different input signal amplitudes. Gain tuning usually relies on a variable gain amplifier (VGA), while LNA usually maintains a fixed gain. Variable gain-low noise amplifier (VG-LNA) introduces gain adjustability at the initial stage of the receiver, providing greater flexibility in gain tuning compared to traditional receivers.

[0004] There are two keys to the design of VG-LNA, one is input impedance and noise matching, and the other is gain control mechanism. Maintaining the stability of impedance matching during gain tuning is a necessary condition for achieving ultra-wideband matching. Common gain control mechanisms include using adjustable passive components such as inductors, resistors, and capacitors as part of the load, and gain tuning can be performed by modifying the impedance of these components. However, directly changing the impedance of passive components will also affect the input impedance matching. In addition, the impedance differences of components such as capacitors and inductors at different frequencies limit their use in broadband applications. Gain adjustment can also be achieved by adjusting the bias voltage of the amplifier stage. One advantage of this structure is that the gain change step size is fixed. However, it requires additional adjustable bias circuits, which puts more requirements on circuit complexity and power consumption.

[0005] In summary, the traditional VG-LNA has problems such as unstable input impedance when switching gain levels, small gain tuning range and inconsistent gain change steps in broadband applications. Summary of the invention

[0006] The purpose of the present invention is to provide a variable gain ultra-wideband low noise amplifier with a wide tuning range, which solves the problems of unstable input impedance, small gain tuning range and inconsistent gain change step size when gain tuning in broadband applications of traditional VG-LNA.

[0007] The technical solution adopted by the present invention is a variable gain ultra-wideband low noise amplifier with a wide tuning range, comprising a tunable input matching circuit and an LNA core amplifier circuit connected together, the tunable input matching circuit is used for input impedance and noise matching, the LNA core amplifier circuit is used for gain tuning, the LNA core amplifier circuit comprises a two-stage cascaded common source and common gate circuit, the two-stage cascaded common source and common gate circuit forms a first-stage common source and common gate amplifier and a second-stage common source and common gate amplifier, a signal enters the LNA core amplifier circuit from the tunable input matching circuit, is amplified by the first-stage common source and common gate amplifier, and then further amplifies the signal by the second-stage common source and common gate amplifier, and finally outputs from an output end.

[0008] The present invention is also characterized in that: The tunable input matching circuit includes a two-order Chebyshev bandpass filter and a capacitor array. When the gain is tuned, the parasitic capacitance at the input end of the LNA core amplifier circuit changes, and the capacitor array is connected to the corresponding compensation capacitor to compensate the input impedance.

[0009] The tunable input matching circuit includes capacitor C pad , DC blocking capacitor C dc , matching inductors L1, L2, capacitor arrays C1, C2, C3 and corresponding N-type control MOS tubes M1, M2, M3; Capacitor C pad In parallel with inductor L1, capacitor C dc The capacitor C1 in the capacitor array is connected in series with the MOS tube M1, the capacitor C2 is connected in series with the MOS tube M2, the capacitor C3 is connected in series with the MOS tube M3, and one end of the inductor L2 is connected in series with the capacitor C dc One end of the inductor L2 is connected to the capacitor array C1, C2, and C3 respectively. dc The other end is connected to the total input end of the circuit, capacitor C pad One end of the inductor L1 is connected to the capacitor C pad And inductor L1 is connected in parallel with the signal path.

[0010] The LNA core amplifier circuit includes two stages of cascaded common-source and common-gate circuits to obtain sufficient gain. The common-source and common-gate circuits are connected to a bypass circuit, a tunable active load circuit and an output matching circuit. The gain tuning function is achieved by controlling the bypass circuit and the tunable active load circuit, and the output matching circuit interacts with the inductive reactance component at the second-stage output load to achieve output impedance matching of the LNA core amplifier circuit.

[0011] The two-stage cascade common source and common gate circuit includes N-type MOS tubes M4, M5, M9, M 10 , DC blocking capacitor C4, self-bias resistors R3, R7, load inductors L3, L4, load resistors R4, R8, DC coupling resistor R1; M4 and M5 form a common source and common gate structure, M9 and M 10 A common source and common gate structure is formed, in which the gate of M4 is connected to one end of the DC coupling resistor R1, R1 is connected to one end of M4 and the capacitor array connection end of L2, and the other end of R1 is connected to the DC bias V b1 , M4 source connected to inductor L s1 , L s1 The other end of M4 is grounded, the drain end of M4 is connected to the source end of M5, the gate and drain of M5 are connected through resistor R3 to achieve self-biasing, the gate of MOS tube M9 is connected to one end of DC coupling resistor R5, and the other end of R5 is connected to DC bias V b2 , M9 source connected to inductor L s2 , L s2 The other end of M9 is grounded, and the drain end of M 10 The source end is connected, M 10 The gate and drain are connected through resistor R7 to achieve self-biasing.

[0012] The bypass circuit includes N-type MOS tubes M6, M 11 and load resistors R2, R6; The bypass circuit is connected to the drain of M4 and M9 respectively, where the source of M6 is connected to the drain of M4, and the gate of M6 is connected to the DC bias V C , the drain end of M6 is connected to the resistor R2, and the resistor R2 is connected to the power supply VDD; M 11 The source end of M is connected to the drain end of M9. 11 The gate terminal is connected to a DC bias V C , M 11 The drain end of is connected to the resistor R6, and the resistor R6 is connected to the power supply VDD.

[0013] The tunable active load circuit includes P-type MOS tubes M7 and M8; The tunable active load circuit is located at the first-stage output load of the LNA core amplifier circuit. M7, M8, resistor R4, and inductor L3 together constitute the first-stage output load. The source terminals of M7 and M8 and one end of the resistor R4 and inductor L3 are connected to the power supply VDD. The drain terminals of M7 and M8 are connected to the drain terminal of M5. The gate terminals of M7 and M8 are connected to the DC bias V C' 、V C'' .

[0014] The output matching circuit includes a DC blocking capacitor C5 and a matching capacitor C6; The output matching circuit is located at the second-stage output load of the LNA core amplifier circuit. Capacitors C5, C6, resistor R8 and inductor L4 jointly achieve output matching. One end of resistor R8 is connected in series with one end of inductor L4 to form the second-stage output load. The other end of L4 is connected to the power supply VDD, and the other end of R8 is connected to M 10 The drain is connected to one end of the capacitor C5, the other end of the capacitor C5 is connected to the total output end of the circuit, and the capacitor C6 is connected in parallel with the signal path.

[0015] The VG-LNA tunes the gain through a bypass circuit and a tunable active load circuit, specifically: When VG-LNA is in high gain mode Gain1, the DC bias V C Connect to low potential, bypass circuit is closed, DC bias V C' 、V C'' Connect to high potential, and the active loads M7 and M8 are equivalent to large resistors and are incorporated into the first-stage output load; When VG-LNA is in gain mode Gain2, the DC bias V C Connect to low potential, bypass circuit is closed, DC bias V C' Connect to high potential, DC bias V C'' Connect to low potential, the active load M8 equivalent small resistance is added to the first-stage output load, reducing the output resistance and lowering the gain; When VG-LNA is in gain mode Gain3, the DC bias V C Connect to low potential, bypass circuit is closed, DC bias V C' Connect to low potential, DC bias V C'' Connect to low potential, the active loads M7 and M8 are equivalent to small resistors and added to the first-stage output load, further reducing the output resistance and lowering the gain; When VG-LNA is in gain mode Gain4, Gain5, Gain6, the DC bias V C' Connect to low potential, DC bias V C'' Connect to low potential, by controlling the DC bias V CThe potential of the bypass circuit is changed to change the working state of the bypass circuit to extract the working current of the LNA core amplifier circuit, reduce the transconductance of the MOS and reduce the gain.

[0016] The VG-LNA compensates the input impedance through a tunable input matching circuit, specifically: When the VG-LNA is in the high gain mode Gain1 or the gain mode Gain2, the DC bias En1, En2, and En3 are connected to a low potential, the MOS tubes M1, M2, and M3 are cut off, and the capacitors in the capacitor array are not connected to the matching circuit; When the VG-LNA is in the gain mode Gain3, the tunable input matching circuit needs to be connected to capacitor compensation, the DC bias En1 is connected to a high potential, the DC bias En2 and En3 are connected to a low potential, the MOS tube M1 is turned on, M2 and M3 are turned off, and the capacitor C1 is connected to the matching circuit; When VG-LNA is in gain mode Gain4, DC bias En2 is connected to high potential, DC bias En1 and En3 are connected to low potential, MOS tube M2 is turned on, M1 and M3 are turned off, and capacitor C2 is connected to the matching circuit; When the VG-LNA is in the gain mode Gain5, the DC bias En1 and En2 are connected to a high potential, the DC bias En3 is connected to a low potential, the MOS tubes M1 and M2 are turned on, M3 is turned off, and the capacitors C1 and C2 are connected to the matching circuit; When the VG-LNA is in the gain mode Gain6, the DC bias En3 is connected to a high potential, the DC bias En1 and En2 are connected to a low potential, the MOS tube M3 is turned on, M1 and M2 are turned off, and the capacitor C3 is connected to the matching circuit.

[0017] The beneficial effects of the present invention are: The invention has a variable gain ultra-wideband low noise amplifier with a wide tuning range. The tunable input matching circuit compensates for the input matching by accessing a capacitor, thereby solving the problem of unstable input impedance when the gain gear is switched. In terms of the gain tuning range, a bypass circuit and a tunable active load circuit are adopted to achieve a wide gain tuning range, and equal-step tuning is achieved for the gain switching by controlling the bypass circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 It is a circuit diagram of a variable gain ultra-wideband low noise amplifier with a wide tuning range of the present invention; Figure 2 It is a schematic diagram of a small signal equivalent circuit of a tunable input matching circuit in a variable gain ultra-wideband low noise amplifier with a wide tuning range of the present invention; Figure 3 It is a schematic diagram of simulation results before and after input matching capacitor compensation in different gain modes of a variable gain ultra-wideband low noise amplifier with a wide tuning range of the present invention; Figure 4 It is a schematic diagram of simulation results of high-gain mode S parameters and noise coefficient of a variable-gain ultra-wideband low-noise amplifier with a wide tuning range according to the present invention; Figure 5 It is a schematic diagram of simulation results of different gains S21 of a variable gain ultra-wideband low noise amplifier with a wide tuning range of the present invention; Figure 6 It is a schematic diagram of simulation results of input matching S11 at different gains of the variable gain ultra-wideband low noise amplifier with a wide tuning range of the present invention. DETAILED DESCRIPTION

[0019] The present invention is described in detail below in conjunction with the accompanying drawings and specific implementation methods. The described embodiments are only part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0020] Example 1 This embodiment provides a variable gain ultra-wideband low noise amplifier with a wide tuning range, such as Figure 1 As shown, it includes a tunable input matching circuit and an LNA core amplifier circuit connected together, the tunable input matching circuit is used for input impedance and noise matching, the LNA core amplifier circuit is used for gain tuning, the LNA core amplifier circuit includes two-stage cascaded common-source and common-gate circuits, the two-stage cascaded common-source and common-gate circuits form a first-stage common-source and common-gate amplifier and a second-stage common-source and common-gate amplifier, the signal enters the LNA core amplifier circuit from the tunable input matching circuit, is amplified by the first-stage common-source and common-gate amplifier, and then is further amplified by the second-stage common-source and common-gate amplifier, and finally output from the output end.

[0021] This embodiment only represents a preferred implementation of the variable gain ultra-wideband low noise amplifier with a wide tuning range of the present invention. Any amplifier designed with similar technical features to the present invention will fall within the protection scope of the variable gain ultra-wideband low noise amplifier with a wide tuning range of the present invention.

[0022] Example 2 This embodiment provides a variable gain ultra-wideband low noise amplifier with a wide tuning range. On the basis of Embodiment 1, a tunable input matching circuit is a combination of a two-order Chebyshev bandpass filter and a capacitor array. When the gain is tuned, the parasitic capacitance at the input end of the LNA core amplifier circuit changes, and the capacitor array is connected to a corresponding compensation capacitor to compensate for the input impedance, thereby solving the problem of unstable input impedance during gain tuning.

[0023] The tunable input matching circuit includes capacitor C pad , DC blocking capacitor C dc , matching inductors L1, L2, capacitor arrays C1, C2, C3 and corresponding N-type control MOS tubes M1, M2, M3; Capacitor C pad In parallel with inductor L1, capacitor C dc The capacitor C1 in the capacitor array is connected in series with the MOS tube M1, the capacitor C2 is connected in series with the MOS tube M2, the capacitor C3 is connected in series with the MOS tube M3, and one end of the inductor L2 is connected in series with the capacitor C dc One end of the inductor L2 is connected to the capacitor array C1, C2, and C3 respectively. dc The other end is connected to the total input end of the circuit, capacitor C pad One end of the inductor L1 is connected to the capacitor C pad And inductor L1 is connected in parallel with the signal path.

[0024] This embodiment only represents a preferred implementation of the variable gain ultra-wideband low noise amplifier with a wide tuning range of the present invention. Any amplifier designed with similar technical features to the present invention will fall within the protection scope of the variable gain ultra-wideband low noise amplifier with a wide tuning range of the present invention.

[0025] Example 3 This embodiment provides a variable gain ultra-wideband low noise amplifier with a wide tuning range. On the basis of Embodiment 1-2, the LNA core amplifier circuit includes a two-stage cascaded common source and common gate circuit to obtain sufficient gain. The common source and common gate circuit is connected to a bypass circuit, a tunable active load circuit and an output matching circuit. The gain tuning function is achieved by controlling the bypass circuit and the tunable active load circuit, and the output matching circuit interacts with the inductive reactance component at the second-stage output load to achieve output impedance matching of the LNA core amplifier circuit.

[0026] The two-stage cascade common source and common gate circuit includes N-type MOS tubes M4, M5, M9, M 10 , DC blocking capacitor C4, self-bias resistors R3, R7, load inductors L3, L4, load resistors R4, R8, DC coupling resistor R1; M4 and M5 form a common source and common gate structure, M9 and M 10 A common source and common gate structure is formed, in which the gate of M4 is connected to one end of the DC coupling resistor R1, R1 is connected to one end of M4 and the capacitor array connection end of L2, and the other end of R1 is connected to the DC bias V b1 , M4 source connected to inductor L s1 , L s1The other end of M4 is grounded, the drain end of M4 is connected to the source end of M5, the gate and drain of M5 are connected through resistor R3 to achieve self-biasing, the gate of MOS tube M9 is connected to one end of DC coupling resistor R5, and the other end of R5 is connected to DC bias V b2 , M9 source connected to inductor L s2 , L s2 The other end of M9 is grounded, and the drain end of M 10 The source end is connected, M 10 The gate and drain are connected through resistor R7 to achieve self-biasing.

[0027] The bypass circuit includes N-type MOS tubes M6, M 11 and load resistors R2, R6; The bypass circuit is connected to the drain of M4 and M9 respectively, where the source of M6 is connected to the drain of M4, and the gate of M6 is connected to the DC bias V C , the drain end of M6 is connected to the resistor R2, and the resistor R2 is connected to the power supply VDD; M 11 The source end of M is connected to the drain end of M9. 11 The gate terminal is connected to a DC bias V C , M 11 The drain end of is connected to the resistor R6, and the resistor R6 is connected to the power supply VDD.

[0028] This embodiment only represents a preferred implementation of the variable gain ultra-wideband low noise amplifier with a wide tuning range of the present invention. Any amplifier designed with similar technical features to the present invention will fall within the protection scope of the variable gain ultra-wideband low noise amplifier with a wide tuning range of the present invention.

[0029] Example 4 This embodiment provides a variable gain ultra-wideband low noise amplifier with a wide tuning range. Based on Embodiment 3, the tunable active load circuit includes P-type MOS tubes M7 and M8; The tunable active load circuit is located at the first-stage output load of the LNA core amplifier circuit. M7, M8, resistor R4, and inductor L3 together constitute the first-stage output load. The source terminals of M7 and M8 and one end of the resistor R4 and inductor L3 are connected to the power supply VDD. The drain terminals of M7 and M8 are connected to the drain terminal of M5. The gate terminals of M7 and M8 are connected to the DC bias V C' 、V C'' .

[0030] The output matching circuit includes a DC blocking capacitor C5 and a matching capacitor C6; The output matching circuit is located at the second-stage output load of the LNA core amplifier circuit. Capacitors C5, C6, resistor R8 and inductor L4 jointly achieve output matching. One end of resistor R8 is connected in series with one end of inductor L4 to form the second-stage output load. The other end of L4 is connected to the power supply VDD, and the other end of R8 is connected to M 10 The drain is connected to one end of the capacitor C5, the other end of the capacitor C5 is connected to the total output end of the circuit, and the capacitor C6 is connected in parallel with the signal path.

[0031] This embodiment only represents a preferred implementation of the variable gain ultra-wideband low noise amplifier with a wide tuning range of the present invention. Any amplifier designed with similar technical features to the present invention will fall within the protection scope of the variable gain ultra-wideband low noise amplifier with a wide tuning range of the present invention.

[0032] Example 5 This embodiment provides a variable gain ultra-wideband low noise amplifier with a wide tuning range. On the basis of Embodiments 1-4, the VG-LNA tunes the gain through a bypass circuit and a tunable active load circuit, specifically: When VG-LNA is in high gain mode Gain1, the DC bias V C Connect to low potential, bypass circuit is closed, DC bias V C' 、V C'' Connect to high potential, and the active loads M7 and M8 are equivalent to large resistors and are incorporated into the first-stage output load; When VG-LNA is in gain mode Gain2, the DC bias V C Connect to low potential, bypass circuit is closed, DC bias V C' Connect to high potential, DC bias V C'' Connect to low potential, the active load M8 equivalent small resistance is added to the first-stage output load, reducing the output resistance and lowering the gain; When VG-LNA is in gain mode Gain3, the DC bias V C Connect to low potential, bypass circuit is closed, DC bias V C' Connect to low potential, DC bias V C'' Connect to low potential, the active loads M7 and M8 are equivalent to small resistors and added to the first-stage output load, further reducing the output resistance and lowering the gain; When VG-LNA is in gain mode Gain4, Gain5, Gain6, the DC bias V C' Connect to low potential, DC bias V C'' Connect to low potential, by controlling the DC bias V C The potential of the bypass circuit is changed to change the working state of the bypass circuit to extract the working current of the LNA core amplifier circuit, reduce the transconductance of the MOS and reduce the gain.

[0033] This embodiment only represents a preferred implementation of the variable gain ultra-wideband low noise amplifier with a wide tuning range of the present invention. Any amplifier designed with similar technical features to the present invention will fall within the protection scope of the variable gain ultra-wideband low noise amplifier with a wide tuning range of the present invention.

[0034] Example 6 This embodiment provides a variable gain ultra-wideband low noise amplifier with a wide tuning range. On the basis of Embodiments 1-5, the VG-LNA compensates the input impedance through a tunable input matching circuit, specifically: When the VG-LNA is in the high gain mode Gain1 or the gain mode Gain2, the DC bias En1, En2, and En3 are connected to a low potential, the MOS tubes M1, M2, and M3 are cut off, and the capacitors in the capacitor array are not connected to the matching circuit; When the VG-LNA is in the gain mode Gain3, the tunable input matching circuit needs to be connected to capacitor compensation, the DC bias En1 is connected to a high potential, the DC bias En2 and En3 are connected to a low potential, the MOS tube M1 is turned on, M2 and M3 are turned off, and the capacitor C1 is connected to the matching circuit; When VG-LNA is in gain mode Gain4, DC bias En2 is connected to high potential, DC bias En1 and En3 are connected to low potential, MOS tube M2 is turned on, M1 and M3 are turned off, and capacitor C2 is connected to the matching circuit; When the VG-LNA is in the gain mode Gain5, the DC bias En1 and En2 are connected to a high potential, the DC bias En3 is connected to a low potential, the MOS tubes M1 and M2 are turned on, M3 is turned off, and the capacitors C1 and C2 are connected to the matching circuit; When the VG-LNA is in the gain mode Gain6, the DC bias En3 is connected to a high potential, the DC bias En1 and En2 are connected to a low potential, the MOS tube M3 is turned on, M1 and M2 are turned off, and the capacitor C3 is connected to the matching circuit.

[0035] The present invention has a variable gain ultra-wideband low noise amplifier with a wide tuning range. In terms of the gain tuning range, a bypass circuit and a tunable active load circuit are used to achieve a wide gain tuning range, and the gain switching is tuned in equal steps by controlling the bypass circuit. In other working modes, the input impedance of the LNA amplification circuit changes, and the input impedance is compensated by the tunable capacitor array, such as Figure 2 As shown, its input impedance expression , with MOS tube M4 and inductor L S1 Participate in input matching together, and the overall input impedance expression is , through capacitor compensation, such as Figure 3As shown in the figure, within the operating frequency band of 7~10GHz, the input matching S11 after capacitor compensation is all below -10dB, which solves the problem of unstable input impedance during gain switching.

[0036] The present invention is achieved by Figure 1 M4, M5 and M9, M 10 The two-stage common source and common gate structure realizes the amplification and output of the signal. The use of inductors L3, L4 and resistors R4, R8 in conjunction with the matching circuit makes the gain in the operating frequency band of 7~10GHz relatively smooth, and the gain fluctuation in a single channel is less than 1dB. Figure 4 As shown, in high gain mode, the full-band gain is 21.32~24.05dB and the in-band noise is 1.70~2.36dB.

[0037] The present invention adopts a bypass circuit and a tunable active load circuit, and realizes a wide gain tuning range function by designing a DC voltage bias. The gain tuning range is 30dB. Figure 5 As shown, the in-band gain value is -5.98~24.05dB, the gain switching step is 6dB, and at different gain levels, the input matching S11 is below -10dB, such as Figure 6 The variable gain ultra-wideband low noise amplifier of the present invention not only satisfies the wide gain tuning range but also solves the impedance matching problem, and has certain practicality.

Claims

1. A variable gain ultra-wideband low noise amplifier with a wide tuning range, characterized in that: The invention comprises a tunable input matching circuit and an LNA core amplifier circuit connected together, wherein the tunable input matching circuit is used for input impedance and noise matching, and the LNA core amplifier circuit is used for gain tuning. The LNA core amplifier circuit comprises a two-stage cascaded common-source and common-gate circuit, and the two-stage cascaded common-source and common-gate circuit forms a first-stage common-source and common-gate amplifier and a second-stage common-source and common-gate amplifier. A signal enters the LNA core amplifier circuit from the tunable input matching circuit, is amplified by the first-stage common-source and common-gate amplifier, and is further amplified by the second-stage common-source and common-gate amplifier, and is finally output from an output end.

2. The variable gain ultra-wideband low noise amplifier with a wide tuning range according to claim 1, characterized in that: The tunable input matching circuit includes a two-order Chebyshev bandpass filter and a capacitor array. When the gain is tuned, the parasitic capacitance at the input end of the LNA core amplifier circuit changes, and the capacitor array is connected to a corresponding compensation capacitor to compensate for the input impedance. The tunable input matching circuit includes capacitor C pad , DC blocking capacitor C dc , matching inductors L1, L2, capacitor arrays C1, C2, C3 and corresponding N-type control MOS tubes M1, M2, M3; The capacitor C pad In parallel with the inductor L1, the capacitor C dc The capacitor C1 in the capacitor array is connected in series with the MOS tube M1, the capacitor C2 is connected in series with the MOS tube M2, the capacitor C3 is connected in series with the MOS tube M3, and one end of the inductor L2 is connected in series with the capacitor C dc One end of the inductor L2 is connected to the capacitor arrays C1, C2, and C3 respectively. dc The other end is connected to the total input end of the circuit, capacitor C pad One end of the inductor L1 is connected to the capacitor C pad And inductor L1 is connected in parallel with the signal path.

3. The variable gain ultra-wideband low noise amplifier with a wide tuning range according to claim 1, characterized in that: The LNA core amplifier circuit includes two stages of cascaded common-source and common-gate circuits to obtain sufficient gain. The common-source and common-gate circuits are connected to a bypass circuit, a tunable active load circuit and an output matching circuit. Gain tuning is achieved by controlling the bypass circuit and the tunable active load circuit, and the output matching circuit interacts with the inductive reactance component at the second-stage output load to achieve output impedance matching of the LNA core amplifier circuit.

4. The variable gain ultra-wideband low noise amplifier with a wide tuning range according to claim 2, characterized in that: The two-stage cascade common source and common gate circuit includes N-type MOS tubes M4, M5, M9, M 10 , DC blocking capacitor C4, self-bias resistors R3, R7, load inductors L3, L4, load resistors R4, R8, DC coupling resistor R1; The M4 and M5 form a common source and common gate structure, the M9 and M 10 A common source and common gate structure is formed, wherein the gate of M4 is connected to one end of a DC coupling resistor R1, one end of R1 is connected to M4 and also to the capacitor array connection end of L2, and the other end of R1 is connected to a DC bias V b1 , the source of M4 is connected to the inductor L s1 , L s1 The other end of the MOS tube M9 is connected to the ground, the drain end of M4 is connected to the source end of M5, the gate and drain of M5 are connected through a resistor R3 to achieve self-biasing, the gate of the MOS tube M9 is connected to one end of the DC coupling resistor R5, and the other end of R5 is connected to the DC bias V b2 , the source of M9 is connected to the inductor L s2 , L s2 The other end of the M9 drain terminal is grounded and the M 10 The source end is connected, the M 10 The gate and drain are connected through resistor R7 to achieve self-biasing.

5. The variable gain ultra-wideband low noise amplifier with a wide tuning range according to claim 4, characterized in that: The bypass circuit includes N-type MOS tubes M6, M 11 and load resistors R2, R6; The bypass circuit is connected to the drain of M4 and M9 respectively, wherein the source of M6 is connected to the drain of M4, and the gate of M6 is connected to the DC bias V C , the drain end of M6 is connected to the resistor R2, and the resistor R2 is connected to the power supply VDD; The M 11 The source end of M is connected to the drain end of M9. 11 The gate terminal is connected to a DC bias V C , the M 11 The drain end of the resistor R6 is connected to the power supply VDD.

6. The variable gain ultra-wideband low noise amplifier with a wide tuning range according to claim 5, characterized in that: The tunable active load circuit includes P-type MOS tubes M7 and M8; The tunable active load circuit is located at the first-stage load of the LNA core amplifier circuit. The M7, M8, resistor R4, and inductor L3 together constitute the first-stage load. The source ends of the M7, M8 and one end of the resistor R4 and inductor L3 are connected to the power supply VDD. The drain ends of the M7, M8 are connected to the drain end of M5. The gate ends of the M7, M8 are connected to the DC bias V C' 、V C'' .

7. The variable gain ultra-wideband low noise amplifier with a wide tuning range according to claim 6, characterized in that: The output matching circuit includes a DC blocking capacitor C5 and a matching capacitor C6; The output matching circuit is located at the second-stage load of the LNA core amplifier circuit. The capacitors C5 and C6, the resistor R8 and the inductor L4 jointly achieve output matching. One end of the resistor R8 is connected in series with one end of the inductor L4 to form the second-stage load. The other end of L4 is connected to the power supply VDD. The other end of R8 is connected to M 10 The drain is connected to one end of the capacitor C5, the other end of the capacitor C5 is connected to the total output end of the circuit, and the capacitor C6 is connected in parallel with the signal path.

8. The variable gain ultra-wideband low noise amplifier with a wide tuning range according to claim 7, characterized in that: The VG-LNA tunes the gain through a bypass circuit and a tunable active load circuit, and realizes a wide gain tuning range and fixed step switching in 6 gain modes, namely Gain1, Gain2, Gain3, Gain4, Gain5, and Gain6. The specific tuning control method is: When the VG-LNA is in the high gain mode Gain1, the DC bias V C Connected to low potential, the bypass circuit is closed, and the DC bias V C' 、V C'' Connected to high potential, the active loads M7 and M8 are equivalent to large resistors and incorporated into the first-stage output load; When VG-LNA is in gain mode Gain2, the DC bias V C Connected to low potential, the bypass circuit is closed, and the DC bias V C' Connect high potential, the DC bias V C'' Connect to low potential, the active load M8 equivalent small resistance is incorporated into the first-stage output load, reducing the output resistance and lowering the gain; When VG-LNA is in gain mode Gain3, the DC bias V C Connected to low potential, the bypass circuit is closed, and the DC bias V C' Connect to low potential, DC bias V C'' Connect to low potential, the active loads M7 and M8 are equivalent to small resistors and merged into the first-stage output load, further reducing the output resistance and lowering the gain; When the VG-LNA is in the gain mode Gain4, Gain5, Gain6, the DC bias V C' Connect low potential, the DC bias V C'' Connect low potential, by controlling the DC bias V C The potential of the bypass circuit is changed to change the working state of the bypass circuit to extract the working current of the LNA core amplifier circuit, reduce the transconductance of the MOS and reduce the gain.

9. The variable gain ultra-wideband low noise amplifier with a wide tuning range according to claim 8, characterized in that: The VG-LNA compensates the input impedance in different gain modes through a tunable input matching circuit, specifically: When the VG-LNA is in the high gain mode Gain1 or the gain mode Gain2, the DC bias En1, En2, and En3 are connected to a low potential, the MOS tubes M1, M2, and M3 are cut off, and the capacitors in the capacitor array are not connected to the matching circuit; When the VG-LNA is in the gain mode Gain3, the tunable input matching circuit needs to be connected to capacitor compensation, the DC bias En1 is connected to a high potential, the DC bias En2 and En3 are connected to a low potential, the MOS tube M1 is turned on, M2 and M3 are turned off, and the capacitor C1 is connected to the matching circuit; When the VG-LNA is in the gain mode Gain4, the DC bias En2 is connected to a high potential, the DC bias En1 and En3 are connected to a low potential, the MOS tube M2 is turned on, the M1 and M3 are turned off, and the capacitor C2 is connected to the matching circuit; When the VG-LNA is in the gain mode Gain5, the DC biases En1 and En2 are connected to a high potential, the DC bias En3 is connected to a low potential, the MOS tubes M1 and M2 are turned on, M3 is turned off, and the capacitors C1 and C2 are connected to the matching circuit; When the VG-LNA is in the gain mode Gain6, the DC bias En3 is connected to a high potential, the DC biases En1 and En2 are connected to a low potential, the MOS tube M3 is turned on, M1 and M2 are turned off, and the capacitor C3 is connected to the matching circuit.