PCIe data packet sending method, electronic equipment and medium

Abstract

The invention relates to the technical field of computers, in particular to a PCIe data packet sending method, electronic equipment and a medium, and the method comprises the steps: S1, obtaining a PCIe data packet to be sent at present and a required credit value; s2, transmitting a PCIe data packet to be sent at present to a PCIe bus; s3, acquiring the residual credit value of the current receiving end at the moment when all the credit values are transmitted to the PCIe bus; s4, if the remaining credit value is smaller than the required credit value, executing S5, otherwise, executing S6; s5, marking an invalid identifier on the PCIe data packet to be sent at present, then sending the PCIe data packet to the receiving end, and executing S7; s6, directly sending the current to-be-sent PCIe data packet to a receiving end, and executing S7; and S7, if the invalid identifier is marked, discarding the PCIe data packet to be sent currently, otherwise, storing the PCIe data packet to be sent in the buffer area of the receiving end, and returning to the step S1. According to the invention, the bandwidth waste can be avoided, and the PCIe link utilization rate can be improved.

Description

Technical Field

[0001] The present invention relates to the field of computer technology, and in particular to a PCIe data packet sending method, electronic equipment and medium. Background Art

[0002] PCIe (Peripheral Component Interconnect Express) is a high-speed serial bus standard widely used to connect peripherals in computer systems. In order to ensure the efficiency and reliability of data transmission, PCIe introduces a credit mechanism to manage the data flow control between the sender and the receiver. The core of the credit mechanism is to avoid data overflow and prevent the sender from sending data when the receiver's buffer is insufficient, thereby ensuring the reliability of data transmission and link efficiency. The credit mechanism of PCIe achieves efficient and reliable data transmission by dynamically managing the buffer resources of the sender and the receiver. Its core lies in allocating credit quotas on demand and updating credit information in real time to ensure that link resources are fully utilized while avoiding data overflow. This mechanism is an important basis for the high performance and low latency characteristics of PCIe.

[0003] However, sending PCIe data packets based on the credit mechanism has at least the following disadvantages: (1) The initial credit allocation depends on the buffer capacity of the receiving end. The core of the credit mechanism is that the receiving end notifies its buffer capacity through a flow control packet. If the receiving end buffer is small, the initial allocated credit value may be low, causing the sending end to frequently pause due to insufficient credit, reducing link utilization. In burst traffic scenarios (such as high-throughput data transmission), insufficient buffer capacity may become a bottleneck. (2) Credit update delay affects throughput. Credit update depends on the receiving end sending a flow control DLLP (Data Link Layer Packet), and the generation and transmission of DLLP takes time. If the link delay is high (such as long-distance transmission) or the receiving end has a slow processing speed, the credit update may not reach the sending end in time. The sending end may enter an idle state while waiting for credit update, resulting in bandwidth waste. Therefore, how to avoid bandwidth waste and improve PCIe link utilization has become a technical problem that needs to be solved urgently. Summary of the invention

[0004] The present invention aims to provide a PCIe data packet sending method, electronic device and medium, which can avoid bandwidth waste and improve PCIe link utilization.

[0005] According to a first aspect of the present invention, a PCIe data packet sending method is provided, comprising: Step S1, obtaining a PCIe data packet to be sent and a required credit value corresponding to the PCIe data packet to be sent from the sending end, where the required credit value is the buffer space required to be occupied by the PCIe data packet in the buffer of the receiving end; Step S2, transmitting the current PCIe data packet to be sent to the PCIe bus; Step S3, when all the PCIe data packets to be sent are transmitted to the PCIe bus, the remaining credit value of the current receiving end is obtained, the remaining credit value of the current receiving end is the remaining space of the buffer of the current receiving end, and the remaining credit value of the receiving end is updated in real time; Step S4: If the remaining credit value of the current receiving end is less than the required credit value corresponding to the current PCIe data packet to be sent, then execute step S5; otherwise, execute step S6; Step S5, after marking the current PCIe data packet to be sent with an invalid flag, send it to the receiving end, and execute step S7; Step S6, directly sending the current PCIe data packet to be sent to the receiving end, and executing step S7; Step S7: If the current PCIe data packet to be sent is marked with an invalid identifier, the receiving end will discard it; otherwise, the receiving end stores the current PCIe data packet to be sent in the receiving end buffer and returns to step S1.

[0006] According to a second aspect of the present invention, there is provided an electronic device, comprising: at least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores instructions to be executed by the at least one processor, the instructions being configured to execute the method described in the first aspect of the present invention.

[0007] According to a third aspect of the present invention, there is provided a computer-readable storage medium storing computer-executable instructions, wherein the computer instructions are used to execute the method described in the first aspect of the present invention.

[0008] Compared with the prior art, the present invention has obvious advantages and beneficial effects. By means of the above technical solution, the PCIe data packet sending method, electronic device and medium provided by the present invention can achieve considerable technical advancement and practicality, and have wide industrial utilization value, and at least have the following beneficial effects: The present invention does not need to wait until the remaining credit value of the current receiving end meets the required credit value before sending the PCIe data packet, but directly sends the PCIe data packet to the PCIe data bus first. When the PCIe data packet is sent, it is determined whether the remaining credit value of the current receiving end meets the required credit value. If it meets, it is sent directly. If not, the PCIe data is discarded. The present invention can avoid the transmission gap period generated by the PCIe credit mechanism, and significantly increase the PCIe throughput and improve the data transmission efficiency while ensuring that the bandwidth and delay are not negatively affected. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0010] Figure 1 A flow chart of a method for sending a PCIe data packet provided in an embodiment of the present invention; Figure 2 A timing diagram for sending a PCIe data packet based on an existing PCIe credit mechanism; Figure 3 A timing diagram of sending a PCIe data packet according to an embodiment of the present invention; Figure 4 A timing diagram of an example of successful transmission of a PCIe data packet according to an embodiment of the present invention; Figure 5 This is a timing diagram of an example of a PCIe data packet sending failure according to an embodiment of the present invention. DETAILED DESCRIPTION

[0011] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present invention.

[0012] The embodiment of the present invention provides a method for sending a PCIe data packet, such as Figure 1 As shown, including: Step S1: Obtain a PCIe data packet to be sent and a required credit value corresponding to the PCIe data packet to be sent from a transmitting end, where the required credit value is a buffer space required to be occupied by the PCIe data packet in a buffer of a receiving end.

[0013] The sending end and the receiving end are interconnected through a PCIe bus, and the sending end sends a PCIe data packet to the receiving end through the PCIE bus.

[0014] Step S2: transmitting the current PCIe data packet to be sent to the PCIe bus.

[0015] It should be noted that in the prior art, the data flow control between the sender and the receiver is managed based on the PCIe credit mechanism. Before sending a PCIe data packet, it is necessary to first determine whether the remaining credit value of the current receiver is greater than or equal to the required credit value corresponding to the current PCIe data packet to be sent. Only when the condition is met, the PCIe data packet is sent. It can be seen that under the existing PCIe credit mechanism, when the credit value is insufficient, the PCIe sender will be restricted from sending data packets, thereby generating a transmission gap period. The embodiment of the present invention breaks through this limitation and can implement PCIe data packet sending during the gap period when the credit value is insufficient.

[0016] Step S3, when all the PCIe data packets to be sent are transmitted to the PCIe bus, the remaining credit value of the current receiving end is obtained, and the remaining credit value of the current receiving end is the remaining space of the current receiving end buffer, and the remaining credit value of the receiving end is updated in real time.

[0017] Step S4: If the remaining credit value of the current receiving end is less than the required credit value corresponding to the current PCIe data packet to be sent, execute step S5; otherwise, execute step S6.

[0018] Step S5: After marking the current PCIe data packet to be sent with an invalid flag, send it to the receiving end, and execute step S7.

[0019] Step S6: directly send the current PCIe data packet to be sent to the receiving end, and execute step S7.

[0020] Step S7: If the current PCIe data packet to be sent is marked with an invalid identifier, the receiving end will discard it; otherwise, the receiving end stores the current PCIe data packet to be sent in the receiving end buffer and returns to step S1.

[0021] It should be noted that if, at the end of the transmission of the current PCIe data packet to be sent, the remaining credit value of the current receiving end reaches the standard for sending the current PCIe data packet to be sent, it means that the idle period that the traditional PCIe credit mechanism cannot reach has been successfully utilized, thereby significantly increasing the throughput of PCIe and improving the data transmission efficiency. In addition, during the data transmission process, the present invention ensures that there will be no negative effects on bandwidth and latency. Even if the credit mechanism requirements are still not met at the end of the transmission, the PCIe data packet marked with an invalid flag can be discarded to ensure that the main data path is not disturbed and maintain stable data transmission.

[0022] The PCIe data packets to be sent may be data packets with the same priority or data packets with different priorities, which is described below using two different specific embodiments.

[0023] Embodiment 1 Each PCIe data packet to be sent has the same priority. The PCIe data is sent in the order of the PCIe data packet sequence to be sent. The PCIe data packet sequence to be sent is generated in the order in which the PCIe data packets to be sent need to be sent. The PCIe data packet at the first position in the PCIe data packet sequence to be sent is the current PCIe data packet to be sent. For PCIe data packets with the same priority, the order in the PCIe data packet sequence to be sent remains unchanged. Each PCIe data packet to be sent is set with a sending count, and the initial value of the sending count corresponding to each PCIe data packet to be sent is set to 0.

[0024] On the premise that the priority of each PCIe data packet to be sent is the same, as an example, step S1 includes: Step S11: Obtain a required credit value corresponding to the first PCIe data packet in the sequence of PCIe data packets to be sent.

[0025] Step S12, determine whether the number of transmissions corresponding to the first PCIe data packet in the sequence of PCIe data packets to be transmitted is equal to a preset transmission threshold; if so, jump to step S14; otherwise, execute step S13.

[0026] The preset sending threshold is an integer greater than or equal to 1 and is set according to specific application requirements.

[0027] Step S13: determine the first PCIe data packet in the sequence of PCIe data packets to be sent as the previous PCIe data packet to be sent, and execute step S2.

[0028] It should be noted that if the number of transmissions corresponding to the first PCIe data packet in the sequence of PCIe data packets to be sent is less than the preset transmission threshold, the mechanism of steps S2 to S7 is still used to send the first PCIe data packet in the sequence of PCIe data packets to be sent.

[0029] Step S14: when the remaining space in the buffer of the receiving end is greater than or equal to the required credit value corresponding to the first PCIe data packet, the first PCIe data packet is sent to the buffer of the receiving end, and the first PCIe data packet is deleted from the sequence of PCIe data packets to be sent, and the process returns to step S11.

[0030] It should be noted that if the number of transmissions corresponding to the first PCIe data packet in the sequence of PCIe data packets to be sent is equal to the preset transmission threshold, it is necessary to switch to the traditional PCIe credit mechanism to successfully send the first PCIe data packet in the sequence of PCIe data packets to be sent to the buffer of the receiving end, which is achieved through step S14.

[0031] Embodiment 2 Each PCIe data packet to be sent has a corresponding priority. Therefore, the priorities corresponding to different PCIe data packets to be sent may be different. The sequence of PCIe data packets to be sent is dynamically adjusted according to the priority of the PCIe data packets. Therefore, the order in the sequence of PCIe data packets to be sent may change dynamically. Each PCIe data packet to be sent is set with a number of sending times, and the initial value of the number of sending times corresponding to each PCIe data packet to be sent is set to 0.

[0032] On the premise that each PCIe data packet to be sent has a corresponding priority, as an example, step S1 includes: Step C11: Obtain the required credit value corresponding to the first PCIe data packet in the sequence of PCIe data packets to be sent.

[0033] Step C12: determine whether the first PCIe data packet in the sequence of PCIe data packets to be sent is the last PCIe data packet to be sent. If so, execute step C15; otherwise, execute step C14.

[0034] It should be noted that, when the previous PCIe data packet to be sent fails to be sent and no PCIe data packet with a higher priority than the previous PCIe data packet to be sent has yet to appear, the first PCIe data packet in the sequence of PCIe data packets to be sent is still the previous PCIe data packet to be sent.

[0035] Step C13, determine whether the number of transmissions corresponding to the first PCIe data packet in the sequence of PCIe data packets to be transmitted is equal to a preset transmission threshold; if so, jump to step C15; otherwise, execute step C14.

[0036] The preset sending threshold is an integer greater than or equal to 1 and is set according to specific application requirements.

[0037] Step C14: determine the first PCIe data packet in the sequence of PCIe data packets to be sent as the previous PCIe data packet to be sent, and execute step S2.

[0038] It should be noted that if the number of transmissions corresponding to the first PCIe data packet in the sequence of PCIe data packets to be sent is less than the preset transmission threshold, the mechanism of steps S2 to S7 is still used to send the first PCIe data packet in the sequence of PCIe data packets to be sent.

[0039] Step C15: When the remaining space in the buffer of the receiving end is greater than or equal to the required credit value corresponding to the first PCIe data packet, the first PCIe data packet is sent to the buffer of the receiving end, and the first PCIe data packet is deleted from the sequence of PCIe data packets to be sent, and the process returns to step C11.

[0040] It should be noted that if the number of transmissions corresponding to the first PCIe data packet in the sequence of PCIe data packets to be sent is equal to the preset transmission threshold, it is necessary to switch to the traditional PCIe credit mechanism to successfully send the first PCIe data packet in the sequence of PCIe data packets to be sent to the buffer of the receiving end, which is achieved through step C15.

[0041] For example, in Embodiment 1 or Embodiment 2, step S7 includes: Step S71: If the current PCIe data packet to be sent is marked with an invalid flag, execute step S72; otherwise, execute step S73.

[0042] Step S72: The receiving end discards the PCIe data packet currently to be sent, and increases the number of transmissions corresponding to the PCIe data packet currently to be sent by 1, and returns to step S1.

[0043] Among them, in the step S72, the Nullify mechanism in the PCIe protocol can be specifically used to discard the receiving end, that is, the present invention does not need to add additional private mechanisms, and the compatibility with other PCIe devices is guaranteed. The Nullify mechanism is a technology used in the PCIe protocol to actively discard invalid or unprocessable data packets. It allows the receiving end or intermediate node to quickly terminate the transmission of data packets in specific scenarios to avoid unnecessary resource consumption or error propagation. Correspondingly, the invalid identifier marked on the PCIe data packet is the Nullify mark.

[0044] Step S73: The receiving end stores the current PCIe data packet to be sent in the receiving end buffer, deletes the current PCIe data packet to be sent from the sequence of PCIe data packets to be sent, and returns to step S1.

[0045] It should be noted that after a PCIe data packet is successfully sent to the buffer of the receiving end, the current PCIe data packet to be sent needs to be deleted from the sequence of PCIe data packets to be sent to ensure that the sequence of PCIe data packets to be sent contains unsent or unsuccessfully sent PCIe data packets to be sent.

[0046] In the existing PCIe credit mechanism, the timing diagram of the dependency between the sending of PCIe data packets and the credit value is as follows: Figure 2 As shown, clock refers to the clock signal, remaining credit value refers to the remaining credit value of the receiving end, and the credit value required to send the data packet refers to the credit value required for the PCIe data packet to be sent. The valid data packet is 1 to indicate the data packet header, data packet tail, and data packet valid. The data packet header is 1 to indicate that the PCIe data packet starts to be sent, and the data packet tail is 1 to indicate that the PCIe data packet ends to be sent. The data packet refers to the content of the PCIe data packet. Figure 2 It can be seen that before the remaining credit value of the receiving end is greater than the credit value required for the PCIe data packet to be sent, the sending end cannot perform the sending behavior and the PCIe bus is in an idle state.

[0047] Figure 3 The timing diagram of a data packet with an invalid flag implemented in step S2 to step S7 of an embodiment of the present invention is shown, taking the invalid flag as a Nullify mark as an example, Figure 3 In the embodiment, the invalid data packet is an invalid PCIe data packet indication. The invalid data packet is 1 when the end of the data packet and the data packet are both 1. When the invalid data packet is 1, it means that the PCIe data packet is invalid.

[0048] based on Figure 3The corresponding PCIe data packet sending mechanism, when the sending end sends a PCIe data packet, does not check the credit value of the corresponding transaction type first, but checks it again at the same time when the sending ends. If the remaining credit value of the receiving end is greater than or equal to the credit value required by the PCIe data packet to be sent, the PCIe data packet can be sent directly without additional processing. The timing diagram is as follows Figure 4 As shown in the figure, in the first clock cycle, although the remaining credit value of the receiving end is insufficient, the sending end can still send the PCIe data packet. In the third clock cycle, the remaining credit value of the receiving end has met the needs of sending the PCIe data packet, and the PCIe data packet can be sent normally. The remaining credit value of the receiving end is updated at the end of the sending.

[0049] based on Figure 3 The corresponding PCIe data packet sending mechanism, when the sending end sends a PCIe data packet, does not check the credit value of the corresponding transaction type first, but checks it again at the same time when the sending ends. If the remaining credit value of the receiving end is less than the credit value required by the PCIe data packet to be sent, the PCIe data packet is attached with a Nullify mark. This invalidates the PCIe data packet sent this time. The timing diagram is as follows Figure 5 As shown in the figure, in the first clock cycle, although the remaining credit value is insufficient, the PCIe transmitter can still send the data packet. In the fifth clock cycle, the PCIe data packet is about to be sent, but the remaining credit value of the receiving end is still insufficient. At this time, the transmitter needs to pull the data packet invalid high at the same time to indicate that the data packet is invalid, so as to prevent the PCIe data packet from being sent.

[0050] An embodiment of the present invention also provides an electronic device, comprising: at least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores instructions executed by the at least one processor, and the instructions are configured to execute the method described in the embodiment of the present invention.

[0051] The embodiment of the present invention further provides a computer-readable storage medium storing computer-executable instructions, wherein the computer instructions are used to execute the method described in the embodiment of the present invention.

[0052] The embodiment of the present invention does not need to wait for the remaining credit value of the current receiving end to meet the required credit value before sending the PCIe data packet, but directly sends the PCIe data packet to the PCIe data bus first. When the PCIe data packet is sent, it is determined whether the remaining credit value of the current receiving end meets the required credit value. If it meets, it is sent directly. If not, the PCIe data is discarded. The present invention can avoid the transmission gap period generated by the PCIe credit mechanism, and significantly increase the PCIe throughput and improve the data transmission efficiency while ensuring that the bandwidth and delay are not negatively affected.

[0053] The above description is only a preferred embodiment of the present invention and does not limit the present invention in any form. Although the present invention has been disclosed as a preferred embodiment as above, it is not used to limit the present invention. Any technician familiar with this profession can make some changes or modifications to equivalent embodiments of equivalent changes using the technical contents disclosed above without departing from the scope of the technical solution of the present invention. However, any simple modification, equivalent change and modification made to the above embodiments based on the technical essence of the present invention without departing from the content of the technical solution of the present invention still falls within the scope of the technical solution of the present invention.

Claims

1. A PCIe data packet sending method, characterized in that: include: Step S1, obtaining a PCIe data packet to be sent and a required credit value corresponding to the PCIe data packet to be sent from the sending end, where the required credit value is the buffer space required to be occupied by the PCIe data packet in the buffer of the receiving end; Step S2, transmitting the current PCIe data packet to be sent to the PCIe bus; Step S3, when all the PCIe data packets to be sent are transmitted to the PCIe bus, the remaining credit value of the current receiving end is obtained, the remaining credit value of the current receiving end is the remaining space of the buffer of the current receiving end, and the remaining credit value of the receiving end is updated in real time; Step S4: If the remaining credit value of the current receiving end is less than the required credit value corresponding to the current PCIe data packet to be sent, then execute step S5; otherwise, execute step S6; Step S5, after marking the current PCIe data packet to be sent with an invalid flag, send it to the receiving end, and execute step S7; Step S6, directly sending the current PCIe data packet to be sent to the receiving end, and executing step S7; Step S7: If the current PCIe data packet to be sent is marked with an invalid identifier, the receiving end will discard it; otherwise, the receiving end stores the current PCIe data packet to be sent in the receiving end buffer and returns to step S1.

2. The method according to claim 1, characterized in that The priority of each PCIe data packet to be sent is the same, and the PCIe data is sent in the order of the sequence of the PCIe data packets to be sent. The initial value of the number of transmissions corresponding to each PCIe data packet to be sent is set to 0.

3. The method according to claim 2, characterized in that The step S1 comprises: Step S11, obtaining a required credit value corresponding to the first PCIe data packet in the sequence of PCIe data packets to be sent; Step S12, determining whether the number of transmissions corresponding to the first PCIe data packet in the sequence of PCIe data packets to be transmitted is equal to a preset transmission threshold, if yes, jump to step S14, otherwise, execute step S13; Step S13, determining the first PCIe data packet in the sequence of PCIe data packets to be sent as the previous PCIe data packet to be sent, and executing step S2; Step S14: when the remaining space in the buffer of the receiving end is greater than or equal to the required credit value corresponding to the first PCIe data packet, the first PCIe data packet is sent to the buffer of the receiving end, and the first PCIe data packet is deleted from the sequence of PCIe data packets to be sent, and the process returns to step S11.

4. The method according to claim 1, characterized in that: Each PCIe data packet to be sent has a corresponding priority, the sequence of the PCIe data packets to be sent is dynamically adjusted according to the priority of the PCIe data packets, and the initial value of the number of transmissions corresponding to each PCIe data packet to be sent is set to 0.

5. The method according to claim 4, characterized in that The step S1 comprises: Step C11, obtaining a required credit value corresponding to the first PCIe data packet in the sequence of PCIe data packets to be sent; Step C12, determining whether the first PCIe data packet in the sequence of PCIe data packets to be sent is the last PCIe data packet to be sent, if so, executing step C15, otherwise, executing step C14; Step C13, determining whether the number of transmissions corresponding to the first PCIe data packet in the sequence of PCIe data packets to be transmitted is equal to a preset transmission threshold, if yes, jump to step C15, otherwise, execute step C14; Step C14, determining the first PCIe data packet in the sequence of PCIe data packets to be sent as the previous PCIe data packet to be sent, and executing step S2; Step C15: When the remaining space in the buffer of the receiving end is greater than or equal to the required credit value corresponding to the first PCIe data packet, the first PCIe data packet is sent to the buffer of the receiving end, and the first PCIe data packet is deleted from the sequence of PCIe data packets to be sent, and the process returns to step C11.

6. The method according to claim 3 or 5, characterized in that: The step S7 comprises: Step S71: If the current PCIe data packet to be sent is marked with an invalid flag, execute step S72; otherwise, execute step S73; Step S72, the receiving end discards the receiving end, and increases the number of transmissions corresponding to the current PCIe data packet to be sent by 1, and returns to step S1; Step S73: The receiving end stores the current PCIe data packet to be sent in the receiving end buffer, deletes the current PCIe data packet to be sent from the sequence of PCIe data packets to be sent, and returns to step S1.

7. The method according to claim 6, characterized in that In the step S72, the receiving end is discarded by using the Nullify mechanism in the PCIe protocol.

8. An electronic device, characterized in that: include: at least one processor; and, a memory communicatively coupled to the at least one processor; The memory stores instructions to be executed by the at least one processor, wherein the instructions are configured to execute the method according to any one of claims 1 to 7.

9. A computer-readable storage medium, characterized in that: Computer executable instructions are stored, and the computer executable instructions are used to execute the method of any one of the preceding claims 1-7.

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