Method and device for sending and receiving time division duplex configuration indication information, and terminal

Abstract

The invention discloses a method and a device for sending and receiving time division duplex configuration indication information, and a terminal. The sending method comprises: sending a first synchronization signal block (SSB), the first SSB comprising a physical broadcast channel (PBCH), the PBCH carrying time division duplex (TDD) configuration indication information, and the TDD configuration indication information comprising TDD configuration pattern number indication information, period value indication information and uplink time slot number indication information. According to the scheme provided by the invention, the TDD configuration indication information can be notified to the out-of-coverage terminal, so that the out-of-coverage terminal is prevented from severely interfering downlink data of the Uu port terminal.

Description

[0001] This invention application is a divisional application of an invention application with an application date of April 8, 2020, application number 202010267839.7, and invention name “Method, device and terminal for sending and receiving time division duplex configuration indication information”. Technical Field

[0002] The present invention relates to the field of communication technology, and in particular to a method, device and terminal for sending and receiving time division duplex configuration indication information. Background Art

[0003] In the V2X system, in order to avoid interference of V2X UE (User Equipment, user equipment or terminal) to Uu UE, V2X communication here is communication between UE and UE, and Uu communication is communication between base station and UE. V2X UE can only send or receive direct link data in the uplink carrier or uplink time slot, that is, all direct link communications will only occur in the uplink carrier or uplink time slot.

[0004] like Figure 1 As shown in the figure, the time slot format information notification process of the terminals inside and outside the coverage, in the V2X system, the UEs that perform direct link communication include UEs located within the coverage of the base station and UEs located outside the coverage of the base station. The UEs within the coverage of the base station can receive the time slot format information sent by the base station, so as to know the location of the uplink time slot. However, for the UE outside the coverage, it is impossible to know the location of the uplink time slot. How to send the time slot format information of the Uu port to the UE outside the coverage has become an important problem that NR V2X needs to solve. Summary of the invention

[0005] The embodiment of the present invention provides a method, device and terminal for sending and receiving time division duplex configuration indication information, which can notify the out-of-coverage terminal of the TDD configuration indication information, thereby preventing the out-of-coverage terminal from causing serious interference to the downlink data of the Uu port terminal.

[0006] To solve the above technical problems, the embodiments of the present invention provide the following technical solutions:

[0007] A method for sending time division duplex configuration indication information, applied to a terminal, the method comprising:

[0008] A first synchronization signal block SSB is sent, wherein the first SSB includes a physical broadcast channel PBCH, and the PBCH carries time division duplex TDD configuration indication information, wherein the TDD configuration indication information includes: TDD configuration pattern quantity indication information, period value indication information and uplink time slot quantity indication information.

[0009] Optionally, the TDD configuration pattern quantity indication information is represented by 1 bit.

[0010] Optionally, the TDD configuration pattern quantity indication information indicates that the current system is configured with one TDD configuration pattern, or indicates that the current system is configured with two TDD configuration patterns.

[0011] Optionally, the period value indication information indicates the period value of the TDD configuration pattern; when the period value indication information is represented by M bits, it is used to indicate M-power period values ​​of 2 or period value combination states, where M≥1.

[0012] Optionally, if a TDD configuration pattern is configured, a coding point of the period value indication information indicates a period value of the TDD configuration pattern;

[0013] If two TDD configuration patterns are configured, the two TDD configuration patterns include a first TDD configuration pattern and a second TDD configuration pattern, a coding point of the period value indication information indicates a combination state including a period value of the first TDD configuration pattern and a period value of the second TDD configuration pattern.

[0014] Optionally, the uplink time slot quantity indication information indicates the number of uplink time slots in one period of the TDD configuration pattern, and the uplink time slot quantity indication information is represented by N bits, where N≥1.

[0015] Optionally, if a TDD configuration pattern is configured, a coding point of the uplink time slot quantity indication information indicates a type of uplink time slot quantity information of the TDD configuration pattern;

[0016] If two TDD configuration patterns are configured, the two TDD configuration patterns include a first TDD configuration pattern and a second TDD configuration pattern, a coding point of the uplink time slot quantity indication information indicates an uplink time slot quantity information of the first TDD configuration pattern and an uplink time slot quantity information of the second TDD configuration pattern.

[0017] Optionally, when two TDD configuration patterns are configured, N1 represents the number of bits in the uplink time slot indication information used to indicate the uplink time slot quantity information of the first TDD configuration pattern, and N2 represents the number of bits in the uplink time slot indication information used to indicate the uplink time slot quantity information of the second TDD configuration pattern, and N=N1+N2.

[0018] Optionally, when the coding points corresponding to N1 and / or N2 cannot represent all possible states of the uplink time slot quantity information, the coding points corresponding to N1 and / or N2 indicate a subset of the set of all possible states of the uplink time slot quantity information of the TDD configuration pattern.

[0019] Optionally, the uplink time slot quantity information indicated by all the coding points corresponding to N1 is a set consisting of discontinuous natural numbers; the uplink time slot quantity information indicated by all the coding points corresponding to N2 is a set consisting of discontinuous natural numbers.

[0020] Optionally, when the coding point corresponding to N1 and / or N2 cannot indicate all possible states of the uplink time slot quantity information, N1 and / or N2 includes a coding point indicating that all time slots within a period of the TDD configuration pattern are uplink time slots.

[0021] Optionally, the TDD configuration pattern refers to a time slot combination configuration pattern including at least one time slot such as a downlink time slot, a flexible time slot, a mixed time slot and an uplink time slot within one cycle of the TDD itself.

[0022] Optionally, the downlink time slot means that all symbols in the entire time slot are downlink symbols; the flexible time slot means that all symbols in the entire time slot are flexible symbols; the uplink time slot means that all symbols in the entire time slot are uplink symbols; the mixed time slot means a time slot including at least two types of symbols including downlink symbols, uplink symbols and flexible symbols; the flexible symbol is a symbol that is not currently configured for uplink or downlink transmission.

[0023] Optionally, the SSB is a direct link synchronization broadcast channel block S-SSB, and the PBCH is a physical direct link broadcast channel PSBCH.

[0024] An embodiment of the present invention further provides a method for receiving time division duplex configuration indication information, which is applied to a terminal, and the method includes:

[0025] A first synchronization signal block SSB is received, wherein the first SSB includes a physical broadcast channel PBCH, and the PBCH carries time division duplex TDD configuration indication information, wherein the TDD configuration indication information includes: TDD configuration pattern quantity indication information, period value indication information, and uplink time slot quantity indication information.

[0026] Optionally, the TDD configuration pattern quantity indication information is represented by 1 bit.

[0027] Optionally, the TDD configuration pattern quantity indication information indicates that the current system is configured with one TDD configuration pattern, or indicates that the current system is configured with two TDD configuration patterns.

[0028] Optionally, the period value indication information indicates the period value of the TDD configuration pattern; when the period value indication information is represented by M bits, it is used to indicate M-power period values ​​of 2 or period value combination states, where M≥1.

[0029] Optionally, if a TDD configuration pattern is configured, a coding point of the period value indication information indicates a period value of the TDD configuration pattern;

[0030] If two TDD configuration patterns are configured, the two TDD configuration patterns include a first TDD configuration pattern and a second TDD configuration pattern, a coding point of the period value indication information indicates a combination state including a period value of the first TDD configuration pattern and a period value of the second TDD configuration pattern.

[0031] Optionally, the uplink time slot quantity indication information indicates the number of uplink time slots in one period of the TDD configuration pattern, and the uplink time slot quantity indication information is represented by N bits, where N≥1.

[0032] Optionally, if a TDD configuration pattern is configured, a coding point of the uplink time slot quantity indication information indicates a type of uplink time slot quantity information of the TDD configuration pattern;

[0033] If two TDD configuration patterns are configured, the two TDD configuration patterns include a first TDD configuration pattern and a second TDD configuration pattern, a coding point of the uplink time slot quantity indication information indicates an uplink time slot quantity information of the first TDD configuration pattern and an uplink time slot quantity information of the second TDD configuration pattern.

[0034] Optionally, when two TDD configuration patterns are configured, N1 represents the number of bits in the uplink time slot indication information used to indicate the uplink time slot quantity information of the first TDD configuration pattern, and N2 represents the number of bits in the uplink time slot indication information used to indicate the uplink time slot quantity information of the second TDD configuration pattern, and N=N1+N2.

[0035] Optionally, when the coding points corresponding to N1 and / or N2 cannot represent all possible states of the uplink time slot quantity information, the coding points corresponding to N1 and / or N2 indicate a subset of all possible state sets of the uplink time slot quantity information of the TDD configuration pattern.

[0036] Optionally, the uplink time slot quantity information indicated by all the coding points corresponding to N1 is a set consisting of discontinuous natural numbers; the uplink time slot quantity information indicated by all the coding points corresponding to N2 is a set consisting of discontinuous natural numbers.

[0037] Optionally, when the coding point corresponding to N1 and / or N2 cannot indicate all possible states of the uplink time slot quantity information, N1 and / or N2 includes a coding point indicating that all time slots within a period of the TDD configuration pattern are uplink time slots.

[0038] Optionally, the TDD configuration pattern refers to a time slot combination configuration pattern including at least one time slot such as a downlink time slot, a flexible time slot, a mixed time slot and an uplink time slot within one cycle of the TDD itself.

[0039] Optionally, the downlink time slot means that all symbols in the entire time slot are downlink symbols; the flexible time slot means that all symbols in the entire time slot are flexible symbols; the uplink time slot means that all symbols in the entire time slot are uplink symbols; the mixed time slot means a time slot including at least two types of symbols including downlink symbols, uplink symbols and flexible symbols; the flexible symbol is a symbol that is not currently configured for uplink or downlink transmission.

[0040] Optionally, the SSB is a direct link synchronization broadcast channel block S-SSB, and the PBCH is a physical direct link broadcast channel PSBCH.

[0041] An embodiment of the present invention further provides a device for sending time division duplex configuration indication information, which is applied to a terminal, and the device includes:

[0042] The transceiver module is used to send a first synchronization signal block SSB, wherein the first SSB includes a physical broadcast channel PBCH, and the PBCH carries time division duplex TDD configuration indication information, wherein the TDD configuration indication information includes: TDD configuration pattern quantity indication information, period value indication information and uplink time slot quantity indication information.

[0043] Optionally, the TDD configuration pattern quantity indication information indicates that the current system is configured with one TDD configuration pattern, or indicates that the current system is configured with two TDD configuration patterns.

[0044] Optionally, the period value indication information indicates the period value of the TDD configuration pattern; when the period value indication information is represented by M bits, it is used to indicate M-power period values ​​of 2 or period value combination states, where M≥1.

[0045] Optionally, the uplink time slot quantity indication information indicates the number of uplink time slots in one period of the TDD configuration pattern, and the uplink time slot quantity indication information is represented by N bits, where N≥1.

[0046] An embodiment of the present invention also provides a terminal, comprising: a transceiver, a processor, and a memory, wherein the memory stores a program executable by the processor; when the processor executes the program, it implements: sending a first synchronization signal block SSB, the first SSB includes a physical broadcast channel PBCH, the PBCH carries time division duplex TDD configuration indication information, and the TDD configuration indication information includes: TDD configuration pattern quantity indication information, period value indication information and uplink time slot quantity indication information.

[0047] Optionally, the TDD configuration pattern quantity indication information indicates that the current system is configured with one TDD configuration pattern, or indicates that the current system is configured with two TDD configuration patterns.

[0048] Optionally, the period value indication information indicates the period value of the TDD configuration pattern; when the period value indication information is represented by M bits, it is used to indicate M-power period values ​​of 2 or period value combination states, where M≥1.

[0049] Optionally, the uplink time slot quantity indication information indicates the number of uplink time slots in one period of the TDD configuration pattern, and the uplink time slot quantity indication information is represented by N bits, where N≥1.

[0050] An embodiment of the present invention further provides a device for receiving time division duplex configuration indication information, which is applied to a terminal, and the device includes:

[0051] The transceiver module is used to receive a first synchronization signal block SSB, wherein the first SSB includes a physical broadcast channel PBCH, and the PBCH carries time division duplex TDD configuration indication information, wherein the TDD configuration indication information includes: TDD configuration pattern quantity indication information, period value indication information and uplink time slot quantity indication information.

[0052] Optionally, the TDD configuration pattern quantity indication information indicates that the current system is configured with one TDD configuration pattern, or indicates that the current system is configured with two TDD configuration patterns.

[0053] Optionally, the period value indication information indicates the period value of the TDD configuration pattern; when the period value indication information is represented by M bits, it is used to indicate M-power period values ​​of 2 or period value combination states, where M≥1.

[0054] Optionally, the uplink time slot quantity indication information indicates the number of uplink time slots in one period of the TDD configuration pattern, and the uplink time slot quantity indication information is represented by N bits, where N≥1.

[0055] An embodiment of the present invention also provides a terminal, comprising: a transceiver, a processor, and a memory, wherein the memory stores a program executable by the processor; when the processor executes the program, it implements: receiving a first synchronization signal block SSB, the first SSB includes a physical broadcast channel PBCH, the PBCH carries time division duplex TDD configuration indication information, and the TDD configuration indication information includes: TDD configuration pattern quantity indication information, period value indication information and uplink time slot quantity indication information.

[0056] Optionally, the TDD configuration pattern quantity indication information indicates that the current system is configured with one TDD configuration pattern, or indicates that the current system is configured with two TDD configuration patterns.

[0057] Optionally, the period value indication information indicates the period value of the TDD configuration pattern; when the period value indication information is represented by M bits, it is used to indicate M-power period values ​​of 2 or period value combination states, where M≥1.

[0058] Optionally, the uplink time slot quantity indication information indicates the number of uplink time slots in one period of the TDD configuration pattern, and the uplink time slot quantity indication information is represented by N bits, where N≥1.

[0059] An embodiment of the present invention further provides a processor-readable storage medium, wherein the processor-readable storage medium stores processor-executable instructions, and the processor-executable instructions are used to enable the processor to execute the method as described above.

[0060] The beneficial effects of the embodiments of the present invention are:

[0061] In the above-mentioned embodiment of the present invention, by sending a first synchronization signal block SSB, the first SSB includes a physical broadcast channel PBCH, the PBCH carries time division duplex TDD configuration indication information, and the TDD configuration indication information includes: TDD configuration pattern quantity indication information, period value indication information and uplink time slot quantity indication information, and supports the sending of TDD configuration indication information of dual TDD configuration patterns, which can indicate up to two TDD configuration patterns and their related period value and uplink time slot quantity information, and avoid large signaling overhead, thereby making the PSBCH load use more efficient and increasing the amount of information that can be carried by the PSBCH under limited load capacity. Using this solution, the TDD configuration indication information can be notified to the out-of-coverage terminal, avoiding the out-of-coverage terminal from causing serious interference to the downlink data of the Uu port terminal. BRIEF DESCRIPTION OF THE DRAWINGS

[0062] Figure 1 A schematic diagram of synchronization between a base station and a terminal and between terminals;

[0063] Figure 2 A schematic flow chart of a method for sending time division duplex configuration indication information according to an embodiment of the present invention;

[0064] Figure 3 is a schematic diagram of configuring a TDD configuration pattern (first TDD configuration pattern) (SCS=30KHz);

[0065] Figure 4 A schematic diagram of two TDD configuration patterns (a first TDD configuration pattern and a second TDD configuration pattern) configured for an embodiment of the present invention (SCS=30KHz);

[0066] Figure 5 A schematic flow chart of a method for receiving time division duplex configuration indication information according to an embodiment of the present invention;

[0067] Figure 6 A module block diagram of a device for sending time division duplex configuration indication information according to an embodiment of the present invention;

[0068] Figure 7 This is a schematic diagram of the architecture of a terminal on the sending side according to an embodiment of the present invention;

[0069] Figure 8 A schematic diagram of a module of a device for receiving time division duplex configuration indication information according to an embodiment of the present invention;

[0070] Fig. 9 It is a schematic diagram of the architecture of a terminal on the receiving side according to an embodiment of the present invention. DETAILED DESCRIPTION

[0071] The exemplary embodiments of the present invention will be described in more detail below with reference to the accompanying drawings. Although the exemplary embodiments of the present invention are shown in the accompanying drawings, it should be understood that the present invention can be implemented in various forms and should not be limited by the embodiments set forth herein. On the contrary, these embodiments are provided in order to enable a more thorough understanding of the present invention and to enable the scope of the present invention to be fully communicated to those skilled in the art.

[0072] like Figure 2 As shown, an embodiment of the present invention provides a method for sending time division duplex configuration indication information, which is applied to a terminal, and the method includes:

[0073] Step 21, sending a first synchronization signal block SSB, wherein the first SSB includes a physical broadcast channel PBCH, and the PBCH carries time division duplex TDD configuration indication information, and the TDD configuration indication information includes: TDD configuration pattern quantity indication information, period value indication information, and uplink time slot quantity indication information. The SSB here can be a direct link synchronization broadcast channel block S-SSB, and the PBCH can be a physical direct link broadcast channel PSBCH. The TDD configuration pattern refers to a time slot combination configuration pattern including at least one time slot such as a downlink time slot, a flexible time slot, a mixed time slot and an uplink time slot within one cycle of itself. The downlink time slot means that all symbols in the entire time slot are downlink symbols; the flexible time slot means that all symbols in the entire time slot are flexible symbols; the uplink time slot means that all symbols in the entire time slot are uplink symbols; the mixed time slot means that the time slot includes at least two symbols of downlink symbols, uplink symbols and flexible symbols; the flexible symbol is a symbol that is not currently configured for uplink or downlink transmission.

[0074] The TDD configuration pattern quantity indication information here may indicate at most two TDD configuration patterns.

[0075] Optionally, the TDD configuration pattern quantity indication information indicates that the current system is configured with one TDD configuration pattern, or indicates that the current system is configured with two TDD configuration patterns.

[0076] Optionally, the TDD configuration pattern quantity indication information is represented by 1 bit. Figure 3 As shown, when the 1-bit TDD configuration pattern quantity indication information is set to 0, it means that the current system is configured with one TDD configuration pattern;

[0077] like Figure 4 As shown, when the 1-bit TDD configuration pattern quantity indication information is set to 1, it means that the current system is configured with two TDD configuration patterns, and the two TDD configuration patterns are cascaded together in a continuous manner in the time domain, that is, the system first sends data according to the first TDD configuration pattern in subframe k, and sends data according to the second TDD configuration pattern in the next subframe k+1 of subframe k.

[0078] Figure 3 and Figure 4 The schematic diagrams of TDD configuration patterns when one TDD configuration pattern and two TDD configuration patterns are configured are shown respectively (subcarrier spacing SCS = 30KHz). In the figure, a small square represents a time slot, D represents a downlink time slot, F represents a flexible time slot, and U represents an uplink time slot. The number above the small square represents the time slot number of the current time slot in the TDD configuration pattern.

[0079] This embodiment adopts the method of indicating the number of TDD configuration patterns, and the terminal can indicate whether the current TDD configuration of the Uu port adopts one TDD configuration pattern or two TDD configuration patterns, with flexible configuration and accurate indication.

[0080] In an optional embodiment of the present invention, the period value indication information indicates the period value of the TDD configuration pattern; when the period value indication information is represented by M bits, it is used to indicate M-power period values ​​of 2 or period value combination states, where M≥1.

[0081] Here, if a TDD configuration pattern is configured, a code point of the period value indication information indicates a period value of the TDD configuration pattern. In the embodiment of the present invention, a code point refers to a coding state of a field used to indicate certain indication information.

[0082] If two TDD configuration patterns are configured, the two TDD configuration patterns include a first TDD configuration pattern and a second TDD configuration pattern, a coding point of the period value indication information indicates a combination state including a period value of the first TDD configuration pattern and a period value of the second TDD configuration pattern.

[0083] In this embodiment, the cycle value indication information indicates the cycle value of the TDD configuration pattern. The cycle value indication information is represented by at least 1 bit. In particular, the cycle value indication information is represented by 4 bits, so that the indication information can indicate a maximum of 16 cycle values ​​or cycle value combination states.

[0084] For different SCSs, candidate period values ​​are different, but in order to simplify the design, the period value indication information indicates the full set of all possible period values.

[0085] If a TDD configuration pattern is configured, then a code point of the period value indication information indicates a period value of the TDD configuration pattern. As shown in Table 1, when a TDD configuration pattern is configured, there are at most 10 possible period values, so only 10 code points are needed, and the other 6 code points are reserved. For example, when the code point is 9, it means that the period of the first TDD configuration pattern is 10ms, which is also Figure 3 The situation shown in .

[0086] Table 1: List of period values ​​when a TDD configuration pattern is configured

[0087]

[0088]

[0089] If two TDD configuration patterns (ie, a first TDD configuration pattern and a second TDD configuration pattern) are configured, a coding point of the period value indication information indicates a combination state including a period value of the first TDD configuration pattern and a period value of the second TDD configuration pattern.

[0090] As shown in Table 2, when two TDD configuration patterns are configured, there are at most 16 possible period values, so only 16 code points are needed. For example, when the code point is 15, it means that the period of the first TDD configuration pattern and the second TDD configuration pattern is 10ms, which is also Figure 4 The situation shown in .

[0091] Table 2: List of period values ​​when two TDD configuration patterns are configured

[0092]

[0093]

[0094] This embodiment adopts this method of indicating the period value. The terminal can use the same period value indication information to indicate different period value lists in different situations, that is, when one TDD configuration pattern is configured, 10 possible period values ​​are indicated, and when two TDD configuration patterns are configured, 16 possible period values ​​are indicated. The indication is flexible and accurate.

[0095] In an optional embodiment of the present invention, the uplink time slot quantity indication information indicates the number of uplink time slots within one period of the TDD configuration pattern, the uplink time slot quantity indication information is represented by at least 1 bit, and the uplink time slot quantity indication information is represented by N bits, N≥1.

[0096] Here, if a TDD configuration pattern is configured, a coding point of the uplink time slot quantity indication information indicates a type of uplink time slot quantity information of the TDD configuration pattern.

[0097] If two TDD configuration patterns are configured, the two TDD configuration patterns include a first TDD configuration pattern and a second TDD configuration pattern, a coding point of the uplink time slot quantity indication information indicates an uplink time slot quantity information of the first TDD configuration pattern and an uplink time slot quantity information of the second TDD configuration pattern.

[0098] Optionally, when two TDD configuration patterns are configured, N1 represents the number of bits in the uplink time slot indication information used to indicate the uplink time slot quantity information of the first TDD configuration pattern, and N2 represents the number of bits in the uplink time slot indication information used to indicate the uplink time slot quantity information of the second TDD configuration pattern, and N=N1+N2.

[0099] When the code points corresponding to N1 and / or N2 cannot represent all possible states of the uplink time slot quantity information, the code points corresponding to N1 and / or N2 indicate a subset of all possible state sets of the uplink time slot quantity information of the TDD configuration pattern.

[0100] The uplink time slot quantity information indicated by all the code points corresponding to N1 is a set consisting of discontinuous natural numbers; the uplink time slot quantity information indicated by all the code points corresponding to N2 is a set consisting of discontinuous natural numbers.

[0101] Here, when the coding points corresponding to N1 and / or N2 cannot indicate all possible states of the uplink time slot quantity information, N1 and / or N2 include a coding point indicating that all time slots within a period of the TDD configuration pattern are uplink time slots.

[0102] In this embodiment, the uplink time slot quantity indication information indicates the quantity of uplink time slots in the TDD configuration pattern within a period. The uplink time slot quantity indication information is represented by at least 1 bit.

[0103] If a TDD configuration pattern is configured, then a codepoint of the uplink time slot quantity indication information indicates a type of uplink time slot quantity information of the TDD configuration pattern.

[0104] If two TDD configuration patterns (i.e., the first TDD configuration pattern and the second TDD configuration pattern) are configured, the uplink time slot quantity indication information indicates one type of uplink time slot quantity information of the first TDD configuration pattern and one type of uplink time slot quantity information of the second TDD configuration pattern respectively. N represents the number of occupied bits of the uplink time slot indication information, N1 represents the number of bits used in the uplink time slot indication information to indicate the uplink time slot quantity information of the first TDD configuration pattern, and N2 represents the number of bits used in the uplink time slot indication information to indicate the uplink time slot quantity information of the second TDD configuration pattern, then N=N1+N2, and N1 may not be equal to N2.

[0105] In particular, the uplink time slot quantity indication information is represented by 10 bits, and when one TDD configuration pattern (ie, the first TDD configuration pattern) is configured, the indication information may indicate the uplink time slot quantity information of the first TDD configuration pattern. When two TDD configuration patterns (ie, the first TDD configuration pattern and the second TDD configuration pattern) are configured, the indication information uses 5 bits to indicate the uplink time slot quantity information of the first TDD configuration pattern, and uses 5 bits to indicate the uplink time slot quantity information of the second TDD configuration pattern.

[0106] If two TDD configuration patterns are configured (i.e., the first TDD configuration pattern and the second TDD configuration pattern), when the coding points corresponding to N1 and / or N2 cannot represent all possible states of the uplink time slot quantity information, the coding points corresponding to N1 and / or N2 indicate a subset of the set of all possible states of the uplink time slot quantity information of the TDD configuration pattern.

[0107] Particularly, N1 and / or N2 respectively indicate the uplink time slot quantity information of the first TDD configuration pattern and the second TDD configuration pattern in an interval indication manner, that is, the uplink time slot quantity information indicated by the coding points of N1 and / or N2 is a discontinuous natural number.

[0108] If two TDD configuration patterns are configured (i.e., the first TDD configuration pattern and the second TDD configuration pattern), when N1 and / or N2 cannot indicate all possible states of the uplink time slot quantity information, N1 and / or N2 include a coding point indicating that all time slots in a subframe are uplink time slots.

[0109] In the case of different subcarrier spacing SCS configurations, the number of time slots included in a maximum cycle value of 10ms is different. Since each time slot may be an uplink time slot, a different number of bits is required to represent the uplink time slot quantity information; the number of bits required for the uplink time slot quantity information is shown in Table 3 below: For example, when SCS is configured to 120KHz, when the cycle value is configured to 10ms, the number of time slots included in one cycle is 80 time slots, then the number of uplink time slots may be 0 to 80, a total of 81 possibilities, and 7 bits (27=128) are required to represent any one of the 81 possibilities.

[0110] Table 3: Number of bits required for uplink timeslot number information

[0111]

[0112] According to the normal design, the uplink time slot quantity indication information should be able to cover all situations, so it is necessary to design for the situation that requires the most bits. The situation that requires the most bits is when two TDD configuration patterns are configured under SCS=120KHz. In this case, each TDD configuration pattern requires 7 bits to indicate. Considering that two TDD configuration patterns may be configured, 7+7=14 bits are required to indicate the uplink time slot quantity information of the two TDD configuration patterns.

[0113] The above scheme can traverse all possible situations of the number of uplink time slots, but if indicated in this way, the signaling overhead of the PSBCH load will be relatively high. Therefore, in order to reduce the overhead, another scheme is not to traverse all possible situations of the uplink time slots, but if two TDD configuration patterns (i.e., the first TDD configuration pattern and the second TDD configuration pattern) are configured, when the coding points corresponding to N1 and / or N2 cannot represent all possible states of the uplink time slot number information, the coding points corresponding to N1 and / or N2 indicate a subset of all possible state sets of the uplink time slot number information of the TDD configuration pattern. In this way, the introduction of higher signaling overhead can be avoided.

[0114] For example: N1=N2=5, the first TDD configuration pattern and the second TDD configuration pattern each use 5 bits to indicate 32 possible states of the uplink time slot quantity information, and use interval indication to indicate the uplink time slot quantity information of the first TDD configuration pattern and the second TDD configuration pattern respectively, that is: the uplink time slot quantity information indicated by all the code points corresponding to N1 is a set of discontinuous natural numbers; the uplink time slot quantity information indicated by all the code points corresponding to N2 is a set of discontinuous natural numbers; as shown in Table 4. It can be seen from Table 4 that when the code point of N1 or N2 is 0, the indicated uplink time slot quantity is 0, and when the code point of N1 or N2 is 1, the indicated uplink time slot quantity is 2, so the indicated uplink time slot quantity is discontinuous, and the other code points are similar. The advantage of adopting this design is that fewer N1 or N2 bits can be used to indicate the uplink time slot quantity information, reducing information overhead.

[0115] When only one TDD configuration pattern is configured, 10 bits are sufficient to indicate the number of all uplink time slots, and the indicated number of uplink time slots can be guaranteed to be continuous. In addition, when two TDD configuration patterns are configured, and SCS = 15KHz and 30KHz, 10 bits can also be used to indicate the number of all uplink time slots, and the indicated number of uplink time slots can also be guaranteed to be continuous.

[0116] In addition, it should be pointed out that although in Table 4, when the code points of N1 and N2 are the same, the numbers of uplink time slots they indicate are also the same, in actual design, they may also indicate different numbers of uplink time slots.

[0117] If two TDD configuration patterns are configured (i.e., the first TDD configuration pattern and the second TDD configuration pattern), when N1 and / or N2 cannot indicate all possible states of the uplink time slot quantity information, N1 and / or N2 include a coding point indicating a state in which all time slots in a subframe are uplink time slots, that is, coding point = 31 is used in Table 4 to indicate the state in which the uplink time slot quantity = 80.

[0118] Table 4: Schematic table of interval indication of uplink time slot quantity information (SCS=120KHz, two TDD configuration patterns)

[0119]

[0120]

[0121] This embodiment adopts this interval indication method of the number of uplink time slots, and the terminal can indicate different uplink time slot number information in different situations with a smaller signaling overhead, that is: when one TDD configuration pattern is configured, up to 81 possible numbers of uplink time slots are indicated, and when two TDD configuration patterns are configured, each TDD configuration pattern can indicate 32 possible numbers of uplink time slots, and the indication is flexible and accurate.

[0122] In one implementation, the uplink timeslot quantity indication information occupies 8 bits:

[0123] According to the above scheme description, when 1 bit in the PSBCH payload is used to represent the TDD configuration pattern quantity indication information, 4 bits represent the period value indication information, and 8 bits represent the uplink time slot quantity indication information (4 bits of the 8 bits represent the uplink time slot quantity information of the first TDD configuration pattern, and the other 4 bits represent the uplink time slot quantity information of the second TDD configuration pattern), the three candidate schemes for the bits occupied by the PSBCH payload are shown in Tables 5 to 7.

[0124] Table 5 shows the situation where the PSBCH payload includes the upper 3 bits of the S-SSB index number and the synchronization resource indication information (the lower 3 bits of the S-SSB index number are carried by the PSBCH DMRS).

[0125] Table 6 shows the case where the PSBCH payload includes the upper 4 bits of the time slot number (the lower 3 bits of the time slot number are carried by the PSBCH DMRS).

[0126] Table 7 shows the case where the PSBCH payload contains all 7 bits of the time slot number. Note: In addition to the content in the following table, the direct link physical broadcast channel payload may also contain other information.

[0127] Table 5: Schematic diagram of bits occupied by PSBCH payload (TDD configuration information is 13 bits & includes S-SSB index number)

[0128]

[0129]

[0130] Table 6: Schematic diagram of bits occupied by PSBCH payload (TDD configuration information is 13 bits & includes some time slot numbers)

[0131]

[0132] Table 7: Schematic diagram of bits occupied by PSBCH payload (TDD configuration information is 13 bits & includes all time slot numbers)

[0133]

[0134]

[0135] This embodiment adopts this PSBCH payload scheme, which can accommodate all necessary information within a 56-bit PSBCH payload size. The TDD configuration indication information can also indicate two TDD configuration patterns, and the overhead is relatively small.

[0136] In one implementation, the uplink timeslot quantity indication information occupies 10 bits:

[0137] According to the above scheme description, when 1 bit in the PSBCH payload is used to represent the TDD configuration pattern quantity indication information, 4 bits represent the period value indication information, and 10 bits represent the uplink time slot quantity indication information (5 bits of the 10 bits represent the uplink time slot quantity information of the first TDD configuration pattern, and the other 5 bits represent the uplink time slot quantity information of the second TDD configuration pattern), the three candidate schemes for the bits occupied by the PSBCH payload are shown in Tables 8 to 10.

[0138] Table 8 shows the situation where the PSBCH payload includes the upper 3 bits of the S-SSB index number and the synchronization resource indication information (the lower 3 bits of the S-SSB index number are carried by the PSBCH DMRS).

[0139] Table 9 shows the case where the PSBCH payload includes the upper 4 bits of the time slot number (the lower 3 bits of the time slot number are carried by the PSBCH DMRS).

[0140] Table 10 shows the case where the PSBCH payload contains all 7 bits of the time slot number. Note: In addition to the content in the following table, the direct link physical broadcast channel payload may also contain other information.

[0141] Table 8: Schematic diagram of bits occupied by PSBCH payload (TDD configuration information is 15 bits & includes S-SSB index number)

[0142]

[0143]

[0144] Table 9: Schematic diagram of bits occupied by PSBCH payload (TDD configuration information is 15 bits & includes part of the time slot number)

[0145]

[0146] Table 10: Schematic diagram of bits occupied by PSBCH payload (TDD configuration information is 15 bits & includes all time slot numbers)

[0147]

[0148] This embodiment adopts this PSBCH load scheme, and can contain all necessary information in the PSBCH load size of 56 bits or 58 bits. The TDD configuration indication information can also indicate the situation of two TDD configuration patterns, and the overhead is small. In addition, the number of uplink time slots of each TDD configuration pattern can be represented by 5 bits, with a small granularity, and the uplink time slots that cannot be used by the direct link are small.

[0149] In one implementation, the uplink timeslot quantity indication information occupies 12 bits:

[0150] According to the above scheme description, when 1 bit in the PSBCH payload is used to represent the TDD configuration pattern quantity indication information, 4 bits represent the period value indication information, and 12 bits represent the uplink time slot quantity indication information (6 bits of the 12 bits represent the uplink time slot quantity information of the first TDD configuration pattern, and the other 6 bits represent the uplink time slot quantity information of the second TDD configuration pattern), the three candidate schemes for the bits occupied by the PSBCH payload are shown in Tables 11 to 13.

[0151] Table 11 shows the situation where the PSBCH payload includes the upper 3 bits of the S-SSB index number and the synchronization resource indication information (the lower 3 bits of the S-SSB index number are carried by the PSBCH DMRS).

[0152] Table 12 shows the case where the PSBCH payload includes the upper 4 bits of the time slot number (the lower 3 bits of the time slot number are carried by the PSBCH DMRS).

[0153] Table 13 shows the case where all 7 bits of the time slot number are included in the PSBCH payload.

[0154] Note: In addition to the information in the table below, the through link physical broadcast channel payload may also contain other information.

[0155] Table 11: Schematic table of bits occupied by PSBCH payload (TDD configuration information is 17 bits & includes S-SSB index number)

[0156]

[0157] Table 12: Schematic diagram of bits occupied by PSBCH payload (TDD configuration information is 17 bits & includes part of the time slot number)

[0158]

[0159]

[0160] Table 13: Schematic diagram of bits occupied by PSBCH payload (TDD configuration information is 17 bits & includes all time slot numbers)

[0161]

[0162] This embodiment adopts this PSBCH load scheme to indicate the status of two TDD configuration patterns. The number of uplink time slots of each TDD configuration pattern can be represented by 6 bits, with very small granularity. The uplink time slots that cannot be used by the direct link are very few, and the resource utilization rate is high.

[0163] In one implementation, the uplink timeslot quantity indication information occupies 14 bits:

[0164] According to the above scheme description, when 1 bit in the PSBCH payload is used to represent the TDD configuration pattern quantity indication information, 4 bits represent the period value indication information, and 14 bits represent the uplink time slot quantity indication information (7 bits of the 14 bits represent the uplink time slot quantity information of the first TDD configuration pattern, and the other 7 bits represent the uplink time slot quantity information of the second TDD configuration pattern), the three candidate schemes for the bits occupied by the PSBCH payload are shown in Tables 14 to 16.

[0165] Table 14 shows the situation where the PSBCH payload includes the upper 3 bits of the S-SSB index number and the synchronization resource indication information (the lower 3 bits of the S-SSB index number are carried by the PSBCH DMRS).

[0166] Table 15 shows the case where the PSBCH payload includes the upper 4 bits of the time slot number (the lower 3 bits of the time slot number are carried by the PSBCH DMRS).

[0167] Table 16 shows the case where all 7 bits of the timeslot number are included in the PSBCH payload. Note: In addition to the content in the following table, the direct link physical broadcast channel payload may also contain other information.

[0168] Table 14: Schematic diagram of bits occupied by PSBCH payload (TDD configuration information is 19 bits & includes S-SSB index number)

[0169]

[0170]

[0171] Table 15: Schematic diagram of bits occupied by PSBCH payload (TDD configuration information is 19 bits & includes part of the time slot number)

[0172]

[0173] Table 16: Schematic diagram of bits occupied by PSBCH payload (TDD configuration information is 19 bits & includes all time slot numbers)

[0174]

[0175]

[0176] Table 17: Schematic diagram of bits occupied by PSBCH payload (TDD configuration information is 19 bits & includes all time slot numbers)

[0177]

[0178] This embodiment adopts this PSBCH load scheme, which can indicate the status of two TDD configuration patterns. The number of uplink time slots of each TDD configuration pattern can be represented by 7 bits, and the granularity is minimized. It can indicate the number of all uplink time slots. All uplink time slots can be used by direct links, and resource utilization is maximized.

[0179] The above-mentioned embodiment of the present invention is applied in a direct communication link, which can indicate up to two TDD configuration patterns and their related period values ​​and uplink time slot number information, and avoid large signaling overhead, thereby making the PSBCH load more efficient, and increasing the amount of information that can be carried by the PSBCH under limited load capacity. Using this solution, the TDD configuration indication information can be notified to the out-of-coverage terminal, avoiding the out-of-coverage terminal from causing serious interference to the downlink data of the Uu port terminal.

[0180] like Figure 5 As shown, an embodiment of the present invention provides a method for receiving time division duplex configuration indication information, which is applied to a terminal, and the method includes:

[0181] Step 51, receiving a first synchronization signal block SSB, wherein the first SSB includes a physical broadcast channel PBCH, wherein the PBCH carries time division duplex TDD configuration indication information, wherein the TDD configuration indication information includes: TDD configuration pattern quantity indication information, period value indication information, and uplink time slot quantity indication information. The TDD configuration pattern refers to a time slot combination configuration pattern including at least one time slot such as a downlink time slot, a flexible time slot, a mixed time slot, and an uplink time slot within one cycle of itself. The downlink time slot means that all symbols in the entire time slot are downlink symbols; the flexible time slot means that all symbols in the entire time slot are flexible symbols; the uplink time slot means that all symbols in the entire time slot are uplink symbols; the mixed time slot means that the time slot includes at least two symbols among downlink symbols, uplink symbols and flexible symbols; the flexible symbol is a symbol that is not currently configured for uplink or downlink transmission.

[0182] Optionally, the TDD configuration pattern quantity indication information is represented by 1 bit.

[0183] Optionally, the TDD configuration pattern quantity indication information may indicate at most two TDD configuration patterns.

[0184] Optionally, the TDD configuration pattern quantity indication information indicates that the current system is configured with one TDD configuration pattern, or indicates that the current system is configured with two TDD configuration patterns.

[0185] Optionally, the period value indication information indicates the period value of the TDD configuration pattern; when the period value indication information is represented by M bits, it is used to indicate M-power period values ​​of 2 or period value combination states, where M≥1.

[0186] Optionally, M=4.

[0187] Optionally, if a TDD configuration pattern is configured, a coding point of the period value indication information indicates a period value of the TDD configuration pattern.

[0188] Optionally, if two TDD configuration patterns are configured, the two TDD configuration patterns include a first TDD configuration pattern and a second TDD configuration pattern, and a coding point of the period value indication information indicates a combination state including a period value of the first TDD configuration pattern and a period value of the second TDD configuration pattern.

[0189] Optionally, the uplink time slot quantity indication information indicates the number of uplink time slots in one period of the TDD configuration pattern, and the uplink time slot quantity indication information is represented by N bits, where N≥1.

[0190] Optionally, if a TDD configuration pattern is configured, a coding point of the uplink time slot quantity indication information indicates a type of uplink time slot quantity information of the TDD configuration pattern.

[0191] Optionally, if two TDD configuration patterns are configured, the two TDD configuration patterns include a first TDD configuration pattern and a second TDD configuration pattern, a coding point of the uplink time slot quantity indication information indicates an uplink time slot quantity information of the first TDD configuration pattern and an uplink time slot quantity information of the second TDD configuration pattern.

[0192] Optionally, when two TDD configuration patterns are configured, N1 represents the number of bits in the uplink time slot indication information used to indicate the uplink time slot quantity information of the first TDD configuration pattern, and N2 represents the number of bits in the uplink time slot indication information used to indicate the uplink time slot quantity information of the second TDD configuration pattern, and N=N1+N2.

[0193] Optionally, N=10.

[0194] Optionally, when two TDD configuration patterns are configured, N1=5, N2=5.

[0195] Optionally, when the coding points corresponding to N1 and / or N2 cannot represent all possible states of the uplink time slot quantity information, the coding points corresponding to N1 and / or N2 indicate a subset of all possible state sets of the uplink time slot quantity information of the TDD configuration pattern.

[0196] Optionally, the uplink time slot quantity information indicated by all the coding points corresponding to N1 is a set consisting of discontinuous natural numbers; the uplink time slot quantity information indicated by all the coding points corresponding to N2 is a set consisting of discontinuous natural numbers.

[0197] Optionally, when the coding point corresponding to N1 and / or N2 cannot indicate all possible states of the uplink time slot quantity information, N1 and / or N2 includes a coding point indicating that all time slots within a period of the TDD configuration pattern are uplink time slots.

[0198] Optionally, the SSB is a direct link synchronization broadcast channel block S-SSB, and the PBCH is a physical direct link broadcast channel PSBCH.

[0199] It should be noted that this method is consistent with the above Figure 2 The method of the receiving terminal corresponding to the method shown in the above Figure 2 All implementations of the method shown are applicable to this embodiment and can achieve the same technical effect.

[0200] like Figure 6As shown, an embodiment of the present invention further provides a device 60 for sending time division duplex configuration indication information, which is applied to a terminal, and the device 60 includes:

[0201] The transceiver module 61 is used to send a first synchronization signal block SSB, wherein the first SSB includes a physical broadcast channel PBCH, and the PBCH carries time division duplex TDD configuration indication information, wherein the TDD configuration indication information includes: TDD configuration pattern quantity indication information, period value indication information, and uplink time slot quantity indication information. The TDD configuration pattern refers to a time slot combination configuration pattern including at least one time slot such as a downlink time slot, a flexible time slot, a mixed time slot, and an uplink time slot within one cycle of itself. The downlink time slot means that all symbols in the entire time slot are downlink symbols; the flexible time slot means that all symbols in the entire time slot are flexible symbols; the uplink time slot means that all symbols in the entire time slot are uplink symbols; the mixed time slot means that the time slot includes at least two symbols among downlink symbols, uplink symbols and flexible symbols; the flexible symbol is a symbol that is not currently configured for uplink or downlink transmission.

[0202] Optionally, the TDD configuration pattern quantity indication information is represented by 1 bit.

[0203] Optionally, the TDD configuration pattern quantity indication information may indicate at most two TDD configuration patterns.

[0204] Optionally, the TDD configuration pattern quantity indication information indicates that the current system is configured with one TDD configuration pattern, or indicates that the current system is configured with two TDD configuration patterns.

[0205] Optionally, the period value indication information indicates the period value of the TDD configuration pattern; when the period value indication information is represented by M bits, it is used to indicate M-power period values ​​of 2 or period value combination states, where M≥1.

[0206] Optionally, M=4.

[0207] Optionally, if a TDD configuration pattern is configured, a coding point of the period value indication information indicates a period value of the TDD configuration pattern.

[0208] Optionally, if two TDD configuration patterns are configured, the two TDD configuration patterns include a first TDD configuration pattern and a second TDD configuration pattern, and a coding point of the period value indication information indicates a combination state including a period value of the first TDD configuration pattern and a period value of the second TDD configuration pattern.

[0209] Optionally, the uplink time slot quantity indication information indicates the number of uplink time slots in one period of the TDD configuration pattern, and the uplink time slot quantity indication information is represented by N bits, where N≥1.

[0210] Optionally, if a TDD configuration pattern is configured, a coding point of the uplink time slot quantity indication information indicates a type of uplink time slot quantity information of the TDD configuration pattern.

[0211] Optionally, if two TDD configuration patterns are configured, the two TDD configuration patterns include a first TDD configuration pattern and a second TDD configuration pattern, a coding point of the uplink time slot quantity indication information indicates an uplink time slot quantity information of the first TDD configuration pattern and an uplink time slot quantity information of the second TDD configuration pattern.

[0212] Optionally, when two TDD configuration patterns are configured, N1 represents the number of bits in the uplink time slot indication information used to indicate the uplink time slot quantity information of the first TDD configuration pattern, and N2 represents the number of bits in the uplink time slot indication information used to indicate the uplink time slot quantity information of the second TDD configuration pattern, and N=N1+N2.

[0213] Optionally, N=10.

[0214] Optionally, when two TDD configuration patterns are configured, N1=5, N2=5.

[0215] Optionally, when the coding points corresponding to N1 and / or N2 cannot represent all possible states of the uplink time slot quantity information, the coding points corresponding to N1 and / or N2 indicate a subset of all possible state sets of the uplink time slot quantity information of the TDD configuration pattern.

[0216] Optionally, the uplink time slot quantity information indicated by all the coding points corresponding to N1 is a set consisting of discontinuous natural numbers; the uplink time slot quantity information indicated by all the coding points corresponding to N2 is a set consisting of discontinuous natural numbers.

[0217] Optionally, when the coding point corresponding to N1 and / or N2 cannot indicate all possible states of the uplink time slot quantity information, N1 and / or N2 includes a coding point indicating that all time slots within a period of the TDD configuration pattern are uplink time slots.

[0218] Optionally, the SSB is a direct link synchronization broadcast channel block S-SSB, and the PBCH is a physical direct link broadcast channel PSBCH.

[0219] It should be noted that the device in this embodiment is the same as the above Figure 2The device corresponding to the method shown, the implementation methods in the above embodiments are all applicable to the embodiments of the device, and can also achieve the same technical effect. The device may also include a processing module 62, etc., for processing the information sent by the transceiver module 61. It should be noted that the above device provided in the embodiment of the present invention can implement all the method steps implemented in the above method embodiment, and can achieve the same technical effect. The parts and beneficial effects that are the same as those in the method embodiment in this embodiment will not be specifically described here.

[0220] like Figure 7 As shown, an embodiment of the present invention further provides a terminal 70, comprising: a transceiver 71, a processor 72, and a memory 73, wherein the memory 73 stores a program executable by the processor 72; when the processor executes the program, it realizes: sending a first synchronization signal block SSB, wherein the first SSB includes a physical broadcast channel PBCH, wherein the PBCH carries time division duplex TDD configuration indication information, wherein the TDD configuration indication information includes: TDD configuration pattern quantity indication information, period value indication information, and uplink time slot quantity indication information. The TDD configuration pattern refers to a time slot combination configuration pattern including at least one time slot such as a downlink time slot, a flexible time slot, a mixed time slot, and an uplink time slot in one cycle of itself. The downlink time slot refers to all symbols in the entire time slot being downlink symbols; the flexible time slot refers to all symbols in the entire time slot being flexible symbols; the uplink time slot refers to all symbols in the entire time slot being uplink symbols; the mixed time slot refers to a time slot including at least two symbols among downlink symbols, uplink symbols, and flexible symbols in the time slot; the flexible symbol is a symbol that is not currently configured for uplink or downlink transmission.

[0221] Optionally, the TDD configuration pattern quantity indication information is represented by 1 bit.

[0222] Optionally, the TDD configuration pattern quantity indication information may indicate at most two TDD configuration patterns.

[0223] Optionally, the TDD configuration pattern quantity indication information indicates that the current system is configured with one TDD configuration pattern, or indicates that the current system is configured with two TDD configuration patterns.

[0224] Optionally, the period value indication information indicates the period value of the TDD configuration pattern; when the period value indication information is represented by M bits, it is used to indicate M-power period values ​​of 2 or period value combination states, where M≥1.

[0225] Optionally, M=4.

[0226] Optionally, if a TDD configuration pattern is configured, a coding point of the period value indication information indicates a period value of the TDD configuration pattern.

[0227] Optionally, if two TDD configuration patterns are configured, the two TDD configuration patterns include a first TDD configuration pattern and a second TDD configuration pattern, and a coding point of the period value indication information indicates a combination state including a period value of the first TDD configuration pattern and a period value of the second TDD configuration pattern.

[0228] Optionally, the uplink time slot quantity indication information indicates the number of uplink time slots in one period of the TDD configuration pattern, and the uplink time slot quantity indication information is represented by N bits, where N≥1.

[0229] Optionally, if a TDD configuration pattern is configured, a coding point of the uplink time slot quantity indication information indicates a type of uplink time slot quantity information of the TDD configuration pattern.

[0230] Optionally, if two TDD configuration patterns are configured, the two TDD configuration patterns include a first TDD configuration pattern and a second TDD configuration pattern, a coding point of the uplink time slot quantity indication information indicates an uplink time slot quantity information of the first TDD configuration pattern and an uplink time slot quantity information of the second TDD configuration pattern.

[0231] Optionally, when two TDD configuration patterns are configured, N1 represents the number of bits in the uplink time slot indication information used to indicate the uplink time slot quantity information of the first TDD configuration pattern, and N2 represents the number of bits in the uplink time slot indication information used to indicate the uplink time slot quantity information of the second TDD configuration pattern, and N=N1+N2.

[0232] Optionally, N=10.

[0233] Optionally, when two TDD configuration patterns are configured, N1=5, N2=5.

[0234] Optionally, when the coding points corresponding to N1 and / or N2 cannot represent all possible states of the uplink time slot quantity information, the coding points corresponding to N1 and / or N2 indicate a subset of all possible state sets of the uplink time slot quantity information of the TDD configuration pattern.

[0235] Optionally, the uplink time slot quantity information indicated by all the coding points corresponding to N1 is a set consisting of discontinuous natural numbers; the uplink time slot quantity information indicated by all the coding points corresponding to N2 is a set consisting of discontinuous natural numbers.

[0236] Optionally, when the coding point corresponding to N1 and / or N2 cannot indicate all possible states of the uplink time slot quantity information, N1 and / or N2 includes a coding point indicating that all time slots within a period of the TDD configuration pattern are uplink time slots.

[0237] Optionally, the SSB is a direct link synchronization broadcast channel block S-SSB, and the PBCH is a physical direct link broadcast channel PSBCH.

[0238] It should be noted that the terminal in this embodiment is the same as the above Figure 2 The terminal corresponding to the method shown, the implementation methods in the above embodiments are all applicable to the embodiments of the terminal, and can also achieve the same technical effect. In the terminal, the transceiver 71 and the memory 73, as well as the transceiver 71 and the processor 72 can be connected through the bus interface communication, the function of the processor 72 can also be implemented by the transceiver 71, and the function of the transceiver 71 can also be implemented by the processor 72. It should be noted that the above terminal provided by the embodiment of the present invention can implement all the method steps implemented by the above method embodiment, and can achieve the same technical effect, and the parts and beneficial effects that are the same as the method embodiment in this embodiment will not be specifically repeated here.

[0239] like Figure 8 As shown, an embodiment of the present invention further provides a device 80 for receiving time division duplex configuration indication information, which is applied to a terminal, and the device 80 includes:

[0240] The transceiver module 81 is used to receive the first synchronization signal block SSB, wherein the first SSB includes a physical broadcast channel PBCH, and the PBCH carries time division duplex TDD configuration indication information, wherein the TDD configuration indication information includes: TDD configuration pattern quantity indication information, period value indication information, and uplink time slot quantity indication information. The TDD configuration pattern refers to a time slot combination configuration pattern including at least one time slot such as a downlink time slot, a flexible time slot, a mixed time slot and an uplink time slot within one cycle of itself. The downlink time slot means that all symbols in the entire time slot are downlink symbols; the flexible time slot means that all symbols in the entire time slot are flexible symbols; the uplink time slot means that all symbols in the entire time slot are uplink symbols; the mixed time slot means that the time slot includes at least two symbols among downlink symbols, uplink symbols and flexible symbols; the flexible symbol is a symbol that is not currently configured for uplink or downlink transmission.

[0241] Optionally, the TDD configuration pattern quantity indication information is represented by 1 bit.

[0242] Optionally, the TDD configuration pattern quantity indication information may indicate at most two TDD configuration patterns.

[0243] Optionally, the TDD configuration pattern quantity indication information indicates that the current system is configured with one TDD configuration pattern, or indicates that the current system is configured with two TDD configuration patterns.

[0244] Optionally, the period value indication information indicates the period value of the TDD configuration pattern; when the period value indication information is represented by M bits, it is used to indicate M-power period values ​​of 2 or period value combination states, where M≥1.

[0245] Optionally, M=4.

[0246] Optionally, if a TDD configuration pattern is configured, a coding point of the period value indication information indicates a period value of the TDD configuration pattern.

[0247] Optionally, if two TDD configuration patterns are configured, the two TDD configuration patterns include a first TDD configuration pattern and a second TDD configuration pattern, and a coding point of the period value indication information indicates a combination state including a period value of the first TDD configuration pattern and a period value of the second TDD configuration pattern.

[0248] Optionally, the uplink time slot quantity indication information indicates the number of uplink time slots in one period of the TDD configuration pattern, and the uplink time slot quantity indication information is represented by N bits, where N≥1.

[0249] Optionally, if a TDD configuration pattern is configured, a coding point of the uplink time slot quantity indication information indicates a type of uplink time slot quantity information of the TDD configuration pattern.

[0250] Optionally, if two TDD configuration patterns are configured, the two TDD configuration patterns include a first TDD configuration pattern and a second TDD configuration pattern, a coding point of the uplink time slot quantity indication information indicates an uplink time slot quantity information of the first TDD configuration pattern and an uplink time slot quantity information of the second TDD configuration pattern.

[0251] Optionally, when two TDD configuration patterns are configured, N1 represents the number of bits in the uplink time slot indication information used to indicate the uplink time slot quantity information of the first TDD configuration pattern, and N2 represents the number of bits in the uplink time slot indication information used to indicate the uplink time slot quantity information of the second TDD configuration pattern, and N=N1+N2.

[0252] Optionally, N=10.

[0253] Optionally, when two TDD configuration patterns are configured, N1=5, N2=5.

[0254] Optionally, when the coding points corresponding to N1 and / or N2 cannot represent all possible states of the uplink time slot quantity information, the coding points corresponding to N1 and / or N2 indicate a subset of all possible state sets of the uplink time slot quantity information of the TDD configuration pattern.

[0255] Optionally, the uplink time slot quantity information indicated by all the coding points corresponding to N1 is a set consisting of discontinuous natural numbers; the uplink time slot quantity information indicated by all the coding points corresponding to N2 is a set consisting of discontinuous natural numbers.

[0256] Optionally, when the coding point corresponding to N1 and / or N2 cannot indicate all possible states of the uplink time slot quantity information, N1 and / or N2 includes a coding point indicating that all time slots within a period of the TDD configuration pattern are uplink time slots.

[0257] Optionally, the SSB is a direct link synchronization broadcast channel block S-SSB, and the PBCH is a physical direct link broadcast channel PSBCH.

[0258] It should be noted that the device in this embodiment is the same as the above Figure 5 The device corresponding to the method shown, the implementation methods in the above embodiments are all applicable to the embodiments of the device, and can also achieve the same technical effect. The device may also include a processing module 82, etc., for processing the information sent by the transceiver module 81. It should be noted that the above device provided in the embodiment of the present invention can implement all the method steps implemented in the above method embodiment, and can achieve the same technical effect. The parts and beneficial effects that are the same as those in the method embodiment in this embodiment will not be specifically described here.

[0259] like Fig. 9As shown, an embodiment of the present invention further provides a terminal 90, comprising: a transceiver 91, a processor 92, and a memory 93, wherein the memory 93 stores a program executable by the processor 92; when the processor executes the program, it realizes: receiving a first synchronization signal block SSB, wherein the first SSB includes a physical broadcast channel PBCH, wherein the PBCH carries time division duplex TDD configuration indication information, wherein the TDD configuration indication information includes: TDD configuration pattern quantity indication information, period value indication information, and uplink time slot quantity indication information. The TDD configuration pattern refers to a time slot combination configuration pattern including at least one time slot such as a downlink time slot, a flexible time slot, a mixed time slot, and an uplink time slot in one cycle of itself. The downlink time slot refers to all symbols in the entire time slot being downlink symbols; the flexible time slot refers to all symbols in the entire time slot being flexible symbols; the uplink time slot refers to all symbols in the entire time slot being uplink symbols; the mixed time slot refers to a time slot including at least two symbols of downlink symbols, uplink symbols, and flexible symbols in the time slot; the flexible symbol is a symbol that is not currently configured for uplink or downlink transmission.

[0260] Optionally, the TDD configuration pattern quantity indication information is represented by 1 bit.

[0261] Optionally, the TDD configuration pattern quantity indication information may indicate at most two TDD configuration patterns.

[0262] Optionally, the TDD configuration pattern quantity indication information indicates that the current system is configured with one TDD configuration pattern, or indicates that the current system is configured with two TDD configuration patterns.

[0263] Optionally, the period value indication information indicates the period value of the TDD configuration pattern; when the period value indication information is represented by M bits, it is used to indicate M-power period values ​​of 2 or period value combination states, where M≥1.

[0264] Optionally, M=4.

[0265] Optionally, if a TDD configuration pattern is configured, a coding point of the period value indication information indicates a period value of the TDD configuration pattern.

[0266] Optionally, if two TDD configuration patterns are configured, the two TDD configuration patterns include a first TDD configuration pattern and a second TDD configuration pattern, and a coding point of the period value indication information indicates a combination state including a period value of the first TDD configuration pattern and a period value of the second TDD configuration pattern.

[0267] Optionally, the uplink time slot quantity indication information indicates the number of uplink time slots in one period of the TDD configuration pattern, and the uplink time slot quantity indication information is represented by N bits, where N≥1.

[0268] Optionally, if a TDD configuration pattern is configured, a coding point of the uplink time slot quantity indication information indicates a type of uplink time slot quantity information of the TDD configuration pattern.

[0269] Optionally, if two TDD configuration patterns are configured, the two TDD configuration patterns include a first TDD configuration pattern and a second TDD configuration pattern, a coding point of the uplink time slot quantity indication information indicates an uplink time slot quantity information of the first TDD configuration pattern and an uplink time slot quantity information of the second TDD configuration pattern.

[0270] Optionally, when two TDD configuration patterns are configured, N1 represents the number of bits in the uplink time slot indication information used to indicate the uplink time slot quantity information of the first TDD configuration pattern, and N2 represents the number of bits in the uplink time slot indication information used to indicate the uplink time slot quantity information of the second TDD configuration pattern, and N=N1+N2.

[0271] Optionally, N=10.

[0272] Optionally, when two TDD configuration patterns are configured, N1=5, N2=5.

[0273] Optionally, when the coding points corresponding to N1 and / or N2 cannot represent all possible states of the uplink time slot quantity information, the coding points corresponding to N1 and / or N2 indicate a subset of all possible state sets of the uplink time slot quantity information of the TDD configuration pattern.

[0274] Optionally, the uplink time slot quantity information indicated by all the coding points corresponding to N1 is a set consisting of discontinuous natural numbers; the uplink time slot quantity information indicated by all the coding points corresponding to N2 is a set consisting of discontinuous natural numbers.

[0275] Optionally, when the coding point corresponding to N1 and / or N2 cannot indicate all possible states of the uplink time slot quantity information, N1 and / or N2 includes a coding point indicating that all time slots within a period of the TDD configuration pattern are uplink time slots.

[0276] Optionally, the SSB is a direct link synchronization broadcast channel block S-SSB, and the PBCH is a physical direct link broadcast channel PSBCH.

[0277] It should be noted that the terminal in this embodiment is the same as the above Figure 5The terminal corresponding to the method shown, the implementation methods in the above embodiments are all applicable to the embodiments of the terminal, and can also achieve the same technical effect. In the terminal, the transceiver 91 and the memory 93, as well as the transceiver 91 and the processor 92 can be connected through the bus interface communication, the function of the processor 92 can also be implemented by the transceiver 91, and the function of the transceiver 91 can also be implemented by the processor 92. It should be noted that the above terminal provided by the embodiment of the present invention can implement all the method steps implemented by the above method embodiment, and can achieve the same technical effect, and the parts and beneficial effects that are the same as the method embodiment in this embodiment will not be specifically repeated here.

[0278] An embodiment of the present invention further provides a processor-readable storage medium, wherein the processor-readable storage medium stores processor-executable instructions, wherein the processor-executable instructions are used to cause the processor to execute the above Figure 2 or Figure 5 All implementations of the method in the above method embodiment are applicable to this embodiment and can achieve the same technical effect.

[0279] Those skilled in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of the present invention.

[0280] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and units described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0281] In the embodiments provided by the present invention, it should be understood that the disclosed devices and methods can be implemented in other ways. For example, the device embodiments described above are only schematic. For example, the division of the units is only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0282] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0283] In addition, each functional unit in each embodiment of the present invention may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit.

[0284] If the functions are implemented in the form of software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, or the part that contributes to the prior art, or the part of the technical solution, can be embodied in the form of a software product. The computer software product is stored in a storage medium, including several instructions for a computer device (which can be a personal computer, server, or network device, etc.) to perform all or part of the steps of the method described in each embodiment of the present invention. The aforementioned storage medium includes: various media that can store program codes, such as USB flash drives, mobile hard disks, ROM, RAM, magnetic disks, or optical disks.

[0285] In addition, it should be noted that in the apparatus and method of the present invention, it is obvious that each component or each step can be decomposed and / or recombined. These decompositions and / or recombinations should be regarded as equivalent schemes of the present invention. Moreover, the steps of performing the above-mentioned series of processing can naturally be performed in chronological order according to the order of description, but it is not necessary to perform them in chronological order, and some steps can be performed in parallel or independently of each other. For those of ordinary skill in the art, it is understood that all or any steps or components of the method and apparatus of the present invention can be implemented in any computing device (including processors, storage media, etc.) or a network of computing devices in hardware, firmware, software or a combination thereof, which can be achieved by those of ordinary skill in the art using their basic programming skills after reading the description of the present invention.

[0286] Therefore, the purpose of the present invention can also be achieved by running a program or a group of programs on any computing device. The computing device can be a well-known general device. Therefore, the purpose of the present invention can also be achieved by simply providing a program product containing a program code that implements the method or device. That is to say, such a program product also constitutes the present invention, and the storage medium storing such a program product also constitutes the present invention. Obviously, the storage medium can be any well-known storage medium or any storage medium developed in the future. It should also be pointed out that in the device and method of the present invention, it is obvious that each component or each step can be decomposed and / or recombined. These decompositions and / or recombinations should be regarded as equivalent schemes of the present invention. In addition, the steps of performing the above-mentioned series of processing can naturally be performed in chronological order according to the order of description, but it is not necessary to perform them in chronological order. Some steps can be performed in parallel or independently of each other.

[0287] The above is a preferred embodiment of the present invention. It should be pointed out that for ordinary personnel in this technical field, several improvements and modifications can be made without departing from the principles described in the present invention. These improvements and modifications are also within the scope of protection of the present invention.

Claims

1. A method for sending time division duplex configuration indication information, characterized in that: Applied to a terminal, the method comprises: A first synchronization signal block SSB is sent, wherein the first SSB includes a physical broadcast channel PBCH, and the PBCH carries time division duplex TDD configuration indication information, wherein the TDD configuration indication information includes: TDD configuration pattern quantity indication information, period value indication information and uplink time slot quantity indication information.

2. The method for sending time division duplex configuration indication information according to claim 1, characterized in that: The TDD configuration pattern quantity indication information is represented by 1 bit.

3. The method for sending time division duplex configuration indication information according to claim 1, characterized in that: The TDD configuration pattern quantity indication information indicates that the current system is configured with one TDD configuration pattern, or indicates that the current system is configured with two TDD configuration patterns.

4. The method for sending time division duplex configuration indication information according to claim 1, characterized in that: The period value indication information indicates the period value of the TDD configuration pattern; when the period value indication information is represented by M bits, it is used to indicate M-power period values ​​of 2 or period value combination states, where M≥1.

5. The method for sending time division duplex configuration indication information according to claim 4, characterized in that: If a TDD configuration pattern is configured, a coding point of the period value indication information indicates a period value of the TDD configuration pattern; if two TDD configuration patterns are configured, the two TDD configuration patterns include a first TDD configuration pattern and a second TDD configuration pattern, a coding point of the period value indication information indicates a combination state including a period value of the first TDD configuration pattern and a period value of the second TDD configuration pattern.

6. The method for sending time division duplex configuration indication information according to claim 1, characterized in that: The uplink time slot quantity indication information indicates the quantity of uplink time slots in one period of the TDD configuration pattern, and the uplink time slot quantity indication information is represented by N bits, where N≥1.

7. The method for sending time division duplex configuration indication information according to claim 6, characterized in that: If a TDD configuration pattern is configured, a coding point of the uplink time slot quantity indication information indicates a type of uplink time slot quantity information of the TDD configuration pattern; if two TDD configuration patterns are configured, the two TDD configuration patterns include a first TDD configuration pattern and a second TDD configuration pattern, a coding point of the uplink time slot quantity indication information indicates a type of uplink time slot quantity information of the first TDD configuration pattern and a type of uplink time slot quantity information of the second TDD configuration pattern.

8. The method for sending time division duplex configuration indication information according to claim 7, characterized in that: When two TDD configuration patterns are configured, N1 represents the number of bits in the uplink time slot indication information used to indicate the uplink time slot quantity information of the first TDD configuration pattern, and N2 represents the number of bits in the uplink time slot indication information used to indicate the uplink time slot quantity information of the second TDD configuration pattern, and N=N1+N2.

9. The method for sending time division duplex configuration indication information according to claim 8, characterized in that: When the code points corresponding to N1 and / or N2 cannot represent all possible states of the uplink time slot quantity information, the code points corresponding to N1 and / or N2 indicate a subset of all possible state sets of the uplink time slot quantity information of the TDD configuration pattern.

10. The method for sending time division duplex configuration indication information according to claim 8, characterized in that: The uplink time slot quantity information indicated by all the code points corresponding to N1 is a set consisting of discontinuous natural numbers; the uplink time slot quantity information indicated by all the code points corresponding to N2 is a set consisting of discontinuous natural numbers.

11. The method for sending time division duplex configuration indication information according to claim 8, characterized in that: When the code points corresponding to N1 and / or N2 cannot indicate all possible states of the uplink time slot quantity information, N1 and / or N2 include a code point indicating a state in which all time slots within a period of the TDD configuration pattern are uplink time slots.

12. The method for sending time division duplex configuration indication information according to any one of claims 1 to 11, characterized in that: The TDD configuration pattern refers to a time slot combination configuration pattern including at least one time slot such as a downlink time slot, a flexible time slot, a hybrid time slot and an uplink time slot within one cycle of the TDD itself.

13. The method for sending time division duplex configuration indication information according to claim 12, characterized in that: The downlink time slot means that all symbols in the entire time slot are downlink symbols; the flexible time slot means that all symbols in the entire time slot are flexible symbols; the uplink time slot means that all symbols in the entire time slot are uplink symbols; the mixed time slot means a time slot including at least two types of symbols among downlink symbols, uplink symbols and flexible symbols; the flexible symbol is a symbol that is not currently configured for uplink or downlink transmission.

14. The method for sending time division duplex configuration indication information according to claim 1, characterized in that: The SSB is a direct link synchronization broadcast channel block S-SSB, and the PBCH is a physical direct link broadcast channel PSBCH.

15. A method for receiving time division duplex configuration indication information, characterized in that: Applied to a terminal, the method comprises: A first synchronization signal block SSB is received, wherein the first SSB includes a physical broadcast channel PBCH, and the PBCH carries time division duplex TDD configuration indication information, wherein the TDD configuration indication information includes: TDD configuration pattern quantity indication information, period value indication information, and uplink time slot quantity indication information.

16. The method for receiving time division duplex configuration indication information according to claim 15, characterized in that: The TDD configuration pattern quantity indication information is represented by 1 bit.

17. The method for receiving time division duplex configuration indication information according to claim 15, characterized in that: The TDD configuration pattern quantity indication information indicates that the current system is configured with one TDD configuration pattern, or indicates that the current system is configured with two TDD configuration patterns.

18. The method for receiving time division duplex configuration indication information according to claim 15, characterized in that: The period value indication information indicates the period value of the TDD configuration pattern; when the period value indication information is represented by M bits, it is used to indicate M-power period values ​​of 2 or period value combination states, where M≥1.

19. The method for receiving time division duplex configuration indication information according to claim 18, characterized in that: If a TDD configuration pattern is configured, a coding point of the period value indication information indicates a period value of the TDD configuration pattern; if two TDD configuration patterns are configured, the two TDD configuration patterns include a first TDD configuration pattern and a second TDD configuration pattern, a coding point of the period value indication information indicates a combination state including a period value of the first TDD configuration pattern and a period value of the second TDD configuration pattern.

20. The method for receiving time division duplex configuration indication information according to claim 15, characterized in that: The uplink time slot quantity indication information indicates the quantity of uplink time slots in one period of the TDD configuration pattern, and the uplink time slot quantity indication information is represented by N bits, where N≥1.

21. The method for receiving time division duplex configuration indication information according to claim 20, characterized in that: If a TDD configuration pattern is configured, a coding point of the uplink time slot quantity indication information indicates a type of uplink time slot quantity information of the TDD configuration pattern; if two TDD configuration patterns are configured, the two TDD configuration patterns include a first TDD configuration pattern and a second TDD configuration pattern, a coding point of the uplink time slot quantity indication information indicates a type of uplink time slot quantity information of the first TDD configuration pattern and a type of uplink time slot quantity information of the second TDD configuration pattern.

22. The method for receiving time division duplex configuration indication information according to claim 21, characterized in that: When two TDD configuration patterns are configured, N1 represents the number of bits in the uplink time slot indication information used to indicate the uplink time slot quantity information of the first TDD configuration pattern, and N2 represents the number of bits in the uplink time slot indication information used to indicate the uplink time slot quantity information of the second TDD configuration pattern, and N=N1+N2.

23. The method for receiving time division duplex configuration indication information according to claim 22, characterized in that: When the code points corresponding to N1 and / or N2 cannot represent all possible states of the uplink time slot quantity information, the code points corresponding to N1 and / or N2 indicate a subset of all possible state sets of the uplink time slot quantity information of the TDD configuration pattern.

24. The method for receiving time division duplex configuration indication information according to claim 22, characterized in that: The uplink time slot quantity information indicated by all the code points corresponding to N1 is a set consisting of discontinuous natural numbers; the uplink time slot quantity information indicated by all the code points corresponding to N2 is a set consisting of discontinuous natural numbers.

25. The method for receiving time division duplex configuration indication information according to claim 22, characterized in that: When the code points corresponding to N1 and / or N2 cannot indicate all possible states of the uplink time slot quantity information, N1 and / or N2 include a code point indicating a state in which all time slots within a period of the TDD configuration pattern are uplink time slots.

26. The method for receiving time division duplex configuration indication information according to any one of claims 15 to 25, characterized in that: The TDD configuration pattern refers to a time slot combination configuration pattern including at least one time slot such as a downlink time slot, a flexible time slot, a hybrid time slot and an uplink time slot within one cycle of the TDD itself.

27. The method for receiving time division duplex configuration indication information according to claim 26, characterized in that: The downlink time slot means that all symbols in the entire time slot are downlink symbols; the flexible time slot means that all symbols in the entire time slot are flexible symbols; the uplink time slot means that all symbols in the entire time slot are uplink symbols; the mixed time slot means a time slot including at least two types of symbols among downlink symbols, uplink symbols and flexible symbols; the flexible symbol is a symbol that is not currently configured for uplink or downlink transmission.

28. The method for receiving time division duplex configuration indication information according to claim 21, characterized in that: The SSB is a direct link synchronization broadcast channel block S-SSB, and the PBCH is a physical direct link broadcast channel PSBCH.

29. A device for sending time division duplex configuration indication information, characterized in that: Applied to a terminal, the device comprises: The transceiver module is used to send a first synchronization signal block SSB, wherein the first SSB includes a physical broadcast channel PBCH, and the PBCH carries time division duplex TDD configuration indication information, wherein the TDD configuration indication information includes: TDD configuration pattern quantity indication information, period value indication information and uplink time slot quantity indication information.

30. The device for sending time division duplex configuration indication information according to claim 29, characterized in that: The TDD configuration pattern quantity indication information indicates that the current system is configured with one TDD configuration pattern, or indicates that the current system is configured with two TDD configuration patterns.

31. The device for sending time division duplex configuration indication information according to claim 29, characterized in that: The period value indication information indicates the period value of the TDD configuration pattern; when the period value indication information is represented by M bits, it is used to indicate M-power period values ​​of 2 or period value combination states, where M≥1.

32. The device for sending time division duplex configuration indication information according to claim 29, characterized in that: The uplink time slot quantity indication information indicates the quantity of uplink time slots in one period of the TDD configuration pattern, and the uplink time slot quantity indication information is represented by N bits, where N≥1.

33. A terminal, characterized in that: include: A transceiver, a processor, and a memory, wherein the memory stores a program executable by the processor; when the processor executes the program, it realizes: sending a first synchronization signal block SSB, wherein the first SSB includes a physical broadcast channel PBCH, and the PBCH carries time division duplex TDD configuration indication information, and the TDD configuration indication information includes: TDD configuration pattern quantity indication information, period value indication information, and uplink time slot quantity indication information.

34. The terminal according to claim 33, characterized in that The TDD configuration pattern quantity indication information indicates that the current system is configured with one TDD configuration pattern, or indicates that the current system is configured with two TDD configuration patterns.

35. The terminal according to claim 33, characterized in that The period value indication information indicates the period value of the TDD configuration pattern; when the period value indication information is represented by M bits, it is used to indicate M-power period values ​​of 2 or period value combination states, where M≥1.

36. The terminal according to claim 33, characterized in that The uplink time slot quantity indication information indicates the quantity of uplink time slots in one period of the TDD configuration pattern, and the uplink time slot quantity indication information is represented by N bits, where N≥1.

37. A device for receiving time division duplex configuration indication information, characterized in that: Applied to a terminal, the device comprises: The transceiver module is used to receive a first synchronization signal block SSB, wherein the first SSB includes a physical broadcast channel PBCH, and the PBCH carries time division duplex TDD configuration indication information, wherein the TDD configuration indication information includes: TDD configuration pattern quantity indication information, period value indication information and uplink time slot quantity indication information.

38. The device for receiving time division duplex configuration indication information according to claim 37, characterized in that: The TDD configuration pattern quantity indication information indicates that the current system is configured with one TDD configuration pattern, or indicates that the current system is configured with two TDD configuration patterns.

39. The device for receiving time division duplex configuration indication information according to claim 37, characterized in that: The period value indication information indicates the period value of the TDD configuration pattern; when the period value indication information is represented by M bits, it is used to indicate M-power period values ​​of 2 or period value combination states, where M≥1.

40. The device for receiving time division duplex configuration indication information according to claim 37, characterized in that: The uplink time slot quantity indication information indicates the quantity of uplink time slots in one period of the TDD configuration pattern, and the uplink time slot quantity indication information is represented by N bits, where N≥1.

41. A terminal, characterized in that: include: A transceiver, a processor, and a memory, wherein the memory stores a program executable by the processor; when the processor executes the program, it realizes: receiving a first synchronization signal block SSB, wherein the first SSB includes a physical broadcast channel PBCH, and the PBCH carries time division duplex TDD configuration indication information, wherein the TDD configuration indication information includes: TDD configuration pattern quantity indication information, period value indication information, and uplink time slot quantity indication information.

42. The terminal according to claim 41, characterized in that The TDD configuration pattern quantity indication information indicates that the current system is configured with one TDD configuration pattern, or indicates that the current system is configured with two TDD configuration patterns.

43. The terminal according to claim 41, characterized in that The period value indication information indicates the period value of the TDD configuration pattern; when the period value indication information is represented by M bits, it is used to indicate M-power period values ​​of 2 or period value combination states, where M≥1.

44. The terminal according to claim 41, characterized in that The uplink time slot quantity indication information indicates the quantity of uplink time slots in one period of the TDD configuration pattern, and the uplink time slot quantity indication information is represented by N bits, where N≥1.

45. A processor-readable storage medium, characterized in that: The processor-readable storage medium stores processor-executable instructions, and the processor-executable instructions are used to enable the processor to execute the method of any one of claims 1 to 14 or any one of claims 15 to 28.

Images