Data access method for realizing dynamic caching based on double queues
By adopting a dual-queue structure and dynamic caching mechanism in high data traffic scenarios, the performance bottleneck caused by a single-queue structure is solved, and more efficient data access and more stable system performance is achieved.
Patent Information
- Application Number
- CN202510083038.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-01-20
- Publication Date
- 2025-05-16
AI Technical Summary
In existing systems, a single queue structure is likely to become a performance bottleneck in high data traffic scenarios, resulting in data loss, processing delay, throughput, response speed and stability being affected.
The dynamic cache data access method based on dual queues is adopted, and the switching mechanism of write queues and read queues is combined with the lock mechanism and the cache disk drop mechanism to reduce the lock competition overhead and memory usage.
It effectively reduces the overhead time of lock competition, avoids large memory usage, and improves the system's throughput, response speed and stability.
Smart Images
Figure CN120010774A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the technical field of data storage and processing, and in particular to a data access method for implementing dynamic caching based on dual queues. Background Art
[0002] In existing systems, data read and write operations are often managed through a single queue or shared memory area. When faced with storage scenarios with large data traffic in the market field, a single queue structure can easily become a performance bottleneck, resulting in data loss or processing delays, thereby affecting the system's throughput, response speed, and stability. In addition, large data traffic is also a major challenge for server memory, and a large amount of memory usage will also affect the performance of the application. Summary of the invention
[0003] In order to help solve the above technical problems, the present application provides a data access method for implementing dynamic caching based on dual queues, which adopts the following technical solutions: A data access method for implementing dynamic caching based on dual queues, wherein the dual queues include a write queue and a read queue, wherein the data access method includes a data receiving process and a data reading process, and the data receiving process includes: Step A1: Check the state of the flag bit, the state includes a first flag bit state and a second flag bit state, when the state of the flag bit is the first flag bit state, write the data into the write queue, when the state of the flag bit is the second flag bit state, write the data into the read queue; Step A2: when the write queue is full, write the data into the cache file of the preset path; otherwise, execute the step A1; The data reading process includes: Step B1: Check the status of the flag bit to determine whether there is a cache file. If so, read data from the cache file first; Step B2: when the state of the flag bit is the first flag bit state, reading data from the read queue; when the state of the flag bit is the second flag bit state, reading data from the write queue; Step B3: If all the data in the read queue has been read, the state of the flag bit is updated to the second flag bit state, and the process returns to step B1.
[0004] Preferably, the data access method further includes a preprocessing step, and the preprocessing step includes: Initialize the dual queue structure, and set the default size, flag status, and storage path of the cache file of the dual queue.
[0005] Preferably, the first flag bit state is true, and the second flag bit state is false.
[0006] In summary, compared with the existing traditional single queue data access, the advantages of this application are: 1. When a single queue accesses data concurrently, it needs to use a lock mechanism to ensure data consistency. Whether it is a mutex lock or a spin lock, in the scenario of concurrent reading and writing of a large amount of data, a lot of waiting time for locks and acquiring locks will be generated. However, this application adopts a dual-queue read-write switching mechanism, which changes the lock triggering granularity from a single message to a single queue, greatly reducing the lock contention overhead time.
[0007] 2. In the single queue mode, when the message processing speed is slower than the message receiving speed, messages will pile up and the memory usage will continue to grow, which will affect the performance and availability of the application. However, this application uses a fixed-size queue and a dynamic cache mechanism to prevent the occurrence of large memory usage scenarios. BRIEF DESCRIPTION OF THE DRAWINGS
[0008] Figure 1 A schematic diagram of a process flow of an embodiment of a data receiving process of the present application; Figure 2 The figure is a flowchart of an embodiment of the data reading process of the present application. DETAILED DESCRIPTION
[0009] The present application is further described below in conjunction with the accompanying drawings, and the structure and principle of the present application are very clear to people in the field. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.
[0010] Figure 1 This is a flow chart of an embodiment of the data receiving process of the present application. Figure 2 This is a flow chart of an embodiment of the data reading process of the present application. Figure 1 and Figure 2 It can be understood that the data access method for implementing dynamic caching based on dual queues of the present application may include a data receiving process, a data reading process and a preceding preprocessing step, wherein the dual queues include a write queue and a read queue, and the data receiving process and the data reading process may be executed simultaneously, and the preprocessing step may include initializing the dual queue structure, and setting the default size of the dual queues, the flag status, and the storage path of the cache file.
[0011] The data receiving process includes: Step A1: Check the state of the flag bit, which includes a first flag bit state and a second flag bit state. When the state of the flag bit is the first flag bit state, write the data into the write queue. When the state of the flag bit is the second flag bit state, write the data into the read queue.
[0012] Step A2: When the write queue is full, write the data into the cache file of the preset path; otherwise, execute step A1.
[0013] The data reading process includes: Step B1: Check the status of the flag bit to determine whether there is a cache file. If so, read data from the cache file first.
[0014] Step B2: when the state of the flag bit is the first flag bit state, data is read from the read queue; when the state of the flag bit is the second flag bit state, data is read from the write queue.
[0015] Step B3: If all the data in the read queue has been read, the state of the flag bit is updated to the second flag bit state, and the process returns to step B1.
[0016] In the above two embodiments, the state of the first flag bit may be true, and the state of the second flag bit may be false.
[0017] In order to illustrate the beneficial effects of the present application in alleviating lock contention and optimizing memory usage, the present application implements a replacement operation in the market service system, replacing the original single queue mechanism with the dual queue mechanism of the present application.
[0018] For example, based on a comparative test of the Shanghai Level-1 market data on the same day, this application has detailed statistics and analysis of the number of lock contentions and peak memory usage before and after the replacement. Lock contention, as an indicator of the frequency of read-write conflicts, directly affects system efficiency, so the fewer the number, the better the system performance; and the peak memory usage reflects the maximum memory resources required during program operation. A reduction in this value also means improved resource utilization and reduced system burden. This comparison aims to intuitively demonstrate the optimization effect brought about by this application.
[0019] Specific data are shown in Table 1: surface Mutex locks and spin locks are commonly used synchronization primitives in multithreaded programming to ensure mutual exclusion when multiple threads access shared resources. The following is a detailed explanation of these two lock mechanisms: Mutex is a synchronization mechanism used in multithreaded programming to ensure that only one thread can access shared resources at the same time. It prevents multiple threads from reading and writing shared resources at the same time through locking mechanism, thus avoiding data competition and inconsistency problems.
[0020] When a thread needs to access a shared resource, it attempts to acquire the mutex lock. If the lock is not currently held by another thread, the thread successfully acquires the lock and enters the critical section. After the critical section is completed, the thread releases the mutex lock so that other threads can acquire the lock and access the shared resource.
[0021] Spin lock is a multithreaded synchronization mechanism used to protect shared resources from concurrent access. The principle of spin lock is that when multiple threads try to acquire the lock, they will keep spinning, that is, constantly checking whether the lock is available in a loop, instead of immediately going into sleep state waiting for the lock to be released.
[0022] Spin locks usually use a shared flag to indicate the state of the lock. If the flag is true, it means that the lock is already occupied by a thread; if the flag is false, it means that the lock is available. When a thread tries to acquire a spin lock, it will constantly check the flag. If the flag is false, it means that the lock is available, and the thread will set the flag to true, indicating that it has occupied the lock and entered the critical section. If a thread tries to acquire the lock and finds that the flag is true, that is, the lock is already occupied by another thread, it will continue to spin and wait in a loop until the lock is released.
[0023] In summary, this application has the following features: 1. Double queue structure design This application uses two mutually redundant queues (queue A and queue B) to perform data access operations.
[0024] By default, a queue (such as queue A) is specified to obtain elements for processing. At this time, another queue (such as queue B) is responsible for receiving upstream data. If all the data in queue A is processed, it switches to queue B to obtain elements and process them. At this time, queue A is responsible for receiving upstream data, and the two queues are responsible for reading and writing respectively.
[0025] When the queue is switched between reading and writing, the lock mechanism is used to ensure the consistency of concurrent data. Compared with the traditional single queue mode, the lock granularity is changed from the message level to the queue level, which reduces the lock time.
[0026] 2. Cache disk mechanism Each of the two queues in this application has a preset memory size and cache directory.
[0027] When receiving upstream data, if the queue's preset memory size has been used up, the data in the queue is written to the corresponding cache directory, using the disk as a cache, and then the received data is written to the queue.
[0028] When the queue is switched between read and write, the data in the disk cache is read first, and then the remaining data in the queue is read to ensure data continuity.
Claims
1. A data access method for implementing dynamic caching based on dual queues, wherein the dual queues include a write queue and a read queue, characterized in that: The data access method includes a data receiving process and a data reading process, and the data receiving process includes: Step A1: Check the state of the flag bit, the state includes a first flag bit state and a second flag bit state, when the state of the flag bit is the first flag bit state, write the data into the write queue, when the state of the flag bit is the second flag bit state, write the data into the read queue; Step A2: when the write queue is full, write the data into the cache file of the preset path; otherwise, execute the step A1; The data reading process includes: Step B1: Check the status of the flag bit to determine whether there is a cache file. If so, read data from the cache file first; Step B2: when the state of the flag bit is the first flag bit state, reading data from the read queue; when the state of the flag bit is the second flag bit state, reading data from the write queue; Step B3: If all the data in the read queue has been read, the state of the flag bit is updated to the second flag bit state, and the process returns to step B1.
2. The data access method based on dual queues to realize dynamic cache according to claim 1, characterized in that: The data access method further comprises a preprocessing step, wherein the preprocessing step comprises: Initialize the dual queue structure, and set the default size, flag status, and storage path of the cache file of the dual queue.
3. The data access method based on dual queues to realize dynamic cache according to claim 1, characterized in that: The first flag bit state is true, and the second flag bit state is false.