Memory system, memory system disaster recovery control method, and electronic device

Abstract

The present application provides a memory system, a disaster recovery control method for the memory system, and an electronic device, which can be applied to the technical field of memory disaster recovery. The memory system includes: a power supply monitoring module for monitoring the motherboard power supply parameters of the motherboard power interface; a memory controller electrically connected to the power supply monitoring module, and the memory controller is used to determine the operating mode of the memory system according to the motherboard power supply parameters from the power supply monitoring module and the heartbeat information of the memory system; in the case where the operating mode is the emergency operating mode and a control instruction from the central processing unit is received, determine a plurality of target data migration protocol information according to the control instruction and a plurality of dynamic data stored in the dynamic random access memory; according to the plurality of target data migration protocol information, respectively call a plurality of data migration protocol interfaces of the memory controller to migrate the plurality of dynamic data from the dynamic random access memory to a target solid-state drive among a plurality of solid-state drives.

Description

Technical Field

[0001] The present application relates to the field of memory disaster recovery, and particularly to a memory system, a memory system disaster recovery control method, and an electronic device. Background Art

[0002] A memory controller is a hardware component that supports a high-performance memory interconnection protocol. Through the memory controller, the traditional memory architecture can be optimized, and the data interaction efficiency between the memory and the central processing unit can be improved, so that the memory system can meet the requirements of current high-density data scenarios. However, in case of a failure, the memory system based on the memory controller is difficult to have good disaster recovery performance. Summary of the Invention

[0003] In view of the above problems, the present application provides a memory system, a memory system disaster recovery control method, and an electronic device.

[0004] According to the first aspect of the present application, there is provided a memory system, including: a power supply monitoring module for monitoring the motherboard power supply parameters of the motherboard power interface; a memory controller electrically connected to the power supply monitoring module, and the memory controller is configured to: determine the operating mode of the memory system according to the motherboard power supply parameters from the power supply monitoring module and the heartbeat information of the memory system; in the case that the operating mode is an emergency operating mode and a control instruction is received from the central processing unit, determine a plurality of target data migration protocol information according to the control instruction and a plurality of dynamic data stored in the dynamic random access memory; according to the plurality of target data migration protocol information, respectively call a plurality of data migration protocol interfaces of the memory controller, and migrate the plurality of dynamic data from the dynamic random access memory to a target solid-state drive among a plurality of solid-state drives.

[0005] The second aspect of the present application provides a memory system disaster recovery control method, including: obtaining the motherboard power supply parameters of the motherboard power interface; determining the operating mode of the memory system according to the motherboard power supply parameters and the heartbeat information of the memory system; in the case that the operating mode is an emergency operating mode and a control instruction is received from the central processing unit, determine a plurality of target data migration protocol information according to the control instruction and a plurality of dynamic data stored in the dynamic random access memory; according to the plurality of target data migration protocol information, respectively call a plurality of data migration protocol interfaces, and migrate the plurality of dynamic data from the dynamic random access memory to the target solid-state drive.

[0006] The third aspect of the present application provides an electronic device, including: one or more processors; a memory for storing one or more computer programs, wherein the one or more processors execute the one or more computer programs to implement the steps of the above method.

[0007] The fourth aspect of the present application further provides a computer-readable storage medium, on which a computer program or instruction is stored. When the computer program or instruction is executed by a processor, the steps of the above method are implemented.

[0008] The fifth aspect of the present application further provides a computer program product, including a computer program or instruction. When the computer program or instruction is executed by a processor, the steps of the above method are implemented.

[0009] According to an embodiment of the present application, the memory system may include a power supply monitoring module, a memory controller, and a memory module. The power supply monitoring module is electrically connected to the motherboard power interface, the central processing unit is electrically connected to the memory controller, the memory controller is electrically connected to the power supply monitoring module, and the memory module is electrically connected to the memory controller. The power supply monitoring module is used to monitor the motherboard power supply parameters of the motherboard power interface in real time, and send the motherboard power supply parameters to the memory controller through the integrated circuit bus protocol or the system management bus protocol, so that the memory controller can quickly determine the operating mode and configure the current power supply mode.

[0010] According to an embodiment of the present application, the memory controller determines the current operating mode of the memory system according to the motherboard power supply parameters and the heartbeat information of the memory system. When the operating mode is the emergency operating mode and a control instruction is received from the central processing unit, according to the information in the control instruction and multiple dynamic data stored in the dynamic random access memory, multiple target data migration protocol information is determined. Then, based on the multiple target data migration protocol information, multiple data migration protocol interfaces are respectively called, so as to quickly and orderly migrate and store multiple dynamic data in the dynamic random access memory to the target solid-state drive. Thus, when a failure occurs in the memory system, nanosecond-level power switching can be achieved through multi-protocol collaborative control and dynamic power management. In addition, by backing up volatile dynamic data to the solid-state drive for storage, the data loss risk of the memory system in the disaster recovery scenario can be reduced, and the preservation integrity of the dynamic data and system configuration parameters can be improved. Further, according to different disaster recovery scenarios, different multiple protocols or different protocol calling sequences can be adopted to adaptively back up volatile dynamic data and system configuration parameters to the solid-state drive for storage, improving the flexibility and adaptability of the memory system, so that it can be widely applied to various high-standard data-intensive scenarios. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] Through the following description of the embodiments of the present application with reference to the drawings, the above content and other objects, features, and advantages of the present application will become clearer. In the drawings:

[0012] Figure 1 A schematic diagram of a memory system according to an embodiment of the present application is shown;

[0013] Figure 2Shows a schematic diagram of a data migration engine and a data migration protocol module according to an embodiment of the present application;

[0014] Figure 3 Shows a schematic diagram of a data migration engine according to an embodiment of the present application;

[0015] Figure 4 Shows a schematic diagram of a solid-state drive according to an embodiment of the present application;

[0016] Figure 5 Shows a schematic diagram of an enable controller according to an embodiment of the present application;

[0017] Figure 6 Shows a schematic diagram of a power supply monitoring module according to an embodiment of the present application;

[0018] Figure 7 Shows a schematic diagram of a charge and discharge sub-module according to an embodiment of the present application;

[0019] Figure 8 Shows a flowchart of a memory system disaster tolerance control method according to an embodiment of the present application;

[0020] Figure 9 Shows a block diagram of an electronic device suitable for implementing a memory system disaster tolerance control method according to an embodiment of the present application. Detailed implementation manners

[0021] Hereinafter, embodiments of the present application will be described with reference to the accompanying drawings. However, it should be understood that these descriptions are merely exemplary and are not intended to limit the scope of the present application. In the following detailed description, for the sake of explanation, many specific details are set forth in order to provide a comprehensive understanding of the embodiments of the present application. However, it is obvious that one or more embodiments can be implemented without these specific details. In addition, in the following description, descriptions of well-known structures and technologies are omitted to avoid unnecessarily obscuring the concepts of the present application.

[0022] The terms used herein are merely for describing specific embodiments and are not intended to limit the present application. The terms "including", "comprising", etc. used herein indicate the presence of the described features, steps, operations, and / or components, but do not exclude the presence or addition of one or more other features, steps, operations, or components.

[0023] All terms used herein (including technical and scientific terms) have the meanings commonly understood by those of ordinary skill in the art, unless otherwise defined. It should be noted that the terms used herein should be interpreted as having a meaning consistent with the context of this specification and should not be interpreted in an idealized or overly rigid manner.

[0024] In the case of using expressions such as "at least one of A, B, and C", generally, it should be interpreted according to the meaning that those skilled in the art usually understand this expression (for example, "a system having at least one of A, B, and C" should include, but not be limited to, a system having only A, only B, only C, having A and B, having A and C, having B and C, and / or having A, B, and C, etc.).

[0025] A memory controller is a hardware component that supports a high-performance memory interconnection protocol. Through the memory controller, the traditional memory architecture can be optimized, and the data interaction efficiency between the memory and the central processing unit can be improved, so that the memory system can meet the requirements of current high-density data scenarios. However, when a failure occurs, it is difficult for the memory system based on the memory controller to have good disaster tolerance performance.

[0026] Embodiments of the present application provide a memory system, including: a power supply monitoring module for monitoring the motherboard power supply parameters of the motherboard power interface; a memory controller electrically connected to the power supply monitoring module, where the memory controller is configured to: determine the operating mode of the memory system according to the motherboard power supply parameters from the power supply monitoring module and the heartbeat information of the memory system: in the case where the operating mode is an emergency operating mode and a control instruction from the central processing unit is received, determine multiple target data migration protocol information according to the control instruction and multiple dynamic data stored in the dynamic random access memory; and according to the multiple target data migration protocol information, respectively call multiple data migration protocol interfaces of the memory controller to migrate the multiple dynamic data from the dynamic random access memory to a target solid-state drive among multiple solid-state drives.

[0027] Figure 1 A schematic diagram of a memory system according to an embodiment of the present application is shown.

[0028] As Figure 1 shown, the memory system includes a power supply monitoring module 101, a memory controller 102, and a memory module 103. The power supply monitoring module 101 monitors the motherboard voltage at the motherboard power interface 104. The central processing unit 105 interacts with the memory controller 102. The memory module 103 includes multiple dynamic random access memories 1031 and multiple solid-state drives 1032.

[0029] According to an embodiment of the present application, the power supply monitoring module is configured to monitor the motherboard power supply parameters of the motherboard power interface.

[0030] The power supply monitoring module can be electrically connected to hardware components such as a memory controller and a memory module, so that while monitoring the motherboard power supply parameters of the motherboard power interface, it can supply power to hardware components such as the memory controller and the memory module to keep the memory system working, and transmit the power supply parameters of the power supply monitoring module to the memory controller through the integrated circuit bus protocol or the system management bus protocol, so as to facilitate the memory controller to perform operations such as control storage. Among them, the motherboard power supply parameters include the motherboard voltage and the motherboard current. Usually, the power supply monitoring module is used to monitor the motherboard voltage of the motherboard power interface, so that the memory controller can determine the operation mode of the memory system according to the motherboard voltage.

[0031] According to an embodiment of the present application, the memory controller is electrically connected to the power supply monitoring module. The memory controller is configured to: determine the operation mode of the memory system according to the motherboard power supply parameters from the power supply monitoring module and the heartbeat information of the memory system; in the case where the operation mode is the emergency operation mode and a control instruction is received from the central processing unit, determine multiple target data migration protocol information according to the control instruction and multiple dynamic data stored in the dynamic random access memory; according to the multiple target data migration protocol information, respectively call multiple data migration protocol interfaces of the memory controller to migrate the multiple dynamic data from the dynamic random access memory to the target solid-state drive in multiple solid-state drives.

[0032] The heartbeat information of the memory system can be characterized as the operation state of the memory system within a certain period of time. According to the heartbeat information, it can be judged whether the current memory system has crashed.

[0033] The operation mode of the memory system can include multiple operation modes, such as the normal operation mode, the emergency operation mode, the pause operation mode, but is not limited to the above modes. According to the motherboard power supply parameters and the heartbeat information, judge the operation mode of the current memory system, so as to control the memory controller and the power supply monitoring module to perform different operation processes according to different operation modes, and perform operations such as storage and migration on the cache data sent by the central processing unit or the data in the memory module.

[0034] The target data migration protocol information can include the target solid-state drive for storing and backing up the dynamic data.

[0035] According to an embodiment of the present application, the memory system further includes a memory module, which is electrically connected to the memory controller. The memory module may include a plurality of dynamic random access memories and a plurality of solid-state drives. A plurality of dynamic data may be stored in the dynamic random access memories, and a plurality of non-volatile data may be stored in the solid-state drives. When it is determined that the current operating mode of the memory system is the emergency operating mode, the dynamic data in the dynamic random access memories and the power supply parameters of the power supply monitoring module may be migrated and stored in the solid-state drives, so as to facilitate the backup of the dynamic data. When the memory system resumes the normal operating mode, the dynamic data and the power supply parameters of the power supply monitoring module and other information are restored.

[0036] According to an embodiment of the present application, the memory system may include a power supply monitoring module, a memory controller, and a memory module. The power supply monitoring module is electrically connected to the motherboard power interface, the central processing unit is electrically connected to the memory controller, the memory controller is electrically connected to the power supply monitoring module, and the memory module is electrically connected to the memory controller. The power supply monitoring module is used to monitor the motherboard power supply parameters of the motherboard power interface in real time, and send the motherboard power supply parameters to the memory controller through the integrated circuit bus protocol or the system management bus protocol, so that the memory controller can quickly determine the operating mode and configure the current power supply mode.

[0037] The memory controller determines the current operating mode of the memory system according to the motherboard power supply parameters and the heartbeat information of the memory system. When the operating mode is the emergency operating mode and a control instruction is received from the central processing unit, multiple target data migration protocol information is determined according to the information in the control instruction and the multiple dynamic data stored in the dynamic random access memory. Then, based on the multiple target data migration protocol information, multiple data migration protocol interfaces are respectively called, so as to quickly and orderly migrate and store the multiple dynamic data in the dynamic random access memory to the target solid-state drive. Thus, when the memory system fails, nanosecond-level power switching can be achieved through multi-protocol collaborative control and dynamic power management. In addition, by backing up the volatile dynamic data to the solid-state drive for storage, the data loss risk of the memory system in the disaster recovery scenario can be reduced, and the preservation integrity of the dynamic data and system configuration parameters can be improved. Further, different multiple protocols or different protocol calling sequences may be adopted according to different disaster recovery scenarios to adaptively back up the volatile dynamic data and system configuration parameters to the solid-state drive for storage, improving the flexibility and adaptability of the memory system, so that it can be widely applied to various high-standard data-intensive scenarios.

[0038] When the memory system is in the emergency operating mode, unused data channels can be closed, and only the x4 link (4 data transmission channels) or the x2 link (2 data transmission channels) is retained, the serializer drive current is reduced to 30% of the normal value, the clock frequency and system power consumption are reduced, and only the functions required for data migration are retained.

[0039] According to an embodiment of the present application, the target data migration protocol information includes a target data migration protocol and a target data migration protocol priority.

[0040] Figure 2 A schematic diagram of a data migration engine and a data migration protocol module according to an embodiment of the present application is shown.

[0041] As Figure 2 shown, the memory controller 102 includes a data migration engine 201 and a data migration protocol module 202. The data migration engine 201 is electrically connected to the central processing unit 105 and the power supply monitoring module 101. The data migration protocol module 202 is electrically connected to the data migration engine 201. The data migration protocol module 202 can obtain hard disk attribute information and dynamic data from the target solid-state hard disk 203 and the dynamic random access memory 1031 by calling the data migration access protocol interface, and determine a plurality of target data migration protocols and a plurality of target data migration protocol priorities.

[0042] According to an embodiment of the present application, the data migration engine is electrically connected to the central processing unit. The data migration engine is configured to send an emergency power supply mode configuration instruction to the power supply monitoring module according to an emergency operation mode; in response to the power supply monitoring module being configured with an emergency power supply mode, generate emergency operation information according to a plurality of dynamic data and the hard disk attribute information of the solid-state hard disk, and call the data migration access protocol interface to send the emergency operation information to the central processing unit; and call the data migration control protocol interface to receive a control instruction generated by the central processing unit in response to the emergency operation information, where the control instruction includes a plurality of target migration information and target solid-state hard disk information.

[0043] When it is determined that the memory system is in an emergency operation mode, the memory controller generates an emergency power supply mode configuration instruction, and sends the emergency power supply mode configuration instruction to the power supply monitoring module through an integrated circuit bus protocol or a system management bus protocol. After receiving the emergency power supply mode configuration instruction, the power supply monitoring module can adjust the power supply voltage of the power supply monitoring module to hardware components such as the memory controller and the memory module, so that the hardware components such as the memory controller and the memory module can migrate and store dynamic data to the target solid-state hard disk in the emergency operation mode, and maintain a temporary working state of the memory system.

[0044] In the case where the power supply monitoring module is configured with an emergency power supply mode, the data migration access protocol interface can be called to obtain a plurality of dynamic data and hard disk attribute information from a plurality of dynamic random access memories and a plurality of solid-state hard disks, then generate emergency operation information according to the plurality of dynamic data and the hard disk attribute information, and then call the data migration access protocol interface to send the emergency operation information to the central processing unit, where the hard disk attribute information may include attributes such as the storage capacity and available storage capacity of the solid-state hard disk.

[0045] After receiving the emergency operation information, the central processing unit generates a control instruction including the target solid-state drive and target migration information according to the hard disk attribute information of each solid-state drive. The target migration information may include migration instruction information such as switching, backup, update, and address assignment of dynamic data.

[0046] According to an embodiment of the present application, the data migration protocol module is electrically connected to the data migration engine and is configured to determine multiple target data migration protocols and multiple target data migration protocol priorities for multiple dynamic data according to multiple target migration information.

[0047] According to an embodiment of the present application, the data migration protocol module is further configured to: determine multiple first data migration protocols for multiple dynamic data according to multiple target migration information; call the data migration access protocol interface to confirm the consistency of multiple dynamic data stored in the dynamic random access memory and non-volatile data stored in the target solid-state drive to obtain first storage consistency information; determine multiple target data migration protocols according to the first storage consistency information and the first data migration protocols; determine the target data migration protocol priorities of multiple target data migration protocols according to multiple target migration information and multiple dynamic data.

[0048] Multiple first data migration protocols for migrating multiple dynamic data can be determined according to multiple target migration information. For example, when the target migration information is switching, backup, update, and address assignment, multiple first data migration protocols can all be data migration storage protocols, but are not limited to the above migration information. The target migration information can customize the operation code to expand the migration information instruction. When the target migration information is address assignment and backup, multiple first data migration protocols can also be data migration control protocols and data migration storage protocols; when the target migration information is update, backup, and address assignment, multiple first data migration protocols can also be data migration access protocols, data migration storage protocols, and data migration control protocols.

[0049] The first storage consistency information can represent the information of the same data of multiple dynamic data stored in the dynamic random access memory and non-volatile data stored in the target solid-state drive. According to the first storage consistency information, some dynamic data already stored in the target solid-state drive can be marked, so that there is no need to migrate and store this part of the dynamic data.

[0050] The priority of the target migration information can be preset, so as to determine the target data migration protocol priorities of multiple target data migration protocols to be adopted according to the preset priority of the target migration information. For example, it is preset that the backup migration information is the first priority, the address migration information is the second priority, and the update migration information is the third priority, so that the priority of the data migration storage protocol is greater than that of the data migration control protocol and greater than that of the data migration access protocol.

[0051] It is also possible to take the target data migration protocol corresponding to the largest number of dynamic data corresponding to each target migration information as the highest priority and the target data migration protocol corresponding to the smallest number of dynamic data corresponding to the migration information as the lowest priority according to the number of multiple dynamic data corresponding to each target migration information. For example, there are 500 dynamic data corresponding to the backup migration information, 30 dynamic data corresponding to the address migration information, and 172 dynamic data corresponding to the update migration information, so that the data migration storage protocol is taken as the first priority, the data migration access protocol is taken as the second priority, and the data migration control protocol is taken as the third priority.

[0052] It is also possible to preset the call priority weights and experience parameters of multiple target migration information, then set multiple data size weights according to the storage size occupied by multiple dynamic data corresponding to each target migration information, and then determine the emergency duration weight according to the duration of the emergency operation mode. Multiply the call priority weight, experience parameter, data size weight, and emergency duration weight to calculate the target weight corresponding to the target data migration protocol, and determine the priorities of multiple target data migration protocols according to the size of the target weight.

[0053] For example, the call priority weight of backup migration information is preset to 0.7, the call priority weight of address migration information is preset to 0.6, and the call priority weight of update migration information is preset to 0.4. The empirical parameter of backup migration information is set to 0.5, the empirical parameter of address migration information is set to 0.3, and the empirical parameter of update migration information is set to 0.4. The storage size occupied by multiple dynamic data corresponding to the backup migration information is 500MB, the storage size occupied by multiple dynamic data corresponding to the address migration information is 1000MB, and the storage size occupied by multiple dynamic data corresponding to the update migration information is 800MB. Thus, the data size weight of multiple dynamic data corresponding to the backup migration information is 0.25, the data size weight of multiple dynamic data corresponding to the address migration information is 0.7, and the data size weight of multiple dynamic data corresponding to the backup migration information is 0.5. The duration of the current memory system in the emergency operation mode is 2 minutes, and the determined emergency duration weight is 0.6. Multiply the above weights respectively to obtain the target weight corresponding to the data migration storage protocol as 0.0525, the target weight corresponding to the data migration control protocol as 0.0756, and the target weight corresponding to the data migration orientation protocol as 0.048. Thus, it is determined that the data migration control protocol is the first priority, the data migration storage protocol is the second priority, and the data migration access protocol is the third priority.

[0054] According to the embodiments of the present application, by determining the target data migration protocol priorities of multiple target data migration protocols, the disaster tolerance requirements for the memory system in different disaster tolerance scenarios can be flexibly faced, the flexibility and adaptability of the memory system can be improved, and thus it can be widely applied to various high-standard data-intensive scenarios.

[0055] According to the embodiments of the present application, the memory controller includes a data migration engine and a data migration protocol module. The data migration engine and the data migration protocol module are electrically connected. In the emergency operation mode, by using the data migration engine to configure the power supply mode of the power supply monitoring module, and then generating emergency operation information based on multiple dynamic data and hard disk attribute information and sending it to the central processing unit by calling the data migration access protocol interface, so that the central processing unit can quickly respond according to the current system status, generate and issue control instructions, and make preparations for the migration and storage of multiple dynamic data.

[0056] According to an embodiment of the present application, after receiving a control instruction, the data migration engine sends it to the data migration protocol module. The data migration protocol module first determines a plurality of first data migration protocols to be used according to a plurality of target migration information in the control instruction, and then confirms the data consistency information in the current two storage areas by calling the data migration access protocol interface, thereby screening the plurality of first data migration protocols according to the first storage consistency information, removing the first data migration protocols of the partial dynamic data that does not need to be repeatedly backed up and the partial dynamic data, and obtaining the target data migration protocol. Then, according to the target migration information and the dynamic data, the target data migration protocol priorities of the plurality of target data migration protocols are determined. Thus, the corresponding protocol interface can be called according to the priority to implement multi-protocol collaborative control, and under the multi-protocol collaborative control, a plurality of dynamic data are migrated and stored, thereby reducing the data loss risk of the memory system in the disaster recovery scenario and improving the preservation integrity of the dynamic data and system configuration parameters.

[0057] According to an embodiment of the present application, the data migration engine is further configured to perform configuration processing on a plurality of dynamic data and a plurality of target migration information according to the plurality of target data migration protocols and the plurality of target data migration protocol priorities to obtain a plurality of target dynamic data, and call the data migration storage protocol interface to store the plurality of target dynamic data in the target solid-state drive.

[0058] Figure 3 A schematic diagram of a data migration engine according to an embodiment of the present application is shown.

[0059] As Figure 3 shown, the data migration engine 201 includes a monitoring trigger sub-module 301, a direct memory access sub-module 302, a data compression hybrid verification sub-module 303, and a storage queue management sub-module 304. The data compression hybrid verification sub-module 303 includes a streaming compression engine 3031 and a hybrid verification unit 3032. The direct memory access sub-module 302 migrates a plurality of dynamic data from the dynamic random access memory 1031 to the data compression hybrid verification sub-module 303, and the storage queue management sub-module 304 stores the plurality of dynamic compressed data in the target solid-state drive 203 respectively.

[0060] According to an embodiment of the present application, the monitoring trigger sub-module is configured to send a plurality of target migration information to the direct memory access sub-module in response to receiving the plurality of target migration information.

[0061] The monitoring trigger sub-module can also be configured to receive cache data sent by the central processing unit. Among them, in the emergency operation mode, if the memory system does not crash, the storage of the cache data is suspended. If the memory system crashes, the central processing unit will not send cache data to the data migration engine during the period when the memory system crashes.

[0062] According to an embodiment of the present application, the direct memory access sub-module is electrically connected to the monitoring trigger sub-module, and is used to call a plurality of data migration protocol interfaces in sequence based on a plurality of target data migration protocol priorities, and migrate a plurality of dynamic data and a plurality of target migration information from the dynamic random access memory to the data compression hybrid verification sub-module.

[0063] The direct memory access sub-module can be a dual-channel direct memory access sub-module. One channel can migrate a plurality of target migration information to the data compression hybrid verification sub-module in the case of lossless and zero-copy transmission, and the other channel can call a plurality of data migration protocol interfaces in sequence according to a plurality of target data migration protocol priorities, and migrate a plurality of dynamic data to the data compression hybrid verification sub-module in the case of lossless and zero-copy transmission.

[0064] For example, the first priority is the data migration storage protocol, the second priority is the data migration access protocol. Currently, there are 5 dynamic data. The target migration information of the first, second, and fifth dynamic data is backup, and the target migration information of the third and fourth dynamic data is update. According to a plurality of target data migration protocol priorities, one channel migrates the backup target migration information to the data compression hybrid verification sub-module in the case of lossless and zero-copy transmission, and the other channel calls the data migration storage protocol interface to migrate the first, second, and fifth dynamic data to the data compression hybrid verification sub-module in the case of lossless and zero-copy transmission. Then one channel migrates the update target migration information to the data compression hybrid verification sub-module in the case of lossless and zero-copy transmission, and the other channel calls the data migration access protocol interface to migrate the third and fourth dynamic data to the data compression hybrid verification sub-module in the case of lossless and zero-copy transmission.

[0065] According to an embodiment of the present application, the direct memory access sub-module is further used to call the data migration access protocol interface to transmit a plurality of verification information for a plurality of dynamic data to the data compression hybrid verification sub-module, where the verification information includes a first redundant check code and a first linear block code.

[0066] In addition to storing a plurality of dynamic data, the dynamic random access memory can also store verification information corresponding to the dynamic data, so that when the dynamic data is migrated and stored in the solid state drive, the verification information can be used to verify the data migrated to the target solid state drive to ensure that the data stored in the target solid state drive is consistent with the data in the dynamic random access memory.

[0067] According to an embodiment of the present application, the data compression hybrid verification sub-module is used to perform compression and verification processing on a plurality of dynamic data and a plurality of target migration information to obtain a plurality of target dynamic data.

[0068] According to an embodiment of the present application, the data compression hybrid syndrome sub-module includes a streaming compression engine and a hybrid verification unit.

[0069] According to an embodiment of the present application, the streaming compression engine is electrically connected to the direct memory access sub-module and is used for compressing a plurality of dynamic data to obtain a plurality of dynamically compressed data.

[0070] The compression method may include LZ4 compression, but is not limited to the above compression methods.

[0071] According to an embodiment of the present application, the hybrid verification unit is electrically connected to the streaming compression engine and is used for verifying a plurality of dynamically compressed data by using a plurality of verification information to obtain a verification result; when the verification result indicates that the verification is passed, the plurality of dynamically compressed data and the plurality of target migration information are respectively packaged to obtain a plurality of target dynamic data.

[0072] According to an embodiment of the present application, the hybrid verification unit is further used for obtaining a first intermediate verification result according to a plurality of first redundant check codes and a plurality of second redundant check codes obtained by respectively performing cyclic redundancy check on the plurality of dynamically compressed data; when the first intermediate verification result indicates that the verification is passed, the first intermediate verification result is used as the verification result.

[0073] When the first redundant check code is consistent with the second redundant check code, it is confirmed that the first intermediate verification result is a passed verification. When the first redundant check code is inconsistent with the second redundant check code, it is confirmed that the first intermediate verification result is a failed verification.

[0074] According to an embodiment of the present application, the hybrid verification unit is further used for, when the first intermediate verification result indicates that the verification is failed: performing error correction processing on the plurality of dynamically compressed data according to a plurality of first linear block codes and a plurality of second linear block codes obtained by respectively performing finite field check on the plurality of dynamically compressed data to obtain a plurality of dynamically corrected data; obtaining a second intermediate verification result according to a third redundant check code obtained by respectively performing cyclic redundancy check on the plurality of dynamically corrected data and the first redundant check code, and using the second intermediate verification result as the verification result.

[0075] When the first intermediate verification result indicates that the verification is failed, the first linear block code and the second linear block code are usually inconsistent, so that based on the first linear block code, error correction operation in finite field check is used to perform error correction on the dynamically compressed data to obtain dynamically corrected data.

[0076] When the third redundant check code is consistent with the first redundant check code, it is determined that both the second intermediate check result and the check result are passed. When the third redundant check code is inconsistent with the first redundant check code, it is determined that both the second intermediate check result and the check result are not passed, and the abnormal dynamic correction data is kicked out of the multiple dynamic data to be migrated, so as to ensure that the correct multiple dynamic compression data can continue to be migrated and stored. At the same time, the abnormal dynamic correction data and the original dynamic compression data corresponding to the abnormal dynamic correction data can be temporarily stored in the hybrid check generation unit. After all the dynamic compression data are normally migrated to the storage queue management sub-module, according to the predetermined error correction rounds, the abnormal dynamic correction data and the original dynamic compression data corresponding to the abnormal dynamic correction data are subjected to re-error correction processing.

[0077] During the process of checking each dynamic compression data, multiple first intermediate check results and multiple second intermediate check results can also be obtained. According to each first intermediate check result and each second intermediate check result, the dynamic compression data is released to the storage queue management sub-module one by one, so that it is not necessary to wait for all the dynamic compression data to pass the check before transmitting them to the storage queue management sub-module, thereby improving the processing efficiency.

[0078] According to an embodiment of the present application, by combining multiple check methods, the first redundant check code and the first linear block code are used to check the correctness of the dynamic compression data transmitted to the hybrid check generation unit. When the check using the first redundant check code fails, based on the finite field check, the first linear block code is used to perform error correction processing on it, so that the incorrect dynamic data can be corrected back to the dynamic data consistent with the dynamic data stored in the dynamic random access memory. So as to store the correct dynamic compression data in the target solid state drive, reduce the data loss risk of the memory system in the disaster recovery scenario, and improve the preservation integrity and preservation correctness of the dynamic data and system configuration parameters.

[0079] According to an embodiment of the present application, the data migration engine further includes a storage queue management sub-module.

[0080] According to an embodiment of the present application, the storage queue management sub-module is used to respond to receiving multiple target dynamic data from the data compression hybrid check sub-module, and store the multiple dynamic compression data in multiple predetermined storage spaces of the target solid state drive according to the multiple target migration information.

[0081] Figure 4 Shows a schematic diagram of a solid state drive according to an embodiment of the present application.

[0082] As Figure 4As shown in the figure, each solid state drive 1032 may include a plurality of predetermined storage spaces, which include a configuration storage space 401, an address storage space 402, and a data storage space 403. Among them, the configuration storage space 401 can be used to store configuration information such as address allocation, mode configuration, and application form of the memory controller. The address storage space 402 can be used to store information such as the source address, target address, and transmission ID routing of cache data. The data storage space 403 is used to store cache data and dynamic data.

[0083] The plurality of predetermined storage spaces may include a configuration storage space, an address storage space, and a data storage space, but are not limited to the above storage spaces.

[0084] The storage queue management sub-module can be used to store multiple dynamically compressed data corresponding to configuration migration information in the configuration storage space; store multiple dynamically compressed data corresponding to address migration information in the address storage space; store multiple dynamically compressed data corresponding to backup migration information in the data storage space.

[0085] According to an embodiment of the present application, by pre-dividing the storage space in the solid state drive according to the function of the solid state drive, the write scheduling and channel allocation of the solid state drive are optimized, so that better storage control can be performed on the solid state drive. Combined with the queue characteristics of the storage queue management sub-module, multiple dynamic data can be stored in their corresponding predetermined storage spaces orderly and efficiently, improving the efficiency of migration storage.

[0086] According to an embodiment of the present application, through the pipelined cooperation between multiple sub-modules and units in the data migration engine, combined with the cooperative control between multiple protocols, lossless migration of 128GB-level dynamic data can be achieved within 300ms, extending the backup time window of dynamic data and improving the effective throughput of the memory system.

[0087] According to an embodiment of the present application, the memory controller may further include a data migration confirmation module.

[0088] According to an embodiment of the present application, the data migration confirmation module is used to call the data migration access protocol interface to perform consistency confirmation on multiple dynamic data stored in the dynamic random access memory and multiple non-volatile data stored in the target solid state drive, and obtain the second storage consistency information; when the second storage consistency information indicates storage consistency, switch the emergency operation mode to the pause operation mode, where the pause operation mode indicates freezing multiple dynamic data migrations and maintaining the physical layer training state between the memory system and the central processing unit.

[0089] After all dynamic data in the emergency operation mode is migrated and stored to the target solid-state drive, the operation mode of the memory system needs to be switched to the pause operation mode, freezing multiple dynamic data migrations, only maintaining the physical layer training state between the memory system and the central processing unit, retaining basic parameters such as equalization parameters and bit error rate, and reducing the power consumption of the memory system to wait for the host to restart and wake up. Therefore, it is necessary to use the data migration confirmation module to perform a consistency confirmation on the data stored in the target solid-state drive and the dynamic random access memory at this time. If the second storage consistency information indicates storage consistency, it means that the dynamic data in the dynamic random access memory has been backed up and stored to the target solid-state drive. If the second storage consistency information indicates storage inconsistency, the memory system still needs to maintain the emergency operation mode until the second storage consistency information indicates storage consistency and enters the pause operation mode.

[0090] According to an embodiment of the present application, the memory controller is further configured to, when the operation mode is the normal operation mode, call a plurality of data migration protocol interfaces to store cache data from the central processing unit to a plurality of dynamic random access memories and / or a plurality of solid-state drives.

[0091] When the operation mode of the memory system is the normal operation mode, a plurality of data migration protocol interfaces can be called simultaneously to perform functions required for various data processing simultaneously, and each data channel is retained.

[0092] Figure 5 A schematic diagram of an enable controller according to an embodiment of the present application is shown.

[0093] As Figure 5 shown, the memory system further includes an enable controller 501. The enable controller 501 is electrically connected to the memory controller 102 and the power supply monitoring module 101, and the central processing unit 105 is electrically connected to the memory controller 102.

[0094] According to an embodiment of the present application, the enable controller is electrically connected to the memory controller and the power supply monitoring module, and is configured to send an enable signal or an interrupt signal to the power supply monitoring module in response to the operation mode to control the power supply monitoring module to switch to the normal power supply mode or the emergency power supply mode.

[0095] In the normal operation mode, the memory controller controls the enable controller to send an enable signal to the power supply monitoring module, so that the memory system is powered by the motherboard voltage of the motherboard power interface. In the emergency operation mode, the memory controller controls the enable controller to send an enable signal or an interrupt signal to the power supply monitoring module, so that the memory system is powered by the motherboard voltage of the motherboard power interface or by the backup power sub-module in the power supply monitoring module.

[0096] According to an embodiment of the present application, the main board power supply parameters include the main board voltage, and the emergency power supply mode may include a first emergency power supply mode and a second emergency power supply mode.

[0097] According to an embodiment of the present application, the memory controller is further configured to control the enable controller to send an enable signal to the power supply monitoring module when the main board voltage is greater than a first preset voltage threshold and the heartbeat information is greater than a first heartbeat threshold, so that the power supply monitoring module switches to the first emergency power supply mode.

[0098] According to an embodiment of the present application, the memory controller is further configured to control the enable controller to send an interrupt signal to the power supply monitoring module when the main board voltage is less than a second preset voltage threshold, so that the power supply monitoring module switches to the second emergency power supply mode, where the first preset voltage threshold is greater than the second preset voltage threshold.

[0099] According to an embodiment of the present application, the memory controller is further configured to: control the enable controller to send an interrupt signal to the power supply monitoring module when the main board voltage is greater than the first preset voltage threshold and the heartbeat information is less than the first heartbeat threshold, so that the power supply monitoring module switches to the normal power supply mode.

[0100] The first preset voltage threshold may be 11.5V, the second preset voltage threshold may be 10.8V, and the first heartbeat threshold may be 30ms.

[0101] When the main board voltage is greater than the first preset voltage threshold and the heartbeat information is greater than the first heartbeat threshold, the first emergency power supply mode is powered by the main board voltage of the main board power supply interface. When the main board voltage is less than the second preset voltage threshold, the second emergency power supply mode is powered by the backup power supply sub-module in the power supply monitoring module.

[0102] When the main board voltage is less than the first preset voltage threshold and greater than the second preset voltage threshold, the operating mode of the memory system is still the normal operating mode, and at the same time, the main board power supply parameters can be sent to the memory controller. The memory controller can closely monitor and supervise the main board voltage at this time, so as to quickly retrieve multiple dynamic data and the hard disk attribute information of the solid state drive when the operating mode switches to the emergency operating mode.

[0103] As long as any one of the conditions that the heartbeat information is greater than the first heartbeat threshold and the main board voltage is less than the second preset voltage threshold is satisfied, it can be determined that the current memory system enters the emergency operating mode, and then the current emergency power supply mode is further determined according to the main board voltage of the main board power supply interface.

[0104] The normal operating mode, the emergency operating mode, and the suspended operating mode included in the operating mode may be as shown in Table 1.

[0105] Table 1

[0106] Figure 6 Shows a schematic diagram of a power supply monitoring module according to an embodiment of the present application.

[0107] As Figure 6 shown, the power supply monitoring module 101 includes a monitoring sub-module 601, a charge and discharge sub-module 602, a backup power supply sub-module 603, and a power conversion sub-module 604. The monitoring sub-module 601 is electrically connected to the main board power supply interface 104. The charge and discharge sub-module 602 is electrically connected to the monitoring sub-module 601, the backup power supply sub-module 603, the enable controller 501, and the memory controller 102. The backup power supply sub-module 603 is electrically connected to the charge and discharge sub-module 602. The power conversion sub-module 604 is electrically connected to the charge and discharge sub-module 602, the monitoring sub-module 601, the memory controller 102, and the memory module 103.

[0108] According to an embodiment of the present application, the monitoring sub-module is electrically connected to the main board power supply interface and is used to monitor the main board voltage. When the main board voltage is greater than the first preset voltage threshold, the monitoring sub-module connects the electrical connection between the main board power supply interface and the charge and discharge sub-module. When the main board voltage is less than the second preset voltage threshold, the monitoring sub-module disconnects the electrical connection between the main board power supply interface and the charge and discharge sub-module.

[0109] The main board voltage and current can be monitored within the monitoring sub-module, and a switch can be provided within the monitoring sub-module. When the main board voltage is greater than the first preset voltage threshold, the switch conducts, connecting the electrical connection between the main board power supply interface and the charge and discharge sub-module. When the main board voltage is less than the second preset voltage threshold, the switch turns off, disconnecting the electrical connection between the main board power supply interface and the charge and discharge sub-module.

[0110] According to an embodiment of the present application, the charge and discharge sub-module is electrically connected to the monitoring sub-module and the backup power supply sub-module and is used to be in a charging state or a discharging state in response to the electrical connection state between the main board power supply interface and the charge and discharge sub-module.

[0111] Figure 7 Shows a schematic diagram of the charge and discharge sub-module according to an embodiment of the present application.

[0112] As Figure 7 shown, the charge and discharge sub-module 602 includes a power supply switching unit 701, an interaction unit 702, and a power dynamic regulation unit 703. The power supply switching unit 701 is electrically connected to the monitoring sub-module 601, the backup power supply sub-module 603, and the power conversion sub-module 604. The interaction unit 702 is electrically connected to the enable controller 501 and the memory controller 102. The power dynamic regulation unit 703 is electrically connected to the power supply switching unit 701.

[0113] According to an embodiment of the present application, the power switching unit is electrically connected to the monitoring sub-module and the backup power sub-module, and is used to be in the normal power supply mode or the first emergency power supply mode and control the power supply from the motherboard voltage to the memory controller when the motherboard power interface is connected to the charge and discharge sub-module; when the motherboard power interface is disconnected from the charge and discharge sub-module, it is in the second emergency power supply mode and controls the backup power sub-module to supply power to the memory controller.

[0114] When the motherboard power interface is connected to the charge and discharge sub-module, the first terminal VIN0 of the power switching unit receives the motherboard voltage, VIN0 is pulled high to 1, and the second terminal VIN1 is pulled low to 0. Thus, in the normal power supply mode or the first emergency power supply mode, the power switching unit outputs the motherboard voltage. At the same time, in response to the charge state configuration instruction transmitted by the interaction unit, the power switching unit is configured in the charge state, and uses the output motherboard voltage to charge the backup power sub-module. The motherboard power interface directly sends the motherboard voltage to the power conversion sub-module to facilitate the power conversion sub-module to convert the motherboard voltage.

[0115] When the motherboard power interface is disconnected from the charge and discharge sub-module, the first terminal VIN0 of the power switching unit is pulled low to 0, the memory controller configures the backup power sub-module in the discharge state, the backup power sub-module supplies power to the power switching unit, and the second terminal VIN1 is pulled high to 1. Thus, in the second emergency power supply mode, the power switching unit outputs the power supply voltage. At the same time, in response to the discharge state configuration instruction transmitted by the interaction unit, the power switching unit is configured in the discharge state, and uses the backup power sub-module and the power switching unit to jointly send the power supply voltage to the power conversion sub-module to facilitate the power conversion sub-module to convert the power supply voltage.

[0116] According to an embodiment of the present application, the interaction unit is electrically connected to the enable controller and the memory controller, and is used to provide the enable signal or interrupt signal from the enable controller and the charge and discharge state configuration instruction from the memory controller to the power switching unit, and provide the input voltage and output voltage of the power switching unit to the memory controller.

[0117] The memory controller sends a charge-discharge state configuration instruction and a voltage and current limit configuration instruction of the power switching unit to the interaction unit according to the configuration parameters of the monitoring sub-module and the configuration parameters of the backup power supply sub-module transmitted through the integrated circuit bus protocol or the system management bus protocol, and controls the enable controller to send an enable signal or an interrupt signal to the interaction unit. After receiving the charge-discharge state configuration instruction and the enable signal or interrupt signal, the interaction unit sends them to the power switching unit so that the power switching unit can switch the charge-discharge state, the on / off state of the first terminal VIN0, and the on / off state of the second terminal VIN1. Then, after the power switching unit is configured, the configuration parameters at this time can be sent to the memory controller through the interaction unit again. Among them, when the operating mode is the emergency operating mode, reducing the serializer drive current to 30% of the normal value can be achieved by the memory controller sending the corresponding voltage and current limit configuration instruction to the interaction unit.

[0118] According to an embodiment of the present application, the power dynamic regulation unit is electrically connected to the power switching unit and is used for dynamically regulating the input voltage and the output voltage to make the input voltage and the output voltage stable.

[0119] When the motherboard power interface is connected to the charge and discharge sub-module, the power dynamic regulation unit can dynamically regulate the input motherboard voltage and the output motherboard voltage. When the motherboard power interface is disconnected from the charge and discharge sub-module, the power dynamic regulation unit can dynamically regulate the input power voltage and the output power voltage.

[0120] According to an embodiment of the present application, the backup power supply sub-module is electrically connected to the charge and discharge sub-module and is used for supplying power to the memory controller in response to the charge and discharge sub-module being in the discharge state.

[0121] The backup power supply sub-module can be a battery module.

[0122] When the motherboard voltage is less than the second preset voltage threshold, the backup power supply sub-module in the discharge state and the charge and discharge sub-module in the discharge state are used together to supply power to the memory system to maintain only the electric energy required for data migration in the memory system.

[0123] The power conversion sub-module is electrically connected to the monitoring sub-module, the charge and discharge sub-module, the memory controller, and the memory module, and is used for converting the motherboard voltage or the power voltage to obtain output voltages of various specification levels to supply power to different hardware components. For example, a DC voltage of 12V, a DC voltage of 1.2V, a DC voltage of 1.1V, and a DC voltage of 0.6V can be output, and the DC voltage of 12V is used to supply power to the memory controller, and the DC voltage of 1.2V is used to supply power to the memory module.

[0124] Figure 8The flowchart of the disaster recovery control method for the memory system according to the embodiment of the present application is shown.

[0125] As Figure 8 shown, the disaster recovery control method for the memory system in this embodiment includes operations S810 to S840.

[0126] In operation S810, the main board power supply parameters of the main board power interface are obtained.

[0127] In operation S820, according to the main board power supply parameters and the heartbeat information of the memory system, the operating mode of the memory system is determined.

[0128] In operation S830, when the operating mode is the emergency operating mode and a control instruction from the central processing unit is received, according to the control instruction and multiple dynamic data stored in the dynamic random access memory, multiple target data migration protocol information is determined.

[0129] In operation S840, according to the multiple target data migration protocol information, multiple data migration protocol interfaces are respectively called to migrate the multiple dynamic data from the dynamic random access memory to the target solid-state drive.

[0130] After all the multiple dynamic data are migrated from the dynamic random access memory to the target solid-state drive, the data in the dynamic random access memory and the target solid-state drive are confirmed for consistency. After the confirmation is consistent, the operating mode of the memory system is switched to the suspended operating mode.

[0131] According to the embodiment of the present application, by first obtaining the main board power supply parameters of the main board power interface, and then determining the operating mode of the memory system according to the main board power supply parameters and the heartbeat information of the memory system. When a failure occurs in the memory system, the operating mode is switched to the emergency operating mode and a control instruction from the central processing unit is received. According to the control instruction and multiple dynamic data stored in the dynamic random access memory, multiple target data migration protocol information is determined. Based on the multiple target data migration protocol information, multiple data migration protocol interfaces are respectively called to migrate the multiple dynamic data from the dynamic random access memory to the target solid-state drive. It realizes the rapid switching of the operating mode of the memory system through the real-time monitoring of the main board power supply parameters and the heartbeat information, and at the same time configures the switching of the power supply unit to achieve nanosecond-level power switching, dynamically adjusts the memory control protocol in different operating states, ensures data integrity while reducing power consumption. Compared with the prior art, the data loss risk of the present application can be reduced by 90%.

[0132] Figure 9 The block diagram of the electronic device suitable for implementing the disaster recovery control method for the memory system according to the embodiment of the present application is shown.

[0133] As Figure 9As shown, the electronic device according to an embodiment of the present application includes a processor 901, which can perform various appropriate actions and processes according to a program stored in a read-only memory (ROM) 902 or a program loaded from a storage section 908 into a random access memory (RAM) 903. The processor 901 may include, for example, a general microprocessor (such as a CPU), an instruction set processor, and / or a related chipset, and / or a dedicated microprocessor (such as an application specific integrated circuit (ASIC)), etc. The processor 901 may also include on-board memory for caching purposes. The processor 901 may include a single processing unit or multiple processing units for performing different actions of the method flow according to an embodiment of the present application.

[0134] In the RAM 903, various programs and data required for the operation of the electronic device are stored. The processor 901, the ROM 902, and the RAM 903 are connected to each other via a bus 904. The processor 901 performs various operations of the method flow according to an embodiment of the present application by executing the programs in the ROM 902 and / or the RAM 903. It should be noted that the program may also be stored in one or more memories other than the ROM 902 and the RAM 903. The processor 901 may also perform various operations of the method flow according to an embodiment of the present application by executing the programs stored in the one or more memories.

[0135] According to an embodiment of the present application, the electronic device may further include an input / output (I / O) interface 905, and the input / output (I / O) interface 905 is also connected to the bus 904. The electronic device 900 may further include one or more of the following components connected to the input / output (I / O) interface 905: an input section 906 including a keyboard, a mouse, etc.; an output section 907 including a cathode ray tube (CRT), a liquid crystal display (LCD), etc. and a speaker, etc.; a storage section 908 including a hard disk, etc.; and a communication section 909 including a network interface card such as a LAN card, a modem, etc. The communication section 909 performs communication processing via a network such as the Internet. A drive 910 is also connected to the input / output (I / O) interface 905 as needed. A removable medium 911, such as a magnetic disk, an optical disk, a magneto-optical disk, a semiconductor memory, etc., is installed on the drive 910 as needed so that a computer program read from it can be installed into the storage section 908 as needed.

[0136] The present application also provides a computer-readable storage medium, which may be included in the device / apparatus / system described in the above embodiments; or may exist separately without being assembled into the device / apparatus / system. The above computer-readable storage medium carries one or more programs, and when the one or more programs are executed, the method according to an embodiment of the present application is implemented.

[0137] According to an embodiment of the present application, the computer-readable storage medium may be a non-volatile computer-readable storage medium, and may include, for example, but not limited to: portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination of the above. In the present application, the computer-readable storage medium may be any tangible medium that contains or stores a program, and the program may be used by or in combination with an instruction execution system, apparatus, or device. For example, according to an embodiment of the present application, the computer-readable storage medium may include the above-described ROM 902 and / or RAM 903 and / or one or more memories other than ROM 902 and RAM 903.

[0138] An embodiment of the present application further includes a computer program product, which includes a computer program, and the computer program includes program code for executing the method shown in the flowchart. When the computer program product runs in a computer system, the program code is used to cause the computer system to implement the memory system disaster tolerance control method provided by the embodiments of the present application.

[0139] When the computer program is executed by the processor 901, the above functions defined in the system / apparatus of the embodiments of the present application are executed. According to an embodiment of the present application, the above-described systems, apparatuses, modules, units, etc. may be implemented by computer program modules.

[0140] In one embodiment, the computer program may rely on tangible storage media such as optical storage devices and magnetic storage devices. In another embodiment, the computer program may also be transmitted and distributed in the form of a signal on a network medium, and be downloaded and installed through the communication part 909, and / or be installed from the removable medium 911. The program code included in the computer program may be transmitted by any suitable network medium, including but not limited to: wireless, wired, etc., or any suitable combination of the above.

[0141] In such an embodiment, the computer program may be downloaded and installed from the network through the communication part 909, and / or be installed from the removable medium 911. When the computer program is executed by the processor 901, the above functions defined in the system of the embodiments of the present application are executed. According to an embodiment of the present application, the above-described systems, devices, apparatuses, modules, units, etc. may be implemented by computer program modules.

[0142] In accordance with embodiments of the present application, program code for executing the computer programs provided by the embodiments of the present application can be written in any combination of one or more programming languages. Specifically, these computing programs can be implemented using high-level procedural and / or object-oriented programming languages, and / or assembly / machine languages. Programming languages include, but are not limited to, such as Java, C++, Python, the "C" language, or similar programming languages. The program code can be executed entirely on the user's computing device, partially on the user's device, partially on a remote computing device, or entirely on a remote computing device or server. In the case of a remote computing device, the remote computing device can be connected to the user's computing device through any type of network, including a local area network (LAN) or a wide area network (WAN), or can be connected to an external computing device (e.g., by connecting through the Internet using an Internet service provider).

[0143] The flowcharts and block diagrams in the accompanying drawings illustrate the possible architectures, functions, and operations of systems, methods, and computer program products according to various embodiments of the present application. In this regard, each block in the flowchart or block diagram can represent a module, a program segment, or a part of code that contains one or more executable instructions for implementing the specified logical function. It should also be noted that in some alternative implementations, the functions marked in the blocks may occur in a different order than marked in the accompanying drawings. For example, two consecutive blocks shown may actually be executed substantially in parallel, and they may sometimes be executed in the reverse order, depending on the functions involved. It should also be noted that each block in the block diagram or flowchart, and combinations of blocks in the block diagram or flowchart, can be implemented by a dedicated hardware-based system for performing the specified functions or operations, or can be implemented by a combination of dedicated hardware and computer instructions.

[0144] Those skilled in the art can understand that the features described in the various embodiments of the present application can be combined and / or combined in various ways, even if such combinations or combinations are not explicitly described in the present application. In particular, without departing from the spirit and teachings of the present application, the features described in the various embodiments of the present application can be combined and / or combined in various ways. All such combinations and / or combinations fall within the scope of the present application.

[0145] The above describes the embodiments of the present application. However, these embodiments are for illustrative purposes only and are not intended to limit the scope of the present application. Although the embodiments are described separately above, this does not mean that the measures in the various embodiments cannot be used advantageously in combination. Without departing from the scope of the present application, those skilled in the art can make various substitutions and modifications, and all such substitutions and modifications should fall within the scope of the present application.

Claims

1. A memory system, characterized in that: The memory system comprises: The power supply monitoring module is used to monitor the mainboard power supply parameters of the mainboard power interface; A memory controller is electrically connected to the power supply monitoring module, and the memory controller is used to: Determining an operation mode of the memory system according to the mainboard power supply parameters from the power supply monitoring module and the heartbeat information of the memory system; In the case where the operation mode is an emergency operation mode and a control instruction from a central processing unit is received, multiple target data migration protocol information is determined according to the control instruction and multiple dynamic data stored in a dynamic random access memory, wherein, in the case where the heartbeat information is greater than a first heartbeat threshold or the mainboard power supply parameter is less than a second preset voltage threshold, the operation mode is determined to be the emergency operation mode; According to the plurality of target data migration protocol information, the plurality of data migration protocol interfaces of the memory controller are respectively called to migrate the plurality of dynamic data from the dynamic random access memory to a target solid state drive among the plurality of solid state drives.

2. The system according to claim 1, characterized in that The target data migration protocol information includes the target data migration protocol and the target data migration protocol priority; The memory controller comprises: a data migration engine, electrically connected to the central processing unit, for sending an emergency power supply mode configuration instruction to the power supply monitoring module according to the emergency operation mode; in response to the power supply monitoring module being configured in the emergency power supply mode, generating emergency operation information according to the plurality of dynamic data and the hard disk attribute information of the solid state disk, and calling a data migration access protocol interface to send the emergency operation information to the central processing unit; and calling a data migration control protocol interface to receive the control instruction generated by the central processing unit in response to the emergency operation information, the control instruction including a plurality of target migration information and target solid state disk information; and The data migration protocol module is electrically connected to the data migration engine and is used to determine a plurality of target data migration protocols and a plurality of target data migration protocol priorities for a plurality of the dynamic data according to a plurality of the target migration information.

3. The system according to claim 2, characterized in that The data migration protocol module is also used for: Determining a plurality of first data migration protocols for a plurality of the dynamic data according to the plurality of the target migration information; Calling the data migration access protocol interface to perform consistency confirmation on the plurality of dynamic data stored in the dynamic random access memory and the non-volatile data stored in the target solid state drive to obtain first storage consistency information; Determining a plurality of target data migration protocols according to the first storage consistency information and the first data migration protocol; The target data migration protocol priorities of the target data migration protocols are determined according to the target migration information and the dynamic data.

4. The system according to claim 2, characterized in that The data migration engine is also used for: According to the multiple target data migration protocols and the multiple target data migration protocol priorities, the multiple dynamic data and the multiple target migration information are configured and processed to obtain multiple target dynamic data, and the data migration storage protocol interface is called to store the multiple target dynamic data to the target solid state drive.

5. The system according to claim 4, characterized in that The data migration engine includes: a monitoring triggering submodule, configured to send the plurality of target migration information to the direct memory access submodule in response to receiving the plurality of target migration information; a direct memory access submodule, electrically connected to the monitoring trigger submodule, and configured to sequentially call a plurality of data migration protocol interfaces based on a plurality of target data migration protocols according to a plurality of target data migration protocol priorities, and migrate a plurality of dynamic data and a plurality of target migration information from the dynamic random access memory to a data compression hybrid check submodule; The data compression and mixed verification submodule is used to compress and verify the multiple dynamic data and the multiple target migration information to obtain the multiple target dynamic data.

6. The system according to claim 5, characterized in that The direct memory access submodule is also used for: The data migration access protocol interface is called to transmit a plurality of check information for the plurality of dynamic data to the data compression hybrid check submodule, wherein the check information includes a first redundant check code and a first linear block code.

7. The system according to claim 5, characterized in that The data compression mixed syndrome submodule comprises: A stream compression engine, electrically connected to the direct memory access submodule, for compressing the plurality of dynamic data to obtain a plurality of dynamic compressed data; A hybrid verification unit is electrically connected to the streaming compression engine and is used to verify the multiple dynamic compressed data using multiple verification information to obtain a verification result; when the verification result indicates that the verification is passed, the multiple dynamic compressed data and the multiple target migration information are packaged and processed separately to obtain multiple target dynamic data.

8. The system according to claim 7, characterized in that The hybrid verification unit is also used for: Obtaining a first intermediate check result according to the plurality of first redundant check codes and the plurality of second redundant check codes obtained by performing cyclic redundancy check on the plurality of dynamic compressed data respectively; When the first intermediate verification result indicates that the verification has passed, the first intermediate verification result is used as the verification result.

9. The system according to claim 8, characterized in that The hybrid verification unit is further configured to: if the first intermediate verification result indicates that the verification fails: According to the plurality of first linear block codes and the plurality of second linear block codes obtained by respectively performing finite field checks on the plurality of dynamic compressed data, error correction processing is performed on the plurality of dynamic compressed data to obtain a plurality of dynamic corrected data; A second intermediate check result is obtained according to a third redundant check code and the first redundant check code obtained by performing cyclic redundancy check on the plurality of the dynamic correction data respectively, and the second intermediate check result is used as the check result.

10. The system according to claim 5, characterized in that The data migration engine also includes: The storage queue management submodule is used to respond to receiving the multiple target dynamic data from the data compression hybrid check submodule and store the multiple dynamic compressed data respectively in the multiple predetermined storage spaces of the target solid state drive according to the multiple target migration information.

11. The system according to claim 1, characterized in that The memory controller further includes: A data migration confirmation module is used to call a data migration access protocol interface to perform consistency confirmation on multiple dynamic data stored in the dynamic random access memory and multiple non-volatile data stored in the target solid-state drive to obtain second storage consistency information; when the second storage consistency information indicates storage consistency, the emergency operation mode is switched to a suspended operation mode, wherein the suspended operation mode indicates freezing the migration of multiple dynamic data and maintaining the physical layer training state between the memory system and the central processing unit.

12. The system according to claim 1, characterized in that The memory controller is further configured to: When the operation mode is a normal operation mode, a plurality of the data migration protocol interfaces are called to store the cache data from the central processing unit into the dynamic random access memory or the solid state drive.

13. The system according to claim 1, characterized in that The memory system further includes: An enable controller is electrically connected to the memory controller and the power supply monitoring module, and is used to send an enable signal or an interrupt signal to the power supply monitoring module in response to the operating mode to control the power supply monitoring module to switch to a normal power supply mode or an emergency power supply mode.

14. The system according to claim 13, characterized in that The mainboard power supply parameter includes a mainboard voltage, and the emergency power supply mode includes a first emergency power supply mode and a second emergency power supply mode; The memory controller is also used to: when the mainboard voltage is greater than a first preset voltage threshold and the heartbeat information is greater than the first heartbeat threshold, control the enable controller to send the enable signal to the power supply monitoring module so that the power supply monitoring module switches to the first emergency power supply mode; when the mainboard voltage is less than the second preset voltage threshold, control the enable controller to send the interrupt signal to the power supply monitoring module so that the power supply monitoring module switches to the second emergency power supply mode, wherein the first preset voltage threshold is greater than the second preset voltage threshold.

15. The system according to claim 14, characterized in that The memory controller is further configured to: When the mainboard voltage is greater than the first preset voltage threshold and the heartbeat information is less than the first heartbeat threshold, the enabling controller is controlled to send the interrupt signal to the power supply monitoring module so that the power supply monitoring module switches to the normal power supply mode.

16. The system according to claim 1, characterized in that The power supply monitoring module comprises: A monitoring submodule, electrically connected to the mainboard power interface, and used to monitor the mainboard voltage. When the mainboard voltage is greater than a first preset voltage threshold, the monitoring submodule connects the mainboard power interface to the charging and discharging electronic module; when the mainboard voltage is less than the second preset voltage threshold, the monitoring submodule disconnects the mainboard power interface from the charging and discharging electronic module. A charging and discharging electronic module, electrically connected to the monitoring submodule and the backup power submodule, and configured to be in a charging state or a discharging state in response to the electrical connection state between the mainboard power interface and the charging and discharging electronic module; The backup power submodule is electrically connected to the charge-discharge electronic module and is used to supply power to the memory controller in response to the charge-discharge electronic module being in the discharge state.

17. The system according to claim 16, characterized in that The charging and discharging electronic module comprises: A power switching unit is electrically connected to the monitoring submodule and the backup power submodule, and is used to control the motherboard voltage to supply power to the memory controller in a normal power supply mode or a first emergency power supply mode when the motherboard power interface is connected to the charging and discharging electronic module; and in a second emergency power supply mode when the motherboard power interface is disconnected from the charging and discharging electronic module, and control the backup power submodule to supply power to the memory controller; An interaction unit is electrically connected to the enable controller and the memory controller, and is used to provide the enable signal or interrupt signal from the enable controller and the charge and discharge state configuration instruction from the memory controller to the power switching unit, and to provide the input voltage and output voltage of the power switching unit to the memory controller.

18. The system according to claim 17, characterized in that The charging and discharging electronic module also includes a power supply dynamic adjustment unit; The power dynamic adjustment unit is electrically connected to the power switching unit and is used to dynamically adjust the input voltage and the output voltage to stabilize the input voltage and the output voltage.

19. A memory system disaster recovery control method applied to the memory system of any one of claims 1-18, characterized in that: include: Get the motherboard power supply parameters of the motherboard power interface; Determining an operating mode of the memory system according to the mainboard power supply parameters and the heartbeat information of the memory system; In the case where the operation mode is an emergency operation mode and a control instruction from a central processing unit is received, multiple target data migration protocol information is determined according to the control instruction and multiple dynamic data stored in a dynamic random access memory, wherein, in the case where the heartbeat information is greater than a first heartbeat threshold or the mainboard power supply parameter is less than a second preset voltage threshold, the operation mode is determined to be the emergency operation mode; According to the plurality of target data migration protocol information, a plurality of data migration protocol interfaces are respectively called to migrate the plurality of dynamic data from the dynamic random access memory to the target solid state drive.

20. An electronic device, comprising: one or more processors; a memory for storing one or more computer programs, The method according to claim 19 is characterized in that the one or more processors execute the one or more computer programs to implement the method according to claim 19.

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