High-level language compiling method and device, electronic equipment and storage medium

Abstract

The invention relates to a high-level language compiling method and device, electronic equipment and a storage medium. The method comprises the steps that a high-level language code is analyzed into an abstract syntax tree; semantic parsing operation is executed on the abstract syntax tree to obtain a first language, and the first language is a high-level intermediate representation language; generating a second language based on the first language, wherein the second language is a low-level intermediate representation language; and generating a target file according to the second language. According to the embodiment of the invention, the abstract syntax tree is converted into the advanced intermediate representation language, so that software engineering design is more met, and a code structure is clearer.

Description

Technical Field

[0001] The present disclosure relates to the field of data processing technology, and in particular to a high-level language compilation method, an apparatus, an electronic device and a storage medium. Background Art

[0002] Code is a source file written by programmers in a language supported by development tools. It is a set of clear rules that represent information in discrete form using characters, symbols or signal code elements. In the process of running code, a compiler is indispensable. A compiler is a program that converts high-level language code into binary instructions. Therefore, how to better compile high-level language code into binary instructions is a technical problem that needs to be solved urgently. Summary of the invention

[0003] In order to overcome the problems existing in the related art, the present disclosure provides a high-level language compilation method, device, electronic device and storage medium.

[0004] According to a first aspect of an embodiment of the present disclosure, a high-level language compiling method is provided, comprising:

[0005] Parse high-level language code into an abstract syntax tree;

[0006] Performing a semantic parsing operation on the abstract syntax tree to obtain a first language, where the first language is a high-level intermediate representation language;

[0007] generating a second language based on the first language, wherein the second language is a low-level intermediate representation language;

[0008] A target file is generated according to the second language.

[0009] Optionally, performing a semantic parsing operation on the abstract syntax tree to obtain a first language includes:

[0010] Determining semantic parsing information corresponding to the high-level language code;

[0011] The abstract syntax tree is semantically parsed according to the semantic parsing information to obtain the first language.

[0012] Optionally, the semantic parsing information includes at least one of the following:

[0013] Loading class information, wherein the loaded class information is defined according to a class of a high-level language;

[0014] Loading interface information, wherein the loading interface information is defined according to the interface of the high-level language;

[0015] Closure information, wherein the closure information is defined according to the closure characteristics of the high-level language;

[0016] Asynchronous information, wherein the asynchronous information is defined according to the asynchronous characteristics of the high-level language;

[0017] Calling information, wherein the calling information is defined according to a function call of the high-level language;

[0018] Dynamic memory layout information, the dynamic memory layout information is defined according to any dynamic object of the high-level language;

[0019] Arithmetic instruction information, wherein the arithmetic instruction information is defined according to operators of the high-level language;

[0020] Conversion information, wherein the conversion information is defined according to various types of object conversions of the high-level language.

[0021] Optionally, the second language includes a low-level virtual machine intermediate representation language, and the generating the second language based on the first language includes:

[0022] The low-level virtual machine intermediate representation language is generated based on the first language.

[0023] Optionally, the second language further includes a low-level binary intermediate representation language, and the generating the second language based on the first language includes:

[0024] The low-level binary intermediate representation language is generated based on the first language.

[0025] Optionally, parsing the high-level language code into an abstract syntax tree includes:

[0026] The high-level language code is subjected to lexical analysis and grammatical analysis to obtain the abstract syntax tree.

[0027] Optionally, the target file includes a wasm file.

[0028] According to a second aspect of an embodiment of the present disclosure, a high-level language compiling device is provided, including:

[0029] A first parsing module, configured to parse the high-level language code into an abstract syntax tree;

[0030] A second parsing module is configured to perform a semantic parsing operation on the abstract syntax tree to obtain a first language, where the first language is a high-level intermediate representation language;

[0031] A first generating module is configured to generate a second language based on the first language, wherein the second language is a low-level intermediate representation language;

[0032] The second generating module is configured to generate a target file according to the second language.

[0033] According to a third aspect of an embodiment of the present disclosure, there is provided an electronic device, including:

[0034] processor;

[0035] a memory for storing processor-executable instructions;

[0036] Wherein, the processor is configured to:

[0037] Parse high-level language code into an abstract syntax tree;

[0038] Performing a semantic parsing operation on the abstract syntax tree to obtain a first language, where the first language is a high-level intermediate representation language;

[0039] generating a second language based on the first language, wherein the second language is a low-level intermediate representation language;

[0040] A target file is generated according to the second language.

[0041] According to a fourth aspect of an embodiment of the present disclosure, a computer-readable storage medium is provided, on which computer program instructions are stored. When the program instructions are executed by a processor, the steps of the high-level language compilation method provided in the first aspect of the present disclosure are implemented.

[0042] After obtaining the high-level language code, the embodiment of the present disclosure can parse it into an abstract syntax tree, and then perform a semantic parsing operation on the abstract syntax tree to obtain a first language, wherein the first language is a high-level intermediate representation language. On this basis, a second language is generated based on the first language, wherein the second language is a low-level intermediate representation language, and finally a target file is generated according to the second language. By introducing a high-level intermediate representation language, the embodiment of the present disclosure can ensure that the code structure is clearer.

[0043] It is to be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the present disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0044] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present disclosure and, together with the description, serve to explain the principles of the present disclosure.

[0045] Figure 1 The figure is a flow chart of a high-level language compiling method according to an exemplary embodiment.

[0046] Figure 2 The figure is a flowchart of another high-level language compiling method according to an exemplary embodiment.

[0047] Figure 3is a detailed example diagram of another high-level language compiling method according to an exemplary embodiment.

[0048] Figure 4 The invention is a block diagram of a high-level language compiling device according to an exemplary embodiment.

[0049] Figure 5 It is a block diagram of an electronic device according to an exemplary embodiment. DETAILED DESCRIPTION

[0050] Exemplary embodiments will be described in detail herein, examples of which are shown in the accompanying drawings. When the following description refers to the drawings, the same numbers in different drawings represent the same or similar elements unless otherwise indicated. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present disclosure. Instead, they are merely examples of devices and methods consistent with some aspects of the present disclosure as detailed in the appended claims.

[0051] It should be noted that all actions of acquiring signals, information or data in the present disclosure are carried out in compliance with the relevant data protection laws and policies of the country where the device is located and with the authorization given by the owner of the corresponding device.

[0052] In the description of the present disclosure, the terms used, such as "first", "second", etc., are used to distinguish similar objects and do not have to be understood as a specific order or sequence. In addition, in the description with reference to the accompanying drawings, the same symbols in different drawings represent the same elements unless otherwise stated.

[0053] Although operations or steps are described in a specific order in the drawings in the embodiments of the present disclosure, it should not be understood that it is required to perform these operations or steps in the specific order shown or in a serial order, or to perform all the operations or steps shown to obtain the desired results. In the embodiments of the present disclosure, these operations or steps can be performed in series; these operations or steps can also be performed in parallel; or some of these operations or steps can be performed.

[0054] In the process of compiling high-level languages ​​into wasm (WebAssembly) files, the logic of semantic parsing is also quite different due to the differences in high-level language features. In addition, there are also many options for the backend of the compiler to generate bytecode, such as llvm (low level virtual machine), binaryen and other backend libraries.

[0055] Specifically, the acquired high-level language is subjected to lexical analysis and grammatical analysis to obtain an abstract syntax tree (AST tree). On this basis, according to the semantic characteristics of the high-level language, the abstract syntax tree is converted into a low-level virtual machine intermediate representation (LLVM-IR) language, and then a wasm file is generated.

[0056] The low-level virtual machine intermediate representation language is an IR (Intermediate Representation) language for low-level languages, which is close to assembly language. That is, the low-level virtual machine intermediate representation language is mainly for virtual registers, which makes it more difficult to directly convert high-level language semantics into llvm-ir.

[0057] In the related technology, due to the lack of semantic support for high-level languages, it is necessary to mix the parsing code of the high-level language semantics and the llvm-ir code together for development. As a result, the compilation of high-level languages ​​can only rely on the llvm system, and other compiler backends cannot be expanded. In addition, it is extremely unfriendly to the semantic compilation optimization in the future.

[0058] Figure 1 is a flow chart of a high-level language compiling method according to an exemplary embodiment. Figure 1 As shown, the method may include the following steps.

[0059] In step S110 , the high-level language code is parsed into an abstract syntax tree.

[0060] In the disclosed embodiment, the high-level language code may be a text file that is not compiled, written in accordance with certain programming language specifications, and is user-readable. In other words, the high-level language code may be original code written by a developer, which may include code written in any one or more programming languages. Exemplarily, the high-level language code may be JavaScript (JS) language, Python language, etc.

[0061] In addition, the abstract syntax tree can be simply referred to as a syntax tree, which represents the syntax structure of the original code in a tree form. Each node in the tree can represent a syntax structure in the original code, such as package, type, modifier, operator, interface, return, etc.

[0062] As an optional manner, in the process of parsing the high-level language code into an abstract syntax tree, the embodiments of the present disclosure may perform lexical parsing and grammatical parsing on the high-level language code to obtain an abstract syntax tree.

[0063] Specifically, the high-level language code is subjected to lexical analysis to obtain the lexical analysis code, wherein lexical analysis is the first stage of the compilation process, and the main task of the first stage is to read the high-level language code (source code) from left to right in units of characters, that is, to scan the character stream of the high-level language code, and then recognize the word according to the word formation rules. Here, the word can also be called a word symbol or a symbol.

[0064] Optionally, after performing lexical analysis on the high-level language code to obtain the lexical analysis code, the disclosed embodiment may perform grammatical analysis on the lexical analysis code to obtain the grammatical analysis code, which may be used as an abstract syntax tree. Lexical analysis is a logical stage of the compilation process, and the main task of grammatical analysis is to combine word sequences into various grammatical phrases such as "program", "statement", "expression", etc. based on lexical analysis. The grammatical analysis program may also determine whether the high-level language code (source program code) is structurally correct, and whether the structure of the high-level language code (source program code) contains descriptions that are not related to the context.

[0065] In step S120, a semantic parsing operation is performed on the abstract syntax tree to obtain the first language.

[0066] As an optional method, after parsing the high-level language code to obtain an abstract syntax tree, the embodiment of the present disclosure may perform a semantic parsing operation on the abstract syntax tree to obtain a first language, wherein the first language may be a high-level intermediate representation language.

[0067] In the embodiment of the present disclosure, the first language may be an intermediate language of a high-level language, semantic-ir, that is, the first language may be a high-level semantic intermediate representation language. It can be seen that when semantically parsing the high-level language code, the embodiment of the present disclosure may first convert the abstract syntax tree into the first language.

[0068] Among them, semantic parsing is a logical stage of the compilation process. The main task of semantic parsing is to review the context-related properties of structurally correct high-level language code (source code), for example, type review.

[0069] In step S130 , a second language is generated based on the first language.

[0070] In the disclosed embodiment, the second language may be a low-level intermediate representation language. Specifically, the second language may be a low-level virtual machine intermediate representation language llvm-ir, or may be other wasm bytecode backends, such as a low-level binary intermediate representation language binaryen-ir.

[0071] As a specific implementation, the embodiment of the present disclosure can generate a low-level virtual machine intermediate representation language llvm-ir based on a first language. In this process, a first language generation instruction is obtained, and a low-level virtual machine intermediate representation language llvm-ir corresponding to the first language can be generated based on the first language generation instruction. Here, the first language generation instruction is used to instruct the electronic device to generate a low-level virtual machine intermediate representation language llvm-ir.

[0072] As another specific implementation, the disclosed embodiment can generate a low-level binary intermediate representation language binaryen-ir based on a first language. In this process, a second language generation instruction is obtained, and a low-level binary intermediate representation language binaryen-ir corresponding to the first language can be generated based on the second language generation instruction. Here, the second language generation instruction is used to instruct the electronic device to generate a low-level binary intermediate representation language binaryen-ir.

[0073] In step S140, a target file is generated according to the second language.

[0074] As an optional method, the disclosed embodiment can generate a target file according to a second language, wherein the target file can include a wasm file. Through the above introduction, it is known that wasm mainly involves WebAssembly technology, which is a new binary format with small running volume, high loading efficiency, strong portability and good Web compatibility. It can easily run high-level language codes in local client environments such as browsers with the native performance of hardware.

[0075] After obtaining the high-level language code, the embodiment of the present disclosure can parse it into an abstract syntax tree, and then perform a semantic parsing operation on the abstract syntax tree to obtain a first language, wherein the first language is a high-level intermediate representation language. On this basis, a second language is generated based on the first language, wherein the second language is a low-level intermediate representation language, and finally a target file is generated according to the second language. By introducing a high-level intermediate representation language, the embodiment of the present disclosure can ensure that the code structure is clearer.

[0076] Figure 2 is a flowchart of another high-level language compiling method according to an exemplary embodiment. Figure 2 As shown, the method may include the following steps.

[0077] In step S210 , the high-level language code is parsed into an abstract syntax tree.

[0078] The specific implementation of step S210 has been described in detail in the above embodiment, and will not be repeated here.

[0079] In step S220, semantic analysis information corresponding to the high-level language code is determined.

[0080] As an optional method, in order to perform semantic parsing on the abstract syntax tree, the embodiment of the present disclosure defines semantic parsing information, so in the process of performing semantic parsing operations on the abstract syntax tree, the present disclosure can determine the semantic parsing information corresponding to the high-level language code. Among them, the semantic parsing information can be the core code of the first language (semantic-ir), and the semantic parsing information can include at least one of loading class information, loading interface information, closure information, asynchronous information, call information, dynamic memory layout information, arithmetic instruction information and conversion information.

[0081] Specifically, the loading class information may be LOAD_CLASS, and the loading class information may be defined according to a class of a high-level language, that is, the loading class information may be abstracted for class definition and calling of a high-level language.

[0082] When semantically parsing the abstract syntax tree according to the semantic parsing information, the disclosed embodiment can parse the attribute fields of the class and the inheritance relationship of the class to generate a vtable table. Here, the vtable table is used to store function pointers, and when calling a class function, a correct function call can be implemented based on the vtable field. In addition, when compiling (semantic parsing), the disclosed embodiment can construct runtime object memory layout information, and when accessing the attribute field, offset access can be performed through offset.

[0083] Optionally, the loading interface information may be LOAD_INTERFACE, and the loading interface information may be defined according to an interface of a high-level language, that is, the loading interface information may be an interface definition and call abstraction for a high-level language.

[0084] When semantically parsing the abstract syntax tree according to the semantic parsing information, the disclosed embodiment can parse the attribute fields of the interface, as well as the implementation relationship of the interface, to generate a vtable table. Here, the vtable table is used to store interface function pointers, and when making an interface function call, a correct function call can be implemented based on the vtable field. In addition, when compiling, the disclosed embodiment can record the name and type information of the interface attribute, and when accessing the attribute field at run time, the disclosed embodiment can find the memory layout offset at actual run time based on the dynamic matching name string at run time, and on this basis, perform field access through the offset.

[0085] Optionally, the closure information may be related to CLOSURE, and the closure information may be defined according to the closure characteristics of the high-level language, that is, the closure information may be abstracted for the closure characteristics of the high-level language.

[0086] When semantically parsing the abstract syntax tree according to the semantic parsing information, the disclosed embodiment determines the scope context of the closure variable. The instructions involved include LOAD_CLOSURE (load closure), SAVE_CLOSURE (record closure) and INIT_CLOSURE (initialize closure), etc. These instructions can be determined by high-level language codes, that is, different high-level language codes will have different corresponding instructions, and thus different semantic parsing information will be obtained.

[0087] Optionally, the asynchronous information may be related to AWAIT or YIELD, and the asynchronous information may be defined according to the asynchronous characteristics of the high-level language, that is, the asynchronous information may be abstracted for the asynchronous characteristics of the high-level language.

[0088] Optionally, the call information may be related to CALL, and the call information may be defined according to a function call of a high-level language, that is, the call information may be abstracted for a function call of a high-level language. Here, the function call may involve instructions such as DIRECT_CALL, SHAPE_CALL, and DYNAMIC_CALL.

[0089] Optionally, the dynamic memory layout information may be related to DYNAMIC, which may also be referred to as dynamic object information. The dynamic memory layout information may be defined according to any dynamic object of a high-level language, that is, the dynamic memory layout information may be abstracted for any object (any dynamic object) of a high-level language. The dynamic memory information may include object creation, object access, etc. Exemplary operations include NEW_DYNAMIC (creating a dynamic object), GET_DYNAMIC (using a dynamic object), SET_DYNAMIC (setting a dynamic object), etc.

[0090] Optionally, the arithmetic instruction information may be related to an arithmetic instruction, and the arithmetic instruction information may be defined according to an operator of a high-level language, that is, the arithmetic instruction information may be abstracted for an operator of a high-level language. The operators of the high-level language may include SELECT, LT, LET, EQ, AND, OR, etc.

[0091] Optionally, the conversion information may be related to CAST, and the conversion information may be defined according to various types of object conversions of a high-level language, that is, the conversion information may be abstracted for various types of object conversions of a high-level language. Among them, type object conversions may include VALUE_CAST (numeric conversion), STATIC_CAST (static conversion) and DYN_CAST (dynamic conversion).

[0092] In summary, the embodiments of the present disclosure can perform semantic analysis on the abstract syntax tree according to the semantic analysis information. In this process, custom types can be abstracted, that is, the core code of the first language is defined. Here, the core code may include at least one of loading class information, loading interface information, closure information, asynchronous information, calling information, dynamic memory layout information, arithmetic instruction information and conversion information.

[0093] In step S230, semantic parsing is performed on the abstract syntax tree according to the semantic parsing information to obtain the first language.

[0094] As an optional method, after obtaining the semantic parsing information, the embodiment of the present disclosure can perform semantic parsing on the abstract syntax tree to obtain the first language. As an example, it is determined that the instruction related to the closure included in the semantic parsing information corresponding to the high-level language code is INIT_CLOSURE (initialization closure), and the scope of the closure variable determined by the embodiment of the present disclosure at compile time may be related to the initialization closure.

[0095] In order to improve the operating efficiency of wasm, the embodiment of the present disclosure proposes an intermediate language semantic-ir for high-level languages, which abstracts ir-codes such as classes, closures, and iterators. When semantically parsing a high-level language, the embodiment of the present disclosure can first convert it into semantic-ir, and then convert it into llvm-ir or other wasm bytecode backends (such as binaryen).

[0096] In step S240, a second language is generated based on the first language.

[0097] From the above introduction, we know that the second language can be a low-level virtual machine intermediate representation language (llvm-ir) or a low-level binary intermediate representation language (binaryen). After generating the first language, the embodiment of the present disclosure can generate a second language based on the first language. The specific type of second language generated can be determined according to the first language generation instruction.

[0098] In step S250, a target file is generated according to the second language.

[0099] In some embodiments, by performing lexical analysis, grammatical analysis, and semantic analysis (introducing the first language) on the high-level language code, the present disclosure can obtain a second language, that is, a low-level intermediate representation language, and generate a target file based on the second language.

[0100] As a specific fact method, in order to better illustrate the generation process of the target file, the embodiment of the present disclosure provides the following Figure 3 The example diagram shown is Figure 3It can be known that the embodiment of the present disclosure can parse semantics after executing lexical parsing and grammatical parsing to generate a high-level intermediate representation language semantic-ir (first language). On this basis, a low-level intermediate representation language llvm-ir can be generated according to the high-level intermediate representation language semantic-ir, or a low-level intermediate representation language binaryen can be generated according to the high-level intermediate representation language semantic-ir.

[0101] The disclosed embodiment decouples high-level semantic parsing from low-level language IR (such as llvm-IR, binary-IR, etc.) and introduces an intermediate layer IR (semantic-IR), which is more in line with software engineering design, and the code structure is clearer. In the future, different wasm backend libraries can be connected to generate wasm files. In addition, the high-level language IR is abstracted into an independent intermediate IR, which is more conducive to optimizing the semantics of the high-level language in the future, thereby improving the operating efficiency of the wasm file.

[0102] In summary, the disclosed embodiment introduces a first language (sementic-ir intermediate language) that is independent of the high-level language and the compiler backend, so that the semantic parsing of the high-level language can be decoupled from the wasm bytecode backend library, thereby making the compiler development work more efficient. In addition, the disclosed embodiment can optimize the compiler for the first language (sementic-ir) to improve the operating efficiency of the compiled result wasm.

[0103] After obtaining the high-level language code, the disclosed embodiment can parse it into an abstract syntax tree, and then perform semantic parsing operations on the abstract syntax tree to obtain a first language, where the first language is a high-level intermediate representation language. On this basis, a second language is generated based on the first language, where the second language is a low-level intermediate representation language, and finally a target file is generated according to the second language. By introducing a high-level intermediate representation language, the disclosed embodiment can ensure that the code structure is clearer. In addition, the disclosed embodiment designs semantic-ir for the semantic characteristics of high-level languages, which can optimize the capabilities of the wasm compiler to a certain extent.

[0104] Figure 4 FIG. 4 is a block diagram of a high-level language compiling device 400 according to an exemplary embodiment. Figure 4 The high-level language compiling device 400 includes a first parsing module 410 , a second parsing module 420 , a first generating module 430 and a second generating module 440 .

[0105] The first parsing module 410 is configured to parse the high-level language code into an abstract syntax tree;

[0106] The second parsing module 420 is configured to perform a semantic parsing operation on the abstract syntax tree to obtain a first language, where the first language is a high-level intermediate representation language;

[0107] The first generating module 430 is configured to generate a second language based on the first language, wherein the second language is a low-level intermediate representation language;

[0108] The second generating module 440 is configured to generate a target file according to the second language.

[0109] In some implementations, the second parsing module 420 may include:

[0110] A determination submodule, configured to determine semantic parsing information corresponding to the high-level language code;

[0111] The parsing submodule is configured to perform semantic parsing on the abstract syntax tree according to the semantic parsing information to obtain the first language.

[0112] In some implementations, the semantic parsing information includes at least one of the following:

[0113] Loading class information, wherein the loaded class information is defined according to a class of a high-level language;

[0114] Loading interface information, wherein the loading interface information is defined according to the interface of the high-level language;

[0115] Closure information, wherein the closure information is defined according to the closure characteristics of the high-level language;

[0116] Asynchronous information, wherein the asynchronous information is defined according to the asynchronous characteristics of the high-level language;

[0117] Calling information, wherein the calling information is defined according to a function call of the high-level language;

[0118] Dynamic memory layout information, the dynamic memory layout information is defined according to any dynamic object of the high-level language;

[0119] Arithmetic instruction information, wherein the arithmetic instruction information is defined according to operators of the high-level language;

[0120] Conversion information, wherein the conversion information is defined according to various types of object conversions of the high-level language.

[0121] In some implementations, the second language includes a low-level virtual machine intermediate representation language, and the first generation module 430 is further configured to generate the low-level virtual machine intermediate representation language based on the first language.

[0122] In some implementations, the second language further includes a low-level binary intermediate representation language, and the first generation module 430 is further configured to generate the low-level binary intermediate representation language based on the first language.

[0123] In some implementations, the first parsing module 410 may also be configured to perform lexical parsing and grammatical parsing on the high-level language code to obtain the abstract syntax tree.

[0124] In some implementations, the target file includes a wasm file.

[0125] After obtaining the high-level language code, the embodiment of the present disclosure can parse it into an abstract syntax tree, and then perform a semantic parsing operation on the abstract syntax tree to obtain a first language, wherein the first language is a high-level intermediate representation language. On this basis, a second language is generated based on the first language, wherein the second language is a low-level intermediate representation language, and finally a target file is generated according to the second language. By introducing a high-level intermediate representation language, the embodiment of the present disclosure can ensure that the code structure is clearer.

[0126] Regarding the device in the above embodiment, the specific manner in which each module performs operations has been described in detail in the embodiment of the method, and will not be elaborated here.

[0127] The present disclosure also provides a computer-readable storage medium having computer program instructions stored thereon, which implement the steps of the high-level language compilation method provided by the present disclosure when the program instructions are executed by a processor.

[0128] Figure 5 1 is a block diagram of an electronic device 800 for a high-level language compilation method according to an exemplary embodiment. For example, the electronic device 800 may be a mobile phone, a computer, a digital broadcast terminal, a messaging device, a game console, a tablet device, a medical device, a fitness device, a personal digital assistant, etc.

[0129] Reference Figure 5 , the electronic device 800 may include one or more of the following components: a processing component 802 , a memory 804 , a power component 806 , a multimedia component 808 , an audio component 810 , an input / output interface 812 , a sensor component 814 , and a communication component 816 .

[0130] The processing component 802 generally controls the overall operation of the electronic device 800, such as operations associated with display, phone calls, data communications, camera operations, and recording operations. The processing component 802 may include one or more processors 820 to execute instructions to complete all or part of the steps of the above-mentioned high-level language compilation method. In addition, the processing component 802 may include one or more modules to facilitate the interaction between the processing component 802 and other components. For example, the processing component 802 may include a multimedia module to facilitate the interaction between the multimedia component 808 and the processing component 802.

[0131] The memory 804 is configured to store various types of data to support operations on the electronic device 800. Examples of such data include instructions for any application or method operating on the electronic device 800, contact data, phone book data, messages, pictures, videos, etc. The memory 804 can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic memory, flash memory, magnetic disk or optical disk.

[0132] The power supply component 806 provides power to the various components of the electronic device 800. The power supply component 806 may include a power management system, one or more power supplies, and other components associated with generating, managing, and distributing power to the electronic device 800.

[0133] The multimedia component 808 includes a screen that provides an output interface between the electronic device 800 and the user. In some embodiments, the screen may include a liquid crystal display (LCD) and a touch panel (TP). If the screen includes a touch panel, the screen may be implemented as a touch screen to receive input signals from the user. The touch panel includes one or more touch sensors to sense touch, slide, and gestures on the touch panel. The touch sensor may not only sense the boundaries of the touch or slide action, but also detect the duration and pressure associated with the touch or slide operation. In some embodiments, the multimedia component 808 includes a front camera and / or a rear camera. When the electronic device 800 is in an operating mode, such as a shooting mode or a video mode, the front camera and / or the rear camera may receive external multimedia data. Each front camera and rear camera may be a fixed optical lens system or have a focal length and optical zoom capability.

[0134] The audio component 810 is configured to output and / or input audio signals. For example, the audio component 810 includes a microphone (MIC), and when the electronic device 800 is in an operating mode, such as a call mode, a recording mode, and a voice recognition mode, the microphone is configured to receive an external audio signal. The received audio signal can be further stored in the memory 804 or sent via the communication component 816. In some embodiments, the audio component 810 also includes a speaker for outputting audio signals.

[0135] The input / output interface 812 provides an interface between the processing component 802 and the peripheral interface modules, which may be keyboards, click wheels, buttons, etc. These buttons may include but are not limited to: a home button, a volume button, a start button, and a lock button.

[0136] The sensor assembly 814 includes one or more sensors for providing various aspects of status assessment for the electronic device 800. For example, the sensor assembly 814 can detect the open / closed state of the electronic device 800, the relative positioning of the components, such as the display and keypad of the electronic device 800, and the sensor assembly 814 can also detect the position change of the electronic device 800 or a component of the electronic device 800, the presence or absence of contact between the user and the electronic device 800, the orientation or acceleration / deceleration of the electronic device 800, and the temperature change of the electronic device 800. The sensor assembly 814 may include a proximity sensor configured to detect the presence of a nearby object without any physical contact. The sensor assembly 814 may also include an optical sensor, such as a CMOS or CCD image sensor, for use in imaging applications. In some embodiments, the sensor assembly 814 may also include an acceleration sensor, a gyroscope sensor, a magnetic sensor, a pressure sensor, or a temperature sensor.

[0137] The communication component 816 is configured to facilitate wired or wireless communication between the electronic device 800 and other devices. The electronic device 800 can access a wireless network based on a communication standard, such as WiFi, 2G or 3G, or a combination thereof. In an exemplary embodiment, the communication component 816 receives a broadcast signal or broadcast-related information from an external broadcast management system via a broadcast channel. In an exemplary embodiment, the communication component 816 also includes a near field communication (NFC) module to facilitate short-range communication. For example, the NFC module can be implemented based on radio frequency identification (RFID) technology, infrared data association (IrDA) technology, ultra-wideband (UWB) technology, Bluetooth (BT) technology and other technologies.

[0138] In an exemplary embodiment, the electronic device 800 may be implemented by one or more application-specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic devices (PLDs), field programmable gate arrays (FPGAs), controllers, microcontrollers, microprocessors or other electronic components to execute the above-mentioned high-level language compilation method.

[0139] In an exemplary embodiment, a non-transitory computer-readable storage medium including instructions is also provided, such as a memory 804 including instructions, and the instructions can be executed by a processor 820 of an electronic device 800 to complete the above-mentioned high-level language compilation method. For example, the non-transitory computer-readable storage medium can be a ROM, a random access memory (RAM), a CD-ROM, a magnetic tape, a floppy disk, an optical data storage device, etc.

[0140] In addition to being an independent electronic device, the electronic device may also be a part of an independent electronic device. For example, in one embodiment, the electronic device may be an integrated circuit (IC) or a chip, wherein the integrated circuit may be an IC or a collection of multiple ICs; the chip may include but is not limited to the following types: GPU (Graphics Processing Unit), CPU (Central Processing Unit), FPGA (Field Programmable Gate Array), DSP (Digital Signal Processor), ASIC (Application Specific Integrated Circuit), SOC (System on Chip, SoC), etc. The above-mentioned integrated circuit or chip can be used to execute executable instructions (or codes) to implement the above-mentioned high-level language compilation method. The executable instructions may be stored in the integrated circuit or chip, or may be obtained from other devices or equipment, such as the integrated circuit or chip including a processor, a memory, and an interface for communicating with other devices. The executable instruction may be stored in the memory, and when the executable instruction is executed by the processor, the above-mentioned high-level language compilation method may be implemented; alternatively, the integrated circuit or chip may receive the executable instruction through the interface and transmit it to the processor for execution, so as to implement the above-mentioned high-level language compilation method.

[0141] In another exemplary embodiment, a computer program product is further provided. The computer program product includes a computer program that can be executed by a programmable device. The computer program has a code portion for executing the above high-level language compiling method when executed by the programmable device.

[0142] Those skilled in the art will readily appreciate other embodiments of the present disclosure after considering the specification and practicing the present disclosure. The present disclosure is intended to cover any variations, uses or adaptations of the present disclosure that follow the general principles of the present disclosure and include common knowledge or customary techniques in the art that are not disclosed in the present disclosure. The description and examples are to be considered as exemplary only, and the true scope and spirit of the present disclosure are indicated by the following claims.

[0143] It should be understood that the present disclosure is not limited to the exact structures that have been described above and shown in the drawings, and that various modifications and changes may be made without departing from the scope thereof. The scope of the present disclosure is limited only by the appended claims.

Claims

1. A high-level language compiling method, characterized in that: include: Parse high-level language code into an abstract syntax tree; Performing a semantic parsing operation on the abstract syntax tree to obtain a first language, where the first language is a high-level intermediate representation language; generating a second language based on the first language, wherein the second language is a low-level intermediate representation language; A target file is generated according to the second language.

2. The high-level language compiling method according to claim 1, characterized in that: Performing a semantic parsing operation on the abstract syntax tree to obtain a first language includes: Determining semantic parsing information corresponding to the high-level language code; The abstract syntax tree is semantically parsed according to the semantic parsing information to obtain the first language.

3. The high-level language compiling method according to claim 2, characterized in that: The semantic analysis information includes at least one of the following: Loading class information, wherein the loaded class information is defined according to a class of a high-level language; Loading interface information, wherein the loading interface information is defined according to the interface of the high-level language; Closure information, wherein the closure information is defined according to the closure characteristics of the high-level language; Asynchronous information, wherein the asynchronous information is defined according to the asynchronous characteristics of the high-level language; Calling information, wherein the calling information is defined according to a function call of the high-level language; Dynamic memory layout information, the dynamic memory layout information is defined according to any dynamic object of the high-level language; Arithmetic instruction information, wherein the arithmetic instruction information is defined according to operators of the high-level language; Conversion information, wherein the conversion information is defined according to various types of object conversions of the high-level language.

4. The high-level language compiling method according to claim 1, characterized in that: The second language includes a low-level virtual machine intermediate representation language, and generating the second language based on the first language includes: The low-level virtual machine intermediate representation language is generated based on the first language.

5. The high-level language compiling method according to claim 1, characterized in that: The second language also includes a low-level binary intermediate representation language, and generating the second language based on the first language includes: The low-level binary intermediate representation language is generated based on the first language.

6. The high-level language compiling method according to claim 1, characterized in that: The step of parsing the high-level language code into an abstract syntax tree comprises: The high-level language code is subjected to lexical analysis and grammatical analysis to obtain the abstract syntax tree.

7. The high-level language compiling method according to any one of claims 1 to 6, characterized in that: The target file includes a wasm file.

8. A high-level language compiling device, characterized in that: include: A first parsing module, configured to parse the high-level language code into an abstract syntax tree; A second parsing module is configured to perform a semantic parsing operation on the abstract syntax tree to obtain a first language, where the first language is a high-level intermediate representation language; A first generating module is configured to generate a second language based on the first language, wherein the second language is a low-level intermediate representation language; The second generating module is configured to generate a target file according to the second language.

9. An electronic device, characterized in that: include: processor; a memory for storing processor-executable instructions; Wherein, the processor is configured to: Parse high-level language code into an abstract syntax tree; Performing a semantic parsing operation on the abstract syntax tree to obtain a first language, where the first language is a high-level intermediate representation language; generating a second language based on the first language, wherein the second language is a low-level intermediate representation language; A target file is generated according to the second language.

10. A computer-readable storage medium having computer program instructions stored thereon, characterized in that: When the program instructions are executed by a processor, the steps of the method described in any one of claims 1 to 7 are implemented.

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