A driving method and circuit for a liquid crystal display panel

Abstract

This invention discloses a driving method and circuit for a liquid crystal display panel. The method includes: providing a driving circuit for the liquid crystal display panel, wherein the gate lines of the driving circuit are connected to the gates of the row pixels, and the pixels in each row of the driving circuit are identical, arranged sequentially as R-row pixels, G-row pixels, and B-row pixels; the data lines of the driving circuit are sequentially and alternately electrically connected to the R-pixels, G-pixels, and B-pixels of two adjacent columns; within one frame, when a solid color image needs to be displayed, all R-row pixels, all G-row pixels, or all B-row pixels are activated, driving the data lines of the corresponding solid color pixels; R-pixel writing is performed when all R-row pixels are activated, G-pixel writing is performed when all G-row pixels are activated, or B-pixel writing is performed when all B-row pixels are activated. This reduces the power consumption of solid color images and improves the product's battery life.

Description

Technical Field

[0001] This invention relates to the field of pure color image display technology for liquid crystal displays, and particularly to a driving method and circuit for a liquid crystal display panel. Background Technology

[0002] If liquid crystal molecules operate under a fixed voltage, their properties will solidify. Once this fixed voltage is removed, the liquid crystal molecules can no longer respond to other applied voltages. Therefore, alternating current (AC) voltage is used to drive the liquid crystal molecules in liquid crystal displays. However, simply using AC voltage can cause screen flicker. To solve this problem, existing liquid crystal display panels primarily employ point-to-point, column-to-column, and row-to-row driving methods to ensure that the driving voltages of adjacent pixels maintain opposite polarities. This spatial fusion of the optical response waveforms of adjacent pixels suppresses screen flicker.

[0003] Triple gate driving, also known as triple-rate driving, is a technology used to reduce the number of display driver chips. In the triple gate driving architecture, red, green and blue sub-pixels are arranged vertically, which means that every three columns of sub-pixels share one data line. Each row of sub-pixels corresponds to three gate lines. Compared with the traditional single-gate architecture, the number of data lines is reduced to one-third, and the number of gates is increased three times. Although fewer data lines are used, this driving method has higher power consumption when displaying solid color images (i.e., displaying red / green / blue images), which reduces battery life. Summary of the Invention

[0004] The existing Triple gate driver architecture consumes a lot of power when displaying solid color images, which affects the product's battery life.

[0005] To address the aforementioned issues, a driving method and circuit for a liquid crystal display panel are proposed. By simultaneously activating all R-row pixels, G-row pixels, and B-row pixels within one frame using gate lines and writing data to all R-row pixels, G-row pixels, and B-row pixels using data lines, when displaying a solid color image, the data lines only perform one high-level pulse within one frame, significantly reducing the power consumption of the solid color image and improving the product's battery life.

[0006] In a first aspect, a method for driving a liquid crystal display panel includes:

[0007] Step 100: A driving circuit for a liquid crystal display panel is provided. The gate line of the driving circuit is connected to the gate of the row pixel. The pixels in each row of the driving circuit are the same and are arranged in the order of R row pixels, G row pixels, and B row pixels. The data line of the driving circuit is electrically connected to the R pixel, G pixel, and B pixel of the adjacent two columns in sequence at intervals.

[0008] Step 200: When a solid color image needs to be displayed within a frame, enable all R-row pixels, all G-row pixels, or all B-row pixels, drive the data lines of the corresponding solid color pixels, and perform R-pixel writing when all R-row pixels are enabled, G-pixel writing when all G-row pixels are enabled, or B-pixel writing when all B-row pixels are enabled.

[0009] In conjunction with the driving method for the liquid crystal display panel described in the first aspect of the present invention, in a first possible embodiment, step 200 includes:

[0010] Step 210: When a solid red color needs to be displayed in the current frame, simultaneously input a high-level signal to the gate of all R-row pixels to turn on all R-row pixels;

[0011] Step 220: Drive the data line of the corresponding solid color pixel to write the first polarity data to all R row pixels.

[0012] In conjunction with the first possible embodiment of the first aspect of the present invention, in the second possible embodiment, step 200 further includes:

[0013] Step 210a: When a solid red color image needs to be displayed in the next frame, simultaneously input a high-level signal to the gate of all R-row pixels to turn on all R-row pixels;

[0014] Step 220a: Drive the data line of the corresponding solid color pixel and write the second polarity data to all R row pixels;

[0015] The first polarity data has the opposite polarity to the second polarity data.

[0016] In conjunction with the driving method for the liquid crystal display panel described in the first aspect of the present invention, in a third possible embodiment, step 200 includes:

[0017] Step 230: When a solid green color needs to be displayed in the current frame, simultaneously input a high-level signal to the gate of all G-row pixels to turn on all G-row pixels;

[0018] Step 240: Drive the data line of the corresponding solid color pixel to write the first polarity data to all G row pixels.

[0019] In conjunction with the third possible implementation of the first aspect of the present invention, in the fourth possible implementation, step 200 further includes:

[0020] Step 230a: When a solid green image needs to be displayed in the next frame, simultaneously input a high-level signal to the gate of all G-row pixels to turn on all G-row pixels;

[0021] Step 240a: Drive the data line of the corresponding solid color pixel and write the second polarity data to all G row pixels;

[0022] The first polarity data has the opposite polarity to the second polarity data.

[0023] In conjunction with the driving method for the liquid crystal display panel described in the first aspect of the present invention, in a fifth possible embodiment, step 200 includes:

[0024] Step 250: When a solid blue image needs to be displayed in the current frame, simultaneously input a high-level signal to the gate of all B-row pixels to enable all B-row pixels;

[0025] Step 260: Drive the data line of the corresponding solid color pixel to write the first polarity data to all B row pixels.

[0026] In conjunction with the fifth possible implementation of the first aspect of the present invention, in the sixth possible implementation, step 200 further includes:

[0027] Step 250a: When a blue solid color image needs to be displayed in the next frame, simultaneously input a high-level signal to the gate of all B row pixels to turn on all B row pixels;

[0028] Step 260a: Drive the data line of the corresponding solid color pixel and write the second polarity data to all B row pixels;

[0029] The first polarity data has the opposite polarity to the second polarity data.

[0030] Secondly, a driving circuit for a liquid crystal display panel includes:

[0031] R-row pixels, all pixels in the same row are R-pixels;

[0032] G rows of pixels, each row contains G pixels;

[0033] Pixels in row B, all pixels in the same row are B pixels;

[0034] Multiple gate lines;

[0035] Multiple data cables;

[0036] First timing unit;

[0037] Second timing unit;

[0038] The gate lines are electrically connected to the gates of the R-row pixels, G-row pixels, or B-row pixels, respectively.

[0039] Each of the data lines is electrically connected sequentially and at intervals to the R, G, and B pixels of the two adjacent columns;

[0040] The first timing unit is electrically connected to the plurality of gate lines and is used to activate all R-row pixels, all G-row pixels, or all B-row pixels when a solid color image needs to be displayed within a frame.

[0041] The second timing unit is electrically connected to the multiple data lines and is used to drive the data lines of the corresponding solid color pixels to write R pixels when all R row pixels are turned on, write G pixels when all G row pixels are turned on, or write B pixels when all B row pixels are turned on.

[0042] In conjunction with the driving circuit of the liquid crystal display panel described in the second aspect of the present invention, in a first possible embodiment, the first timing unit is further configured to simultaneously input a high-level signal to the gate of all R-row pixels / G-row pixels / B-row pixels when a pure red / green / blue image needs to be displayed in the current frame, so as to turn on all R-row pixels / G-row pixels / B-row pixels.

[0043] The second timing unit is further used to drive the data lines of the corresponding solid color pixels to write the first polarity data to all R row pixels / G row pixels / B row pixels.

[0044] In conjunction with the first possible implementation of the second aspect of the present invention, in the second possible implementation, the first timing unit is further configured to simultaneously input a high-level signal to the gate of all R-row pixels / G-row pixels / B-row pixels when a solid color image of red / green / blue needs to be displayed in the next frame, so as to turn on all R-row pixels / G-row pixels / B-row pixels.

[0045] The second timing unit is further used to drive the data lines of the corresponding solid color pixels to write second polarity data to all R row pixels / G row pixels / B row pixels;

[0046] The first polarity data has the opposite polarity to the second polarity data.

[0047] The driving method and circuit for the liquid crystal display panel described in this invention enable all R-row pixels / G-row pixels / B-row pixels simultaneously using gate lines within one frame, and write data to all R-row pixels / G-row pixels / B-row pixels using data lines. When displaying a solid color image, the data lines only perform one high-level pulse within one frame, which greatly reduces the power consumption of the solid color image and improves the product's battery life. Attached Figure Description

[0048] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0049] Figure 1 This is a schematic diagram of the solid color image driving timing in the existing technical solution;

[0050] Figure 2 This is a schematic diagram of the polarity of the nth frame in the existing technical solution;

[0051] Figure 3 This is a schematic diagram of the polarity of the (n+1)th frame in the existing technical solution;

[0052] Figure 4 This is a driving timing diagram of a driving method for a liquid crystal display panel according to this application;

[0053] Figure 5 This is a schematic flowchart of a specific embodiment of a driving method for a liquid crystal display panel according to this application;

[0054] Figure 6 yes Figure 6 A flowchart illustrating the first specific embodiment of step 200;

[0055] Figure 7 yes Figure 6 A flowchart illustrating the second specific embodiment of step 200;

[0056] Figure 8 yes Figure 6 A flowchart illustrating the third specific embodiment of step 200;

[0057] Figure 9 yes Figure 6 A schematic diagram of the fourth specific embodiment of step 200;

[0058] Figure 10 yes Figure 6 A flowchart illustrating the fifth specific embodiment of step 200;

[0059] Figure 11 yes Figure 6 A schematic diagram of the sixth specific embodiment of step 200;

[0060] Figure 12 This is a schematic diagram of a specific embodiment of the driving circuit for a liquid crystal display panel in this application;

[0061] Figure 13 This is a schematic diagram of the array circuit in the driving circuit of a liquid crystal display panel according to this application. Detailed Implementation

[0062] The technical solutions of this invention will now be clearly and completely described with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this invention, and not all of them. Other embodiments obtained by those skilled in the art based on the embodiments of this invention without creative effort are all within the scope of protection of this invention.

[0063] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. The terminology used herein in the specification of this invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. The term "and / or" as used herein includes any and all combinations of one or more of the associated listed items.

[0064] It should be noted that when a component is referred to as being "fixed to" or "set on" another component, it can be directly on or indirectly on that other component. When a component is referred to as being "connected to" another component, it can be directly connected to or indirectly connected to that other component.

[0065] It should be understood that the terms "length", "width", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application.

[0066] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this application, "multiple" means two or more, unless otherwise explicitly specified.

[0067] Existing triple gate driver architectures, such as Figure 1-3 , Figure 1 This is a schematic diagram of the solid color image driving timing in the existing technical solution. Figure 2 This is a polarity diagram of the nth frame in the existing technical solution. Figure 3 This is a polarity diagram for the (n+1)th frame in the existing technical solution. When displaying a solid color image, the power consumption is high, affecting the product's battery life. Due to the unique driving method of the triple gate, the power consumption of a solid color image is high within a frame. This is because the data line experiences multiple high-level pulses within a frame. Taking the red image as an example, when G1 is on, the data line outputs a high level; when G2 is on, the data line becomes low; when G3 is on, the data line remains low; when G4 is on, the data line becomes high again. That is, in the (M+3)th row (M is 0, 1, 2, 3, etc.), the data line is high, while other rows are low. Obviously, the continuous high-level pulse transition within a frame causes the high power consumption of the red image. Similarly, the same applies to solid green and solid blue images.

[0068] To address the above problems, a driving method and circuit for a liquid crystal display panel are proposed.

[0069] Firstly, a driving method for a liquid crystal display panel, such as... Figure 4 and Figure 5 , Figure 4 This is a driving timing diagram of a driving method for a liquid crystal display panel according to this application. Figure 5 This is a schematic flowchart of a specific embodiment of a driving method for a liquid crystal display panel according to this application; including:

[0070] Step 100: Provide a driving circuit for a liquid crystal display panel. The gate lines of the driving circuit are connected to the gates of the row pixels. The pixels in each row of the driving circuit are the same and are arranged in the order of R row pixels, G row pixels, and B row pixels. The data lines of the driving circuit are electrically connected to the R pixels, G pixels, and B pixels of the adjacent two columns in sequence at intervals. Step 200: When a solid color image needs to be displayed in one frame, all R row pixels, all G row pixels, or all B row pixels are turned on, and the data lines of the corresponding solid color pixels are driven. R pixel writing is performed when all R row pixels are turned on, G pixel writing is performed when all G row pixels are turned on, or B pixel writing is performed when all B row pixels are turned on.

[0071] In a preferred embodiment, such as Figure 6 , Figure 6 yes Figure 6A schematic diagram of the first specific embodiment of step 200; step 200 includes: step 210, when a red solid color image needs to be displayed in the current frame, simultaneously input a high-level signal to the gate of all R-row pixels to enable all R-row pixels; step 220, drive the data line of the corresponding solid color pixel to write the first polarity data to all R-row pixels.

[0072] In this embodiment, as Figure 4 When a solid red color needs to be displayed in the nth frame, the gates of G1, G4, Gk+3, ... are turned on, and then data is written to the R pixels of these rows, including positive polarity data.

[0073] In a preferred embodiment, such as Figure 7 , Figure 7 yes Figure 6 A schematic diagram of the second specific embodiment of step 200 is shown below; step 200 further includes: step 210a, when a red solid color image needs to be displayed in the next frame, simultaneously input a high-level signal to the gate of all R-row pixels to turn on all R-row pixels; step 220a, drive the data line of the corresponding solid color pixel to write second polarity data to all R-row pixels; wherein, the polarity of the first polarity data is opposite to that of the second polarity data.

[0074] In this embodiment, as Figure 4 When a solid red image needs to be displayed in the (n+1)th frame, the gates of G1, G4, Gk+3, ... are turned on, and then data is written to the R pixels of these rows, including negative polarity data.

[0075] In a preferred embodiment, such as Figure 8 , Figure 8 yes Figure 6 A schematic diagram of the third specific embodiment of step 200; step 200 includes: step 230, when a green solid color image needs to be displayed in the current frame, simultaneously input a high-level signal to the gate of all G row pixels to enable all G row pixels; step 240, drive the data line of the corresponding solid color pixel to write the first polarity data to all G row pixels.

[0076] In this embodiment, as Figure 4 When a solid green image needs to be displayed in the nth frame, the gates of rows G2, G5, etc. are turned on, and then data is written to the G pixels of these rows, including positive polarity data.

[0077] In a preferred embodiment, such as Figure 9 , Figure 9 yes Figure 6 A schematic diagram of the fourth specific embodiment of step 200; step 200 also includes:

[0078] Step 230a: When a solid green image needs to be displayed in the next frame, simultaneously input a high-level signal to the gate of all G-row pixels to enable all G-row pixels; Step 240a: Drive the data line of the corresponding solid color pixel to write second polarity data to all G-row pixels; wherein, the polarity of the first polarity data is opposite to that of the second polarity data.

[0079] In this embodiment, as Figure 4 When a solid green image needs to be displayed in the (n+1)th frame, the gates of rows G2, G5, etc. are turned on, and then data is written to the G pixels of these rows, including negative polarity data.

[0080] like Figure 10 , Figure 10 yes Figure 6 The fifth specific embodiment of step 200 is shown in the flowchart; step 200 includes: step 250, when the current frame needs to display a blue solid color image, simultaneously input a high-level signal to the gate of all B row pixels to enable all B row pixels; step 260, drive the data line of the corresponding solid color pixel to write the first polarity data to all B row pixels.

[0081] In this embodiment, as Figure 4 When a pure blue image needs to be displayed in the nth frame, the gates of rows G3, G6, etc. are turned on, and then data is written to the B pixels of these rows, including positive polarity data.

[0082] like Figure 11 , Figure 11 yes Figure 6 The sixth specific embodiment of step 200 is shown in the flowchart; step 200 further includes: step 250a, when a blue solid color image needs to be displayed in the next frame, simultaneously input a high-level signal to the gate of all B row pixels to turn on all B row pixels; step 260a, drive the data line of the corresponding solid color pixel to write the second polarity data to all B row pixels; wherein, the polarity of the first polarity data and the second polarity data are opposite.

[0083] In this embodiment, as Figure 4 When a solid blue image needs to be displayed in the (n+1)th frame, the gates of rows G3, G6, etc., are turned on, and data is written to the B pixels of these rows, including negative polarity data. By simultaneously turning on all R-row pixels / G-row pixels / B-row pixels within a frame using gate lines and writing data to all R-row pixels / G-row pixels / B-row pixels using data lines, when displaying a solid color image, the data lines only perform one high-level pulse per frame, greatly reducing the power consumption of the solid color image and improving the product's battery life.

[0084] Secondly, a driving circuit for a liquid crystal display panel, such as Figure 12 , Figure 12 This is a schematic diagram of a specific embodiment of a driving circuit for a liquid crystal display panel according to this application, including R-row pixels, all pixels in the same row being R-pixels; G-row pixels, all pixels in the same row being G-pixels; B-row pixels, all pixels in the same row being B-pixels; multiple gate lines; multiple data lines; a first timing unit; and a second timing unit.

[0085] The array circuit consists of R-row pixels, G-row pixels, B-row pixels, multiple gate lines, and multiple data lines. Figure 13 , Figure 13 This is a schematic diagram of the array circuit in the driving circuit of a liquid crystal display panel according to this application. The gate lines are electrically connected to the gates of the R-row pixels, G-row pixels, or B-row pixels, respectively; each data line is sequentially and alternately electrically connected to the R-row pixels, G-row pixels, and B-row pixels of the two adjacent columns.

[0086] R-row pixels, where each row consists entirely of R-pixels; G-row pixels, where each row consists entirely of G-pixels; B-row pixels, where each row consists entirely of B-pixels; R-row pixels, G-row pixels, and so on, arranged row by row. For example... Figure 13 When connecting the data cable, taking data S1 as an example, it is electrically connected to the R pixel in the first R row of the left column, electrically connected to the G pixel in the first G row of the right column, and then electrically connected to the B pixel in the first B row of the left column, and so on.

[0087] The first timing unit is electrically connected to multiple gate lines in the array circuit and is used to enable all R-row pixels, all G-row pixels, or all B-row pixels when a solid color image needs to be displayed within a frame. The second timing unit is electrically connected to multiple data lines in the array circuit and is used to drive the data lines of the corresponding solid color pixels, performing R-pixel writing when all R-row pixels are enabled, G-pixel writing when all G-row pixels are enabled, or B-pixel writing when all B-row pixels are enabled.

[0088] Furthermore, the first timing unit is further used to simultaneously input a high-level signal to the gate of all R-row pixels / G-row pixels / B-row pixels when a solid color image of red / green / blue needs to be displayed in the current frame, so as to turn on all R-row pixels / G-row pixels / B-row pixels; the second timing unit is further used to drive the data line of the corresponding solid color pixel to write the first polarity data to all R-row pixels / G-row pixels / B-row pixels.

[0089] Furthermore, the first timing unit is further configured to simultaneously input a high-level signal to the gate of all R-row pixels / G-row pixels / B-row pixels when a solid color image of red / green / blue needs to be displayed in the next frame, so as to turn on all R-row pixels / G-row pixels / B-row pixels; the second timing unit is further configured to drive the data line of the corresponding solid color pixel to write second polarity data to all R-row pixels / G-row pixels / B-row pixels; wherein, the polarity of the first polarity data and the second polarity data are opposite.

[0090] The driving method and circuit of the liquid crystal display panel of the present invention, by simultaneously turning on all R-row pixels / G-row pixels / B-row pixels using gate lines within one frame, and writing data to all R-row pixels / G-row pixels / B-row pixels using data lines, greatly reduces the power consumption of solid color images and improves the product's battery life by using only one high-level pulse on the data lines within one frame when displaying a solid color image.

[0091] The above are merely preferred embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A driving method for a liquid crystal display panel, characterized in that, include: Step 100: A driving circuit for a liquid crystal display panel is provided. The gate line of the driving circuit is connected to the gate of the row pixel. The pixels in each row of the driving circuit are the same and are arranged in the order of R row pixels, G row pixels, and B row pixels. The data line of the driving circuit is electrically connected to the R pixel, G pixel, and B pixel of the adjacent two columns in sequence at intervals. Step 200: When a solid color image needs to be displayed within a frame, enable all R-row pixels, all G-row pixels, or all B-row pixels, drive the data lines of the corresponding solid color pixels, and perform R-pixel writing when all R-row pixels are enabled, G-pixel writing when all G-row pixels are enabled, or B-pixel writing when all B-row pixels are enabled. Step 200 includes: Step 210: When a solid red color needs to be displayed in the current frame, simultaneously input a high-level signal to the gate of all R-row pixels to turn on all R-row pixels; Step 220: Drive the data line of the corresponding solid color pixel to write the first polarity data to all R row pixels; Step 200 further includes: Step 210a: When a solid red color image needs to be displayed in the next frame, simultaneously input a high-level signal to the gate of all R-row pixels to turn on all R-row pixels; Step 220a: Drive the data line of the corresponding solid color pixel and write the second polarity data to all R row pixels; The first polarity data has the opposite polarity to the second polarity data; Step 200 includes: Step 230: When a solid green color needs to be displayed in the current frame, simultaneously input a high-level signal to the gate of all G-row pixels to turn on all G-row pixels; Step 240: Drive the data line of the corresponding solid color pixel to write the first polarity data to all G row pixels; Step 200 further includes: Step 230a: When a solid green image needs to be displayed in the next frame, simultaneously input a high-level signal to the gate of all G-row pixels to turn on all G-row pixels; Step 240a: Drive the data line of the corresponding solid color pixel and write the second polarity data to all G row pixels; The first polarity data has the opposite polarity to the second polarity data; Step 200 includes: Step 250: When a solid blue image needs to be displayed in the current frame, simultaneously input a high-level signal to the gate of all B-row pixels to enable all B-row pixels; Step 260: Drive the data line of the corresponding solid color pixel to write the first polarity data to all B row pixels; Step 200 further includes: Step 250a: When a blue solid color image needs to be displayed in the next frame, simultaneously input a high-level signal to the gate of all B row pixels to turn on all B row pixels; Step 260a: Drive the data line of the corresponding solid color pixel and write the second polarity data to all B row pixels; The first polarity data has the opposite polarity to the second polarity data; When displaying a solid color image, the data line only performs one high-level pulse per frame.

2. A driving circuit for a liquid crystal display panel, employing the driving method for a liquid crystal display panel as described in claim 1, characterized in that, include: R-row pixels, all pixels in the same row are R-pixels; G rows of pixels, each row contains G pixels; Pixels in row B, all pixels in the same row are B pixels; Multiple gate lines; Multiple data cables; First timing unit; Second timing unit; The gate lines are electrically connected to the gates of the R-row pixels, G-row pixels, or B-row pixels, respectively. Each of the data lines is electrically connected sequentially and at intervals to the R, G, and B pixels of the two adjacent columns; The first timing unit is electrically connected to the plurality of gate lines and is used to activate all R-row pixels, all G-row pixels, or all B-row pixels when a solid color image needs to be displayed within a frame. The second timing unit is electrically connected to the multiple data lines and is used to drive the data lines of the corresponding solid color pixels to write R pixels when all R row pixels are turned on, write G pixels when all G row pixels are turned on, or write B pixels when all B row pixels are turned on.

3. The driving circuit for the liquid crystal display panel according to claim 2, characterized in that, The first timing unit is further configured to simultaneously input a high-level signal to the gate of all R-row pixels / G-row pixels / B-row pixels when a solid red / green / blue image needs to be displayed in the current frame, so as to turn on all R-row pixels / G-row pixels / B-row pixels; The second timing unit is further used to drive the data lines of the corresponding solid color pixels to write the first polarity data to all R row pixels / G row pixels / B row pixels.

4. The driving circuit for the liquid crystal display panel according to claim 3, characterized in that, The first timing unit is further configured to simultaneously input a high-level signal to the gate of all R-row pixels / G-row pixels / B-row pixels when a solid color image of red / green / blue needs to be displayed in the next frame, so as to turn on all R-row pixels / G-row pixels / B-row pixels; The second timing unit is further used to drive the data lines of the corresponding solid color pixels to write second polarity data to all R row pixels / G row pixels / B row pixels; The first polarity data has the opposite polarity to the second polarity data.

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