Carrier control card and switch

Abstract

The present invention provides a bearer control card and a switch, which can be applied to the field of communication technologies. The bearer control card includes: a processor, a first baseboard controller, a second baseboard controller, and a logic controller. Among them, the logic controller is connected to a switch board through a connector. Among them, the first baseboard controller is used to monitor the working state of the processor. When it is determined that the processor is in an abnormal working state, a first interrupt signal is generated, and the first interrupt signal is sent to the second baseboard controller and the logic controller respectively. The second baseboard controller is used to generate a first communication signal in response to the first interrupt signal. The logic controller is used to provide the first communication signal to the switch board in response to the first interrupt signal, so as to switch the control unit of the bearer control card to the second baseboard controller.

Description

Technical Field

[0001] The present invention relates to the field of communication technologies, specifically to the field of communication device technologies, and more specifically to a bearer control card and a switch. Background Art

[0002] As the core device of modern networks, switches undertake key functions such as data forwarding, traffic control, and network management. In the design of switches, the bearer control board realizes the collaborative work of control and data exchange by integrating components such as a processor board, a baseboard management controller, and network chips, while the switch board focuses on high-speed data forwarding.

[0003] However, with the expansion of network scale and the improvement of service reliability requirements, the limitations of the existing switch architecture in redundancy design and fault recovery capabilities are gradually emerging. In common switch architectures, only one processor board is set, lacking redundancy design. When the processor board overheats and crashes, the switch board cannot receive new configuration instructions, resulting in the loss of control of the entire machine and the interruption of services. Summary of the Invention

[0004] In view of the above problems, the present invention provides a bearer control card and a switch that improve the stability and controllability of the entire machine system.

[0005] According to a first aspect of the present invention, a bearer control card is provided. The bearer control card includes: a processor, a first baseboard controller, a second baseboard controller, and a logic controller. Among them, the logic controller is connected to the switch board through a connector; among them, the first baseboard controller is used to monitor the working state of the processor, and when it is determined that the processor is in an abnormal working state, generate a first interrupt signal, and send the first interrupt signal to the second baseboard controller and the logic controller respectively; the second baseboard controller is used to generate a first communication signal in response to the first interrupt signal; the logic controller is used to provide the first communication signal to the switch board in response to the first interrupt signal, so as to switch the control unit of the bearer control card to the second baseboard controller.

[0006] According to an embodiment of the present invention, the first communication signal includes a first asynchronous transceiver signal; the logic controller is further used to control the second baseboard controller to establish a signal link with the switch board in response to the first interrupt signal, so as to provide the first asynchronous transceiver signal to the switch board.

[0007] According to an embodiment of the present invention, the first substrate controller is further configured to generate a second interrupt signal and send the second interrupt signal to the logic controller when it is determined that the processor has resumed normal operation; the logic controller is further configured to, in response to the second interrupt signal, provide a second communication signal from the processor to the switch board so as to switch the control unit of the carrier control card to the processor.

[0008] According to an embodiment of the present invention, the second communication signal includes a second asynchronous transceiver signal; the logic controller is further configured to, in response to the second interrupt signal, control the processor to establish a signal link with the switch board to provide the second asynchronous transceiver signal to the switch board.

[0009] According to an embodiment of the present invention, the carrier control card further includes: a first network unit and a second network unit; wherein, the processor is connected to a first network interface of the input / output interface board through the first network unit and is connected to a second network interface of the input / output interface board through the second network unit; the second substrate controller is connected to the second network interface of the input / output interface board through the second network unit.

[0010] According to an embodiment of the present invention, the second substrate controller is configured with a first network address; wherein, the second substrate controller is further configured to perform network communication via the second network unit and the second network interface based on the first network address.

[0011] According to an embodiment of the present invention, the processor is configured with a second network address; wherein, the processor is further configured to perform network communication via the first network unit and the first network interface based on the second network address, or perform network communication via the second network unit and the second network interface based on the second network address.

[0012] According to an embodiment of the present invention, the carrier control card further includes: a plurality of multiplexers, a first input end of the multiplexer is connected to the processor, a second input end of the multiplexer is connected to the second substrate controller, an output end of the multiplexer is connected to the switch board through the connector, and a strobe end of the multiplexer is connected to the logic controller.

[0013] According to an embodiment of the present invention, the first communication signal further includes a plurality of first serial signals; wherein, the second substrate controller is further configured to send the plurality of first serial signals to the plurality of multiplexers respectively; the logic controller is further configured to, in response to the first interrupt signal, control the plurality of multiplexers to gate the plurality of first serial signals to the switch board.

[0014] According to an embodiment of the present invention, the second communication signal further includes a plurality of second serial signals; wherein, the processor is further configured to respectively send the plurality of second serial signals to the plurality of multiplexers; the logic controller is further configured to, in response to a second interrupt signal, control the plurality of multiplexers to gate the plurality of second serial signals to the switch board.

[0015] According to an embodiment of the present invention, the first substrate controller is further configured to send the second interrupt signal to the second substrate controller; the second substrate controller is configured to enter a standby state in response to the second interrupt signal.

[0016] According to an embodiment of the present invention, the carrier control card further includes: a power control unit, configured to supply power to the carrier control card and, via the carrier control card, supply power to the switch board and the input / output interface board.

[0017] According to an embodiment of the present invention, the power of the second substrate controller is less than the power of the processor.

[0018] A second aspect of the present invention provides a switch, the switch including: a switch board, an input / output interface board, and the carrier control card as described above; wherein, the carrier control card is configured to configure and / or control a plurality of graphics processors through the switch board.

[0019] According to an embodiment of the present invention, the input / output interface board includes an asynchronous transceiver interface; the logic controller of the carrier control card is configured to, in response to a test signal received via the asynchronous transceiver interface, provide a first asynchronous transceiver signal or a second asynchronous transceiver signal to the switch board.

[0020] According to an embodiment of the present invention, the logic controller of the carrier control card is configured to, when the test signal is not connected to the asynchronous transceiver interface, in response to a first interrupt signal, provide the first asynchronous transceiver signal to the switch board, and is configured to, in response to a second interrupt signal, provide the second asynchronous transceiver signal to the switch board.

[0021] According to an embodiment of the present invention, during the startup phase of the switch, the processor of the carrier control card is configured to perform configuration processing on the plurality of graphics processors.

[0022] According to an embodiment of the present invention, the above input / output interface board includes a first network interface and a second network interface, and the first network interface and the second network interface are used to connect to an Ethernet network. The above carrier control card includes a first network unit and a second network unit. Among them, the processor of the carrier control card is connected to the first network interface of the input / output interface board through the first network unit, and is connected to the second network interface of the input / output interface board through the second network unit. The second baseboard controller of the carrier control card is connected to the second network interface of the input / output interface board through the second network unit. Among them, in the startup phase of the above switch, the switch is used to assign a first network address to the second baseboard controller of the carrier control card, and assign a second network address to the processor of the carrier control card. Among them, the second baseboard controller of the carrier control card is used to perform network communication with the Ethernet network based on the first network address through the second network unit and the second network interface. The processor of the carrier control card is used to perform network communication with the Ethernet network based on the second network address through the first network unit and the first network interface, or perform network communication with the Ethernet network based on the second network address through the second network unit and the second network interface.

[0023] According to an embodiment of the present invention, in the running phase of the above switch, the processor of the carrier control card is used to control the running states of the above multiple graphics processors.

[0024] According to an embodiment of the present invention, in the running phase of the above switch, when the processor of the carrier control card is in an abnormal working state, the logic controller of the carrier control card is used to switch the control unit of the carrier control card to the second baseboard controller of the carrier control card, and the second baseboard controller of the carrier control card is used to control the running states of the above multiple graphics processors.

[0025] In the embodiment of the present invention, a second baseboard controller is configured in the carrier control card as a backup for the processor. When the processor works abnormally, the logic controller can, through logical control, switch the control unit of the carrier control card to the second baseboard controller to achieve redundant design of the processor control unit, which can effectively improve the stability and controllability of the entire machine system. In addition, since the second baseboard controller, as a redundant control unit, is in a standby state and operates at low power consumption when the processor is in a normal state, it can immediately take over the entire switch system when the processor works abnormally to improve the switching speed, and can significantly reduce the power consumption and hardware cost of the entire machine. Description of the Drawings

[0026] Through the following description of the embodiments of the present invention with reference to the drawings, the above content and other objects, features, and advantages of the present invention will become clearer.

[0027] Figure 1 Shows a schematic diagram of the core architecture of an existing switch.

[0028] Figure 2 Shows a schematic diagram of a bearer control card according to an embodiment of the present invention.

[0029] Figure 3 Shows a schematic diagram of the asynchronous transceiver signal control function according to a specific embodiment of the present invention.

[0030] Figure 4 Shows a schematic diagram of the network communication function according to a specific embodiment of the present invention.

[0031] Figure 5 Shows a schematic diagram of the structure of a switch according to an embodiment of the present invention. Detailed implementation manners

[0032] Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings. However, it should be understood that these descriptions are merely exemplary and are not intended to limit the scope of the present invention. In the following detailed description, for the sake of explanation, many specific details are set forth in order to provide a thorough understanding of the embodiments of the present invention. However, obviously, one or more embodiments can also be implemented without these specific details. In addition, in the following description, descriptions of well-known structures and technologies are omitted to avoid unnecessarily obscuring the concepts of the present invention.

[0033] The terms used herein are merely for describing specific embodiments and are not intended to limit the present invention. The terms "comprising", "including" and the like used herein indicate the presence of the described features, steps, operations and / or components, but do not exclude the presence or addition of one or more other features, steps, operations or components.

[0034] All terms used herein (including technical and scientific terms) have the meanings commonly understood by those skilled in the art, unless otherwise defined. It should be noted that the terms used herein should be interpreted as having a meaning consistent with the context of this specification and should not be interpreted in an idealized or overly rigid manner.

[0035] In the case of using expressions such as "at least one of A, B, and C", generally, it should be interpreted according to the meaning commonly understood by those skilled in the art (for example, "a system having at least one of A, B, and C" should include but not be limited to a system having only A, only B, only C, having A and B, having A and C, having B and C, and / or having A, B, and C, etc.).

[0036] As the core device of modern networks, switches undertake key functions such as data forwarding, traffic control, and network management. Common switches include Ethernet switches, telephone voice switches, fiber optic switches, etc.

[0037] Figure 1 The schematic diagram of the core architecture of the existing switch is shown.

[0038] As Figure 1 shown, the core architecture of the existing switch usually consists of multiple functional modules, including a switch board, a carrier control board, a heat dissipation control board, a power distribution board, and a power configuration unit. Among them, the carrier control board includes a processor board and a baseboard management controller board.

[0039] Among them, the switch board (Switch Board) is the core switching unit of the switch. Usually, a high-performance switch chip is installed to implement the data switching function of network nodes, and at the same time, it is responsible for providing common external interfaces, such as: four-channel small form-factor pluggable (Quad Small Form-factor Pluggable, QSFP) optical module interface, Common Data Center Interface Protocol (CDFP) interface, RJ45 service network port, RJ45 management network port, RJ45 debug serial port, Universal Serial Bus (USB) interface, Light Emitting Diode (LED) indicator, etc. The processor board is the control unit of the switch. Usually, a Central Processing Unit (CPU) and related power control circuits are installed. The baseboard management controller board is the management unit of the switch. Usually, a Baseboard Management ControllerBoard (BMC) sub-card or RunBMC module is used. The heat dissipation control board (Fan Control Board, FCB) is used to implement the control function of the fan and provide heat dissipation requirements for the whole machine. The power distribution board (Power Distribution Board, PDB) is used to complete the connection of the power configuration unit (Power supply unit, PSU) and power transfer, and provide power supply requirements and power control signals for each board. The carrier control board (Carrier Control Board, CCB) is the key carrier board of the switch. It can be used to carry key devices and core components such as connectors, storage devices, and network chips of the processor board, baseboard management controller, heat dissipation control board, and power distribution board, and is mainly used to realize the interconnection functions of the switch control unit, management unit, and data exchange unit, etc.

[0040] Among them, the carrier control board can include key devices and core components such as storage devices, security chips, flash memories, logic controllers, frequency adjustment modules, network switching chips, network chips, and power circuits.

[0041] Among them, the baseboard management controller can implement the management and control functions of each core device through Inter-Integrated Circuit (I2C) signals; implement the management and configuration of the network switching chip and the function of the baseboard management controller board management network port through Management Data Clock (MDC) signals, Management Data Input / Output (MDIO) signals, and Reduced Gigabit Media Independent Interface (RGMII) signals; implement interconnection communication with the processor board through Low Pin Count Bus (LPC), Peripheral Component Interconnect Express (PCIe) bus, USB, and General-purpose input / output (GPIO); and can also be interconnected with the logic controller through the Universal Asynchronous Receiver / Transmitter (UART) serial port for the management serial port of the front window of the whole machine.

[0042] Among them, the processor board can be interconnected with the storage device through PCIe and Serial Advanced Technology Attachment (SATA) to implement the control function of the storage unit; the processor board can implement the 100M and 1000M service network port functions through the network switching chip and the network chip, or implement the 10G service network port through the 10G Local Area Network (LAN) interface of the processor itself; the processor board can be interconnected with the switching chip through the UART serial port, mainly for monitoring the status information of the switching chip, etc.

[0043] In the traditional design of the carrier control board, the coordinated work of control and data exchange is achieved by integrating components such as the processor board, the baseboard management controller, and the network chip, while the switch board focuses on high-speed data forwarding. However, with the expansion of the network scale and the improvement of service reliability requirements, the limitations of the existing switch architecture in redundant design and fault recovery capabilities are gradually emerging.

[0044] For example, in a common switch architecture, only one processor board is provided, lacking redundancy design. When the processor board overheats and shuts down, the switch board cannot receive new configuration instructions, resulting in the entire machine getting out of control and business interruption. If another processor board is added, multiple selectors need to be added to manage the switching circuit that makes a one-out-of-two selection for all control signals. However, this design will cause the size of the carrier control board to increase, greatly increasing the cost of the entire machine. If the added processor board is always in the power-on waiting state, it will also increase the power consumption of the entire machine; if the added processor board is in the shutdown state, it will only be enabled when the main control processor board fails. However, due to the long startup time of the processor board, it cannot be immediately switched to the added processor board, so it will also cause the entire machine to get out of control and the functions to fail.

[0045] In view of this, embodiments of the present invention provide a carrier control card. By configuring a second baseboard controller in the carrier control card as a backup for the processor, when the processor malfunctions, the logic controller can, through logical control, switch the control unit of the carrier control card to the second baseboard controller to achieve redundant design of the processor control unit, which can effectively improve the stability and controllability of the entire machine system. In addition, since the second baseboard controller is in a standby state and operates at low power in the normal state of the processor, it can immediately take over the entire switch system when the processor malfunctions to improve the switching speed, and can significantly reduce the power consumption and hardware cost of the entire machine.

[0046] Embodiments of the present invention provide a carrier control card, including: a processor, a first baseboard controller, a second baseboard controller, and a logic controller. Among them, the logic controller is connected to the switch board through a connector; the first baseboard controller is used to monitor the working state of the processor, and when it is determined that the processor is in an abnormal working state, generate a first interrupt signal and send the first interrupt signal to the second baseboard controller and the logic controller respectively; the second baseboard controller is used to generate a first communication signal in response to the first interrupt signal; and the logic controller is used to provide the first communication signal to the switch board in response to the first interrupt signal, so as to switch the control unit of the carrier control card to the second baseboard controller.

[0047] The following Figures 2 to 4 describes the carrier control card of the embodiments of the present invention in detail.

[0048] Figure 2 shows a schematic diagram of the carrier control card according to an embodiment of the present invention.

[0049] As Figure 2 shown, the carrier control card includes a processor, a first baseboard controller, a second baseboard controller, and a logic controller.

[0050] In an embodiment of the present invention, the processor may include a central processing unit (CPU), and this processor may serve as the main control unit to execute the switch operating system and service logic, etc. Among them, this processor may be configured on the carrier control card, and this processor may control I2C signals, GPIO signals, interrupt (INT) signals, etc. of the switch board.

[0051] In an embodiment of the present invention, the first baseboard controller may represent a baseboard management controller (BMC). This first baseboard controller may monitor and manage the system operating state of the processor in real time through hardware sensors and protocol interfaces, such as the temperature, voltage, fan speed, etc. of the processor. Among them, this first baseboard controller may be configured on the carrier control card.

[0052] For example, when it is determined that the processor is in an abnormal operating state, such as the processor temperature is too high or the processor crashes due to a power failure, the first baseboard controller will generate a first interrupt signal and send the first interrupt signal to the second baseboard controller and the logic controller respectively.

[0053] In an embodiment of the present invention, the second baseboard controller may represent a redundant baseboard management controller (microBaseboard Management Controller, mBMC). The second baseboard controller has the same hardware configuration as the first baseboard controller. When the processor fails, the second baseboard controller can immediately take over the entire switch system to avoid problems such as the entire machine system getting out of control and all functions failing. Among them, this second baseboard controller may be configured on the carrier control card, and this second baseboard controller may control I2C signals, GPIO signals, INT interrupt signals, etc. of the switch board.

[0054] For example, in the normal mode, the second baseboard controller may synchronize the status data of the first baseboard controller through the I2C channel, but does not actively send control instructions, and is in the standby mode, maintaining operation in a low-power standby state. In response to receiving the first interrupt signal sent by the first baseboard controller, a first communication signal is generated and the first communication signal is sent to the logic controller to switch the signal path through the logic controller to achieve the takeover control of the second baseboard controller.

[0055] In an embodiment of the present invention, the logic controller may represent a programmable digital integrated circuit, such as a Complex Programmable Logic Device (CPLD). Among them, the logic controller may be configured on a carrier control card and connected to a switch board through a connector, and may be used for hardware signal routing and switching control. For example, the logic controller may control the power-on and power-off timing of the switch board, UART serial communication, Signal Database (SDB) signal communication, GPIO signal communication, etc.

[0056] Among them, the connector may include, for example, a multi-channel input / output (Mini Cool Edge IO, MCIO) connector, and the switch board may be, for example, a two-layer switching board for implementing data exchange or signal routing functions.

[0057] For example, in response to receiving a first interrupt signal sent by a first board controller, the logic controller provides a first communication signal to the switch board to switch the signal connection path between the processor or the second board controller and the switch board. For example, the connection between the processor and the switch board is switched to the connection between the second board controller and the switch board, so as to switch the control unit of the carrier control card from the processor to the second board controller.

[0058] Based on this, in the embodiment of the present invention, a second board controller is configured in the carrier control card as a backup of the processor. When the processor works abnormally, the logic controller can switch the control unit of the carrier control card to the second board controller through logical control to achieve redundant design of the processor control unit, which can effectively improve the stability and controllability of the whole machine system. In addition, since the second board controller is in a standby state and operates at low power consumption when the processor is in a normal state, it can immediately take over the entire switch system when the processor works abnormally to improve the switching speed, and can significantly reduce the power consumption and hardware cost of the whole machine.

[0059] According to an embodiment of the present invention, the first communication signal includes a first asynchronous transceiver signal; the logic controller is further configured to control the second board controller to establish a signal link with the switch board in response to the first interrupt signal, so as to provide the first asynchronous transceiver signal to the switch board.

[0060] According to an embodiment of the present invention, the first asynchronous transceiver signal may be used to represent a Universal Asynchronous Receiver / Transmitter (UART) signal. Among them, the first asynchronous transceiver signal, as an asynchronous serial communication protocol, is suitable for low-rate and reliable control instruction transmission to ensure the certainty of the takeover process.

[0061] Figure 3Shows a schematic diagram of the asynchronous transceiver signal control function according to a specific embodiment of the present invention.

[0062] As Figure 3 shown, in this specific embodiment, the devices in the switch system that require UART signal control include a processor, a first baseboard controller, a second baseboard controller, switch boards SW-A and SW-B, and an input / output interface board. Among them, each device connects its respective UART signal line to the logic controller, and the logic controller performs switching interconnection as needed.

[0063] According to a specific embodiment of the present invention, when the processor is in a normal working state, the UART signal of the processor is connected to the switch board, and the second baseboard controller continuously synchronizes the status data of the first baseboard controller through the I2C channel in the standby mode. When the processor is in an abnormal working state, the first baseboard controller sends a first interrupt signal to the second baseboard controller and the logic controller respectively. After receiving the first interrupt signal, the logic controller disconnects the UART link between the processor and the switch board, physically connects the UART signal pin of the second baseboard controller to the corresponding interface of the MCIO connector, so as to control the second baseboard controller to switch from the standby mode to the active control mode, enabling the second baseboard controller to start the UART communication module and generate a first asynchronous transceiver signal, and establish a signal link with the switch board to provide the first asynchronous transceiver signal to the switch board.

[0064] Among them, the UART signal may include initialization instructions, configuration parameters, etc. required for takeover control, such as sending commands such as port enable and routing table update to the switch board.

[0065] According to an embodiment of the present invention, the first baseboard controller is further configured to generate a second interrupt signal and send the second interrupt signal to the logic controller when it is determined that the processor has resumed normal operation; the logic controller is further configured to respond to the second interrupt signal and provide a second communication signal from the processor to the switch board, so as to switch the control unit of the carrier control card to the processor.

[0066] According to a specific embodiment of the present invention, when the processor is in an abnormal working state, the first baseboard controller still continuously monitors the working state of the processor through the hardware sensor and the protocol interface. When the first baseboard controller detects that the processor failure is resolved and resumes normal operation, it will generate a second interrupt signal and send the second interrupt signal to the logic controller. At this time, after the processor resumes control, it generates a second communication signal and transmits the second communication signal to the switch board through the control of the logic controller to switch the control unit of the carrier control card to the processor.

[0067] According to an embodiment of the present invention, the first substrate controller is further configured to send a second interrupt signal to the second substrate controller; and the second substrate controller is configured to enter a standby state in response to the second interrupt signal.

[0068] According to a specific embodiment of the present invention, when the first substrate controller detects that the processor fault is resolved and resumes to the normal operating state, it will also send a second interrupt signal to the second substrate controller to notify the second substrate controller to exit the active control mode, release resources and enter the standby state. In response to receiving the second interrupt signal, the second substrate controller exits the active control mode, switches to the standby mode, and maintains the operation of the core circuit with low power consumption.

[0069] According to an embodiment of the present invention, the second communication signal includes a second asynchronous transceiver signal; the logic controller is further configured to control the processor to establish a signal link with the switch board in response to the second interrupt signal, so as to provide the second asynchronous transceiver signal to the switch board.

[0070] According to an embodiment of the present invention, the second asynchronous transceiver signal can also be used to represent a Universal Asynchronous Receiver / Transmitter (UART) signal.

[0071] According to a specific embodiment of the present invention, when the logic controller responds to receiving the second interrupt signal, it disconnects the UART signal link between the second substrate controller and the switch board, and physically connects the UART signal pin of the processor to the corresponding interface of the MCIO connector, so as to control the second substrate controller to exit the active control mode and return to the standby state, enabling the processor to start the UART communication module and generate the second asynchronous transceiver signal, and establish a signal link with the switch board to provide the second asynchronous transceiver signal to the switch board.

[0072] Based on this, the embodiment of the present invention realizes seamless switching of the multi-level UART control link through the redundant design and switching management of the UART communication function of the logic controller. At the same time, it eliminates the external multiplexer chip for UART switching processing of the processor and the second substrate controller, reducing the overall machine cost while significantly improving the system reliability and maintainability.

[0073] According to an embodiment of the present invention, the carrier control card further includes: a plurality of multiplexers, the first input end of the multiplexer is connected to the processor, the second input end of the multiplexer is connected to the second substrate controller, the output end of the multiplexer is connected to the switch board through a connector, and the strobe end of the multiplexer is connected to the logic controller.

[0074] According to an embodiment of the present invention, the carrier control card may further include a plurality of multiplexers, where each multiplexer supports two inputs and one output. For example, as Figure 2As shown, the first input terminal of the multiplexer is connected to the processor, the second input terminal of the multiplexer is connected to the second substrate controller, the output terminal of the multiplexer is connected to the switch board through a connector, and the strobe terminal of the multiplexer is connected to the logic controller.

[0075] According to an embodiment of the present invention, the first communication signal further includes a plurality of first serial signals; wherein, the second substrate controller is further configured to send the plurality of first serial signals to a plurality of multiplexers respectively; and the logic controller is further configured to control the plurality of multiplexers to gate the plurality of first serial signals to the switch board in response to the first interrupt signal.

[0076] According to an embodiment of the present invention, the plurality of first serial signals can be used to represent control signals sent by the second substrate controller, wherein the plurality of first serial signals can be I2C control signals.

[0077] According to an embodiment of the present invention, the logic controller can also be configured to generate a first gating control signal for the multiplexer in response to the first interrupt signal to coordinate the gating path of the plurality of first serial signals.

[0078] Specifically, when the processor is in an abnormal operating state, the first substrate controller sends a first interrupt signal to the second substrate controller and the logic controller respectively. The second substrate controller exits the standby mode, generates a plurality of first serial signals, and sends the plurality of first serial signals to a plurality of multiplexers. After receiving the first interrupt signal, the logic controller sends a first gating control signal to the strobe terminals of the plurality of multiplexers, so that the plurality of first serial signals are gated to the switch board through the multiplexers, in order to switch the control unit carrying the control card to the second substrate controller.

[0079] According to an embodiment of the present invention, the second communication signal further includes a plurality of second serial signals; wherein, the processor is further configured to send the plurality of second serial signals to a plurality of multiplexers respectively; and the logic controller is further configured to control the plurality of multiplexers to gate the plurality of second serial signals to the switch board in response to the second interrupt signal.

[0080] According to an embodiment of the present invention, the plurality of second serial signals can be used to represent control signals sent by the processor, wherein the plurality of second serial signals can include GPIO status control signals.

[0081] According to an embodiment of the present invention, the logic controller can also be configured to generate a second gating control signal for the multiplexer in response to the second interrupt signal to coordinate the gating path of the plurality of second serial signals.

[0082] Specifically, when the first substrate controller detects that the processor fault is resolved and the processor resumes to the normal working state, a second interrupt signal will be generated and sent to the logic controller and the second substrate controller. In response to receiving the second interrupt signal, the second substrate controller exits the active control mode and switches to the standby mode. At this time, the processor generates multiple second serial signals and sends the multiple second serial signals to multiple multiplexers. After receiving the second interrupt signal, the logic controller generates a second strobe control signal for the multiplexers and sends the second strobe control signal to the strobe terminals of the multiple multiplexers, so that the multiple second serial signals are strobed by the multiplexers to the switch board card, thereby switching the control unit carrying the control card to the processor.

[0083] Based on this, through the collaborative design of multiple multiplexers and the logic controller in the embodiments of the present invention, the redundant switching of multiple serial signals is realized, ensuring that when the processor fails or recovers, the control right can be quickly and reliably switched between the processor and the second substrate controller. In addition, when new signal types need to be added to the control card, only the corresponding multiplexers need to be added, without reconstructing the overall control card architecture, and the failure of a single multiplexer only affects its corresponding signal type, and other signals can still be normally switched, thus improving the flexibility and reliability of the control card.

[0084] According to an embodiment of the present invention, the power of the second substrate controller is less than the power of the processor.

[0085] In a specific embodiment of the present invention, the second substrate controller is configured to have a power less than that of the processor. For example, an embedded microcontroller or a microcontroller with a peripheral reduction can be used, only retaining the necessary interfaces, turning off non-core functions (such as analog-to-digital converter ADC sampling, high-speed clock) in the standby mode, only maintaining heartbeat detection and status synchronization, and entering the active control mode for master control takeover when the processor fails, with a brief increase in power consumption.

[0086] According to an embodiment of the present invention, the control card further includes: a first network unit and a second network unit; wherein, the processor is connected to the first network interface of the input / output interface board card through the first network unit, and is connected to the second network interface of the input / output interface board card through the second network unit; the second substrate controller is connected to the second network interface of the input / output interface board card through the second network unit.

[0087] According to an embodiment of the present invention, the first network unit can be used to represent an Ethernet controller, providing an independent Media Access Control Layer (MAC) and a Physical Interface (PHY), such as Intel I210. The second network unit can be used to represent an Ethernet switch chip, such as Marvell switch chip 88E6321.

[0088] Figure 4 FIG. shows a schematic diagram of a network communication function according to a specific embodiment of the present invention.

[0089] As Figure 4 shown, in this specific embodiment, the devices that need to perform network communication in the switch system include a processor, a first baseboard controller, and a second baseboard controller.

[0090] Among them, the network signal of the processor is connected to the first network interface of the input / output interface board through the first network unit, facilitating independent service network processing for the processor. In addition, the network signal of the processor is also connected to the second network interface of the input / output interface board through the second network unit. For example, the processor is directly connected to the first network interface on the input / output interface board through the network chip Intel I210. In addition, the processor is also connected to the second network interface through the PHY interface on the input / output interface board via the Marvell switch chip 88E6321.

[0091] In this specific embodiment, the network signals of the first baseboard controller and the second baseboard controller are connected to the second network interface of the input / output interface board through the second network unit. For example, the network signals of the first baseboard controller and the second baseboard controller are both directly connected to the Marvell switch chip 88E6321 and then connected to the second network interface through the PHY interface on the input / output interface board.

[0092] According to an embodiment of the present invention, the second baseboard controller is configured with a first network address; wherein, the second baseboard controller is further configured to perform network communication via the second network unit and the second network interface based on the first network address.

[0093] According to an embodiment of the present invention, the second baseboard controller is configured with a first network address, such as a static IP address, for identifying itself in the network, and uses the first network address to perform network communication via the second network unit and the second network interface when the second baseboard controller takes over.

[0094] According to an embodiment of the present invention, the processor is configured with a second network address; wherein, the processor is further configured to perform network communication via a first network unit and a first network interface based on the second network address, or perform network communication via a second network unit and a second network interface based on the second network address.

[0095] According to an embodiment of the present invention, the processor is configured with a second network address, such as an IP address different from the first network address, and can perform network communication with a first network unit and a first network interface when the processor is in a normal working state, or perform communication via a second network unit and a second network interface when needed.

[0096] According to a specific embodiment of the present invention, when the processor is in a normal working state, the processor communicates with a first network interface RJ45 through a network chip Intel I210. At this time, the Marvell switch chip 88E6321 can be used as a backup path or for other internal communications.

[0097] In this specific embodiment, when the processor is in an abnormal working state, the second baseboard controller takes over the communication via the Marvell switch chip 88E6321 through a PHY interface and a second network interface RJ45, and maintains the network connection using the first network address to ensure that the system can still perform network communication.

[0098] In this specific embodiment, after the processor resumes normal working state, it is necessary to switch back to the main path. At this time, the processor can communicate through the network chip Intel I210 or select the Marvell switch chip 88E6321 based on network configuration and redundancy policy.

[0099] Based on this, in an embodiment of the present invention, the processor can be connected to a first network interface through a first network unit, or can be connected to a second network interface through a second network unit. This configuration enables the processor to communicate through two different network paths for redundancy or load balancing. The second baseboard controller is only connected to the second network interface through the second network unit. When the processor is in an abnormal working state, the second baseboard controller can take over and communicate through the second network interface to avoid interruption of the communication link when the processor is abnormal.

[0100] According to an embodiment of the present invention, the first network address and the second network address can also be used for matching network paths and detecting faults of control units when a user communicates and interacts with the system.

[0101] Specifically, since the second substrate controller fixedly uses the first network address to communicate through the second network unit and the second network interface, while the processor dynamically uses the second network address to perform network communication via the first network unit and the first network interface, or, based on the second network address, performs network communication via the second network unit and the second network interface.

[0102] Therefore, in a specific embodiment, the user can detect the health status of the control plane based on the first network address. For example, when the processor status is normal and the second substrate controller status is standby, if the user can successfully receive the response from the second substrate controller, it can be determined that the basic functions of the control plane are normal. When the processor status is abnormal (such as crashing) and the second substrate controller status is in takeover, if the user can successfully receive the response from the second substrate controller, it can be determined that the processor has failed but the system is still controlled. When the processor status is abnormal and the second substrate controller status is faulty, if the user receives a response timeout or no response information, it can be determined that the entire machine control plane has failed.

[0103] In another specific embodiment, the user can detect the health status of the service plane based on the second network address. For example, when the path of the first network unit and the first network interface is normal and the user receives a low-latency response result, it indicates that there is no abnormality in the service plane. When the path of the first network unit and the first network interface is faulty and the path of the second network unit and the second network interface is normal, and the user receives a slightly higher-latency response result, it indicates that the first network unit is abnormal and the standby network path is in effect. When the paths of both the first network unit and the first network interface and the second network unit and the second network interface are faulty and the user receives a response timeout or no response information, it indicates that both network paths corresponding to the processor have failed.

[0104] Based on this, the embodiments of the present invention use the first network address and the second network address to perform network line matching and fault detection of the control unit. The operation and maintenance personnel do not need to log in to the device, and only need to perform a ping test on the dual IPs to perform fault detection on the network path and the control unit, so as to quickly locate the fault level during the test process to ensure the reliability of the system and the continuity of the service.

[0105] According to an embodiment of the present invention, the carrier control card further includes: a power control unit for supplying power to the carrier control card and supplying power to the switch board card and the input / output interface board card via the carrier control card.

[0106] According to a specific embodiment of the present invention, one or more power supply units (PSUs) can be configured on the carrier control card, so that one or more power supply units supply power to the switch board card, the input / output interface board card, etc. through the power plane on the carrier control card.

[0107] Based on this, embodiments of the present invention, through the integrated design of the power control unit, eliminate the need for a separately externally connected PDB board, reducing the material cost and assembly complexity; in addition, the integrated design of the power control unit shortens the power path, reduces voltage drop and heat loss, and the faulty power control unit can be directly hot-plugged and replaced on the carrier control card to improve the maintenance efficiency and system reliability.

[0108] Figure 5 The structural schematic diagram of a switch according to an embodiment of the present invention is shown.

[0109] As Figure 5 shown, the switch includes a switch board card, an input / output interface board card, and a carrier control card. Among them, a processor, a first baseboard controller, a second baseboard controller, a logic controller, etc. are integrated on the carrier control card to serve as the control center of the switch.

[0110] In a specific embodiment of the present invention, the carrier control card of the switch further includes a plurality of power control units. As Figure 5 shown, the power control unit includes a first power control unit and a second power control unit. The first power control unit and the second power control unit are plugged and connected to the carrier control card through an on-board connector (such as a PCIe power interface), without the need for an additional power configuration board card.

[0111] In a specific embodiment of the present invention, the switch board card can be configured as upper and lower double layers. One layer is designed with a four-channel small form-factor pluggable (QSFP) optical module interface, and the other layer is designed with a common data center interface protocol (CDFP) interface. By adopting a dual-interface form, it is convenient to connect different network nodes. Among them, the switch board card can be used to implement the data exchange function of multiple network nodes and connect multiple graphics processors.

[0112] In a specific embodiment of the present invention, the input / output interface board card is used to carry external management interfaces, such as RJ45 network ports, RJ45 debugging serial ports, USB interfaces, LED indicators, switch buttons, etc., for decoupling operations.

[0113] In a specific embodiment of the present invention, the switch further includes a fan control board (FCB) for implementing the control function of the fan to provide heat dissipation requirements for the whole machine.

[0114] In a specific embodiment of the present invention, the switch further includes a storage device, such as an M.2 SSD storage device, which is a solid-state drive using an M.2 interface to provide a smaller size, faster transmission speed, and higher performance.

[0115] In a specific embodiment of the present invention, the switch further includes a security chip compliant with the Trusted Platform Module (TPM) standard for storing encryption keys for encryption and decryption.

[0116] According to an embodiment of the present invention, as Figure 5 shown, the carrier control card can configure (such as initialization, firmware loading) and run control (such as task allocation, power consumption management) multiple graphics processors through the switch board. The carrier control card can support redundant control and dual network paths for switching between the processor and the second baseboard controller.

[0117] Based on this, the embodiment of the present invention realizes flexible management of the switch board through the logic controller, redundant control unit, and second baseboard controller on the carrier control card, and then centrally configures, monitors, and controls the connected multiple graphics processors. When the processor fails, the second baseboard controller can quickly take over the control right to ensure that the configuration and management of the multiple graphics processors are not interrupted, and avoid the entire computing cluster crashing due to the failure of the control unit.

[0118] According to an embodiment of the present invention, the input / output interface board includes an asynchronous transceiver interface; the logic controller of the carrier control card is used to provide a first asynchronous transceiver signal or a second asynchronous transceiver signal to the switch board in response to a test signal received via the asynchronous transceiver interface.

[0119] According to an embodiment of the present invention, the logic controller of the carrier control card is used to provide the first asynchronous transceiver signal to the switch board in response to a first interrupt signal when no test signal is connected to the asynchronous transceiver interface, and is used to provide the second asynchronous transceiver signal to the switch board in response to a second interrupt signal.

[0120] According to an embodiment of the present invention, the input / output interface board includes an asynchronous transceiver interface such as a UART interface for receiving test signals or debugging instructions sent by an external test device.

[0121] According to an embodiment of the present invention, the first asynchronous transceiver signal represents a UART signal from the second baseboard controller for control instructions during fault takeover.

[0122] According to an embodiment of the present invention, the second asynchronous transceiver signal represents a UART signal from the processor for service instructions during normal operation.

[0123] Specifically, in the case of test signal access, the logic controller selects different asynchronous transceiver signals and directly routes them to the switch board card according to the test signal or interrupt signal received via the asynchronous transceiver interface, without going through the processing of the processor or the second substrate controller, thereby quickly verifying the hardware function.

[0124] In this specific embodiment, in the case of no test signal access, the logic controller needs to select different signal sources according to the interrupt signal. For example, in response to the first interrupt signal indicating that the processor has a fault, the logic controller controls the strobe terminal of the multiplexer to provide the first asynchronous transceiver signal to the switch board card to switch the main control to the second substrate controller; in response to the second interrupt signal indicating that the processor has returned to normal, the logic controller controls the strobe terminal of the multiplexer to provide the second asynchronous transceiver signal to the switch board card to switch the main control back to the processor.

[0125] In a specific embodiment, the serial port of the input / output interface board card can be set to the first priority to directly receive external test signals, and can be switched to any other UART signal source through the logic controller.

[0126] In another specific embodiment, the serial port of the first substrate controller can be set to the second priority, so that it can also be switched to any other UART signal source through the logic controller to provide a backup debugging channel when the processor is abnormal.

[0127] Based on this, the embodiment of the present invention realizes flexible signal routing of the switch in the test mode and the normal operation mode through the collaborative design of the asynchronous transceiver interface and the logic controller, not only supports the trigger switching of external test signals, but also can automatically switch the UART control right through the interrupt signal, thereby enhancing the autonomous fault tolerance ability and operation stability of the system.

[0128] According to the embodiment of the present invention, in the startup stage of the switch, the processor carrying the control card is used to perform configuration processing on multiple graphics processors.

[0129] According to an embodiment of the present invention, an input / output interface board card includes a first network interface and a second network interface, the first network interface and the second network interface are used to connect to an Ethernet, and a carrier control card includes a first network unit and a second network unit; wherein, a processor of the carrier control card is connected to the first network interface of the input / output interface board card through the first network unit, and is connected to the second network interface of the input / output interface board card through the second network unit; a second baseboard controller of the carrier control card is connected to the second network interface of the input / output interface board card through the second network unit; wherein, in the startup phase of the switch, the switch is used to allocate a first network address to the second baseboard controller of the carrier control card, and allocate a second network address to the processor of the carrier control card; wherein, the second baseboard controller of the carrier control card is used to perform network communication with the Ethernet via the second network unit and the second network interface based on the first network address; the processor of the carrier control card is used to perform network communication with the Ethernet via the first network unit and the first network interface based on the second network address, or perform network communication with the Ethernet via the second network unit and the second network interface based on the second network address.

[0130] According to an embodiment of the present invention, when the switch starts up, the processor needs to configure tasks for multiple graphics processors connected to the switch.

[0131] In a specific embodiment of the present invention, the input / output interface board card includes a first network interface and a second network interface, and both the first network interface and the second network interface are used to connect to the Ethernet. Among them, the carrier control card includes a first network unit and a second network unit. The first network unit is, for example, a network chip Intel I210, and the second network unit is, for example, a Marvell switching chip 88E6321. The processor of the carrier control card is directly connected to the first network interface on the input / output interface board card through the network chip Intel I210. In addition, the processor is also connected to the second network interface through the PHY interface on the input / output interface board card via the Marvell switching chip 88E6321.

[0132] In this specific embodiment, the network signal of the second baseboard controller is connected to the second network interface of the input / output interface board card through the second network unit. For example, the network signals of the second baseboard controller are directly connected to the Marvell switching chip 88E6321, and then connected to the second network interface RJ45 through the PHY interface on the input / output interface board card.

[0133] In this specific embodiment, in the startup phase, the switch will allocate a first network address to the second baseboard controller through the second network unit, and allocate a second network address to the processor through the first network unit, so that they can communicate with the Ethernet through different network paths.

[0134] For example, when the processor is in an abnormal operating state, the second board controller takes over the main control. The second board controller can use the first network address to communicate with the Ethernet via the second network unit and the second network interface. When the processor is in a normal operating state, the second board controller exits the main control and switches to the standby mode. The processor can communicate with the Ethernet via the first network unit and the first network interface, or communicate with the Ethernet via the second network unit and the second network interface.

[0135] Based on this, embodiments of the present invention improve network redundancy and availability by configuring dual network interfaces and dual network units. Among them, two independent Ethernet interfaces can provide physical layer redundancy to avoid network interruption caused by a single point of failure. The dual network units correspond to different network controllers respectively, ensuring the separation of the control plane and the data plane and improving security. In addition, independent network addresses are assigned to the processor and the second board controller respectively during the startup phase. If the processor fails, the second board controller can still maintain management communication through the second network interface.

[0136] According to an embodiment of the present invention, during the operation stage of the switch, the processor carrying the control card is used to control the operating states of multiple graphics processors.

[0137] According to an embodiment of the present invention, during the operation stage of the switch, when the processor carrying the control card is in an abnormal operating state, the logic controller of the control card carrying the control card is used to switch the control unit of the control card carrying the control card to the second board controller of the control card carrying the control card, and the second board controller of the control card carrying the control card is used to control the operating states of multiple graphics processors.

[0138] According to an embodiment of the present invention, during the normal operation stage of the switch, the processor needs to configure the operating states of multiple graphics processors. For example, the processor monitors the operating temperatures of multiple graphics processors and monitors whether multiple graphics processors are operating normally by establishing a heartbeat connection.

[0139] In a specific embodiment of the present invention, when the processor is in an abnormal operating state (such as the case where the processor crashes due to overheating), the logic controller can switch the control unit of the control card carrying the control card to the second board controller, and the second board controller will take over the main control to monitor multiple graphics processors.

[0140] Based on this, in the embodiments of the present invention, when the switch is in the normal operation stage, the processor monitors and adjusts the working states of multiple graphics processors in real time through the switch board. When the processor is abnormal (such as crashing or deadlocking), the logic controller immediately switches the control unit from the processor to the second baseboard controller. After the second baseboard controller takes over, it continues to execute basic management functions (such as temperature monitoring, task suspension / resumption) to avoid interruption of computing tasks, thereby improving the service continuity and reliability of the switch.

[0141] In a specific embodiment of the present invention, when the processor actively enters the sleep state (for example, when the service load is low), the processor sends an active sleep signal to the first baseboard controller. In response to the active sleep signal of the processor, the first baseboard controller sends a first interrupt signal to the logic controller, and the logic controller can switch the control unit of the carrier control card to the second baseboard controller, and the second baseboard controller will take over the main control to monitor multiple graphics processors.

[0142] In a specific embodiment of the present invention, when the processor enters the wake-up state (for example, when the service load increases), the processor sends an active wake-up signal to the first baseboard controller. In response to the active wake-up signal of the processor, the first baseboard controller sends a second interrupt signal to the logic controller, and the logic controller can switch the control unit of the carrier control card to the processor. At this time, the processor will take over the main control to monitor multiple graphics processors.

[0143] Based on this, the embodiments of the present invention control the logic controller to switch the control unit even in real time based on the active sleep and wake-up signals and passive interrupt signals of the processor, so as to form a dual-signal trigger mechanism. On the basis of improving the reliability and flexibility of the main control switch of the system, it can also be applied to edge computing or low-load periods of the processor to reduce the idle energy consumption of the switch.

[0144] Those skilled in the art can understand that the features described in the various embodiments of the present invention can be combined and / or combined in various ways, even if such combinations or combinations are not explicitly described in the present invention. In particular, without departing from the spirit and teachings of the present invention, the features described in the various embodiments of the present invention can be combined and / or combined in various ways. All such combinations and / or combinations fall within the scope of the present invention.

[0145] The above describes the embodiments of the present invention. However, these embodiments are only for illustrative purposes and not for limiting the scope of the present invention. Although the various embodiments are described separately above, this does not mean that the measures in the various embodiments cannot be used advantageously in combination. Without departing from the scope of the present invention, those skilled in the art can make various substitutions and modifications, and all such substitutions and modifications should fall within the scope of the present invention.

Claims

1. A bearer control card, characterized in that, The described bearer control card includes: a processor, a first baseboard controller, a second baseboard controller, and a logic controller, characterized in that the logic controller is connected to a switch board through a connector; wherein, the first baseboard controller is used to monitor the working state of the processor, and when it is determined that the processor is in an abnormal working state, generate a first interrupt signal and send the first interrupt signal to the second baseboard controller and the logic controller respectively; the second baseboard controller is used to generate a first communication signal in response to the first interrupt signal; the logic controller is used to provide the first communication signal to the switch board in response to the first interrupt signal, so as to switch the control unit of the bearer control card to the second baseboard controller.

2. The bearing control card according to claim 1, characterized in that, The first communication signal includes a first asynchronous transceiver signal; the logic controller is further used to control the second baseboard controller to establish a signal link with the switch board in response to the first interrupt signal, so as to provide the first asynchronous transceiver signal to the switch board.

3. The bearer control card according to claim 1, characterized in that the first baseboard controller is further used to generate a second interrupt signal and send the second interrupt signal to the logic controller when it is determined that the processor has resumed normal working state; the logic controller is further used to provide a second communication signal from the processor to the switch board in response to the second interrupt signal, so as to switch the control unit of the bearer control card to the processor.

4. The bearer control card according to claim 3, characterized in that, The second communication signal includes a second asynchronous transceiver signal; the logic controller is further used to control the processor to establish a signal link with the switch board in response to the second interrupt signal, so as to provide the second asynchronous transceiver signal to the switch board.

5. The bearer control card according to claim 1 or 3, characterized in that, The bearer control card further includes: a first network unit and a second network unit; wherein, the processor is connected to a first network interface of an input / output interface board through the first network unit and is connected to a second network interface of the input / output interface board through the second network unit; the second baseboard controller is connected to the second network interface of the input / output interface board through the second network unit.

6. The bearer control card according to claim 5, wherein The second baseboard controller is configured with a first network address; wherein, the second baseboard controller is further used to perform network communication via the second network unit and the second network interface based on the first network address.

7. The bearing control card according to claim 5, characterized in that, The processor is configured with a second network address; wherein, the processor is further used to perform network communication via the first network unit and the first network interface based on the second network address, or perform network communication via the second network unit and the second network interface based on the second network address.

8. The bearer control card according to claim 1 or 3, characterized in that It further includes: a plurality of multiplexers, a first input end of the multiplexer is connected to the processor, a second input end of the multiplexer is connected to the second baseboard controller, an output end of the multiplexer is connected to the switch board through the connector, and a strobe end of the multiplexer is connected to the logic controller.

9. The bearer control card according to claim 8, characterized in that, The first communication signal further includes a plurality of first serial signals; Wherein, the second substrate controller is further configured to send the plurality of first serial signals to the plurality of multiplexers respectively; The logic controller is further configured to, in response to the first interrupt signal, control the plurality of multiplexers to gate the plurality of first serial signals to the switch board; 10. The bearer control card according to claim 8, characterized in that, The second communication signal further includes a plurality of second serial signals; Wherein, the processor is further configured to send the plurality of second serial signals to the plurality of multiplexers respectively; The logic controller is further configured to, in response to a second interrupt signal, control the plurality of multiplexers to gate the plurality of second serial signals to the switch board; 11. The bearer control card according to claim 3, wherein The first substrate controller is further configured to send the second interrupt signal to the second substrate controller; The second substrate controller is configured to enter a standby state in response to the second interrupt signal; 12. The bearer control card according to claim 1, characterized in that The bearer control card further includes: A power control unit, configured to supply power to the bearer control card and supply power to the switch board and the input / output interface board via the bearer control card; 13. The bearer control card according to claim 1, characterized in that, The power of the second substrate controller is less than the power of the processor; 14. A switch, characterized in that, The switch includes: A switch board, an input / output interface board, and a bearer control card according to any one of claims 1 to 13; Wherein, the bearer control card is configured to configure and / or control a plurality of graphics processors through the switch board; 15. The switch according to claim 14, characterized in that, The input / output interface board includes an asynchronous transceiver interface; The logic controller of the bearer control card is configured to provide a first asynchronous transceiver signal or a second asynchronous transceiver signal to the switch board in response to a test signal received via the asynchronous transceiver interface; 16. The switch according to claim 15, characterized in that, The logic controller of the bearer control card is configured to, when the test signal is not connected to the asynchronous transceiver interface, provide the first asynchronous transceiver signal to the switch board in response to the first interrupt signal, and provide the second asynchronous transceiver signal to the switch board in response to the second interrupt signal; 17. The switch according to claim 14, characterized in that, In the startup phase of the switch, the processor of the bearer control card is configured to perform configuration processing on the plurality of graphics processors; 18. The switch according to claim 17, wherein, The input / output interface board includes a first network interface and a second network interface, the first network interface and the second network interface are used to connect to an Ethernet, and the bearer control card includes a first network unit and a second network unit; Wherein, the processor of the bearer control card is connected to the first network interface of the input / output interface board through the first network unit, and is connected to the second network interface of the input / output interface board through the second network unit; The second substrate controller of the bearer control card is connected to the second network interface of the input / output interface board through the second network unit; Wherein, in the startup phase of the switch, the switch is configured to assign a first network address to the second substrate controller of the bearer control card and assign a second network address to the processor of the bearer control card; Among them, the second substrate controller of the carrier control card is used to perform network communication with the Ethernet via the second network unit and the second network interface based on the first network address; The processor of the carrier control card is used to perform network communication with the Ethernet via the first network unit and the first network interface based on the second network address, or perform network communication with the Ethernet via the second network unit and the second network interface based on the second network address.

19. The switch according to claim 14, characterized in that, During the operation stage of the switch, the processor of the carrier control card is used to control the operating states of the multiple graphics processors.

20. The switch according to claim 14, wherein During the operation stage of the switch, when the processor of the carrier control card is in an abnormal working state, the logic controller of the carrier control card is used to switch the control unit of the carrier control card to the second substrate controller of the carrier control card, and the second substrate controller of the carrier control card is used to control the operating states of the multiple graphics processors.

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