A data storage device, a packet storage method, and a packet reading method

Abstract

The application provides a data storage device, a message storage method and a message reading method. The data storage device comprises a data cache area, a linked list node cache area, a queue linked list management module and an idle linked list management module. The data cache area comprises cache blocks, and the cache blocks comprise cache lines. The linked list node cache area stores linked list nodes. The linked list nodes comprise queue linked list nodes and idle linked list nodes. The queue linked list management module comprises a unicast virtual channel queue linked list management module and a multicast virtual channel queue linked list management module. The unicast virtual channel queue linked list management module controls the read-write process of unicast messages of a corresponding virtual channel and manages queue linked list nodes corresponding to the unicast messages of the corresponding virtual channel. The multicast virtual channel queue linked list management module controls the read-write process of multicast messages of all virtual channels and manages queue linked list nodes corresponding to the multicast messages of all virtual channels. The idle queue linked list management module manages idle linked list nodes.

Description

Technical Field

[0001] This application belongs to the field of network communication technology, and specifically relates to a data storage device, a message storage method, and a message reading method. Background Technology

[0002] The Interchange Block (IB) protocol defines various IB devices for system communication, including channel adapters, switches, and routers. During system operation, IB devices communicate with each other. The sending side of an IB device reads packets from its buffer and sends them; the number of packets sent depends on the available credits returned by the peer device. The receiving side of an IB device receives packets from the sending side of the peer IB device, buffers them in its own buffer, and returns available credits to the peer IB device. During packet transmission, devices with only a single transmission channel are prone to packet congestion. Therefore, implementing multiple virtual channels in an IB device can effectively alleviate packet congestion. The buffer space within the device is allocated to different virtual channels based on the actual usage scenario. To improve data caching efficiency in the buffer space, a linked list is used for multi-queue space management, enabling flexible partitioning of the buffer space and thus achieving flexible configuration of the number and size of virtual channels. Summary of the Invention

[0003] The purpose of this application is to provide a data storage device, a message storage method, and a message reading method, aiming to solve the problem of excessive consumption of linked list cache resources.

[0004] According to a first aspect of this application, a data storage device is provided, comprising: a data cache area, a linked list node cache area, a queue linked list management module, and a free linked list management module;

[0005] The data cache area includes multiple cache blocks, and each cache block includes multiple cache lines;

[0006] The linked list node cache area is used to store multiple linked list nodes, each of which corresponds one-to-one with a cache line in the cache block, and the position of the linked list node in the linked list node cache area is the same as the position of the corresponding cache line in the cache block; the linked list node includes queue linked list nodes and free linked list nodes.

[0007] The queue list management module includes a unicast virtual channel queue list management module and a multicast virtual channel queue list management module; the queues include unicast virtual channel queues and multicast virtual channel queues, with each unicast virtual channel queue corresponding to a virtual channel; the unicast virtual channel queue list management module is used to control the reading and writing process of unicast messages for the corresponding virtual channel and to manage the queue list nodes corresponding to the unicast messages for the corresponding virtual channel; the multicast virtual channel queue list management module is used to control the reading and writing process of multicast messages for all virtual channels and to manage the queue list nodes corresponding to the multicast messages for all virtual channels.

[0008] The free list management module is used to manage the free list nodes.

[0009] In some optional implementations, the same cache line in different cache blocks can store slice data of the same message or slice data of different messages in the same queue; the same message can be stored across multiple lines in the cache line of the cache block.

[0010] In some optional implementations, for unicast messages to be stored, the corresponding unicast virtual channel queue list management module stores them in the cache line of one or more cache blocks corresponding to the corresponding queue list node, according to the virtual channel to which they belong; for multicast messages to be stored, the multicast virtual channel queue list management module stores them in one or more cache lines corresponding to the corresponding queue list node.

[0011] In some optional implementations, each queue list management module is equipped with a read address pool and a write address pool. The queue list management module converts the cache line address corresponding to the queue head node in the corresponding queue list node into a block address and adds it to the corresponding read address pool. The idle list management module removes the idle head node from the idle list node and converts the cache line address corresponding to the idle head node into a block address and adds it to the corresponding write address pool.

[0012] In some optional implementations, the queue linked list management module uses the cache line address corresponding to the queue head node as the low-order address and the cache block sequence number as the high-order address to obtain the block address corresponding to the cache line address corresponding to the queue head node; the idle linked list management module uses the cache line address corresponding to the idle head node as the low-order address and the cache block sequence number as the high-order address to obtain the block address corresponding to the cache line address corresponding to the idle head node.

[0013] In some optional implementations, during the message writing process, the queue list management module reads the block address from the write address pool, determines the cache block corresponding to the block address and the cache line address in the cache block, and writes the message to the cache line address in the cache block; the free list management module also adds the free list node corresponding to the cache line address of the cache block to the queue tail node of the corresponding queue list management module.

[0014] In some optional implementations, during the message reading process, the queue list management module reads the block address from the read address pool, determines the cache block corresponding to the block address and the cache line address in the cache block, and reads the message from the cache line address in the cache block; the idle list management module also adds the queue list node corresponding to the cache line address of the cache block that has read the message to the idle list node as an idle tail node.

[0015] In some optional implementations, after an abnormal message is detected, if the abnormal message has not started to be transmitted downstream, the queue list management module corresponding to the abnormal message will also add the queue list node corresponding to the cache line of the abnormal message stored in the data buffer to the idle list node; if the abnormal message has started to be transmitted downstream, the queue list management module corresponding to the abnormal message will transmit the bad packet end identifier downstream and add the queue list node corresponding to the cache line of the abnormal message stored in the data buffer to the idle list node.

[0016] According to a second aspect of this application, a message storage method is provided, the method utilizing the data storage device according to any one of the first aspects to store messages, comprising:

[0017] Read the block address from the write address pool of the queue linked list management module corresponding to the message;

[0018] Determine the cache block corresponding to the block address and the cache line address in the cache block;

[0019] Write the message to the cache line address in the cache block;

[0020] The free list node corresponding to the cache line address of the cache block written to the message is added as the queue tail node to the queue list node of the queue list management module.

[0021] According to a third aspect of this application, a message reading method is provided, the method utilizing the data storage device described in any one of the first aspects to read messages, comprising:

[0022] Read the block address from the read address pool of the queue linked list management module corresponding to the message;

[0023] Determine the cache block corresponding to the block address and the cache line address in the cache block;

[0024] Read the message from the cache line address in the cache block;

[0025] The queue linked list node corresponding to the cache line address of the cache block that read the message is added to the idle linked list node as the idle tail node.

[0026] Compared with related technologies, the technical solution of this application has the following advantages:

[0027] 1. Idle linked list nodes and queue linked list nodes are cached together in the linked list node cache area, reducing resource consumption and making the physical implementation more user-friendly.

[0028] 2. By setting up a read / write address pool, a single linked list node can control multiple addresses. That is, the same cache line in different banks is indicated by the same linked list node. Therefore, the same linked list node can control multiple cache line addresses corresponding to the same cache line in multiple banks.

[0029] 3. Since the data buffer is divided into multiple cache blocks, there is no need to add extra message splicing cache resources, enabling memory_pool to adapt to messages of different bit widths.

[0030] 4. It can shorten the queue length, reduce the consumption of linked list resources, and avoid the data storage device area being too large due to the large number of linked list nodes.

[0031] 5. In the direct forwarding mode, abnormal packets are efficiently discarded, and cache space is quickly released, avoiding the waste of effective bandwidth caused by bad packets.

[0032] 6. Independently set up multicast virtual channel queues to effectively solve the problem of multicast replication continuously occupying the head of the queue and avoid blocking the forwarding of unicast packets.

[0033] 7. Propose a data storage and credit management scheme in which the cache bit width (i.e., the data bit width of a cache line) is greater than the flow control unit (i.e., the bit width of a line in a bank).

[0034] Other features and advantages of this application will be set forth in the description which follows, and will be apparent in part from the description, or may be learned by practicing the application. The objectives and other advantages of this application may be realized and obtained by means of the structures and processes shown in the description and the accompanying drawings. Attached Figure Description

[0035] To more clearly illustrate the technical solutions in the embodiments or related technologies of this application, the accompanying drawings used in the description of the embodiments or related technologies will be briefly introduced below. Obviously, the accompanying drawings described below are some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0036] Figure 1 This is a schematic diagram of the structure of a data storage device according to an exemplary embodiment of this application.

[0037] Figure 2 This is a schematic diagram illustrating the correspondence between virtual channels and queues according to an exemplary embodiment of this application.

[0038] Figure 3 This is a schematic diagram illustrating the correspondence between the data buffer area and the linked list node buffer according to an exemplary embodiment of this application.

[0039] Figure 4 This is a schematic diagram of the storage management of a linked list node according to an exemplary embodiment of this application.

[0040] Figure 5 This is a schematic diagram illustrating the management of a read / write address pool according to an exemplary embodiment of this application.

[0041] Figure 6 This is a schematic diagram illustrating the processing of an exception message portion that has been sent out of the data buffer according to an exemplary embodiment of this application.

[0042] Figure 7 This is a schematic diagram illustrating the processing of an exception message not being sent out of the data buffer according to an exemplary embodiment of this application.

[0043] Figure 8 This is a flowchart illustrating a message storage method according to an exemplary embodiment of this application.

[0044] Figure 9 This is a flowchart illustrating a message reading method according to an exemplary embodiment of this application. Detailed Implementation

[0045] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0046] In the relevant technical solutions, the cache space used to store the queue linked list node pointing to the next data in the queue and the cache space used to store the available free linked list node are independent of each other, resulting in high resource consumption; it is not suitable for scenarios where the data bit width and flow control unit are inconsistent in a single clock cycle, which may lead to credit waste; in addition, the relevant technologies do not provide a solution for bad packet discarding and linked list maintenance in the pass-through forwarding mode; when there are unicast packets and multicast packets in the same virtual channel, the same queue is used for maintenance, which causes the multicast packet to block the forwarding of unicast packets when copying and forwarding.

[0047] Based on the above analysis, this application proposes an exemplary multi-queue data storage mechanism, which has the advantages of low resource consumption, support for multiple input data bit widths, support for fast discarding of bad packets, and friendly unicast message forwarding.

[0048] To address the issue of excessive linked list cache resource consumption, this application merges the cache space used to store queue linked list nodes pointing to the next data in the queue with the cache space used to store available and free linked list nodes. Both queue linked list nodes and free linked list nodes are cached uniformly in the linked list node cache area `list_pool`. The data cache area `memory_pool` is divided into multiple cache blocks (banks) according to flow control units, supporting scenarios where the data bit width and flow control units are inconsistent in a single clock cycle, thereby improving cache space utilization. To facilitate unicast packet forwarding, unicast packets and multicast packets are cached separately, and multicast packets are managed independently. To achieve rapid release of cache space, a mechanism for quickly discarding bad packets and link rollback in pass-through forwarding mode is provided.

[0049] See Figure 1 As shown, this application provides an exemplary data storage device, including: a data cache area, a linked list node cache area, a queue linked list management module, and an idle linked list management module;

[0050] The data cache area consists of multiple cache blocks, and each cache block consists of multiple cache lines;

[0051] The linked list node cache area is used to store multiple linked list nodes. Each linked list node corresponds one-to-one with a cache line in the cache block, and the position of the linked list node in the linked list node cache area is the same as the position of the corresponding cache line in the cache block. The linked list nodes include queue linked list nodes and free linked list nodes.

[0052] The queue list management module includes a unicast virtual channel queue list management module and a multicast virtual channel queue list management module; among them, queues include unicast virtual channel queues and multicast virtual channel queues, and the unicast virtual channel queues correspond one-to-one with the virtual channels;

[0053] The unicast virtual channel queue list management module is used to control the reading and writing process of unicast messages of the corresponding virtual channel and to manage the queue list nodes corresponding to the unicast messages of the corresponding virtual channel.

[0054] The multicast virtual channel queue linked list management module is used to control the reading and writing process of multicast packets for all virtual channels and to manage the queue linked list nodes corresponding to the multicast packets for all virtual channels.

[0055] The free list management module is used to manage free list nodes.

[0056] For example, the cache space in this application is managed as follows:

[0057] When the data bit width per clock cycle exceeds the flow control unit, to ensure no data is wasted, the data buffer memory_pool is divided into n (n is a natural number) cache blocks, denoted as bank0, bank1...bankn-1, according to the flow control unit. Each bank contains multiple cache lines, and each cache line corresponds to a cache line address. The cache line address is the same for the same cache line in different banks. Figure 1 Each bank in the memory_pool shown contains m cache lines, with corresponding cache line addresses addr1, addr2, ..., addrm.

[0058] To improve the efficiency of memory pool utilization during data input, only the same message from the same queue is allowed to be stored in the same cache line across different banks; multiple messages from the same queue can also be stored in different banks within the same line; messages stored in the same clock cycle can be stored across multiple lines. The queues include unicast virtual channel queues, multicast virtual channel queues, and idle queues, with each unicast virtual channel queue corresponding one-to-one with a virtual channel.

[0059] To avoid buffer overflows caused by insufficient remaining space in the memory_pool, credit management can be implemented for the memory_pool: 1. When a packet is stored in the memory_pool, credit is deducted based on the packet's VL (Virtual Channel) field and flow control unit; 2. When a packet is removed from the memory_pool, credit is released based on the packet's VL field and flow control unit.

[0060] For example, the linked list nodes in this application are managed as follows:

[0061] See Figure 2As shown, to avoid multicast packet duplication blocking unicast packet forwarding, a separate multicast virtual channel queue is added. Therefore, the input packets are placed into the unicast virtual channel queue and the multicast virtual channel (VL) queue respectively according to the virtual channel and whether the packet is unicast or multicast. The unicast virtual channel queue includes: unicast VL0 queue, unicast VL1 queue... unicast VLd queue, where d is the number of virtual channels.

[0062] For multicast VL queues, data packets with different VLs can exist; for unicast VL queues, the VL field of packets in the same queue must be the same, that is, a unicast VL queue corresponds to the storage of packets of the same virtual channel.

[0063] For example, when valid data for a certain queue exists in different banks of the same row, this row is managed by the queue linked list node corresponding to that queue; when no valid data exists, this row is managed by the free linked list node. That is, the linked list nodes stored in the list_pool are divided into queue linked list nodes and free linked list nodes. The current queue linked list node stores a pointer to the position of the next queue linked list node's cached line in the list_pool. The position of the next queue linked list node's cached line in the list_pool is the same as the position of the next slice of data in the memory_pool for the segment data of the packet corresponding to the current queue linked list node. In other words, the queue linked list node corresponding to the packet's segment data stores the address of the next slice's cached line in the memory_pool, which is also the address of the next queue linked list node's cached line in the list_pool.

[0064] For example, see Figure 3 As shown, the slice data in the message is cached in the memory_pool, and the queue list node corresponding to the cache line storing this slice data is cached in the list node buffer list_pool. The cache line address of this queue list node is the same as the cache line address of the slice data in the bank. This queue list node stores the cache line address of the next slice data, meaning the position of the queue list node in list_pool is the same as the position of the corresponding data in memory_pool. The cache line address of a queue list node can be stored in the previous queue list node in the same queue. The cache line address of the first queue list node, i.e., the head node of the queue, is stored in the head pointer (head_queue) of the queue. The tail pointer (tail_queue) of the queue also stores the cache line address of the last queue list node of the queue. For example... Figure 1In the memory pool, the first cache line in the bank stores the packet slice data as data(0_0), data(0_1), ..., data(0_n-1). The queue list node addr1 in the first row of the list_pool corresponds to the queue list node of the packet slice data stored in the first cache line of the bank. addr1 stores the position of the next slice data in the bank within the cache line of the bank, which is also the position of the next queue list node in the list_pool. In other words, each queue list node corresponds one-to-one with each cache line in different banks of the memory_pool, and the cache line corresponding to each queue list node stores a valid packet. Similarly, the idle list nodes in the idle list queue are similar to the queue list nodes, except that the cache line in the cache block corresponding to the idle list node does not store a valid packet. It is understandable that, since there is at least one unicast virtual channel queue and one multicast virtual channel queue, the queue list nodes are distributed in different queues, and the queue list nodes of the same queue form a linked list with a head pointer and a tail pointer.

[0065] For example, each queue is managed by a corresponding queue linked list management module. The unicast virtual channel queue is managed by the unicast virtual channel queue linked list management module, the multicast virtual channel queue is managed by the virtual channel queue linked list management module, and the idle queue is managed by the idle linked list management module. Each queue corresponds to a cache line storing messages and a linked list node storing their addresses. For a unicast virtual channel queue, the cache line corresponding to its queue linked list node stores unicast messages belonging to the corresponding virtual channel. For a multicast virtual channel queue, the cache line corresponding to its queue linked list node stores multicast messages belonging to all virtual channels. Furthermore, the queue linked list node also stores the cache line address of the next queue linked list node, which is also the cache line address of the slice data for the next cache line. This slice data is the next data of the message stored in the cache line corresponding to the current queue linked list node; it can be the next slice data of the same message or the slice data of the next message. For the idle queue, the cache line corresponding to the idle list node does not store valid message data, but the cache line address of the next idle list node is stored in the idle list node.

[0066] For example, the list_pool in this application is managed as follows:

[0067] Since the sum of the number of free list nodes and queue list nodes equals the total number of lists, and the free list nodes and queue list nodes are independent and do not overlap, the free list nodes and queue list nodes can be cached in the same cache entity, that is, cached uniformly in list_pool.

[0068] See Figure 4 As shown, for example, list_pool is configured with two sets of read and write interfaces: 1. Free list read and write interface; 2. Queue list read and write interface, so as to achieve simultaneous read and write of free list and queue list.

[0069] In some optional implementations, the same cache line in different cache blocks can store slice data of the same message or slice data of different messages in the same queue; the same message can be stored across cache lines in the cache block.

[0070] For example, after receiving a message, the message can be sliced ​​according to flow control units to obtain slice data. Each slice data can be stored in a cache line of a bank. Multiple slice data of the same message can be stored in the same cache line of multiple banks, or multiple cache lines of multiple banks. A queue can occupy the same cache line of multiple banks. After the cache lines of all banks are full, the messages belonging to the queue can be stored in another cache line. The other cache lines of all banks also belong to the queue.

[0071] In some optional implementations, for unicast messages to be stored, the corresponding unicast virtual channel queue list management module stores them in the cache line of one or more cache blocks corresponding to the corresponding queue list node, according to the virtual channel to which they belong; for multicast messages to be stored, the multicast virtual channel queue list management module stores them in one or more cache lines corresponding to the corresponding queue list node.

[0072] For example, input messages are placed into a unicast virtual channel queue and a multicast virtual channel (VL) queue, respectively, based on the virtual channel and whether the message is unicast or multicast. That is, the unicast virtual channel queue corresponding to the virtual channel to which the unicast message belongs contains a queue linked list node, and the position of the cache line corresponding to this queue linked list node is the position of the cache line in the corresponding bank of the data buffer where the unicast message is stored. Similarly, the multicast virtual channel queue corresponding to the multicast message also contains a queue linked list node, and the position of the cache line corresponding to this queue linked list node is the position of the cache line in the corresponding bank of the data buffer where the multicast message is stored. Unicast messages are stored by the unicast virtual channel queue linked list management module corresponding to their virtual channel, and multicast messages are stored by the multicast virtual channel queue linked list management module.

[0073] In some optional implementations, each queue list management module has a read address pool and a write address pool. The queue list management module converts the cache line address corresponding to the queue head node in the corresponding queue list node into a block address and adds it to the corresponding read address pool. The idle list management module removes the idle head node from the idle list node and converts the cache line address corresponding to the idle head node into a block address and adds it to the corresponding write address pool.

[0074] For example, each unicast virtual channel queue linked list management module and multicast virtual channel queue linked list management module is equipped with a write address pool and a read address pool, respectively. The write address pool and read address pool are initially empty. When a message needs to be stored, the corresponding free linked list management module (including the unicast virtual channel queue linked list management module and the multicast virtual channel queue linked list management module) retrieves an free linked list node from the free linked list queue. This node is usually the first free node of the free linked list queue, that is, the free linked list node pointed to by the head pointer (head_idle) of the free linked list queue. The cache line address corresponding to the first free node is converted into a block address and placed into the write address pool. The first free node in the free linked list queue is then deleted from the free linked list node, and the head pointer head_idle points to the next free linked list node of the first free node. When a message needs to be read, the cache line address corresponding to the first node of the queue in the queue list node of the corresponding queue is converted into a block address and placed into the read address pool. The first node of the queue is not deleted from the queue list node temporarily. It will be deleted from the queue list node after the message is read from the block address.

[0075] In some optional implementations, the queue linked list management module uses the cache line address corresponding to the queue head node as the low-order address and the cache block sequence number as the high-order address to obtain the block address corresponding to the cache line address corresponding to the queue head node; the idle linked list management module uses the cache line address corresponding to the idle head node as the low-order address and the cache block sequence number as the high-order address to obtain the block address corresponding to the cache line address corresponding to the idle head node.

[0076] See Figure 5 As shown, exemplarily, the address pool in this application is managed as follows:

[0077] Each unicast virtual channel queue and multicast virtual channel queue has its own read address pool and write address pool, managed by the unicast virtual channel queue linked list management module and the multicast virtual channel queue linked list management module, respectively. See also Figure 5As shown, the address pool is initially empty and can hold twice the maximum number of banks. The cache line address corresponding to the first free node in a single free list node (i.e., the first free list node pointed to by the head_idle pointer of the free list queue) or the first queue node in a queue list node (i.e., the first queue list node pointed to by the head_queue pointer of that queue list) is converted into multiple bank addresses and added to the read / write address pool. The conversion rules are as follows:

[0078] bank address = {bank serial number, head_idle / head_queue}

[0079] By interleaving the low-order bits of the address, data can be read and written to multiple banks. The high-order bits of the bank address indicate the bank number where the read / write operation occurred, while the low-order bits indicate the actual read / write address of the bank (i.e., the cache line address within the bank). It should be noted that since there are multiple banks, say n, with sequence numbers from 0 to n-1, one cache line address can be translated into n bank addresses.

[0080] When a message is input, the bank address in the write address pool is parsed to obtain the bank sequence number and the cache line address to be written, the write enable is pulled high, and the data is stored at the cache line address of the bank with that sequence number; when a message is read, the bank address in the read address pool is parsed to obtain the bank sequence number and the cache line address to be read, the read enable is pulled high, and the data is read from the cache line address of the bank with that sequence number.

[0081] In some optional implementations, during the message writing process, the queue list management module reads the block address from the write address pool, determines the cache block and cache line address in the cache block corresponding to the block address, and writes the message to the cache line address in the cache block; the free list management module also adds the free list node corresponding to the cache line address of the cache block to be written to the queue tail node of the corresponding queue list management module.

[0082] For example, the data writing process in this application is as follows:

[0083] After a message is input, its content is parsed, and the queue to which the message belongs is determined based on whether the message is unicast or multicast and the VL (Virtual Channel) field. Then, the message is sliced ​​according to flow control units and written to the expected location in the data buffer space, as follows:

[0084] 1. Read the free list: When the bank address in the write address pool of the queue to which the packet belongs is insufficient for the current packet, the cache line address stored in the head pointer of the free list node in list_pool (that is, the cache line address corresponding to the free head node) is read, and the cache line address is converted into a bank address. That is, a bank sequence number is added to the cache line address (since one cache line address corresponds to multiple banks, multiple bank sequence numbers are added to the cache line address to obtain multiple corresponding bank addresses). The cache line address is then stored in the write address pool of the queue to which the packet belongs. At the same time, the head pointer (head_idle) of the free list node is updated so that the head pointer of the free list node points to the next free list node of the free head node. That is, the cache line address stored in the head pointer is updated to the cache line address corresponding to the next free list node. It is equivalent to the free head node being taken out of the free list node.

[0085] 2. Write data: According to the number of segments after the message is sliced, the corresponding number of bank addresses are taken from the write address pool of the queue to which the message belongs in order. The bank number to which the data is written is determined by the high-order bits of the address of each slice data, and the actual write address of the bank (that is, the cache line address in the bank) is determined by the low-order bits of the address of the slice data. Then the slice data is written to the corresponding position in the memory_pool.

[0086] 3. Write to the queue list: When any bank in the memory_pool (such as the bank corresponding to the slice data of the message written in the previous step) has a write operation, write the above actual write address (that is, the cache line address of the slice data of the message) to the queue list node of the queue to which the message belongs in the list_pool. At the same time, update the tail pointer (tail_queue) in the queue list node of the queue to which the message belongs, so that the tail pointer points to the free list node corresponding to the actual write address (that is, the cache line address of the slice data of the message). It is equivalent to the free list node being added to the queue and becoming the last queue list node of the queue, that is, the queue tail node.

[0087] In some optional implementations, during the message reading process, the queue list management module reads the block address from the read address pool, determines the cache block and cache line address in the cache block corresponding to the block address, and reads the message from the cache line address in the cache block; the idle list management module also adds the queue list node corresponding to the cache line address of the cache block that has read the message to the idle list node as the idle tail node.

[0088] For example, the data reading process in this application is as follows:

[0089] When multiple queues have read requests, the read requests are arbitrated, and the read request that wins the arbitration is used to read data from the memory_pool, as follows:

[0090] 1. Read Queue List: If there is no address or insufficient address in the read address pool corresponding to the queue to which the read request belongs, a new address is read from the queue list node of the queue to which the request belongs in list_pool. That is, the cache line address corresponding to the queue head node pointed to by the head pointer of the queue list node is read. The cache line address corresponding to the queue head node is stored in head_queue and can be read directly from head_queue. The new address is converted into a bank address and then stored in the read address pool. Since the cache line address corresponding to the queue head node is added to the read address pool, the packet data in the cache line address corresponding to the queue head node can be directly read from the read address pool during the next scheduling and forwarded to the downstream network device. Therefore, the queue head node can be taken out from the queue list node of the queue to which the request belongs, and then the head pointer of the queue list node is updated so that the head pointer of the queue list node points to the cache line address corresponding to the next queue list node pointed to by the retrieved queue head node.

[0091] 2. Writing to the Free List: After retrieving the block address from the read address pool and reading the packet slice data from the corresponding bank's cache line based on the block address, the queue list node corresponding to that cache line can be added to the free list node. Therefore, when any bank in the memory_pool is reading data, the corresponding queue list management module will write the actual read address of the bank currently reading the packet (i.e., the cache line address of the packet actually read in that bank) to the free tail node of the free list node in the list_pool, and update the tail pointer (tail_idle) of the free list node so that the tail pointer points to the list node corresponding to the actual read address, thereby adding the list node corresponding to the actual read address as the free tail node to the free list node.

[0092] 3. Read data: Read the block address from the read address pool, determine the bank where the message to be read is located by the high-order bits of the read block address, and determine the actual read address of the message in the bank by the low-order bits of the block address. Then, retrieve the message from the actual read address of the bank in the memory pool.

[0093] 4. After multiple slices of data from the message to be read are read out, they are assembled into new data of the expected bit width in sequence and then output to the downstream network device.

[0094] In some optional implementations, after an abnormal message is detected, if the abnormal message has not started to be transmitted downstream, the queue list management module corresponding to the abnormal message will also add the queue list node corresponding to the cache line storing the abnormal message in the data buffer to the idle list node; if the abnormal message has started to be transmitted downstream, the queue list management module corresponding to the abnormal message will transmit the bad packet end identifier downstream and add the queue list node corresponding to the cache line storing the abnormal message in the data buffer to the idle list node.

[0095] For example, exception messages in this application are handled as follows:

[0096] In pass-through forwarding mode, abnormal packets are discarded upon detection, specifically in the following two scenarios:

[0097] 1. If an abnormal message is not transmitted downstream from the cache, write-side packet dropping is used, meaning the slice data of the abnormal message is discarded from the cache, and the linked list is rolled back. See also Figure 6 As shown, the head pointer of the queue list to which the exception message belongs is moved back to the tail pointer of the previous message, the head_idle pointer of the free list is moved back to the head pointer of the current message, and the invalid linked list nodes in the read address pool and write address pool of the queue to which the exception message belongs are cleared.

[0098] 2. If an abnormal message has already been transmitted downstream from the buffer space, it is truncated after being supplemented with an EBP (End Bad Packet) on the read side; the linked list does not need to be rolled back. See also Figure 7 As shown, the queue list of the queue to which the exception message belongs has been cleared, and there are no valid head and tail pointers, so the queue list does not need to be backed up; while the head pointer of the free list queue, head_idle, is backed up to the head pointer of the queue list node, which means that the queue list node corresponding to the cache line storing the exception message is added to the free list node.

[0099] By dropping packets on the write side or truncation on the read side, packet discarding can be achieved efficiently, thereby completing the maintenance of the data queue / free list and the rapid release of cache space.

[0100] The above is an exemplary data storage device proposed in this application, which has the following advantages:

[0101] 1. Idle linked list nodes and queue linked list nodes are cached together in the linked list node cache area, reducing resource consumption and making the physical implementation more user-friendly.

[0102] 2. By setting up a read / write address pool, a single linked list node can control multiple addresses. That is, the same cache line in different banks is indicated by the same linked list node. Therefore, the same linked list node can control multiple cache line addresses corresponding to the same cache line in multiple banks.

[0103] 3. Since the data buffer is divided into multiple cache blocks, there is no need to add extra message splicing cache resources, enabling memory_pool to adapt to messages of different bit widths.

[0104] 4. It can shorten the queue length, reduce the consumption of linked list resources, and avoid the data storage device area being too large due to the large number of linked list nodes.

[0105] 5. In the direct forwarding mode, abnormal packets are efficiently discarded, and cache space is quickly released, avoiding the waste of effective bandwidth caused by bad packets.

[0106] 6. Independently set up multicast virtual channel queues to effectively solve the problem of multicast replication continuously occupying the head of the queue and avoid blocking the forwarding of unicast packets.

[0107] 7. Propose a data storage and credit management scheme in which the cache bit width (i.e., the data bit width of a cache line) is greater than the flow control unit (i.e., the bit width of a line in a bank).

[0108] Accordingly, see Figure 8 As shown, this application also provides an exemplary message storage method, which stores messages using any of the above-mentioned data storage devices. The method includes:

[0109] In step S801, the block address is read from the write address pool of the queue linked list management module corresponding to the message;

[0110] In step S802, the cache block corresponding to the block address and the cache line address in the cache block are determined;

[0111] In step S803, the message is written to the cache line address in the cache block;

[0112] In step S804, the free list node corresponding to the cache line address of the cache block to be written to the message is added as the queue tail node to the queue list node of the queue list management module.

[0113] Accordingly, see Figure 9 As shown, this application also provides an exemplary method for reading messages, which uses any of the above-mentioned data storage devices to read messages. The method includes:

[0114] In step S901, the block address is read from the read address pool of the queue linked list management module corresponding to the message;

[0115] In step S902, the cache block corresponding to the block address and the cache line address in the cache block are determined;

[0116] In step S903, the message is read from the cache line address in the cache block;

[0117] In step S904, the queue linked list node corresponding to the cache line address of the cached block that read the message is added to the idle linked list node as the idle tail node.

[0118] The above-described message storage method and message reading method can be implemented using the data storage device provided in the above embodiments. For specific implementation details, please refer to the description of the data storage device in the above embodiments, which will not be repeated here.

[0119] It is understood that the circuit structures, names, and parameters described in the above embodiments are merely examples. Those skilled in the art can also make readily conceived combinations and adjustments to the structural features of the above embodiments according to their needs, and the concept of this application should not be limited to the specific details of the above examples.

[0120] Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application.

Claims

1. A data storage device, characterized by The application relates to a data buffer area, a linked list node buffer area, a queue linked list management module and a free linked list management module. The data buffer area comprises a plurality of cache blocks, and each cache block comprises a plurality of cache lines. The linked list node buffer area is used for storing a plurality of linked list nodes, the plurality of linked list nodes correspond to the cache lines of the cache blocks one by one, and the positions of the linked list nodes in the linked list node buffer area are the same as the positions of the corresponding cache lines in the cache blocks; the linked list nodes comprise queue linked list nodes and free linked list nodes. The queue linked list management module comprises a unicast virtual channel queue linked list management module and a multicast virtual channel queue linked list management module; wherein a queue comprises a unicast virtual channel queue and a multicast virtual channel queue, and the unicast virtual channel queue corresponds to a virtual channel one by one. The unicast virtual channel queue linked list management module is used for controlling the read-write process of unicast messages of a corresponding virtual channel and managing the queue linked list nodes corresponding to the unicast messages of the corresponding virtual channel. The multicast virtual channel queue linked list management module is used for controlling the read-write process of multicast messages of all virtual channels and managing the queue linked list nodes corresponding to the multicast messages of all virtual channels. The free linked list management module is used for managing the free linked list nodes. Each queue linked list management module is provided with a read address pool and a write address pool; the queue linked list management module converts the cache line address corresponding to the head node of the queue in the corresponding queue linked list node into a block address and then adds the block address into the corresponding read address pool; the free linked list management module takes the free head node from the free linked list nodes and converts the cache line address corresponding to the free head node into a block address and then adds the block address into the corresponding write address pool. The queue linked list management module takes the cache line address corresponding to the head node of the queue as a low-bit address and takes the serial number of the cache block as a high-bit address to obtain the block address corresponding to the cache line address of the head node of the queue; and the free linked list management module takes the cache line address corresponding to the free head node as a low-bit address and takes the serial number of the cache block as a high-bit address to obtain the block address corresponding to the cache line address of the free head node. The same cache line of different cache blocks can store the slice data of a same message or the slice data of different messages of a same queue; and a same message can be stored into the cache lines of the cache blocks crosswise.

2. The data storage device of claim 1, wherein, For a unicast message to be stored, the unicast virtual channel queue linked list management module corresponding to the virtual channel to which the unicast message belongs is used to store the unicast message into the cache line of one or more cache blocks corresponding to the corresponding queue linked list node; and for a multicast message to be stored, the multicast virtual channel queue linked list management module is used to store the multicast message into the cache line of one or more cache blocks corresponding to the corresponding queue linked list node.

3. The data storage device of claim 1, wherein, ​ 4. The data storage device of claim 1, wherein, In the packet writing process, the queue chain table management module reads the block address from the write address pool, determines the cache block corresponding to the block address and the cache line address in the cache block, and writes the packet into the cache line address in the cache block; the free chain table management module also adds the free chain table node corresponding to the cache line address of the cache block where the packet is written as a queue tail node into the queue chain table node of the corresponding queue chain table management module.

5. The data storage device of claim 1, wherein, In the packet reading process, the queue chain table management module reads the block address from the read address pool, determines the cache block corresponding to the block address and the cache line address in the cache block, and reads the packet from the cache line address in the cache block; The free chain table management module also adds the queue chain table node corresponding to the cache line address of the cache block where the packet is read as a free tail node into the free chain table node.

6. The data storage device of any of claims 1-3, wherein, After discovering the abnormal packet, if the abnormal packet has not started to transmit downstream, the queue chain table management module corresponding to the abnormal packet also adds the queue chain table node corresponding to the cache line storing the abnormal packet in the data cache area into the free chain table node; If the abnormal packet has started to transmit downstream, the queue chain table management module corresponding to the abnormal packet transmits a bad packet end identifier downstream, and adds the queue chain table node corresponding to the cache line storing the abnormal packet in the data cache area into the free chain table node.

7. A message storage method characterized by comprising: The method stores a packet by using the data storage device of any one of claims 1-6, comprising: reading a block address from a write address pool of a queue chain table management module corresponding to the packet; determining a cache block corresponding to the block address and a cache line address in the cache block; writing the packet into the cache line address in the cache block; adding a free chain table node corresponding to the cache line address of the cache block where the packet is written as a queue tail node into the queue chain table node of the queue chain table management module.

8. A message reading method characterized by, The method reads a packet by using the data storage device of any one of claims 1-6, comprising: reading a block address from a read address pool of a queue chain table management module corresponding to the packet; determining a cache block corresponding to the block address and a cache line address in the cache block; reading the packet from the cache line address in the cache block; adding a queue chain table node corresponding to the cache line address of the cache block where the packet is read as a free tail node into the free chain table node.

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