IO processing method and device

Abstract

The invention provides an IO request processing method which is applied to external equipment, the external equipment comprises a processor and a first hardware interface, the first hardware interface is an interface supporting a PCIE protocol, and the external equipment communicates with a physical host through the first hardware interface. The method comprises the steps that a processor synchronizes queue information in a storage space of a virtual machine running on a physical host to a storage space of external equipment through a first hardware interface, and the queue information comprises one or more IO (input / output) requests; and the processor sends the one or more IO requests to a storage server or a network server for processing. According to the technical scheme, all hardware resources of the physical host can be used for providing virtual machine services for users, and the utilization rate of the hardware resources of the physical host is increased.

Description

[0001] This application is a divisional application. The application number of the original application is 201910582537.6, and the original application date is June 29, 2019. The entire content of the original application is incorporated herein by reference. Technical Field

[0002] This application relates to the field of virtualization, and more particularly, to a method, apparatus, and computer-readable storage medium for IO processing. Background Art

[0003] Virtualization technology virtualizes the hardware resources of a computer device and shares them among multiple users, enabling users to conveniently and flexibly use the hardware resources of the computer device under the premise of secure isolation, and greatly improving the utilization rate of hardware resources.

[0004] Computing virtualization technology can convert the hardware computing resources of a computer device into virtual computing resources and share them among users on multiple virtual machines. IO virtualization technology converts physical storage resources and network resources into virtual storage resources and virtual network resources for processing IO requests issued to virtual machines running on a computer device.

[0005] In the process of virtualizing a computer device as described above, IO virtualization consumes a certain amount of hardware computing resources. Therefore, it is impossible to share all the hardware resources of the computer device with users. And because the consumption of hardware resources by IO virtualization technology increases with the growth of the number of virtual machine IOs, in a multi-user scenario such as a public cloud, when the number of IOs of multiple users is large, resource competition caused by insufficient hardware resources will occur, and then significant fluctuations in service performance and a decline in user experience will occur.

[0006] Therefore, how to share all the hardware resources of a computer device with users and avoid competition between the hardware resources of the computer device has become an urgent problem to be solved. Summary of the Invention

[0007] This application provides a method and apparatus for processing IO requests, which can use all the hardware resources of a physical host to provide virtual machine services for users, improving the utilization rate of the hardware resources of the physical host.

[0008] In a first aspect, a method for processing IO requests is provided. The method is applied to an external device, which includes a processor and a first hardware interface. The first hardware interface is an interface that supports the Peripheral Component Interconnect Express (PCIE) protocol of the high-speed serial computer expansion bus standard. The external device communicates with the physical host through the first hardware interface. The method includes: The first processor synchronizes queue information in the storage space of a virtual machine running on the physical host to the storage space of the external device through the first hardware interface, where the queue information includes one or more input / output (IO) requests sent by the virtual machine; The processor sends the one or more IO requests to a storage server or a network server for processing.

[0009] In the above technical solution, when a physical host is connected to an external device, the external device processes the IOs sent by the virtual machine running on the physical host. By directly sending the IO requests sent by the virtual machine to the external device of the physical host for processing, the consumption of physical computing resources caused by IO virtualization of the physical host can be avoided, so that all the hardware resources on the physical host are used to provide virtual machine services for users, improving the utilization rate of the hardware resources of the physical host.

[0010] In a possible implementation manner, the method further includes: The processor receives a configuration message, which is used to indicate that the protocol type of the first IO interface of the external device is configured as a first IO protocol. Multiple first IO interfaces run on the first hardware interface. The first IO interface is a virtual interface of the first hardware interface, and the first IO interface corresponds to the virtual machine and is used to process one or more IO requests sent by the virtual machine to the first IO interface. The data type and / or data size of the one or more IO requests in the storage space of the virtual machine are associated with the first IO protocol; The first processor configures the protocol type of the first IO interface as the first IO protocol according to the configuration message.

[0011] In the above technical solution, the IO interface protocol of the external device of the physical host can be dynamically configured, and the IO interface protocol presented by the external device to the virtual machine running on the physical host can be flexibly defined, meeting the needs of different users for multiple IO protocols without modifying the hardware system. At the same time, the constraint that the virtual machine is strongly bound by the IO protocol of the IO interface of the external device can be eliminated, improving the flexibility of the virtual machine.

[0012] In another possible implementation, before the processor synchronizes the queue information in the storage space of the virtual machine on the physical host to the storage space of the external device through the first hardware interface, the method further includes: the first hardware interface receives a PCIE message sent by the physical host, where the PCIE message is used to indicate an IO request to be processed by the external device; the first hardware interface sends an interrupt request to the processor according to the PCIE message; and the first processor synchronizes the queue information in the storage space of the virtual machine to the storage space of the external device through the first hardware interface according to the interrupt request.

[0013] In the above technical solution, after the external device is notified by the physical host that there is an IO request to be processed stored in the storage space of the virtual machine, the external device can synchronize the queue information in the storage space of the virtual machine to the storage space of the external device through the first hardware interface, which can reduce the number of PCIE messages on the PCIE link between the physical host and the external device.

[0014] In another possible implementation, the processor instructs the first hardware interface to synchronize the queue information in the storage space of the virtual machine to the storage space of the external device through the direct memory access (DMA) technology.

[0015] In another possible implementation, the method further includes: the processor stores the number of IO requests processed by the first IO interface; and when the number of IO requests is 0, the processor reloads the first IO protocol.

[0016] In the above technical solution, the update or upgrade of the protocol is completed without interrupting the virtual machine IO service.

[0017] In another possible implementation, the method further includes: the processor obtains the IO response corresponding to the IO request from the storage server or the network server; and the processor stores the IO response in the storage space of the virtual machine through the first hardware interface.

[0018] In another possible implementation, the processor instructs the first hardware interface to store the IO response in the storage space of the virtual machine through the DMA technology.

[0019] In another possible implementation, the method further includes: when the processor stores the IO responses corresponding to multiple IO requests in the storage space of the virtual machine through the first hardware interface, the processor sends a notification message to the physical host through the first hardware interface, where the notification message is used to notify the physical host that multiple IO requests have been processed.

[0020] In the above technical solution, after storing the IO responses corresponding to multiple said IO requests in the storage space of the virtual machine, a notification message can be triggered once to reduce the overhead of physical host interrupt processing.

[0021] In a second aspect, a method for processing IO requests is provided. The method is applied to a physical host on which one or more virtual machines are running. The physical host includes a processor and a second hardware interface, and the second hardware interface is an interface that supports the Peripheral Component Interconnect Express (PCIE) protocol of the high-speed serial computer extension bus standard. The physical host communicates with an external device through the second hardware interface. The method includes: storing, by the processor, one or more input / output (IO) requests sent by the virtual machine in the storage space of the virtual machine; synchronizing, by the processor through the second hardware interface, one or more IO requests in the storage space of the virtual machine to the storage space of the external device.

[0022] In another possible implementation, the method further includes: sending, by the processor through the second hardware interface, a PCIE message to the external device, where the PCIE message is used to indicate that there are IO requests to be processed by the external device.

[0023] In another possible implementation, the method further includes: receiving, by the processor through the second hardware interface, an IO response sent by the external device, where the IO response corresponds to the IO request, and the IO response is obtained by the external device from a storage server or a network server.

[0024] In another possible implementation, the method further includes: receiving, by the processor through the second hardware interface, a notification message sent by the external device, where the notification message is used to notify the physical host that multiple said IO requests have been processed.

[0025] In a third aspect, an external device is provided. The external device includes an acquisition module, a sending module, and a first interface module, where:

[0026] The first interface module is used to communicate with the physical host; the first interface module is an interface module that supports the Peripheral Component Interconnect Express (PCIE) protocol of the high-speed serial computer extension bus standard;

[0027] The acquisition module is used to synchronize, through the first interface module, queue information in the storage space of a virtual machine running on the physical host to the storage space of the external device, where the queue information includes one or more input / output (IO) requests sent by the virtual machine;

[0028] The sending module is configured to send the one or more IO requests to a storage server or a network server for processing.

[0029] In the above technical solution, when a physical host is connected to an external device, the external device processes the IO sent by a virtual machine running on the physical host. By directly sending the IO requests issued by the virtual machine to the external device of the physical host for processing, the consumption of physical computing resources caused by IO virtualization of the physical host can be avoided, so that all the hardware resources on the physical host are used to provide virtual machine services for users, improving the utilization rate of the hardware resources of the physical host.

[0030] In a possible implementation manner, the external device further includes: a first receiving module, configured to receive a configuration message, where the configuration message is used to instruct to configure the protocol type of a first IO interface of the external device as a first IO protocol. A plurality of the first IO interfaces are running on the first interface module. The first IO interface is a virtual interface of the first interface module, and the first IO interface corresponds to the virtual machine and is used to process one or more IO requests sent by the virtual machine to the first IO interface. The data type and / or data size of the one or more IO requests in the storage space of the virtual machine are associated with the first IO protocol.

[0031] The external device further includes: a configuration module, configured to configure the protocol type of the first IO interface as the first IO protocol according to the configuration message.

[0032] In another possible implementation manner, the first interface module is further configured to: receive a PCIE message sent by the physical host, where the PCIE message is used to indicate that the external device has an IO request to be processed; send an interrupt request to a processor in the external device according to the PCIE message.

[0033] The obtaining module is specifically configured to: synchronize queue information in the storage space of the virtual machine to the storage space of the external device through the first interface module according to the interrupt request.

[0034] In another possible implementation manner, the obtaining module is specifically configured to: instruct the first interface module to synchronize queue information in the storage space of the virtual machine to the storage space of the external device by directly invoking the storage access DMA technology.

[0035] In another possible implementation manner, the external device further includes: a first storage module, configured to store the number of IO requests processed by the first IO interface.

[0036] A loading module, configured to reload the first IO protocol when the number of the IO requests is 0.

[0037] In another possible implementation manner, the obtaining module is further configured to: obtain an IO response corresponding to the IO request from the storage server or the network server;

[0038] The external device further includes: a second storage module, configured to store the IO response into a storage space of the virtual machine through the first interface module.

[0039] In another possible implementation manner, the second storage module is specifically configured to: through the DMA technology, instruct the first interface module to store the IO response into the storage space of the virtual machine.

[0040] In another possible implementation manner, the first storage module is further configured to: store IO responses corresponding to a plurality of the IO requests into the storage space of the virtual machine;

[0041] The first interface module is further configured to: send a notification message to the physical host, where the notification message is used to notify the physical host that a plurality of the IO requests have been processed.

[0042] In a fourth aspect, a physical host is provided, where the physical host includes a storage module and a second interface module, where:

[0043] The second interface module is an interface supporting the Peripheral Component Interconnect Express (PCIE) protocol of the high-speed serial computer extension bus standard, and is configured to communicate with an external device;

[0044] The storage module is configured to store one or more input / output (IO) requests sent by a virtual machine running on the physical host into the storage space of the virtual machine;

[0045] The second interface module is configured to synchronize one or more IO requests in the storage space of the virtual machine to the storage space of the external device.

[0046] In a possible implementation manner, the second interface module is further configured to: send a PCIE message to the external device, where the PCIE message is used to indicate that there is an IO request to be processed by the external device.

[0047] In another possible implementation manner, the second interface module is further configured to: receive an IO response sent by the external device, where the IO response corresponds to the IO request, and the IO response is obtained by the external device from a storage server or a network server.

[0048] In another possible implementation, the second interface module is further configured to: receive, through the second interface module, a notification message sent by the external device, where the notification message is used to notify the physical host that a plurality of the IO requests have been processed.

[0049] In a fifth aspect, a computer system is provided, where the computer system includes a physical host and an external device. The external device is the external device in the third aspect or any one of the possible implementations of the third aspect, and the physical host is the physical host in the fourth aspect or any one of the possible implementations of the fourth aspect.

[0050] In a sixth aspect, an external device is provided. The external device includes a processor, a first hardware interface, and a memory. The memory is used to store a computer program, and the processor is used to call and run the computer program instructions from the memory to perform:

[0051] Synchronize queue information in the storage space of a virtual machine running on the physical host to the storage space of the external device through the first hardware interface, where the queue information includes one or more input / output (IO) requests sent by the virtual machine;

[0052] Send the one or more IO requests to a storage server or a network server for processing.

[0053] Optionally, the processor may be a general-purpose processor, which may be implemented by hardware or by software. When implemented by hardware, the processor may be a logic circuit, an integrated circuit, etc.; when implemented by software, the processor may be a general-purpose processor, which is implemented by reading software code stored in the memory. The memory may be integrated in the processor or may exist independently outside the processor.

[0054] In a possible implementation, the processor is further configured to: receive a configuration message, where the configuration message is used to indicate that the protocol type of a first IO interface of the external device is configured as a first IO protocol. A plurality of the first IO interfaces run on the first hardware interface. The first IO interface is a virtual interface of the first hardware interface and corresponds to the virtual machine, and is used to process one or more IO requests sent by the virtual machine to the first IO interface. The data type and / or data size of the one or more IO requests in the storage space of the virtual machine are associated with the first IO protocol; configure the protocol type of the first IO interface as the first IO protocol according to the configuration message.

[0055] In another possible implementation, the first hardware interface is configured to: receive a PCIE message sent by the physical host, where the PCIE message is used to indicate an IO request to be processed by the external device; send an interrupt request to the processor;

[0056] The processor is further configured to: according to the interrupt request, synchronize queue information in the virtual machine storage space to the storage space of the external device through the first hardware interface.

[0057] In another possible implementation, the processor is specifically configured to: through the direct memory access (DMA) technology, instruct the first hardware interface to synchronize queue information in the storage space of the virtual machine to the storage space of the external device.

[0058] In another possible implementation, the processor is further configured to: store the number of IO requests processed by the first IO interface; when the number of IO requests is 0, reload the first IO protocol.

[0059] In another possible implementation, the processor is further configured to: obtain an IO response corresponding to the IO request from the storage server or the network server; store the IO response in the storage space of the virtual machine through the first hardware interface.

[0060] In another possible implementation, the processor is specifically configured to: through the DMA technology, instruct the first hardware interface to store the IO response in the storage space of the virtual machine.

[0061] In another possible implementation, the processor is further configured to: when storing IO responses corresponding to multiple IO requests in the storage space of the virtual machine through the first hardware interface, send a notification message to the physical host through the first hardware interface, where the notification message is used to notify the physical host that multiple IO requests have been processed.

[0062] In a seventh aspect, a physical host is provided, including: a processor, a second hardware interface, and a memory, where the memory is used to store a computer program, and the processor is configured to call and run the computer program instructions from the memory to execute:

[0063] Store one or more input / output (IO) requests sent by a virtual machine running on the physical host in the storage space of the virtual machine;

[0064] The second hardware interface is used to synchronize one or more IO requests in the storage space of the virtual machine to the storage space of the external device.

[0065] Optionally, the processor may be a general-purpose processor, which can be implemented by hardware or software. When implemented by hardware, the processor may be a logic circuit, an integrated circuit, etc.; when implemented by software, the processor may be a general-purpose processor that implements by reading software code stored in a memory, and the memory may be integrated in the processor or located outside the processor and exist independently.

[0066] In one possible implementation, the second hardware interface is further configured to: send a PCIE message to the external device through the second hardware interface, where the PCIE message is used to indicate an IO request to be processed by the external device.

[0067] In another possible implementation, the second hardware interface is further configured to: receive an IO response sent by the external device through the second hardware interface, where the IO response corresponds to the IO request, and the IO response is obtained by the external device from a storage server or a network server.

[0068] In another possible implementation, the second hardware interface is further configured to: receive a notification message sent by the external device through the second hardware interface, where the notification message is used to notify the physical host that multiple IO requests have been processed.

[0069] In an eighth aspect, a computer system is provided, where the computer system includes a physical host and an external device. The external device is the external device in the sixth aspect or any possible implementation of the sixth aspect, and the physical host is the physical host in the seventh aspect or any possible implementation of the seventh aspect.

[0070] In a ninth aspect, a computer program product is provided, where the computer program product includes: computer program code, when the computer program code runs on a computer, it causes the computer to execute the method in the first aspect or any possible implementation of the first aspect.

[0071] In a tenth aspect, a computer program product is provided, where the computer program product includes: computer program code, when the computer program code runs on a computer, it causes the computer to execute the method in the second aspect or any possible implementation of the second aspect.

[0072] In an eleventh aspect, a computer-readable medium is provided, where the computer-readable medium stores program code, when the computer program code runs on a computer, it causes the computer to execute the method in the first aspect or any possible implementation of the first aspect.

[0073] In a twelfth aspect, a computer-readable medium is provided, which stores program code that, when run on a computer, causes the computer to execute the method in the second aspect or possible implementations of the second aspect described above. Description of the Drawings

[0074] Figure 1 FIG. is a schematic hardware structure diagram of a computer device 100 provided by an embodiment of the present application.

[0075] Figure 2 FIG. is a schematic diagram of the system architecture after virtualization of a computer device 100 provided by an embodiment of the present application.

[0076] Figure 3 FIG. is a schematic diagram of the configuration after virtualization of a computer device 100 provided by an embodiment of the present application.

[0077] Figure 4 FIG. is a schematic diagram of the architecture of a computer device 100 connecting to an external device provided by an embodiment of the present application.

[0078] Figure 5 FIG. is a schematic architecture diagram of a physical server 100 connecting to a software and hardware collaborative offloading card 400 provided by an embodiment of the present application.

[0079] Figure 6 FIG. is a schematic flowchart of a method for processing an IO request provided by an embodiment of the present application.

[0080] Figure 7 FIG. is a schematic flowchart of another method for processing an IO request provided by an embodiment of the present application.

[0081] Figure 8 FIG. is a schematic flowchart of another method for processing an IO request provided by an embodiment of the present application.

[0082] Figure 9 FIG. is a schematic flowchart of another method for processing an IO request provided by an embodiment of the present application.

[0083] Figure 10 FIG. is a schematic block diagram of an external device 1000 provided by an embodiment of the present application.

[0084] Figure 11 FIG. is a schematic block diagram of a physical host 1100 provided by an embodiment of the present application.

[0085] Figure 12 FIG. is a schematic block diagram of an external device 1200 provided by an embodiment of the present application.

[0086] Figure 13 FIG. is a schematic block diagram of a physical host 1300 provided by an embodiment of the present application. Detailed implementation manners

[0087] The technical solutions in the present application will be described below with reference to the accompanying drawings.

[0088] Virtualization technology virtualizes the hardware resources of computer devices and shares them for multiple users to use, enabling users to conveniently and flexibly use the hardware resources of computer devices on the premise of secure isolation, and greatly improving the utilization rate of hardware resources. Virtualization technology can be widely applied to public cloud, private cloud, and cloud terminal scenarios. A public cloud is cloud infrastructure provided by a third party for general public or large industrial groups to use and can provide cloud services. A private cloud builds cloud infrastructure and software and hardware resources within a firewall for departments within an institution or enterprise to share resources in the data center. A private cloud can be cloud infrastructure operated for a specific organization, and the manager may be the organization itself or a third party; the location of the cloud server may be inside or outside the organization. Taking cloud phones as an example, cloud phones are emulated virtual phones that provide diversified and all-round virtual phone applications and services for smartphone users based on the outstanding advantages of cloud computing in large-scale computing, powerful storage capabilities, virtualized applications, etc. The following will be combined with Figure 1 to describe in detail the hardware structure of the computer device.

[0089] Figure 1 is a schematic diagram of the hardware structure of a computer device 100 provided by an embodiment of the present application. As Figure 1 shown, the computer device 100 includes components such as a processor 110, a memory 120, and a network interface 130 (also referred to as a network card or network adapter, etc.). Among them, the processor 110 can be a single-core processor or a multi-core processor. When the processor 110 is a multi-core processor, the method provided by the present application can run on one core or be distributed and run on different cores. The processor 110 can be one or multiple, and the types of multiple processors can be the same or different.

[0090] It should be understood that in the embodiments of the present application, the processor 110 may adopt a central processing unit (CPU), and the processor may also be other general-purpose processors, digital signal processors (DSPs), application specific integrated circuits (ASICs), field programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor may be a microprocessor or the processor may also be any conventional processor, etc. Alternatively, the processor 110 adopts one or more integrated circuits.

[0091] The memory 120 may include a read-only memory and a random access memory, and provide instructions and data to the processor 110. The memory 120 may include volatile and non-volatile memories. A virtualization software program 121 and other program modules 122 may be stored in the memory 120. Among them, after the virtualization software program 121 is read and run by the processor 110, virtualization of the computer device 100 is realized, including creating a host layer and multiple virtual computers, etc. The logical structure diagram after virtualization of the physical host 100 will be described in detail below, and will not be elaborated here. Figure 2 The detailed description of the logical structure diagram after virtualization of the physical host 100 will be described in detail below, and will not be elaborated here.

[0092] The network interface 130 is used to connect to other network devices, including wireless connection and wired connection.

[0093] The above components are connected through the bus 140. The bus 140 may be one or multiple. The bus 140 includes an advanced microcontroller bus architecture (AMBA) industry standard architecture (ISA) bus, a micro channel architecture (MCA) bus, an extended ISA (extended-ISA) bus, a video electronics standards association (VESA) local bus, and a peripheral component interconnect (PCI) bus, etc.

[0094] Figure 2 It is a system architecture diagram after virtualization of a computer device 100 provided by an embodiment of the present application.

[0095] It should be understood that in a computer, virtualization technology realizes the "virtualization" and "isolation" of the hardware of a physical computer by adding specific software layers to the physical computer, including a host layer and a virtual computer layer. Thus, various entity resources of the computer, such as computing resources, network resources, and storage resources, can be abstracted or transformed and shared by multiple users. This enables users to conveniently and flexibly use the hardware resources of the physical computer under the premise of secure isolation, greatly improving the utilization rate of hardware resources.

[0096] As Figure 2 shown, computing virtualization technology can convert the physical computing resources of computer device 100 into virtual computing resources and share them with users on multiple virtual machines. For example, Figure 1 the processor 110 shown can be converted into a virtual processor, and the memory can be converted into virtual memory and shared with users on VM101, VM102, and VM103. Input / output (IO) virtualization technology can convert physical storage resources and network resources into virtual storage resources and virtual network resources. For example, Figure 1 the memory 120 shown can be converted into virtual storage resources, and other network devices connected to network interface 130 can be converted into virtual network resources and shared with users on VM101, VM102, and VM103.

[0097] Specifically, please refer to Figure 3 , after virtualization, computer device 100 can include a hardware layer, a host layer, and a virtualization layer, which will be described in detail below.

[0098] Hardware layer: The hardware platform on which the virtualization environment runs. Among them, the hardware layer can include various hardware, such as processor 110, memory 120, network interface 130, etc., and can also include a network interface card (NIC), input / output (I / O) devices, etc.

[0099] It should be understood that the number of processors in the hardware layer in the embodiments of this application is not specifically limited. For the convenience of description, Figure 3 two processors 110 are used as an example for description.

[0100] Processor 110 can include one or more physical cores (in this application, physical cores can sometimes be simply referred to as cores) and multiple registers. For example, Figure 3 processor 110 in includes two physical cores, namely core 0 and core 1. Physical cores can represent the smallest processing unit in this application.

[0101] It should be noted that in some other embodiments, the number of cores included in the processor may be more or less, and the number of cores included in each processor may also be different.

[0102] Virtualization layer: includes one or more virtual computers. It should be understood that a virtual computer is a general term for the running environments virtualized by software in all types of virtualization devices. Virtual computers may include virtual machines (VMs), containers, etc.

[0103] Taking the virtual machine VM in the virtualization layer as an example. A virtual machine may include a virtual hardware layer, a guest operating system, and various applications. The virtual hardware layer includes virtual hardware such as virtual memory (not shown in the figure), virtual processors, etc. As Figure 3 shown, for the convenience of description, an example is given where the virtualization layer includes two virtual machines (virtual machine 101, virtual machine 103). Each virtual machine includes one or more virtual processors. A virtual processor is implemented by a combination of software and hardware, and its operation is actually realized by a physical core reading and running a software program. For example, a physical core reads a software program and runs the software program in a specific mode of hardware-assisted virtualization of the physical core (such as the non-Root mode of x86) to implement a virtual processor.

[0104] It should be understood that the virtual machine VM is equivalent to an independent computer, so the actions performed by the virtual machine VM can also be considered as the actions performed by the virtual processor, and since the virtual processor is implemented by software, the actions performed by the virtual processor are actually the actions performed by the physical processor or physical core on which the virtual processor runs. In multiple embodiments of the present invention, for the sake of following the technical expression habits of the current scenario, the above expression methods will be selectively used.

[0105] It should also be understood that a virtual processor may be a physical processing unit provided to a virtual computer in a shared or sharded manner under virtualization technology, such as a virtual central processing unit (vCPU). A virtual machine VM may have one or more virtual processors serving it. When there are multiple virtual processors, usually one virtual processor is the main virtual processor and the others are slave virtual processors.

[0106] Host layer: As the management layer, it is used to manage and allocate the hardware resources of the hardware layer, present a virtual hardware platform for virtual machines, and implement the scheduling and isolation of virtual machines. In some implementation manners, the host layer includes a host operating system and a virtual monitoring device, such as a virtual machine monitor (VMM) or a hypervisor. The virtual monitoring device can be deployed within the host operating system or outside the host operating system. The virtual hardware platform provides various hardware resources for each virtual computer running thereon, such as virtual processors, virtual memories, virtual disks, virtual network cards, etc. The virtual computer runs on the virtual hardware platform prepared for it by the host layer. In this application, the host layer is sometimes simply referred to as the host.

[0107] In the process of virtualizing the computer device as described above, the implementation of I / O virtualization requires the consumption of certain physical computing resources. Therefore, all the hardware resources of the physical host cannot be shared for users to use. And since the consumption of hardware resources by the I / O virtualization technology increases with the growth of the number of virtual machine I / Os, in a multi-user scenario such as a public cloud, when the number of I / Os of multiple users is large, resource competition caused by insufficient hardware resources will occur, and then significant fluctuations in service performance and a decline in user experience will occur.

[0108] In an embodiment of this application, an external device can be connected to the virtualized computer device, and the virtual machines running on the computer device can directly access the external device, and the external device processes the I / Os sent by the virtual machines. In this way, by directly sending the I / O requests sent by the virtual machines to the external device of the computer device for processing, the consumption of physical computing resources of the computer device by I / O virtualization can be reduced, the proportion of resources used to provide virtual machine services for users in the resources of the computer device can be increased, and the utilization rate of physical server resources can be improved.

[0109] In an embodiment of this application, the computer device 100 described above can be a physical server. Please refer to Figure 4 , the software and hardware collaborative offloading card 400 is used as an external device of the physical server 100, and the I / O requests sent by the virtual machines are directly sent to the software and hardware collaborative offloading card 400 for processing. For example, the software and hardware collaborative offloading card 400 is connected to storage resources (storage server) or network resources (network server) through a network card, and the software and hardware collaborative offloading card 400 can send the I / O requests to the storage server or network server through the network card for I / O processing.

[0110] Specifically, as Figure 5As shown, the hardware system of the physical server 100 may include memory, at least one processor, and a hardware interface that supports the Peripheral Component Interconnect Express (PCIE) protocol, such as a root complex (RC) chip. It should be understood that for ease of description, Figure 5 the example in which the hardware system of the physical server 100 includes two CPUs is used. The RC chip in the physical server 100 is a hardware interface defined in the PCIE specification, and this hardware interface is responsible for sending PCIE messages of the physical server 100 to external devices (for example, the software and hardware co-offloading card 400), or this hardware interface can also be responsible for receiving PCIE messages sent by external devices (for example, the software and hardware co-offloading card 400).

[0111] The hardware system of the external device (for example, the software and hardware co-offloading card 400) of the physical server 100 may include memory, at least one processor, a network card, and a hardware interface that supports the PCIE protocol, such as an end point (EP) chip. The software and hardware co-offloading card 400 can be connected to storage resources (storage server) or network resources (network server) through the network card. It should be understood that for ease of description, Figure 5 the example in which the hardware system of the software and hardware co-offloading card 400 includes two CPUs is used. The EP chip is a hardware interface defined in the PCIE specification, and as the peripheral interface of the software and hardware co-offloading card 400, it is responsible for sending PCIE messages to the physical server 100, or it can also receive PCIE messages sent by the physical server 100.

[0112] The embodiments of the present application do not limit the specific implementation of the RC chip and the EP chip, and any RC chip and EP chip implemented in accordance with the PCIE specification can be used.

[0113] See Figure 5 , the software and hardware co-offloading card 400 communicates with the physical server 100 through the PCIE protocol. Specifically, at least one processor in the software and hardware co-offloading card 400 can process the IO requests sent by the virtual machines on the physical server 100 by running software programs stored in the memory. The software system of the software and hardware co-offloading card 400 may include five sub-modules: a PCIE protocol processing module, a PCIE adapter module, a protocol processing module, a protocol processing framework module, and a dynamic configuration module. The above several software modules will be described in detail below.

[0114] It should be understood that the PCIE protocol processing module and the PCIE adapter module may be in the kernel state, and the protocol processing module, the protocol processing framework module, and the dynamic configuration module are in the user state.

[0115] (1) PCIE protocol processing module:

[0116] The PCIE protocol processing module is strongly related to the EP chip, and different manufacturers provide different EP chips. This PCIE protocol processing module is used to write different registers on the EP chip according to different manufacturers.

[0117] (2) PCIE adapter module:

[0118] The PCIE adapter module mainly defines a set of abstract function interfaces for the upper-layer IO protocol processing module to call. The specific function interfaces can include but are not limited to: peripheral component interconnect (PCI) configuration space read / write interface, PCI base address registers (BAR) mapping configuration interface, PCI message signaled interrupt (MSI) / MSI-X interrupt configuration interface, PCI single root I / O virtualization and sharing (SR-IOV) capability configuration interface, direct memory access (DMA) read / write interface, and interrupt sending interface. The above several function interfaces are described in detail below.

[0119] PCI configuration space read / write interface: It is used to allocate PCI configuration space for the external interface of the software-hardware co-offloading card 400 in memory. The total length of the configuration space defined by the PCI bus specification is 256 bytes, which is actually a set of consecutive registers. In the embodiment of the present application, the correspondence between the external interface of the software-hardware co-offloading card 400 and the IO protocol of this interface can be recorded by writing registers in the PCI configuration space.

[0120] PCI BAR mapping configuration interface: There are 6 base address registers BAR in the PCI configuration space header. The base address register BAR records the type, address, and other attributes of the PCI configuration space. In the embodiment of the present application, a section of memory space can be allocated for the base address register BAR in the memory of the software-hardware co-offloading card 400, and the relationship between the allocated memory and the BAR can be mapped through the PCI BAR mapping configuration interface.

[0121] Interrupt sending interface: The CPU of the software-hardware co-offloading card 400 can send an interrupt to the front-end physical server 100 through this interrupt sending interface.

[0122] PCI MSI / MSI-X Interrupt Configuration Interface: Compared with MSI interrupts, MSI-X interrupts allow each device to support more interrupts and can be independently configured. In the embodiments of the present application, the number of interrupts that the CPU of the software-hardware collaborative offloading card 400 can execute can be configured through the PCI MSI / MSI-X interrupt configuration interface.

[0123] DMA Read / Write Interface: DMA is a mechanism for quickly transferring data. When accessing memory, the memory information of the physical server can be directly accessed through the DMA read / write interface without the CPU participating in the data access from the memory. When the CPU of the software-hardware collaborative offloading card 400 obtains the IO requests stored in the memory of the front-end physical server 100, it can call the DMA read / write interface to write the registers in the EP chip, thereby obtaining the IO requests stored in the memory of the front-end physical server 100.

[0124] (3) IO Protocol Processing Module:

[0125] Based on the underlying PCIE communication protocol, the IO protocol processing module can implement various IO protocols. In the embodiments of the present application, the IO protocol is not specifically limited. As an example, the IO protocol can be the virtualization IO (VirtIO) protocol. Correspondingly, the IO protocol processing module is the VirtIO protocol processing module. Specifically, the VirtIO protocol can include the VirtIO-blk storage protocol and the VirtIO-net network protocol. As another example, the IO protocol can also be the non-volatile memory express (NVMe) protocol. Correspondingly, the IO protocol processing module is the NVMe protocol processing module.

[0126] It should be understood that the VirtIO protocol is an IO protocol defined in the field of traditional virtualization technology, which has good ecological support. Currently, mainstream operating system (OS) distributions provide front-end drivers that support this protocol. The NVMe protocol is an IO protocol defined by Intel for high-performance storage media.

[0127] It should also be understood that when the external interface of the software-hardware collaborative offloading card 400 is configured with the VirtIO protocol, that is, the IO protocol presented by the software-hardware collaborative offloading card 400 is the VirtIO protocol, the software-hardware collaborative offloading card 400 can be used as a VirtIO device to process the IO requests issued by the virtual machine.

[0128] It should be noted that in the embodiments of the present application, it is allowed to connect other IO protocols as extended protocol processing modules to the upper-layer protocol processing framework, so as to achieve protocol extension to meet the needs of users for different IO interface protocols corresponding to IO interfaces.

[0129] (4) Protocol processing framework module:

[0130] As the top-level module of the system, this module processes the IO requests sent by the front-end system in parallel in a multi-threaded manner and feeds back the completed requests to the front-end system. Specifically, an IO response carrying the IO operation result can be fed back to the front-end system. The protocol processing framework module can select a CPU with a relatively light load among the current multiple CPUs to process the IO requests sent by the virtual machines on the front-end system.

[0131] (5) Dynamic configuration module:

[0132] As the external management interface of the system, this module can configure the software and hardware co-offloading card 400. As an example, during the initialization phase, the IO protocol types corresponding to one or more IO interfaces of the software and hardware co-offloading card 400 can be configured.

[0133] Next, in combination with Figure 6 the technical solutions in, the implementation process of the software and hardware co-offloading card 400 for processing the IO requests sent by the virtual machines on the physical server 100 will be described in detail.

[0134] Figure 6 is a schematic flowchart of a method for processing IO requests provided by an embodiment of the present application. As shown in Figure 6 , this method may include steps 610-620, and the steps 610-620 will be described in detail below.

[0135] Step 610: The CPU of the software and hardware co-offloading card 400 synchronizes the queue information in the storage space of the virtual machine running on the physical server 100 to the storage space of the software and hardware co-offloading card 400 through the EP chip.

[0136] It should be understood that in the embodiments of the present application, the queue information in the storage space of the virtual machine may include one or more IO requests, and the IO requests are one or more IO requests sent by the virtual machines on the physical server 100.

[0137] As an example, the storage space of the virtual machine may be the memory of the virtual machine, and the storage space of the software and hardware co-offloading card 400 may be the memory of the software and hardware co-offloading card 400.

[0138] There are various specific implementation manners for the hardware-software collaborative offloading card 400 to synchronize the queue information in the storage space of the virtual machine, and the embodiments of the present application do not make specific limitations. As an example, the hardware-software collaborative offloading card 400 may synchronize the queue information in the storage space of the virtual machine to the storage space of the hardware-software collaborative offloading card 400 in a polling manner. For example, the CPU of the hardware-software collaborative offloading card 400 may synchronize the queue information in the storage space of the virtual machine to the storage space of the hardware-software collaborative offloading card 400 by writing the registers included in the EP chip. As another example, after the CPU of the hardware-software collaborative offloading card 400 receives an interrupt request sent by the EP chip, it may synchronize the queue information in the storage space of the virtual machine to the storage space of the hardware-software collaborative offloading card 400 by writing the registers included in the EP chip.

[0139] It can be understood that the storage space of the virtual machine is a part of the storage space of the physical server 100.

[0140] Step 620: The CPU of the hardware-software collaborative offloading card 400 sends the IO requests included in the queue information to the storage server or the network server for processing.

[0141] Optionally, in some embodiments, before the CPU of the hardware-software collaborative offloading card 400 synchronizes the queue information in the storage space of the virtual machine to the storage space of the hardware-software collaborative offloading card 400 through the EP chip, the CPU of the hardware-software collaborative offloading card 400 may also receive a configuration message, and this configuration message is used to indicate that the protocol type of the first IO interface of the hardware-software collaborative offloading card 400 is configured as the first IO protocol.

[0142] Next, in combination with Figure 7 , a method for protocol configuration of the IO interface of the hardware-software collaborative offloading card 400 will be described in detail. As Figure 7 shown, this method includes steps 710-730, and steps 710-730 will be described in detail below respectively.

[0143] Step 710: The hardware-software collaborative offloading card 400 receives a configuration command issued by the cloud management platform.

[0144] The cloud management platform may issue a protocol configuration command to the dynamic configuration module in the hardware-software collaborative offloading card 400 according to the IO protocol expected to be presented to the user, or the cloud management platform may also issue a protocol configuration command to the hardware-software collaborative offloading card 400 according to the user's requirements. For example, this configuration command indicates that the protocol type of the first IO interface is configured as the VirtIO-blk protocol.

[0145] It should be understood that the software-hardware collaborative offloading card 400 can be configured with multiple IO interfaces. Among them, one IO interface can be configured into one or more IO protocols according to the configuration command. Different IO interface protocols indicate that the software-hardware collaborative offloading card 400 provides different functions externally. For example, when the IO interface of the software-hardware collaborative offloading card 400 is configured with the VirtIO-blk protocol, the software-hardware collaborative offloading card 400 can be used as a VirtIO device to provide the VirtIO-blk storage function for the IO requests sent by the virtual machine.

[0146] Step 720: The software-hardware collaborative offloading card 400 configures the protocol type of the first IO interface according to the configuration command.

[0147] Optionally, after receiving the configuration command sent by the cloud management platform, the software-hardware collaborative offloading card 400 can notify the protocol processing framework module to check whether it supports the protocol according to the IO interface and the IO protocol type included in the configuration command. If it supports, the protocol processing framework module will record the corresponding relationship between the first IO interface and the IO protocol. If it does not support, the dynamic configuration module in the software-hardware collaborative offloading card 400 returns a configuration failure externally.

[0148] Specifically, if the dynamic configuration module in the software-hardware collaborative offloading card 400 determines that it can support the protocol in the configuration command, it can allocate PCI configuration space and BAR space for the first IO interface.

[0149] Taking the configuration command instructing the dynamic configuration module to configure the protocol type of the first IO interface as the VirtIO-blk protocol as an example. The dynamic configuration module can call the PCIE configuration space read-write interface of the PCIE adapter module to allocate a PCI configuration space object, configure the identification (ID) of the vendor register in the PCI configuration space as 0x1af4, and configure the ID of the device register in the PCI configuration space as 0x1001. The dynamic configuration module can also allocate a certain amount of memory as the VirtIO BAR space and call the PCI BAR mapping configuration interface of the adapter module to establish a mapping relationship between this memory and the VirtIO BAR, that is, all subsequent operations on the BAR by the front end will be mapped to this memory by the EP chip in the software-hardware collaborative offloading card 400 at the back end.

[0150] It should be understood that the PCI configuration space is a set of registers. Among them, configuring the vendor_ID in the PCI configuration space as 0x1af4 and the device_ID as 0x1001 can be understood as configuring the first IO interface with the VirtIO-blk protocol.

[0151] Step 730: The PCIE adapter module synchronizes the mapping relationship between the first IO interface and the corresponding IO protocol to the register in the EP chip.

[0152] The EP chip may include multiple physical registers. The PCIE adapter module may call the PCIE protocol processing module to synchronize and write the mapping relationship between the first IO interface and the corresponding IO protocol into the physical registers of the EP chip. In this way, the front-end physical server 100 can determine the IO protocol type of the first IO interface by scanning the mapping relationship between the first IO interface and the corresponding IO protocol recorded in the physical registers of the EP chip.

[0153] In the embodiment of the present application, by dynamically configuring the IO interface protocol of the software and hardware collaborative offloading card 400, the IO interface protocol presented by the software and hardware collaborative offloading card 400 can be flexibly defined, and the needs of different users for multiple IO protocols can be met without modifying the hardware system. At the same time, it is also possible to get rid of the constraint that the virtual machine is strongly bound by the IO protocol corresponding to the IO interface, and improve the flexibility of the virtual machine.

[0154] The following combines Figure 8 , and details the implementation process of the software and hardware collaborative offloading card 400 for processing the IO requests sent to the virtual machines on the physical server 100. As Figure 8 shown, the IO request processing flow may include steps 810-860, and the steps 810-860 will be described in detail below.

[0155] For ease of description, in the following text, the storage space of the software and hardware collaborative offloading card 400 is taken as the memory of the software and hardware collaborative offloading card 400, and the storage space of the virtual machine is taken as the memory of the virtual machine for description.

[0156] It should also be understood that the memory of the virtual machine is a part of the memory of the physical server 100. For ease of description, in the following text, the memory of the virtual machine is taken as the memory of the physical server 100 for description.

[0157] Step 810: The physical server 100 stores the IO request sent by the virtual machine in the memory of the physical server 100.

[0158] The virtual machine on the physical server 100 sends an IO request, and the physical CPU running the virtual machine stores the IO request in the memory of the physical server 100.

[0159] Specifically, the physical server 100 can scan the IO interfaces of the software-hardware co-offloading card 400 stored in the registers in the EP chip through the link between the RC chip and the EP chip, and obtain the IO protocol corresponding to the IO interface. The physical server 100 can record the correspondence between the virtual machines running on the physical server 100 and the IO interfaces of the software-hardware co-offloading card 400. If a virtual machine that issues an IO request needs to send the IO request to IO interface 1 for processing, and the IO protocol corresponding to this IO interface 1 is the VirtIO protocol, the virtual machine can send the IO request to the driver corresponding to the VirtIO protocol, and the driver can determine the data structure of the IO request in the memory of the physical server 100 according to the VirtIO protocol. For example, the data structure of the IO request in the memory of the physical server 100 is an IO ring. The IO ring includes the data structures of an available queue and a used queue. Among them, the available queue is used to store IO requests, and the used queue is used to store the IO responses corresponding to the IO requests.

[0160] Step 820: The external device connected to the physical server 100 synchronizes the queue information in the memory of the physical server 100 to the memory of the external device.

[0161] Optionally, as an external device connected to the physical server 100, the software-hardware co-offloading card 400 can also receive second configuration information, which is used to indicate whether the software-hardware co-offloading card 400 synchronizes the queue information in the memory of the physical server 100 to the memory of the software-hardware co-offloading card 400 in a polling manner or an interrupt manner.

[0162] Take the example that the software-hardware cooperative offloading card 400 can synchronize the queue information in the memory of the virtual machine physical server 100 to the memory of the software-hardware cooperative offloading card 400 in a polling manner. For the IO interface 1 of the software-hardware cooperative offloading card 400, the software-hardware cooperative offloading card 400 can determine the size of the IO requests stored in the memory of the virtual machine physical server 100 according to the IO protocol corresponding to the IO interface 1. The CPU in the software-hardware cooperative offloading card 400 can obtain the queue information in the memory of the virtual machine physical server 100 by writing to the registers in the EP chip. Specifically, the CPU in the software-hardware cooperative offloading card 400 can call the DMA interface provided by the PCIE adapter module to write to the registers in the EP chip. For example, write the backend address and the frontend address of the queue information to be synchronized to the registers in the EP chip. Another example is to write the size of the queue information to be synchronized to the registers in the EP chip. The EP chip can send a PCIE message to the RC chip in the physical server 100 according to the content written in its registers. The PCIE message includes the queue information that the software-hardware cooperative offloading card 400 needs to synchronize. After receiving the PCIE message sent by the EP chip, the RC chip obtains the queue information from the memory of the physical server 100 through the bus and sends the queue information to the EP chip through the link between the RC chip and the EP chip. The EP chip can store the received queue information in the memory of the software-hardware cooperative offloading card 400 through the bus.

[0163] It should be noted that in the above polling process, after the software-hardware cooperative offloading card 400 synchronizes the queue information in the memory of the physical server 100 to the memory of the external device, it can also call the IO protocol processing module corresponding to the IO protocol of the IO interface 1 to read the synchronized queue information from the memory of the software-hardware cooperative offloading card 400 to determine whether there are IO requests to be processed.

[0164] Taking the example that the software-hardware co-offloading card 400 can synchronize the queue information in the memory of the physical server 100 to the memory of the software-hardware co-offloading card 400 by means of interruption. After the RC chip in the physical server 100 determines that there are IO requests to be processed stored in the memory of the physical server 100, the RC chip can send a PCIE message to the EP chip through the link with the EP chip, and this PCIE message is used to instruct the EP chip to wake up the CPU in the software-hardware co-offloading card 400. The EP chip can send an interrupt request to the CPU in the software-hardware co-offloading card 400 according to this PCIE message sent by the RC chip, and this interrupt request is used to instruct the CPU in the software-hardware co-offloading card 400 to synchronize the queue information in the memory of the physical server 100. After receiving this interrupt request, the CPU in the software-hardware co-offloading card 400 obtains the queue information in the memory of the physical server 100 by writing the register in the EP chip. The specific process is similar to the above polling process. For the specific implementation method of the CPU in the software-hardware co-offloading card 400 obtaining the queue information in the memory of the physical server 100 by writing the register in the EP chip, please refer to the above text for details and will not be elaborated here.

[0165] Adopting the polling method can reduce the notification delay between the front-end physical server 100 and the back-end software-hardware co-offloading card 400. Adopting the interruption method can reduce the number of PCIE messages on the PCIE link between the RC chip and the EP chip.

[0166] In the above technical solution, the overall replication method can be adopted to ensure that all IO requests to be processed can be obtained by performing a single DMA operation, which can improve the IO processing performance for scenarios with a high number of IOs.

[0167] Step 830: The external device connected to the physical server 100 forwards the IO request to the storage server or network server connected through its network card for IO processing.

[0168] As an external device connected to the physical server 100, the software-hardware co-offloading card 400 can read the synchronized IO requests from the memory of the software-hardware co-offloading card 400, and can select to send this IO request to the storage server or network server through the network card for IO processing according to the content in the IO request. Specifically, taking the IO protocol of IO interface 1 as the VirtIO protocol, the CPU in the software-hardware co-offloading card 400 can call the VirtIO protocol processing module, read the synchronized IO requests from its memory, parse the IO requests, and determine to send this IO request to the storage server or network server through the network card for IO processing according to the content in the IO request.

[0169] Step 840: The external device connected to the physical server 100 obtains the IO response corresponding to the IO request.

[0170] After the storage resource or network resource finishes processing the IO request to be processed, an IO response corresponding to the IO request can be generated. As an external device connected to the physical server 100, there are multiple specific implementation manners for the software-hardware collaborative offloading card 400 to obtain the IO response, and the embodiments of the present application do not make specific limitations thereto.

[0171] As an example, the CPU of the software-hardware collaborative offloading card 400 can determine whether the storage resource or network resource has finished processing the IO request to be processed by means of polling. Specifically, the CPU of the software-hardware collaborative offloading card 400 can send a query message to the storage server or network server connected thereto through the network card, and the query message is used to query the storage server or network server whether there is an IO response corresponding to the IO request. If the storage server or network server has finished processing the IO request to be processed, the storage server or network server can send a message indicating that the IO request processing has been completed to the CPU of the software-hardware collaborative offloading card 400 through the network card. After receiving the message, the CPU of the software-hardware collaborative offloading card 400 can obtain the IO response from the storage server or network server connected thereto through the network card.

[0172] As another example, the CPU of the software-hardware collaborative offloading card 400 can also obtain the IO response corresponding to the IO request by means of interruption. If the storage server or network server has finished processing the IO request to be processed, the storage server or network server can send the IO response to the software-hardware collaborative offloading card 400 through the network card. The network card can store the IO response in the memory of the software-hardware collaborative offloading card 400 through the bus and send an interrupt request to the CPU of the software-hardware collaborative offloading card 400, and the interrupt request instructs the CPU of the software-hardware collaborative offloading card 400 to synchronize the IO response stored in the memory to the memory of the physical server 100.

[0173] Step 850: The external device connected to the physical server 100 synchronizes the IO response to the memory of the physical server 100.

[0174] The CPU of the software-hardware collaborative offloading card 400 can synchronize the IO responses in its memory to the memory of the physical server 100 by writing the registers in the EP chip. Specifically, the CPU in the software-hardware collaborative offloading card 400 can write the registers in the EP chip through the DMA interface provided by the PCIE adapter module. For example, relevant information of the IO response that needs to be synchronized to the memory of the physical server 100 is written in the registers of the EP chip. The EP chip can send a PCIE message to the RC chip in the physical server 100 according to the content written in its registers, and the PCIE message includes the IO response stored in the memory of the software-hardware collaborative offloading card 400. After receiving the PCIE message sent by the EP chip, the RC chip stores the IO response carried by the PCIE message in the memory of the physical server 100 through the bus.

[0175] In the embodiment of the present application, the execution thread for processing the IO response can be the same as the execution thread for processing the IO request. That is to say, the IO response can also be processed by the execution thread to which the IO request belongs. When the IO request is issued and the IO response is parallel, it is possible to avoid locking the respective threads, reduce the CPU overhead, and improve the throughput performance.

[0176] Step 860: The external device notifies the physical server 100 that the processing of the IO request issued by the virtual machine has been completed.

[0177] As an external device connected to the physical server 100, after synchronizing the IO response to the memory of the physical server 100, the CPU of the software-hardware collaborative offloading card 400 can send a notification that the processing of the IO request has been completed to the CPU of the physical server 100 through the EP chip. Specifically, the CPU of the software-hardware collaborative offloading card 400 can call the interrupt sending interface provided by the PCIE adapter module to write the registers in the EP chip. For example, relevant information that the processing of the IO request has been completed is written in the registers of the EP chip. The EP chip can send a PCIE message to the RC chip in the physical server 100 according to the content written in its registers, and the PCIE message is used to notify the software-hardware collaborative offloading card 400 that the processing of the IO request has been completed. After receiving the PCIE message sent by the EP chip, the RC chip sends an interrupt request to the CPU of the physical server 100, and the interrupt request is used to indicate that the processing of the IO request has been completed. After receiving the interrupt request, the CPU of the physical server 100 will notify the virtual machine that the IO request has been processed. The virtual machine takes out the IO response from the memory of the physical server 100 and then notifies the application program in the virtual machine of the IO processing result.

[0178] Optionally, in some embodiments, for the case of concurrent processing of multiple I / Os, the CPU of the hardware-software cooperative offloading card 400 may notify the physical server 100 that the I / O request processing is completed after multiple I / O responses are synchronized to the used queue in the memory of the physical server 100.

[0179] In the above technical solution, it is possible to trigger an interrupt notification again after putting multiple I / O responses into the communication queue at the front end, avoiding the large signaling overhead caused by triggering a notification of the completion of I / O request processing every time an I / O response is put in.

[0180] Optionally, in some embodiments, other I / O protocols can be connected as extended protocol processing modules to the upper-layer protocol processing framework, thereby realizing protocol extension. During the process of adding other I / O protocol processing modules or upgrading the existing software, the embodiments of the present application can enable virtual machine users to have no perception of I / O interrupts, thereby meeting the requirement of zero interruption of services during the software upgrade process. The following combines Figure 9 to describe in detail.

[0181] See Figure 9 , the method for realizing software upgrade or I / O protocol extension may include steps 910-920, and the steps 910-920 will be described in detail below.

[0182] Step 910: Save the status information of the device in the normal working state.

[0183] During the normal use of the hardware-software cooperative offloading card 400, when a new I / O protocol is added or the existing software module is upgraded, when the hardware-software cooperative offloading card 400 is in the normal working state, the CPU of the hardware-software cooperative offloading card 400 will allocate a memory space in the memory to save all device status information. The status information may include the I / O count processed by each I / O interface and the queue information.

[0184] Step 920: Add a new I / O protocol or upgrade the existing software module.

[0185] When a new protocol module needs to be added or the software needs to be upgraded, the CPU of the hardware-software cooperative offloading card 400 will pause the processing of I / Os and verify the I / O count recorded in the device status information.

[0186] If the I / O count is not zero, indicating that there are still I / O requests being processed in the storage resource or network resource, it is necessary to wait for them to be processed. The CPU of the hardware-software cooperative offloading card 400 will restart the entire software system, reload the software module to upgrade the existing software module or add a new I / O protocol. And obtain and read out the queue information from the status information saved in the memory, and resume the I / O processing of the hardware-software cooperative offloading card 400.

[0187] If the IO calculation is zero, it means that there are no IO requests being processed in the storage resources or network resources. The CPU of the software-hardware cooperative offloading card 400 can directly restart the software system, reload each software module to upgrade the existing software modules or add new IO protocols. And obtain the read queue information from the status information saved in the memory, and resume the IO processing of the software-hardware cooperative offloading card 400.

[0188] In the above technical solution, the update or upgrade of the protocol can be completed without interrupting the virtual machine IO service.

[0189] It can be understood that some or all of the steps in the above embodiments can be executed. These steps or operations are only examples, and the embodiments of the present application can also execute other operations or various deformations of the operations. In addition, the various steps can be executed in different orders presented in the above embodiments, and it is possible not to execute all the operations in the above embodiments.

[0190] As described above in conjunction with Figures 1 to 9 ..., the method for processing IO requests provided by the embodiments of the present application is described in detail. Next, in conjunction with Figures 10 to 13 ..., the embodiments of the device of the present application will be described in detail. It should be understood that the description of the method embodiments corresponds to the description of the device embodiments. Therefore, for the parts not described in detail, reference can be made to the previous method embodiments.

[0191] Figure 10 FIG. is a schematic block diagram of an external device 1000 provided by an embodiment of the present application. The external device 1000 includes an acquisition module 1010, a sending module 1020, and a first interface module 1030. Among them,

[0192] The first interface module 1030 is used to communicate with the physical host; the first interface module 1030 is an interface module that supports the Peripheral Component Interconnect Express (PCIE) protocol of the high-speed serial computer expansion bus standard;

[0193] The acquisition module 1010 is used to synchronize the queue information in the storage space of the virtual machine running on the physical host to the storage space of the external device through the first interface module 1030. Among them, the queue information includes one or more input / output (IO) requests sent by the virtual machine;

[0194] The sending module 1020 is used to send the one or more IO requests to the storage server or the network server for processing.

[0195] In the above technical solution, an external device is connected to the physical host, and the external device processes the I / O sent by the virtual machines running on the physical host. By directly sending the I / O requests sent by the virtual machines to the external device of the physical host for processing, the consumption of physical computing resources caused by I / O virtualization of the physical host can be avoided, so that all the hardware resources on the physical host are used to provide virtual machine services for users, improving the utilization rate of the hardware resources of the physical host.

[0196] Optionally, the external device 1000 further includes: a first receiving module 1040, configured to receive a configuration message for instructing to configure the protocol type of the first I / O interface of the external device as a first I / O protocol. A plurality of the first I / O interfaces are running on the first interface module. The first I / O interface is a virtual interface of the first interface module, and the first I / O interface corresponds to the virtual machine and is used to process one or more I / O requests sent by the virtual machine to the first I / O interface. The data type and / or data size of the one or more I / O requests in the storage space of the virtual machine are associated with the first I / O protocol.

[0197] The external device 1000 further includes: a configuration module 1050, configured to configure the protocol type of the first I / O interface as the first I / O protocol according to the configuration message.

[0198] Optionally, the first interface module 1030 is further configured to: receive a PCIE message sent by the physical host, where the PCIE message is used to indicate that there is an I / O request to be processed by the external device; send an interrupt request to a processor in the external device according to the PCIE message.

[0199] The obtaining module 1010 is specifically configured to: synchronize queue information in the storage space of the virtual machine to the storage space of the external device through the first interface module according to the interrupt request.

[0200] Optionally, the obtaining module 1010 is specifically configured to: directly call the storage access DMA technology to instruct the first interface module to synchronize queue information in the storage space of the virtual machine to the storage space of the external device.

[0201] Optionally, the external device 1000 further includes: a first storage module 1060, configured to store the number of I / O requests processed by the first I / O interface.

[0202] A loading module 1070, configured to reload the first I / O protocol when the number of I / O requests is 0.

[0203] Optionally, the obtaining module 1010 is further configured to: obtain the IO response corresponding to the IO request from the storage server or the network server;

[0204] The external device 1000 further includes: a second storage module 1080, configured to store the IO response into the storage space of the virtual machine through the first interface module.

[0205] Optionally, the second storage module 1080 is specifically configured to: through the DMA technology, instruct the first interface module to store the IO response into the storage space of the virtual machine.

[0206] Optionally, the first storage module 1060 is further configured to: store the IO responses corresponding to multiple IO requests into the storage space of the virtual machine;

[0207] The first interface module 1030 is further configured to: send a notification message to the physical host, where the notification message is used to notify the physical host that multiple IO requests have been processed.

[0208] Figure 11 FIG. is a schematic block diagram of a physical host 1100 provided by an embodiment of the present application. The physical host 1100 includes a storage module 1110 and a second interface module 1120, where:

[0209] The second interface module 1120 is an interface that supports the Peripheral Component Interconnect Express (PCIE) protocol of the high-speed serial computer expansion bus standard, and is used for communicating with an external device;

[0210] The storage module 1110 is configured to store one or more input / output (IO) requests sent by a virtual machine running on the physical host 1100 into the storage space of the virtual machine;

[0211] The second interface module 1120 is configured to send one or more IO requests in the storage space of the virtual machine to the storage space of the external device.

[0212] Optionally, the second interface module 1120 is further configured to: send a PCIE message to the external device, where the PCIE message is used to indicate that there is an IO request to be processed by the external device.

[0213] Optionally, the second interface module 1120 is further configured to: receive the IO response sent by the external device, where the IO response corresponds to the IO request, and the IO response is obtained by the external device from the storage server or the network server.

[0214] Optionally, the second interface module 1120 is further configured to: receive, through the second interface module, a notification message sent by the external device, where the notification message is used to notify the physical host 1100 that a plurality of the IO requests have been processed.

[0215] Figure 12 FIG. 4 is a schematic block diagram of an external device 1200 provided by an embodiment of the present application. The external device 1200 may include: a processor 1210, a first hardware interface 1220, and a memory 1230. Among them,

[0216] the processor 1210, the first hardware interface 1220, and the memory 1230 are connected through an internal connection path. The memory 1230 is used to store program instructions, and the processor 1210 is configured to call and run the computer program instructions from the memory 1230 to perform:

[0217] synchronize queue information in the storage space of a virtual machine running on the physical host to the storage space of the external device through the first hardware interface 1220, where the queue information includes one or more input / output IO requests sent by the virtual machine;

[0218] send the one or more IO requests to a storage server or a network server for processing.

[0219] It should be understood that, in the embodiment of the present application, the processor 1210 may be a central processing unit (CPU), and the processor may also be other general-purpose processors, digital signal processors (DSPs), application specific integrated circuits (ASICs), field programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor may be a microprocessor, or the processor may also be any conventional processor, etc. Or the processor 1210 employs one or more integrated circuits to execute relevant programs to implement the technical solutions provided by the embodiments of the present application.

[0220] The memory 1230 may include a read-only memory and a random access memory, and provide instructions and data to the processor 1210. A part of the processor 1210 may also include a non-volatile random access memory. For example, the processor 1210 may also store information about the device type.

[0221] Optionally, the processor 1210 is further configured to: receive a configuration message for instructing to configure the protocol type of the first IO interface of the external device 1200 as a first IO protocol, where multiple first IO interfaces run on the first hardware interface 1220, the first IO interface is a virtual interface of the first hardware interface 1220, the first IO interface corresponds to the virtual machine, and is used to process one or more IO requests sent by the virtual machine to the first IO interface, and the data type and / or data size of the one or more IO requests in the storage space of the virtual machine are associated with the first IO protocol; configure the protocol type of the first IO interface as the first IO protocol according to the configuration message.

[0222] Optionally, the first hardware interface 1220 is configured to: receive a PCIE message sent by the physical host, where the PCIE message is used to indicate an IO request to be processed by the external device 1200; send an interrupt request to the processor;

[0223] The processor 1210 is further configured to: synchronize queue information in the storage space of the virtual machine to the storage space of the external device 1200 through the first hardware interface 1220 according to the interrupt request.

[0224] Optionally, the processor 1210 is specifically configured to: instruct the first hardware interface 1220 to synchronize queue information in the storage space of the virtual machine to the storage space of the external device 1200 through the direct memory access (DMA) technology.

[0225] Optionally, the processor 1210 is further configured to: store the number of IO requests processed by the first IO interface; reload the first IO protocol when the number of IO requests is 0.

[0226] Optionally, the processor 1210 is further configured to: obtain an IO response corresponding to the IO request from the storage server or the network server; store the IO response in the storage space of the virtual machine through the first hardware interface 1220.

[0227] Optionally, the processor 1210 is specifically configured to: instruct the first hardware interface 1220 to store the IO response in the storage space of the virtual machine through the DMA technology.

[0228] Optionally, the processor 1210 is further configured to: after storing the IO responses corresponding to multiple IO requests into the storage space of the virtual machine through the first hardware interface 1220, send a notification message to the physical host through the first hardware interface 1220, where the notification message is used to notify the physical host that multiple IO requests have been processed.

[0229] In the implementation process, each step of the above method can be completed by the integrated logic circuit of the hardware in the processor 1210 or the instructions in the form of software. The method disclosed in combination with the embodiments of the present application can be directly embodied as being executed by the hardware processor, or executed by a combination of the hardware and software modules in the processor. The software module can be located in a mature storage medium in the art such as random access memory, flash memory, read-only memory, programmable read-only memory, or electrically erasable programmable memory, register, etc. This storage medium is located in the memory 1230, and the processor 1210 reads the information in the memory 1230 and combines its hardware to complete the steps of the above method.

[0230] It should be understood that in various embodiments of the present application, the sequence numbers of the above processes do not mean the order of execution. The order of execution of each process should be determined by its function and internal logic, and should not constitute any limitation to the implementation process of the embodiments of the present application.

[0231] Figure 13 It is a schematic block diagram of a physical host 1300 provided by an embodiment of the present application. The physical host 1300 may include: a processor 1310, a second hardware interface 1320, and a memory 1330, where

[0232] The processor 1310, the second hardware interface 1320, and the memory 1330 are connected through an internal connection path. The memory 1330 is used to store program instructions, and the processor 1310 is used to call and run the computer program instructions from the memory 1330 to execute:

[0233] Store one or more input / output IO requests sent by a virtual machine running on the physical host 1300 into the storage space of the virtual machine;

[0234] The second hardware interface 1320 is used to synchronize one or more IO requests in the storage space of the virtual machine to the storage space of the external device.

[0235] It should be understood that in the embodiments of the present application, the processor 1310 may adopt a central processing unit (CPU), and the processor may also be other general-purpose processors, digital signal processors (DSPs), application specific integrated circuits (ASICs), field programmable gate arrays (FPGAs) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor may be a microprocessor or the processor may also be any conventional processor, etc. Alternatively, the processor 1310 adopts one or more integrated circuits to execute relevant programs to implement the technical solutions provided in the embodiments of the present application.

[0236] The memory 1330 may include a read-only memory and a random access memory, and provide instructions and data to the processor 1310. A part of the processor 1310 may also include a non-volatile random access memory. For example, the processor 1310 may also store information about the device type.

[0237] Optionally, the second hardware interface 1320 is further configured to: send a PCIE message to the external device, where the PCIE message is used to indicate an IO request to be processed by the external device.

[0238] Optionally, the second hardware interface 1320 is further configured to: receive an IO response sent by the external device, where the IO response corresponds to the IO request, and the IO response is obtained by the external device from a storage server or a network server.

[0239] Optionally, the second hardware interface 1320 is further configured to: receive a notification message sent by the external device, where the notification message is used to notify the physical host that a plurality of the IO requests have been processed.

[0240] In the implementation process, the steps of the above method may be completed by the integrated logic circuit of the hardware in the processor 1310 or the instructions in the form of software. The method disclosed in combination with the embodiments of the present application may be directly embodied as being executed and completed by a hardware processor, or executed and completed by a combination of the hardware and software modules in the processor. The software module may be located in a mature storage medium in the art such as a random access memory, a flash memory, a read-only memory, a programmable read-only memory, or an electrically erasable programmable memory, a register, etc. This storage medium is located in the memory 1330, and the processor 1310 reads the information in the memory 1330 and combines its hardware to complete the steps of the above method.

[0241] It should be understood that in various embodiments of the present application, the sequence numbers of the above processes do not indicate the order of execution, and the order of execution of each process should be determined by its function and internal logic, and should not constitute any limitation to the implementation process of the embodiments of the present application.

[0242] Those of ordinary skill in the art can realize that the units and algorithm steps of each example described in combination with the embodiments disclosed herein can be implemented by electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are executed in a hardware or software manner depends on the specific application and design constraints of the technical solution. Professional technicians can use different methods for each specific application to implement the described functions, but such implementation should not be considered to exceed the scope of the present application.

[0243] Those skilled in the art can clearly understand that for the convenience and simplicity of description, the specific working processes of the systems, devices, and units described above can refer to the corresponding processes in the foregoing method embodiments and will not be elaborated herein.

[0244] In several embodiments provided by the present application, it should be understood that the disclosed systems, devices, and methods can be implemented in other ways. For example, the device embodiments described above are merely illustrative. For example, the division of the units is only a logical function division, and there can be other division methods in actual implementation. For example, multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the displayed or discussed coupling or direct coupling or communication connection to each other can be through some interfaces, and the indirect coupling or communication connection of the devices or units can be in an electrical, mechanical, or other form.

[0245] The units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, they can be located in one place, or distributed to multiple network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0246] In addition, the functional units in various embodiments of the present application can be integrated into one processing unit, or each unit can exist physically alone, or two or more units can be integrated into one unit.

[0247] When the above-mentioned functions are implemented in the form of software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or a part of this technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the methods described in various embodiments of this application. The aforementioned storage medium includes: various media that can store program codes, such as USB flash drives, mobile hard disks, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical discs.

[0248] As described above, the above is only the specific implementation manner of this application, but the protection scope of this application is not limited thereto. Any person skilled in the art within the technical scope disclosed by this application can easily think of changes or substitutions, which should all be covered by the protection scope of this application. Therefore, the protection scope of this application should be subject to the protection scope of the claims.

Claims

1. A method for processing IO requests, characterized in that, the method is applied to an external device, the external device includes a processor and a first hardware interface, the first hardware interface is an endpoint EP chip supporting the Peripheral Component Interconnect Express (PCIE) protocol of the high-speed serial computer expansion bus standard, the external device communicates with a physical host through the first hardware interface, and the method includes: the processor synchronizes queue information in the storage space of a virtual machine running on the physical host to the storage space of the external device through the first hardware interface, and the queue information includes one or more input / output (IO) requests sent by the virtual machine; the processor sends the one or more IO requests to a storage server or a network server for processing.

2. The method according to claim 1, characterized in that, the method further includes: the processor receives a configuration message for instructing to configure the protocol type of a first IO interface of the external device as a first IO protocol, wherein a plurality of the first IO interfaces run on the first hardware interface, the first IO interface is a virtual interface of the first hardware interface, the first IO interface corresponds to the virtual machine, and is used for processing one or more IO requests sent by the virtual machine to the first IO interface, and the data type and / or data size of the one or more IO requests in the storage space of the virtual machine are associated with the first IO protocol; the processor configures the protocol type of the first IO interface as the first IO protocol according to the configuration message.

3. The method according to claim 1 or 2, characterized in that, before the processor synchronizes queue information in the storage space of a virtual machine running on the physical host to the storage space of the external device through the first hardware interface, the method further includes: the first hardware interface receives a PCIE message sent by the physical host, and the PCIE message is used for indicating that there is an IO request to be processed by the external device; the first hardware interface sends an interrupt request to the processor; the processor synchronizes the queue information in the virtual machine storage space to the storage space of the external device through the first hardware interface according to the interrupt request.

4. The method according to any one of claims 1 to 3, characterized in that, the processor synchronizes queue information in the storage space of a virtual machine running on the physical host to the storage space of the external device through the first hardware interface, including: the processor instructs the first hardware interface to synchronize the queue information in the storage space of the virtual machine to the storage space of the external device through the direct memory access (DMA) technology.

5. The method according to any one of claims 1 to 4, characterized in that, the method further includes: the processor stores the number of IO requests processed by the first IO interface; when the number of the IO requests is 0, the processor reloads the first IO protocol.

6. The method according to any one of claims 1 to 5, characterized in that, The method further includes: The processor obtains an I / O response corresponding to the I / O request from the storage server or the network server; The processor stores the I / O response into the storage space of the virtual machine through the first hardware interface.

7. The method according to claim 6, wherein, The processor stores the I / O response into the storage space of the virtual machine through the first hardware interface, including: The processor uses the DMA technology to instruct the first hardware interface to store the I / O response into the storage space of the virtual machine.

8. The method according to claim 6 or 7, wherein, The method further includes: When the processor stores the I / O responses corresponding to multiple I / O requests into the storage space of the virtual machine through the first hardware interface, the processor sends a notification message to the physical host through the first hardware interface, and the notification message is used to notify the physical host that multiple I / O requests have been processed.

9. A method for processing an I / O request, wherein, The method is applied to a physical host, one or more virtual machines are running on the physical host, the physical host includes a processor and a second hardware interface, the second hardware interface is an interface that supports the Peripheral Component Interconnect Express (PCIE) protocol of the high-speed serial computer extension bus standard, and the physical host communicates with an external device through the second hardware interface. The method includes: The processor stores one or more input / output (I / O) requests sent by the virtual machine into the storage space of the virtual machine; The processor synchronizes one or more I / O requests in the storage space of the virtual machine to the storage space of the external device through the second hardware interface.

10. The method according to claim 9, wherein, The method further includes: The processor sends a PCIE message to the external device through the second hardware interface, and the PCIE message is used to indicate that there are I / O requests to be processed by the external device.

11. The method according to claim 9 or 10, wherein, The method further includes: The processor receives an I / O response sent by the external device through the second hardware interface, the I / O response corresponds to the I / O request, and the I / O response is obtained by the external device from the storage server or the network server.

12. The method according to any one of claims 9 to 11, wherein, The method further includes: The processor receives a notification message sent by the external device through the second hardware interface, and the notification message is used to notify the physical host that multiple I / O requests have been processed.

13. An external device, wherein, The external device includes an acquisition module, a sending module, and a first interface module, wherein: The first interface module is used to communicate with a physical host; the first interface module is an endpoint (EP) chip that supports the Peripheral Component Interconnect Express (PCIE) protocol of the high-speed serial computer extension bus standard; The obtaining module is configured to synchronize queue information in the storage space of a virtual machine running on the physical host to the storage space of the external device through the first interface module, where the queue information includes one or more input / output (IO) requests sent by the virtual machine; The sending module is configured to send the one or more IO requests to a storage server or a network server for processing.

14. The external device according to claim 13, wherein, the external device further includes: A first receiving module, configured to receive a configuration message for instructing to configure the protocol type of a first IO interface of the external device as a first IO protocol, where multiple first IO interfaces are running on the first interface module, the first IO interface is a virtual interface of the first interface module, the first IO interface corresponds to the virtual machine, and is configured to process one or more IO requests sent by the virtual machine to the first IO interface, and the data type and / or data size of the one or more IO requests in the storage space of the virtual machine are associated with the first IO protocol; The external device further includes: A configuration module, configured to configure the protocol type of the first IO interface as the first IO protocol according to the configuration message.

15. The external device according to claim 13 or 14, wherein, the first interface module is further configured to: Receive a PCIE message sent by the physical host, where the PCIE message is used to indicate that there is an IO request to be processed by the external device; Send an interrupt request to a processor in the external device according to the PCIE message; The obtaining module is specifically configured to: Synchronize the queue information in the virtual machine storage space to the storage space of the external device through the first interface module according to the interrupt request.

16. The external device according to any one of claims 13 to 15, wherein, the obtaining module is specifically configured to: Directly call the storage access DMA technology to instruct the first interface module to synchronize the queue information in the storage space of the virtual machine to the storage space of the external device.

17. The external device according to any one of claims 13 to 16, wherein, the external device further includes: A first storage module, configured to store the number of IO requests processed by the first IO interface; A loading module, configured to reload the first IO protocol when the number of IO requests is 0.

18. The external device according to any one of claims 13 to 17, wherein, the obtaining module is further configured to: Obtain an IO response corresponding to the IO request from the storage server or the network server; The external device further includes: A second storage module, configured to store the IO response to the storage space of the virtual machine through the first interface module.

19. The external device according to claim 18, wherein, the second storage module is specifically configured to: Through the DMA technology, instruct the first interface module to store the IO response in the storage space of the virtual machine.

20. The external device according to claim 18 or 19, wherein, the first storage module is further configured to: store the IO responses corresponding to multiple said IO requests in the storage space of the virtual machine; the first interface module is further configured to: send a notification message to the physical host, the notification message being used to notify the physical host that multiple said IO requests have been processed.

21. A physical host, wherein, the physical host includes a storage module and a second interface module, wherein: the second interface module is an interface supporting the Peripheral Component Interconnect Express (PCIE) protocol of the high-speed serial computer expansion bus standard, and is used for communicating with an external device; the storage module is used for storing one or more input / output (IO) requests sent by a virtual machine running on the physical host in the storage space of the virtual machine; the second interface module is used for synchronizing one or more IO requests in the storage space of the virtual machine to the storage space of the external device.

22. The physical host according to claim 21, wherein, the second interface module is further configured to: send a PCIE message to the external device, the PCIE message being used to indicate that there are IO requests to be processed by the external device.

23. The physical host according to claim 21 or 22, wherein, the second interface module is further configured to: receive an IO response sent by the external device, the IO response corresponding to the IO request, and the IO response being obtained by the external device from a storage server or a network server.

24. The physical host according to any one of claims 21 to 23, wherein, the second interface module is further configured to: receive a notification message sent by the external device through the second interface module, the notification message being used to notify the physical host that multiple said IO requests have been processed.

25. A computer system, wherein, the computer system includes a physical host and an external device, wherein the external device is the external device according to any one of claims 13 to 20 above, and the physical host is the physical host according to any one of claims 21 to 24 above.

26. An external device, wherein, comprising: a processor, a first hardware interface, and a memory, the memory being used for storing a computer program, and the processor being used for calling and running the computer program from the memory to execute: synchronize queue information in the storage space of a virtual machine running on a physical host to the storage space of the external device through the first hardware interface, the queue information including one or more input / output (IO) requests sent by the virtual machine; send the one or more IO requests to a storage server or a network server for processing.

27. The external device according to claim 26, wherein, the processor is further configured to: Receive a configuration message for indicating that the protocol type of a first IO interface of the external device is configured as a first IO protocol. Multiple such first IO interfaces run on the first hardware interface. The first IO interface is a virtual interface of the first hardware interface and corresponds to the virtual machine, and is used to process one or more IO requests sent by the virtual machine to the first IO interface. The data type and / or data size of the one or more IO requests in the storage space of the virtual machine are associated with the first IO protocol. Configure the protocol type of the first IO interface as the first IO protocol according to the configuration message.

28. The external device according to claim 26 or 27, wherein, the first hardware interface is used for: receiving a PCIE message sent by the physical host, the PCIE message being used to indicate an IO request to be processed by the external device; sending an interrupt request to the processor; The processor is further used for: according to the interrupt request, synchronizing queue information in the storage space of the virtual machine to the storage space of the external device through the first hardware interface.

29. The external device according to any one of claims 26 to 28, wherein, the processor is specifically used for: indicating, through direct memory access (DMA) technology, the first hardware interface to synchronize queue information in the storage space of the virtual machine to the storage space of the external device.

30. The external device according to any one of claims 26 to 29, wherein, the processor is further used for: storing the number of IO requests processed by the first IO interface; when the number of IO requests is 0, reloading the first IO protocol.

31. The external device according to any one of claims 26 to 30, wherein, the processor is further used for: obtaining an IO response corresponding to the IO request from the storage server or the network server; storing the IO response in the storage space of the virtual machine through the first hardware interface.

32. The external device according to claim 31, wherein, the processor is specifically used for: indicating, through DMA technology, the first hardware interface to store the IO response in the storage space of the virtual machine.

33. The external device according to claim 31 or 32, wherein, the processor is further used for: when storing IO responses corresponding to multiple IO requests in the storage space of the virtual machine through the first hardware interface, sending a notification message to the physical host through the first hardware interface, the notification message being used to notify the physical host that multiple IO requests have been processed.

34. A physical host, wherein, comprises: a processor, a second hardware interface and a memory. The memory is used to store a computer program, and the processor is used to call and run the computer program from the memory to execute: Store one or more input / output (IO) requests issued by a virtual machine running on the physical host in the storage space of the virtual machine; The second hardware interface is used to synchronize one or more IO requests in the storage space of the virtual machine to the storage space of an external device.

35. The physical host according to claim 34, wherein, The second hardware interface is further used for: Sending a PCIE message to the external device, where the PCIE message is used to indicate an IO request to be processed by the external device.

36. The physical host according to claim 34 or 35, wherein, The second hardware interface is further used for: Receiving an IO response sent by the external device, where the IO response corresponds to the IO request, and the IO response is obtained by the external device from a storage server or a network server.

37. The physical host according to any one of claims 34 to 36, wherein, The second hardware interface is further used for: Receiving a notification message sent by the external device, where the notification message is used to notify the physical host that multiple said IO requests have been processed.

38. A computer system, wherein, The computer system includes a physical host and an external device, wherein the external device is the external device according to any one of claims 26 to 33 above, and the physical host is the physical host according to any one of claims 34 to 37 above.

39. A computer-readable storage medium, wherein, It includes a computer program, and when the computer program runs on a computer, it causes the computer to execute the method according to any one of claims 1 to 8 or any one of claims 9 to 12.

40. A computer program product, wherein, It includes computer program code, and when the computer program code runs on a computer, the method according to any one of claims 1 to 8 or any one of claims 9 to 12 is executed.

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