Task optimization scheduling method for power grid complex stability control simulation model

Abstract

The invention discloses a task optimization scheduling method for a power grid complex stability control simulation model, and relates to the technical field of task optimization scheduling, and the method comprises the steps: 1, constructing a system model module, 2, constructing a system task analysis module, 3, constructing a partition scheduling analysis module, 4, constructing an algorithm analysis module, and 5, constructing a global scheduling analysis module. Based on a stability control device strategy file, a stability control system model is constructed, and according to a data transmission weight between tasks, digital representation of the stability control system is realized, a basis is provided for subsequent task scheduling, more efficient parallel execution is realized, the utilization rate of system resources is optimized, and the real-time response capability of the system is enhanced. The stability and the performability of the scheduling algorithm are verified, a theoretical basis is provided for optimization of the scheduling algorithm in practical application, and the problem that the scheduling feasibility cannot be effectively predicted in a traditional method is solved.

Description

Technical Field

[0001] The present invention relates to the technical field of task optimization scheduling, and particularly relates to a task optimization scheduling method for a complex power grid stability control simulation model. Background Art

[0002] The large power grid security and stability control system, abbreviated as the "stability control system", is an important foundation for ensuring the safe and stable operation of the power grid, providing strong support for energy security and power supply. With the advancement of the construction of the new power system, the stability control system shows the characteristics of large scale and strong coupling. The large-scale and strongly coupled complex stability control system is facing new challenges in terms of safe and stable operation. Due to reasons such as the defects of the stability control device itself and problems in the secondary circuit, the stability control device has repeatedly experienced refusal to operate or misoperation. In addition, there are also certain limitations in the hardware-in-the-loop simulation test verification method based on the actual hardware access of the stability control device. By establishing a simulation model of the power grid security and stability control system and simulating it in a simulation environment, not only can the security of the system be calculated and evaluated more accurately, but also the ability to conduct post-event analysis of complex fault events is available. The simulation verification calculation tasks are becoming increasingly heavy, and the amount of data and calculations required are increasing sharply, posing higher requirements for the calculation accuracy and efficiency of the simulation system. To address such challenges, researching the task scheduling strategy in a multi-processor system has become the key. By reasonably allocating calculation tasks to different CPU processors, load balancing is achieved, and the utilization of computing resources is optimized, thereby improving the overall calculation efficiency. Therefore, in-depth research on the task scheduling method of the multi-processor system is of great significance for improving the calculation efficiency and accuracy of the power grid stability control simulation system.

[0003] The prior art, such as an invention patent application with the publication number of CN117648194B, discloses an energy consumption-aware scheduling method and system for non-precise hybrid critical tasks with resource constraints, which relates to the technical field of hybrid critical system scheduling. It includes: S1. Establish a task model of fixed-priority non-precise hybrid critical tasks for a multi-processor platform. S2. According to the task model, propose a priority ceiling protocol for non-precise hybrid critical multi-processors. S3. According to the priority ceiling protocol, obtain the sufficient conditions for schedulability of the task set when the system is in the low mode, high mode, and mode transition period. S4. According to the sufficient conditions for schedulability, map the task set in the system to each processor of the multi-processor platform through the critical-level-aware worst-fit utilization division algorithm. S5. According to the tasks mapped to each processor and the sufficient conditions for schedulability, calculate the optimal energy-saving scheduling speed of each processor of the multi-processor platform so that each processor executes tasks at the optimal energy-saving scheduling speed.

[0004] As can be seen from the above-mentioned solutions, a task optimization scheduling method for a complex power grid stability control simulation model in the prior art can meet the basic requirements, but there are also some potential defects and challenges, which are specifically reflected in the following aspects:

[0005] 1. In the prior art, there is little attention paid to constructing a more comprehensive, stable and efficient multi-core scheduling algorithm to ensure higher simulation accuracy and real-time performance in the task allocation process of the whole-process simulation system. It is impossible to accurately simulate the stability control of the power system through high-performance parallel processing and real-time digital simulation technology, thus reducing the operation efficiency of the stability control system, affecting the task scheduling and resource allocation strategies, reducing the economy and overall effectiveness of the system operation, and making it difficult to comprehensively and objectively describe the behavior characteristics of the stability control simulation system. Due to the lack of standardized and systematic digital models, the current stability control simulation system cannot fully simulate the actual operation characteristics and complexity of the system. This limitation makes it impossible to accurately reflect the dynamic response of the stability control device and its performance in diverse operation scenarios during the simulation process, thus affecting the accuracy and reliability of the simulation results.

[0006] 2. In the prior art, there is a lack of attention to the integrity and adaptability of the scheduling scheme. Especially for the problem that the partition scheduling may fail in extreme cases, it reduces the task scheduling situation and the problem of the system achieving stable operation through global optimization. For the simulation task scheduling of complex system models, there are no effective scheduling algorithms and schedulability analysis methods, which cannot meet the requirements of complex stability control systems for multi-task scheduling and resource optimization. Existing research has not yet formed an effective solution for how to reasonably allocate simulation tasks, improve the load balance of multi-processor systems, and optimize the utilization rate of computing resources. Summary of the Invention

[0007] The purpose of the present invention is to provide a task optimization scheduling method for a complex power grid stability control simulation model, which solves the problems existing in the background technology.

[0008] To solve the above technical problems, the present invention adopts the following technical solutions: The present invention provides a task optimization scheduling method for a complex power grid stability control simulation model, including: Step 1, constructing a system model module; Step 2, a system task analysis module; Step 3, a partition scheduling analysis module; Step 4, an algorithm analysis module; and Step 5, a global scheduling analysis module.

[0009] Step 1, constructing a system model module: Based on the stability control device strategy file, construct a stability control system model.

[0010] Step 2, a system task analysis module: According to the data transmission weights between tasks, perform partition scheduling on system tasks.

[0011] Step 3, Partition Scheduling Analysis Module: Analyze the access competition of tasks on shared memory among different cores, and deduce and study the schedulability analysis under partition scheduling.

[0012] Step 4, Algorithm Analysis Module: Re-optimize the research on the global scheduling algorithm.

[0013] Step 5, Global Scheduling Analysis Module: Study the schedulability analysis of the global scheduling algorithm under the memory priority strategy during scheduling.

[0014] Furthermore, it is characterized in that for the construction of the stability control system model, the specific analysis method is as follows: The modeling of the stability control strategy is realized through a general description method to obtain a strategy table file. The strategy table file includes fixed values, input and output signals, and the data transmission between stability control devices is modeled and described by using the strategy table file of the stability control device. All the command exchanges between stations are extracted from the strategy information described in the control strategy files of each device. According to the definition of the execution strategy in the stability control device control strategy, and according to the actual situation, corresponding strategy weights are assigned to each strategy command.

[0015] In the system model, each task is an independent periodic task, and operations are performed according to a preset fixed cycle. At the start moment of each cycle, the task node first accesses the shared memory, detects whether it has received a decision instruction from other task nodes, and according to the decision information in the shared memory, the task node determines the execution strategy within the current cycle and conducts corresponding operations accordingly, realizing the collaborative response between system tasks and the reasonable allocation of resources.

[0016] Use G=(N, E, W N , W E ) to represent the simulation model of the stability control system, including the node set N={n 1 , n 2 ,......, n k}, each node represents the simulation task of a stability control device, and the edge set Each edge represents that there is data exchange between two simulation models, and the node weight represents the calculation time consumed by the internal cycle of the station, and the edge weight is defined as the sum of the weights of the execution strategies between two stations.

[0017] Furthermore, it is characterized in that the partition scheduling of system tasks is specifically analyzed as follows: Based on the task model of the stability control simulation system, a task allocation algorithm is proposed to reduce the communication cost between tasks. By optimizing the node allocation strategy, tasks with higher communication costs are allocated to the same core. The algorithm first allocates the node with the largest sum of edge weights with adjacent nodes, and then allocates the node with the largest edge weight with it among its adjacent nodes and places them in the same core until the utilization rate of the core reaches a certain upper limit. Repeat the operation until all tasks are allocated to the corresponding nodes.

[0018] During the execution of the algorithm, the preparatory work is first completed. Next, the algorithm will find the node with the largest sum of edge weights with adjacent nodes and preferentially allocate it to the core. The algorithm continues to allocate the node with the largest edge weight with the current node and ensures that this process meets the limit of the core utilization rate and continues until all nodes are successfully allocated to the corresponding cores.

[0019] Furthermore, it is characterized in that the schedulability analysis of the derivation research under partition scheduling is specifically analyzed as follows: In a multi-core system, the N simulation tasks in the task model proposed in step 1 are allocated to m M 1 ,...,M m homogeneous cores, and assuming that the partition scheduling proposed in step 2 is used, all these N simulation tasks are completed within the specified period, and its task model is defined as τ i =(C i ,T i ,I i )(1≤i≤n), where C i represents the worst-case execution time of the task, T i represents the period of the task, and it is assumed that all tasks have implicit deadlines.

[0020] Analyze the hyper-period H of the task set: H = lcm{T i |i = 0,...,n - 1}, from which it can be obtained that the number of executions of task τ i within a hyper-period H is: Taking the hyper-period as a scheduling period of the task set, the utilization rate i of task τ is given by C i / T i . Then, the utilization rate of a core M k is Similarly, the utilization rate of the entire task set is I i is included in the execution time C i of task τ i and represents task τi The time required to perform read / write operations. If the requested resource is being occupied by other tasks, or when the task is accessing a certain hardware resource, other tasks cannot access the resource simultaneously, thus resulting in the corresponding interference time I for the tasks running on other cores. i , I i refers to the time required for a task to access shared hardware resources. Although I i is part of the task execution time C i , during the process of the task accessing shared resources, I i also represents the possible delays that tasks on other cores may encounter. Considering both read and write operations as a whole and placing them at the beginning of the execution phase means that before each cycle of task execution, the shared memory is first read to obtain the corresponding information, and then the corresponding calculation operations are carried out.

[0021] The binary matrix W is an n×n matrix. Starting from any unit time t within a supercycle H, W ij (t) represents the interference impact on τ i on τ j . If W ij (t)>0 indicates interference. Conversely, if W ij (t) = 0, it means there is no interference. Through the matrix W, it can be seen the additional calculation time that a task τ i must increase due to the interference of tasks running on other cores within H. Combining the interference conditions between tasks, the following matrix properties can be obtained: a. If two tasks are assigned to the same core, then there is no interference between them, that is, for any t = 0, 1,..., H - 1, both W ij (t) = 0 and W ji (t) = 0.

[0022] b. If there is no information exchange between two tasks or the I i of task τ i = 0, that is, there is no interference situation, then for any t = 0, 1,..., H - 1, both W ij (t) = 0 and W ji (t) = 0.

[0023] Finally, it can be obtained that the concurrent interference execution time is the total interference on τ i caused by tasks running on other cores throughout the supercycle, which can be calculated through the matrix W as follows:

[0024] Further, it is characterized in that the research on the optimized global scheduling algorithm, and its specific analysis method is as follows: The rule description of the memory-priority global scheduling strategy includes: The first rule: To prevent multiple cores from accessing memory simultaneously, which may lead to a decrease in the task execution rate, at most only one core is allowed to access memory. If there are multiple tasks ready to execute the memory stage, the tasks with lower priority will be blocked and unable to execute.

[0025] The second rule: The priority of the memory stage is higher than that of the execution stage. Among the tasks dynamically executing the memory stage, their priority will be elevated to be higher than all tasks that have not accessed memory. The relative priority among memory-stage tasks remains unchanged. Therefore, tasks with a pending memory stage will always preempt tasks in the execution stage, unless this conflicts with the first rule.

[0026] The third rule: The task priority is dynamically allocated according to the earliest deadline first scheduling algorithm. Tasks with shorter periods have higher system priorities, and thus will always be executed prior to all pending tasks with longer periods, unless this conflicts with the first or second rule.

[0027] Further, it is characterized in that the schedulability analysis of the global scheduling algorithm under the memory-priority strategy during scheduling, and its specific analysis method is as follows: In the scheduling strategy, tasks are divided into a memory stage and an execution stage, and then the upper bound of the response time is obtained by analyzing the response time of each stage, and then the workload within a fixed time interval is calculated. Define a function F m (t), which takes the length of the time interval t as input and can be expressed as: The workload of the memory stage can be calculated as: where N(L) is the number of tasks in the time interval L, and its calculation method is: and l represents the duration of the last released task: l = L + T - S - C - N(L)*T. Similarly, define the function F e (t) can be formally expressed as: The workload of the execution stage can be expressed as: The number of tasks N(L) is: Finally, l can be written as: l = L + T - S - C + m - N(L)*T. The expression for the upper bound of the response time of the memory stage of the task is: The expression for the upper bound of the response time of the execution stage memory is: The response time R i of task τ i is: R i = min{R m (m) + R e (e), R m (m) + e, R e (e) + m}.

[0028] The beneficial effects of the present invention are as follows: 1. Based on the strategy file of the stability control device, a stability control system model is constructed, and according to the data transmission weights between tasks, the system tasks are partitioned and scheduled. By analyzing the specific structure and task dependency relationship of the stability control system, the system elements are abstracted into a graph model to accurately describe the data transmission and dependency structure between simulation tasks, realizing the digital representation of the stability control system and providing a basis for subsequent task scheduling.

[0029] 2. Regarding the access competition of tasks with different kernels to shared memory, the schedulability analysis under partition scheduling is deduced and studied. For the task scheduling algorithm of the stability control system simulation platform, a task scheduling algorithm suitable for the stability control system simulation platform is designed. This algorithm comprehensively considers task dependencies, resource competition, and communication requirements. By allocating tasks to multi-core processors, more efficient parallel execution is achieved, the utilization rate of system resources is optimized, and the real-time response ability of the system is enhanced, showing higher stability and execution efficiency among similar scheduling algorithms.

[0030] 3. The global scheduling algorithm research is re-optimized, and the schedulability analysis of the global scheduling algorithm under the memory priority strategy during scheduling is studied. For the schedulability analysis method of the task scheduling algorithm in a multi-core processor environment, by comprehensively considering shared memory access conflicts and resource competition in a multi-core system, the schedulability conditions of tasks in a complex environment are deduced, verifying the stability and executability of the scheduling algorithm, providing a theoretical basis for the optimization of the scheduling algorithm in practical applications, and optimizing the problem that the traditional method cannot effectively predict the scheduling feasibility. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] In order to more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the following will briefly introduce the drawings required for the description of the embodiments or the prior art. Obviously, the following drawings are only some embodiments of the present invention. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0032] Figure 1 It is a schematic flowchart of the implementation steps of the method of the present invention.

[0033] Figure 2 It is an example of the strategy file of the stability control device.

[0034] Figure 3 It is an example of the simulation task model in the stability control system.

[0035] Figure 4 It is the pseudocode of the task partition scheduling algorithm.

[0036] Figure 5Schematic diagram of the relationship between task memory access time and execution time.

[0037] Figure 6 Pseudocode for the global task scheduling algorithm. Specific implementation mode

[0038] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the protection scope of the present invention.

[0039] Refer to Figure 1 As shown, the present invention provides a task optimization scheduling method for a complex power grid stability control simulation model, including: Step 1, constructing a system model module; Step 2, a system task analysis module; Step 3, a partition scheduling analysis module; Step 4, an algorithm analysis module; and Step 5, a global scheduling analysis module.

[0040] Step 1, constructing a system model module: Based on the stability control device strategy file, construct a stability control system model.

[0041] In the above embodiment, it is characterized in that for the construction of the stability control system model, the specific analysis method is: Modeling the stability control strategy through a general description method to obtain a strategy table file, as Figure 2 shown, where the strategy table file includes setting values, input and output signals, and uses the strategy table file of the stability control device to model and describe the data transmission between the stability control devices. Extract all the command exchanges between stations from the strategy information described in the control strategy files of each device, and according to the definition of the execution strategy in the stability control device control strategy, and assign corresponding strategy weights to each strategy command according to the actual situation.

[0042] It should be noted that the execution strategies can be divided into a total of ten types, such as generator tripping and load shedding. The data exchange volume and exchange frequency of each strategy command are different.

[0043] In the system model, each task is an independent periodic task, and performs operations according to a preset fixed period. At the start moment of each period, the task node first accesses the shared memory, detects whether it has received a decision instruction from other task nodes, and according to the decision information in the shared memory, the task node determines the execution strategy in the current period and performs corresponding operations accordingly to achieve the collaborative response between system tasks and the reasonable allocation of resources.

[0044] Use G=(N,E,W N ,W E) represents the simulation model of the stability control system, such as Figure 3 shown, including the node set N = {n 1 , n 2 ,......, n k}, each node represents the simulation task of a stability control device, and the edge set Each edge indicates that there is data exchange between two simulation models, and the node weight represents the time-consuming of the internal cycle calculation of the station, and the edge weight is defined as the sum of the weights of the execution policies between two stations.

[0045] Step 2, System Task Analysis Module: Perform partition scheduling on system tasks according to the data transfer weights between tasks.

[0046] In the above embodiment, it is characterized in that the specific analysis method for performing partition scheduling on system tasks is: based on the stability control simulation system task model, a task allocation algorithm is proposed to reduce the communication cost between tasks, and by optimizing the node allocation strategy, tasks with higher communication costs are allocated to the same core. The algorithm first allocates the node with the largest sum of edge weights with adjacent nodes, then allocates the node with the largest edge weight with it among its adjacent nodes, and places them in the same core until the utilization rate within the core reaches a certain upper limit, and repeats the operation until all tasks are allocated to the corresponding nodes, as Figure 4 shown.

[0047] It should be noted that tasks with higher communication costs are nodes with larger adjacent edge weights.

[0048] During the execution of the algorithm, the preparatory work is first completed. Next, the algorithm will find the node with the largest sum of edge weights with adjacent nodes and preferentially allocate it to the core. The algorithm continues to allocate the node with the largest edge weight with the current node and ensures that this process meets the limit of the utilization rate within the core, and continues until all nodes are successfully allocated to the corresponding cores.

[0049] It should be noted that the preparatory work is first completed, and this process includes the extraction of policy information and the construction of the task model, for lines 1 to 5.

[0050] It should be noted that preferentially allocating it to the core is for lines 13 to 16.

[0051] It should be noted that ensuring that this process meets the limit of the utilization rate within the core is for lines 19 and 20.

[0052] Based on the strategy file of the stability control device, a stability control system model is constructed, and according to the data transmission weights between tasks, the system tasks are partitioned and scheduled. By analyzing the specific structure and task dependencies of the stability control system, the system elements are abstracted into a graph model to accurately describe the data transmission and dependency structure between simulation tasks, realizing the digital representation of the stability control system and providing a basis for subsequent task scheduling.

[0053] Step 3, Partition Scheduling Analysis Module: Analyze the access competition of tasks on different cores to the shared memory, and deduce and study the schedulability analysis under partition scheduling.

[0054] In the above embodiment, it is characterized in that the specific analysis method for the deduced and studied schedulability analysis under partition scheduling is as follows: In a multi-core system, allocate the N simulation tasks in the task model proposed in Step 1 to m M 1 ,...,M m homogeneous cores, and assume that the partition scheduling proposed in Step 2 is used. All these N simulation tasks are completed within the specified period, and their task model is defined as τ i =(C i ,T i ,I i )(1≤i≤n), where C i represents the worst-case execution time of the task, T i represents the period of the task, and it is assumed that all tasks have implicit deadlines.

[0055] It should be noted that the worst-case execution time of the task is represented as WCET.

[0056] It should be noted that the deadline of the task is equal to their period.

[0057] It should be noted that for the partition scheduling proposed in Step 2, once a task is assigned to a certain core, it is not allowed to be reassigned to other cores to reduce migration costs such as context restoration.

[0058] Analyze the hyperperiod H of the task set: H = lcm{T i |i = 0,...,n - 1}, from which it can be obtained that the number of executions of task τ i within a hyperperiod H is: Taking the hyperperiod as a scheduling period of the task set, the utilization rate i of task τ is given by C i / T i , then, the utilization rate of one core M k is Similarly, the utilization rate of the entire task set is AsFigure 5 As shown, I i is included in the execution time C of task τ i which represents the time required for task τ i to perform read / write operations. If the requested resource is being occupied by other tasks, or when the task is accessing a certain hardware resource, other tasks cannot access the resource simultaneously, thus resulting in corresponding interference time I i for the tasks running on other cores. I i refers to the time consumed by the task when accessing shared hardware resources. Although I i is part of the task execution time C i , during the process of the task accessing shared resources, I i also represents the possible delays that tasks on other cores may encounter. Considering both read and write operations as a whole and placing them at the beginning of the execution stage means that before each cycle of task execution, the shared memory is first read to obtain the corresponding information, and then the corresponding calculation operations are performed. i

[0059] It should be noted that the interference time can be regarded as a quantification of the delays caused to other tasks.

[0060] It should be noted that the hyperperiod H of the task set, that is, the minimum time interval for the repetition of each task in the task set, is also the least common multiple of the periods of each task.

[0061] The binary matrix W is an n×n matrix. Starting from any unit time t within a hyperperiod H, W ij (t) represents the interference impact of τ i on τ j . If W ij (t)>0, it indicates interference. Conversely, if W ij (t) = 0, it means there is no interference. Through the matrix W, it can be seen that the additional computing time that a task τ i must increase due to the interference of tasks running on other cores within H. Combining the interference conditions between tasks, the matrix properties are obtained as follows: a. If two tasks are assigned to the same core, then there is no interference between them, that is, for any t = 0, 1,..., H - 1, both W ij (t) = 0 and W ji (t) = 0.

[0062] b. If there is no information exchange between two tasks or the I i of task τ i = 0, that is, there is no interference situation, then for any t = 0, 1,..., H - 1, both W ij (t) = 0 and W​ji \((t) = 0\).

[0063] Finally, it can be obtained that the concurrent interference execution time is the sum of the interferences to \(\tau\) caused by the tasks running on other cores throughout the supercycle i and can be calculated through the matrix \(W\):

[0064] Step 4, Algorithm Analysis Module: Re-optimize the research on the global scheduling algorithm.

[0065] In the above embodiment, it is characterized in that the specific analysis method of the optimized global scheduling algorithm research is as follows: The rule description of the memory-first global scheduling strategy includes: The first rule: To prevent multiple cores from accessing the memory simultaneously, which may lead to a decrease in the task execution rate, at most only one core is allowed to access the memory. If there are multiple tasks ready to execute the memory stage, the tasks with lower priorities will be blocked and unable to execute.

[0066] The second rule: The priority of the memory stage is higher than that of the execution stage. Among the tasks dynamically executing the memory stage, their priorities will be elevated to be higher than all tasks that have not accessed the memory. The relative priorities among the memory stage tasks remain unchanged. Therefore, tasks with a pending memory stage will always preempt tasks in the execution stage, unless this conflicts with the first rule.

[0067] The third rule: Task priorities are dynamically assigned according to the Least Laxity First (LLF) scheduling algorithm. Tasks with shorter periods have higher system priorities and will therefore always be executed prior to all pending tasks with longer periods, unless this conflicts with the first or second rule.

[0068] It should be noted that since partitioned scheduling does not work, global scheduling is re-performed on non-schedulable tasks. Referring to the task model mentioned in step 3, the LLF scheduling algorithm is used to dynamically assign priorities to each task. Among them, task \(\tau\) 1 has the highest priority, and the subset of tasks with priorities higher than task \(\tau\) i is denoted as \(hp(i)\).

[0069] It should be noted that due to the impact of memory access latency on system performance, scheduling algorithms that prioritize memory access are considered during task scheduling.

[0070] It should be noted that the scheduling algorithm that prioritizes memory access during task scheduling is the memory-first global scheduling strategy.

[0071] It should be noted that the Least Laxity First scheduling algorithm is denoted as LLF.

[0072] It should be noted that according to the first, second, and third rules, when a task requires a memory stage, the following several results occur, which specifically depend on the status of the currently running task. The first case is that if all cores are in the execution stage of other tasks but the memory has no core occupancy, the memory stage will be immediately started, preempting the execution stage with the lowest task priority among all cores. This is because according to Rule 2, the running priority of the memory stage is always higher than any execution stage. The second case is that if the memory is fully occupied and the priority of the pending memory stage is higher than the lowest-priority task in the currently running memory stage, this task will preempt the memory stage with the lowest priority. The third case is that if the memory is not fully occupied and one or more cores are idle, the memory stage can be immediately started on an idle core. In all other cases, the current memory stage cannot be executed and the task will be blocked.

[0073] It should be noted that as Figure 6 shown, the implementation steps of the memory-priority global scheduling strategy are presented. Within the supercycle loop of the task set, tasks are first dynamically assigned priorities, with line 5, and tasks in the memory execution stage are preferentially processed within each time slice, with lines 6 - 10. These tasks will preferentially obtain memory resources. The algorithm calculates the number of available execution-stage cores, and then schedules all tasks in the execution stage to execute on the remaining cores, with lines 12 - 16. By dynamically adjusting the allocation of memory and execution resources, the algorithm effectively manages the memory bandwidth and the execution order of tasks to maximize the system's performance and responsiveness.

[0074] The access competition of tasks among different cores to shared memory is deduced and studied for schedulability analysis under partitioned scheduling. For the task scheduling algorithm of the stability control system simulation platform, a task scheduling algorithm suitable for the stability control system simulation platform is designed. This algorithm comprehensively considers task dependencies, resource competition, and communication requirements. By allocating tasks to multi-core processors, it achieves more efficient parallel execution, optimizes the utilization of system resources, enhances the real-time response ability of the system, and shows higher stability and execution efficiency among similar scheduling algorithms.

[0075] Step 5, Global Scheduling Analysis Module: Study the schedulability analysis of the global scheduling algorithm under the memory-priority strategy during scheduling.

[0076] In the above embodiment, the specific analysis method for the schedulability analysis of the global scheduling algorithm under the memory-priority strategy during scheduling is as follows: In the scheduling strategy, tasks are divided into a memory stage and an execution stage, and then the upper bound of the response time is obtained, the response times of each stage are analyzed, and then the workload within a fixed time interval is calculated. A function F is defined. m(t), which takes the length of the time interval t as input and can be expressed as: The workload in the memory stage can be calculated as: where N(L) is the number of tasks in the time interval L, which is calculated as: and l represents the duration of the last out-of-position task: l = L + T - S - C - N(L)*T. Similarly, the function F e (t) can be formally expressed as: The workload in the execution stage can be expressed as: The number of tasks N(L) is: Finally, l can be written as: l = L + T - S - C + m - N(L)*T. The upper bound expression for the memory stage response time of the task is: The upper bound expression for the memory response time in the execution stage is: Obtain the task τ i 's response time R i is: R i = min{R m (m) + R e (e), R m (m) + e, R e (e) + m}.

[0077] It should be noted that the memory stage and the execution stage interfere with each other in different ways. First, for each task, the execution stage response operation will only be performed after its memory stage is completed. Second, interference only occurs when the stages of two tasks are the same.

[0078] It should be noted that the task is regarded as a single memory / execution stage, rather than the sum of each stage.

[0079] Re-optimize the research on the global scheduling algorithm, study the schedulability analysis of the global scheduling algorithm under the memory-first strategy during scheduling, and aim at the schedulability analysis method of the task scheduling algorithm in a multi-core processor environment. By comprehensively considering the shared memory access conflict and resource competition in the multi-core system, the schedulability conditions of tasks in a complex environment are derived, the stability and executability of the scheduling algorithm are verified, providing a theoretical basis for the optimization of the scheduling algorithm in practical applications, and optimizing the problem that the traditional method cannot effectively predict the scheduling feasibility.

[0080] The above content is only an example and explanation of the concept of the present invention. Those skilled in the art of this technology can make various modifications or supplements to the described specific embodiments or use similar methods to replace them. As long as they do not deviate from the concept of the invention or exceed the scope defined by the present invention, they should all fall within the protection scope of the present invention.

Claims

1. A task optimization scheduling method for a complex power grid stability simulation model, characterized in that: include: Step 1: Construct a system model module: construct a stabilization control system model based on the stabilization control device strategy file; Step 2, system task analysis module: partition and schedule system tasks according to the data transmission weight between tasks; Step 3, partition scheduling analysis module: the access competition of tasks in different cores to shared memory, and the derivation and research of schedulability analysis under partition scheduling; Step 4, Algorithm analysis module: Re-optimize the global scheduling algorithm research; Step 5, global scheduling analysis module: study the schedulability analysis of the global scheduling algorithm under the memory priority strategy during scheduling.

2. The task optimization scheduling method for a complex power grid stability control simulation model according to claim 1 is characterized in that: The specific analysis method of constructing the stability control system model is as follows: The modeling of the stabilization control strategy is realized by a general description method to obtain a strategy table file, wherein the strategy table file includes fixed values, input and output signals, and the strategy table file of the stabilization control device is used to model and describe the data transmission between the stabilization control devices, and the command exchange between all stations is extracted from the strategy information described in the control strategy file of each device, and the definition of the execution strategy of the stabilization control device control strategy is used, and the corresponding strategy weight is assigned to each strategy command according to the actual situation; In the system model, each task is an independent periodic task, which is executed according to a preset fixed period. At the start of each period, the task node first accesses the shared memory to detect whether it has received a decision instruction from other task nodes. Based on the decision information in the shared memory, the task node determines the execution strategy in the current period and carries out corresponding operations accordingly to achieve coordinated response and reasonable resource allocation among system tasks. Use G=(N,E,W N ,W E ) represents the simulation model of the stability control system, including the node set N = {n1, n2, ..., n k }, each node represents a simulation task of a stabilization device, and the edge set Each edge indicates that there is data exchange between two simulation models, and the node weight Indicates the time consumed for internal cycle calculation of the station, edge weight Defined as the sum of the weights of the enforcement policies between two sites.

3. The task optimization scheduling method for a complex power grid stability control simulation model according to claim 1 is characterized in that: The specific analysis method for partition scheduling of system tasks is as follows: Based on the task model of the stability control simulation system, a task allocation algorithm is proposed to reduce the communication cost between tasks. By optimizing the node allocation strategy, tasks with higher communication costs are allocated to the same core. The algorithm prioritizes the node with the largest sum of edge weights with adjacent nodes, and then allocates the node with the largest edge weight among its adjacent nodes and puts it in the same core until its core utilization reaches a certain upper limit. The operation is repeated until all tasks are assigned to the corresponding nodes. During the execution of the algorithm, the preparatory work is completed first. In the next step, the algorithm will find the node with the largest sum of edge weights with adjacent nodes and give priority to core allocation. The algorithm continues to allocate the node with the largest edge weight with the current node and ensures that this process meets the core utilization limit and continues until all nodes are successfully allocated to the corresponding core.

4. The task optimization scheduling method for a complex power grid stability control simulation model according to claim 1 is characterized in that: The derivation studies the schedulability analysis under partition scheduling, and the specific analysis method is as follows: In a multi-core system, the N simulation tasks in the task model proposed in step 1 are assigned to m M1,...,M m Homogeneous cores, and assuming the partition scheduling proposed in step 2, these N simulation tasks are completed within the specified period, and their task model is defined as τ i =(C i ,T i ,I i )(1≤i≤n), where C i It represents the worst execution time of the task, T i It represents the period of the task, and by default all tasks have an implicit deadline; The super period H of the analysis task set: H = lcm{T i |i=0,...,n-1}, thus we can get that task τ i The number of executions in a supercycle H is: Taking the super cycle as a scheduling cycle of the task set, the task τ i Utilization rate By C i / T i Given, then, a kernel M k The utilization rate is Similarly, the utilization of the entire task set is I i Included in the task τ i The execution time of C i In the example, it represents the task τ i The time required to perform a read / write operation. If the requested resource is occupied by other tasks, or when the task is accessing a hardware resource, other tasks cannot access the resource at the same time, which will cause corresponding interference time to tasks running on other cores. i , I i Refers to the time it takes for a task to access shared hardware resources. i is the task execution time C i However, during the task access to shared resources, I i It also indicates the delays that tasks on other cores may encounter. The read and write operations are considered as a whole and placed at the beginning of the execution phase, indicating that before each periodic task is executed, it first reads the shared memory to obtain the corresponding information and then performs the corresponding calculation operation; The binary matrix W is an n×n matrix. Starting at any unit time t within a superperiod H, W ij (t) represents τ i For τ j If W ij (t)>0 means there is interference. Otherwise, if W ij (t) = 0 means no interference. Through the matrix W, we can see that a task τ i The computation time that must be increased in H due to the interference of tasks running on other cores, combined with the interference conditions between tasks, leads to the matrix properties: a. If two tasks are assigned to the same core, there is no interference between them, that is, for any t = 0, 1, ..., H-1, there is W ij (t) = 0 and W ji (t) = 0; b. If there is no information exchange between the two tasks or task τ i I i =0, that is, there is no interference, then for any t=0,1,...,H-1, there is also W ij (t) = 0 and W ji (t) = 0; Finally, we can get the concurrent interference execution time is the impact of tasks running on other cores during the entire hypercycle on τ i The sum of interference can be calculated by matrix W:

5. The task optimization scheduling method for a complex power grid stability control simulation model according to claim 1 is characterized in that: The specific analysis method of the optimized global scheduling algorithm is as follows: The rules of the memory priority global scheduling policy include: Rule 1: To prevent multiple cores from accessing the memory at the same time, which would result in a decrease in the task execution rate, only one core is allowed to access the memory. If multiple tasks are ready to execute the memory phase, the tasks with lower priority will be blocked and cannot be executed; Second rule: The priority of the memory stage is higher than the execution stage. In a task that is dynamically executing the memory stage, its priority will be raised to be higher than all tasks that are not performing memory access. The relative priority between memory stage tasks remains unchanged. Therefore, a task with a pending memory stage will always preempt a task in the execution stage unless this conflicts with the first rule. The third rule: Task priorities are dynamically assigned according to the latest slack time first scheduling algorithm. Tasks with shorter periods have higher system priorities and will therefore always be executed before all pending tasks with longer periods, unless this conflicts with the first or second rule.

6. The task optimization scheduling method for a complex power grid stability control simulation model according to claim 1 is characterized in that: The study is about the schedulability analysis of the global scheduling algorithm under the memory priority strategy during scheduling, and the specific analysis method is as follows: In the scheduling strategy, the task is divided into the memory stage and the execution stage, and then the upper bound of the response time is analyzed. Then, the workload within a fixed time interval is calculated and a function F is defined. m (t), the function takes the length of the time interval t as input and can be expressed as: The workload of the memory phase can be calculated as: Where N(L) is the number of tasks in the time interval L, which is calculated as: and l represents the duration of the last out-of-position task: l = L + TSCN(L) * T. Similarly, define the function F e (t) can be formally expressed as: The workload of the execution phase can be expressed as: The number of tasks N(L) is: Finally, l can be written as: l = L + TS-C + mN (L) * T, and the upper bound of the memory phase response time of the task is: The upper bound expression of memory response time in the execution phase is: Get the task τ i The response time R i For: R i =min{R m (m)+R e (e),R m (m)+e,R e (e)+m}.

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