Digital baseband and qubit manipulator for low-temperature qubit manipulation

Abstract

The present invention discloses a digital baseband and a qubit manipulator for low-temperature qubit manipulation. The digital baseband combines DDS and AWG modes, utilizing the DDS mode to achieve efficient frequency, phase, and amplitude adjustment, and the AWG mode to provide arbitrary waveform generation capabilities, thereby meeting the requirements of qubits when performing complex operations. Furthermore, since both the X-channel DDS module and the Y-channel DDS module of the XY driver have a digitally controlled oscillator, they can simultaneously generate independent digital intermediate frequency pulses, achieving frequency division multiplexing. This allows for direct output of simple sin waves, as well as reading waveform pulse data from the XY channel memory to output corresponding modulated pulse waveform data according to different requirements. Therefore, the present invention not only enables efficient and flexible qubit manipulation, but also enables multiple signals to share the same communication channel, optimizing channel utilization and thereby improving the overall transmission efficiency of the digital baseband.

Description

Technical Field

[0001] The present invention relates to the field of digital baseband technology, and in particular to a digital baseband and a quantum bit manipulator for low-temperature quantum bit manipulation. Background Art

[0002] In the process of developing quantum computing technology, one of the most core requirements is to achieve significant scale of quantum computing systems. However, the expansion and improvement of quantum control systems still face some challenges. For example, room-temperature equipment needs to be connected to cryogenic qubits via hundreds of coaxial cables, which greatly limits the scalability of the equipment. Although cryogenic CMOS integrated circuits operating in the temperature range of 1-4K can reduce the interconnection requirements of room-temperature measurement and control signals, improve the fidelity of qubit measurement and control, and realize the measurement and control of large-scale physical qubit arrays, and become one of the integrated solutions for quantum chip measurement and control systems, due to the different control requirements of different qubits and the significant performance differences and drift of the manufactured quantum arrays, the qubit manipulator needs to have high flexibility.

[0003] In cryogenic quantum control systems, the digital baseband plays a crucial role in qubit manipulators. It not only generates and controls the complex signals required for qubits, but also improves the speed and fidelity of manipulation, contributing to the construction of scalable quantum computing systems. However, all current qubit manipulators have a single digital baseband control mode, making it impossible to achieve highly flexible qubit manipulation. Summary of the Invention

[0004] In view of the above-mentioned deficiencies in the prior art, the purpose of the present invention is to provide a digital baseband for low-temperature quantum bit manipulation, which combines DDS and AWG modes in the digital baseband architecture, utilizes the DDS mode to achieve efficient frequency, phase and amplitude adjustment, and provides the ability to generate arbitrary waveforms through the AWG mode, thereby meeting the needs of quantum bits when performing complex operations and enabling highly flexible quantum bit manipulation.

[0005] The digital baseband for low-temperature quantum bit manipulation provided by the present invention comprises: a plurality of driver units; and each of the driver units comprises: an XY driver and a Z driver; wherein,

[0006] The XY drive includes:

[0007] XY channel memory, used to store waveform pulse data of X channel and Y channel;

[0008] An XY channel sequencer configured with an instruction set for coordinating sequence playback of X channels and Y channels;

[0009] and, X-channel DDS module and Y-channel DDS module, X-channel multiplexer and Y-channel multiplexer;

[0010] The X channel is composed of a DDS sub-channel and an AWG sub-channel, each serving as an input to the X-channel multiplexer; the Y channel is composed of a DDS sub-channel and an AWG sub-channel, each serving as an input to the Y-channel multiplexer; the X-channel DDS sub-channel is provided with waveform pulse data output by the X-channel DDS module alone or by the X-channel DDS module in conjunction with the XY-channel memory; the Y-channel DDS sub-channel is provided with waveform pulse data output by the Y-channel DDS module alone or by the Y-channel DDS module in conjunction with the XY-channel memory; and the X-channel and Y-channel AWG sub-channels are both provided with waveform pulse data output directly by the XY-channel memory.

[0011] The Z-driver comprises:

[0012] Z channel memory, used to store waveform pulse data of Z channel;

[0013] A Z-channel sequencer configured with an instruction set for coordinating sequential playback of the Z-channel;

[0014] The Z channel directly provides waveform pulse data output from the Z channel memory.

[0015] According to a specific embodiment, in the digital baseband for low-temperature quantum bit manipulation provided by the present invention, the X channel, the Y channel, and the Z channel of several of the driver units respectively output waveform data streams in parallel through corresponding parallel-to-serial interfaces.

[0016] According to a specific embodiment, in the digital baseband for low-temperature quantum bit manipulation provided by the present invention, the X-channel DDS module and the Y-channel DDS module each have a digitally controlled oscillator for simultaneously generating independent digital intermediate frequency pulses;

[0017] The X-channel DDS module and the Y-channel DDS module each have four adders and four multipliers; wherein the first adder is used to modulate the configured phase parameter onto the digital intermediate frequency pulse generated by the digitally controlled oscillator; the second adder is used to modulate the configured phase calibration parameter onto the waveform pulse data output by the first adder; the waveform pulse data output by the second adder is converted by a cosine function lookup table and input into the first multiplier; the waveform pulse data output by the first adder is converted by a sinine function lookup table and input into the second multiplier; the third multiplier is used to multiply the configured envelope parameter, I wave amplitude parameter, and Q wave amplitude parameter, and input the resultant value into the first multiplier to modulate the waveform pulse data converted by the cosine function lookup table; the fourth multiplier is used to multiply the configured envelope parameter, I wave amplitude parameter, and Q wave amplitude parameter, and input the resultant value into the second multiplier to modulate the waveform pulse data converted by the sinine function lookup table; the third adder is used to modulate the configured DC calibration parameter onto the waveform pulse data output by the first multiplier;

[0018] Furthermore, the fourth adder of the X-channel DDS module is used to modulate the waveform pulse data output by the second multiplier of the Y-channel DDS module onto the waveform pulse data output by the third adder of the X-channel DDS module; the fourth adder of the Y-channel DDS module is used to modulate the waveform pulse data output by the second multiplier of the X-channel DDS module onto the waveform pulse data output by the third adder of the Y-channel DDS module; and the waveform pulse data output by the fourth adders of the X-channel DDS module and the Y-channel DDS module are respectively output as the waveform pulse data of their respective DDS sub-channels.

[0019] According to a specific embodiment, in the digital baseband for cryogenic qubit manipulation provided by the present invention, the instruction set configured for the XY channel sequencer defines the duration, envelope parameters, I-wave amplitude parameters, Q-wave amplitude parameters, phase parameters, phase calibration parameters, and DC calibration parameters of each sequence; and the XY channel memory stores envelope parameters for waveform pulse data modulation of the X-channel DDS module and the Y-channel DDS module, respectively.

[0020] According to a specific embodiment, in the digital baseband for cryogenic qubit manipulation provided by the present invention, the numerically controlled oscillators of the X-channel DDS module and the Y-channel DDS module are configured to generate the same digital intermediate frequency pulse, and when the envelope parameters stored in the XY channel memory for waveform pulse data modulation of the X-channel DDS module are Gaussian envelopes and the envelope parameters for waveform pulse data modulation of the Y-channel DDS module are Gaussian derivative envelopes, the X and Y channels output DRAG pulse data.

[0021] According to a specific embodiment, in the digital baseband for low-temperature quantum bit manipulation provided by the present invention, the Z driver also includes: an adder; wherein the adder is used to modulate the configured bias parameters on the waveform pulse data output by the Z channel memory.

[0022] Based on the same inventive concept, the present invention further provides a qubit manipulator, characterized by comprising a digital baseband for low-temperature qubit manipulation, an X-channel DAC, a Y-channel DAC, and a Z-channel DAC provided in the invention; wherein the digital baseband for low-temperature qubit manipulation is connected to the input ends of the X-channel DAC, the Y-channel DAC, and the Z-channel DAC respectively through their corresponding parallel-to-serial interfaces.

[0023] Compared with the prior art, the present invention has the following beneficial effects:

[0024] The digital baseband for cryogenic qubit manipulation provided by this invention enhances the flexibility of qubit manipulation by integrating dual-mode DDS and AWG within the digital baseband architecture. The DDS mode enables efficient frequency, phase, and amplitude adjustment, while the AWG mode provides arbitrary waveform generation, meeting the complex operations required of qubits and improving the fidelity of qubit control.

[0025] 2. In the digital baseband for cryogenic qubit manipulation provided by the present invention, both the X-channel DDS module and the Y-channel DDS module of the XY driver have a digitally controlled oscillator that can simultaneously generate independent digital intermediate frequency pulses. This allows not only the direct output of simple sinusoidal waves, but also the output of different modulated pulse waveform data by reading waveforms from the XY channel memory, thus achieving frequency division multiplexing. Therefore, the present invention enables multiple signals to share the same communication channel, optimizing channel utilization and thereby improving the overall transmission efficiency of the digital baseband. Furthermore, by generating the same digital intermediate frequency pulse, the output of DRAG pulse data or chirped pulse data for qubit frequency search can suppress leakage from adjacent quantum energy levels.

[0026] 3. The digital baseband for low-temperature quantum bit manipulation provided by the present invention adopts 512 XY channel sequencers and Z channel sequencers, which can sequentially output 512 different waveform sequences. The duration, envelope parameters, I wave amplitude parameters, Q wave amplitude parameters, phase parameters, phase calibration parameters and DC calibration parameters of each sequence can all be configured in the sequencer, which can not only ensure the accuracy and flexibility of quantum bit operations, but also efficiently process a large number of quantum gate operations.

[0027] 4. The digital baseband for low-temperature quantum bit manipulation provided by the present invention adopts the AWG mode in the Z channel, which can not only shape the rising and falling edges of the Z pulse (as fast as 0.5ns), but also compensate for the reflection between the Qubit and the 50Ω coaxial cable, thereby improving the fidelity of quantum bit control.

[0028] 5. The digital baseband for low-temperature quantum bit manipulation provided by the present invention adopts multiple driver units at the same time, and all driver units work in parallel through a parallel-to-serial interface. For example, four driver units with digital blocks with a clock frequency of 500MHz are used to work in parallel, which can support the output of 2GHz, 12-bit data stream for DAC and greatly improve the DC efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Figure 1 Schematic diagram of the digital baseband architecture for low-temperature quantum bit manipulation provided by the present invention;

[0030] Figure 2 A schematic diagram of the architecture of the quantum bit manipulator provided by the present invention;

[0031] Figure 3 A digital pulse timing diagram of quantum bit control of the digital baseband provided by the present invention;

[0032] Figure 4 A schematic diagram of the FPGA verification architecture for verifying digital baseband provided by the present invention;

[0033] Figure 5 The test results of the single pulse continuous playback mode of the digital baseband AWG mode demonstrated by the FPGA verification architecture of the present invention are as follows;

[0034] Figure 6 The test results of the single pulse continuous playback mode of the digital baseband DDS mode demonstrated by the FPGA verification architecture of the present invention are as follows;

[0035] Figure 7 The test results of the physical XY channel and Z channel produced based on the digital baseband of the present invention;

[0036] Figure 8 (a) is the actual DRAG waveform test result based on the digital baseband of the present invention;

[0037] Figure 8 (b) is the actual DRAG waveform spectrum test result produced based on the digital baseband of the present invention;

[0038] Figure 9 (a) is the test result of the physical Z-channel AWG mode produced based on the digital baseband of the present invention;

[0039] Figure 9 (b) is the reflection compensation test result of the actual Z-channel cable made based on the digital baseband of the present invention. DETAILED DESCRIPTION

[0040] The present invention will be described in further detail below with reference to the accompanying drawings and specific embodiments. However, this should not be construed as limiting the scope of the present invention to the following embodiments, as all technologies implemented based on the present invention fall within the scope of the present invention.

[0041] like Figure 1 As shown, in one embodiment of the present invention, the digital baseband for low-temperature quantum bit manipulation provided by the present invention uses four driver units with a clock frequency of 5000MHz to achieve the output of 2GHz, 12-bit data stream supporting DAC; wherein each of the driver units includes: an XY driver and a Z driver; wherein,

[0042] The XY drive includes:

[0043] XY channel memory, used to store waveform pulse data of X channel and Y channel;

[0044] An XY channel sequencer configured with an instruction set for coordinating sequence playback of X channels and Y channels;

[0045] and, an X-channel DDS module and a Y-channel DDS module, an X-channel multiplexer MUX1 and a Y-channel multiplexer MUX2;

[0046] The X channel is composed of a DDS sub-channel and an AWG sub-channel, each serving as an input of the X-channel multiplexer MUX1; the Y channel is composed of a DDS sub-channel and an AWG sub-channel, each serving as an input of the Y-channel multiplexer MUX2; and the X-channel DDS sub-channel of the X channel is provided with waveform pulse data output by the X-channel DDS module alone or by the X-channel DDS module in combination with the XY channel memory; the Y-channel DDS sub-channel is provided with waveform pulse data output by the Y-channel DDS module alone or by the Y-channel DDS module in combination with the XY channel memory; and the X-channel and Y-channel AWG sub-channels are both provided with waveform pulse data output directly by the XY channel memory.

[0047] The Z-driver comprises:

[0048] Z channel memory, used to store waveform pulse data of Z channel;

[0049] A Z-channel sequencer configured with an instruction set for coordinating sequential playback of the Z-channel;

[0050] The Z channel directly provides waveform pulse data output from the Z channel memory.

[0051] Specifically, in this embodiment, the X channels, Y channels, and Z channels of the four driver units respectively output waveform data streams in parallel through corresponding parallel-to-serial interfaces. That is, the X channels of the four driver units output in parallel through the parallel-to-serial interface PSI1, the Y channels of the four driver units output in parallel through the parallel-to-serial interface PSI2, and the Z channels of the four driver units output in parallel through the parallel-to-serial interface PSI3.

[0052] Therefore, the digital baseband for low-temperature quantum bit manipulation provided by the present invention improves the flexibility of quantum bit manipulation by designing a dual mode combining DDS and AWG modes in the digital baseband architecture. The DDS mode is used to achieve efficient frequency, phase and amplitude adjustment, and the AWG mode is used to provide the ability to generate arbitrary waveforms, which meets the needs of quantum bits when performing complex operations and improves the fidelity of quantum bit control. Moreover, multiple driver units are used at the same time, and all driver units are operated in parallel through a parallel-to-serial interface. For example, four driver units with a digital block clock frequency of 500MHz are used to work in parallel, which can support the output of 2GHz, 12-bit data streams for DACs and greatly improve DC efficiency.

[0053] At the same time, the X-channel DDS module and the Y-channel DDS module each have a digitally controlled oscillator for simultaneously generating independent digital intermediate frequency pulses, that is, the X-channel DDS module generates digital intermediate frequency pulses through the digitally controlled oscillator NCO0, and the Y-channel DDS module generates digital intermediate frequency pulses through the digitally controlled oscillator NCO1.

[0054] The X-channel DDS module and the Y-channel DDS module each have four adders and four multipliers; wherein the first adder is used to convert the configured phase parameter modulated on the digital intermediate frequency pulse generated by the digital controlled oscillator; the second adder is used to configure the phase calibration parameter (β 0 / 1 ) is modulated on the waveform pulse data output by the first adder; the waveform pulse data output by the second adder is converted by the cos function lookup table and input to the first multiplier; the waveform pulse data output by the first adder is converted by the sin function lookup table and input to the second multiplier; the third multiplier is used to convert the configured envelope parameter (V env,0 / 1 ), I wave amplitude parameter (α i0 / 1 ) and Q wave amplitude parameter (α q0 / 1) are multiplied and input to the first multiplier to modulate the waveform pulse data converted by the cosine function lookup table; the fourth multiplier is used to configure the envelope parameter (V env,0 / 1 ), I wave amplitude parameter (α i0 / 1 ) and Q wave amplitude parameter (α q0 / 1 ) are multiplied and input to the second multiplier to modulate the waveform pulse data converted by the sin function lookup table; the third adder is used to configure the DC calibration parameter (γ 0 / 1 ) modulates the waveform pulse data output by the first multiplier;

[0055] Furthermore, the fourth adder of the X-channel DDS module is used to modulate the waveform pulse data Q1 output by the second multiplier of the Y-channel DDS module onto the waveform pulse data I0 output by the third adder of the X-channel DDS module. The fourth adder of the Y-channel DDS module is used to modulate the waveform pulse data Q0 output by the second multiplier of the X-channel DDS module onto the waveform pulse data I1 output by the seventh multiplier of the Y-channel DDS module. The waveform pulse data I0 and I1 output by the fourth adders of the X-channel DDS module and the Y-channel DDS module are respectively output as the waveform data of their respective DDS sub-channels.

[0056] In the digital baseband for low-temperature quantum bit manipulation provided by the present invention, the instruction set of the XY channel sequencer configuration defines the duration t of each sequence, the envelope parameters (V env,0 / 1 ), I wave amplitude parameter (α i0 / 1 ), Q wave amplitude parameter (α q0 / 1 ), phase parameters Phase calibration parameter (β 0 / 1 ) and DC calibration parameters (γ 0 / 1 ); the XY channel memory stores envelope parameters (V env,0 / 1 ).

[0057] When the digital baseband for low-temperature quantum bit manipulation provided by the present invention operates in DDS mode, since each XY driver contains two numerically controlled oscillators NCO0 and NCO1 that can simultaneously generate independent digital intermediate frequency pulses (which can be pulses of different frequencies), frequency division multiplexing (FDM) is achieved. Therefore, in each parallel channel, the 12-bit phase output of the numerically controlled oscillator is controlled by the phase parameter Phase calibration parameter (β 0 / 1 ) and then converted into 12-bit sine wave (Q wave) and cosine wave (I wave) through the function lookup table LUT. When a simple continuous sin wave signal needs to be output, the I wave and Q wave are adjusted by the I wave amplitude parameter (αi0 / 1 ), Q wave amplitude parameter (α q0 / 1 ) and DC calibration parameters (γ 0 / 1 ) and then output directly; when different waveform pulses need to be output, I wave and Q wave and envelope parameters (V env,0 / 1 ) (stored in the XY channel memory, namely XY SRAM) to obtain the required modulation waveform pulse data.

[0058] In addition, the two numerically controlled oscillators NCO0 and NCO1 of the XY driver can also be used as IQ channels to generate the same digital intermediate frequency signal, thereby realizing the generation of DRAG pulse data. According to the DRAG generation formula:

[0059]

[0060] Where, Gaussian(t,A,σ,Tpulse)=Aexp{-t 2 / (2σ 2 )}, A is the amplitude of the waveform, σ is the pulse width of the waveform, t is the time of the waveform, and β is the scaling parameter of the waveform. When the envelope parameter V env,0 The waveform of (I wave) is Gaussian envelope and the output envelope parameter V env,1 When the (Q-wave) waveform is a Gaussian derivative envelope, DRAG pulse data can be generated. By modifying the imaginary component of DRAG using the scaling parameter β, a notch can be introduced to suppress leakage from adjacent quantum levels.

[0061] Therefore, the digital baseband for low-temperature quantum bit manipulation provided by the present invention is designed with an X-channel DDS module and a Y-channel DDS module of the XY driver each having a digitally controlled oscillator, capable of simultaneously generating independent digital intermediate frequency pulses. This allows not only direct output of simple sinusoidal waves, but also the reading of waveforms from the XY channel memory to output different modulated pulse waveform data, achieving frequency division multiplexing. Therefore, the present invention enables multiple signals to share the same communication channel, optimizing channel utilization and thereby improving the overall transmission efficiency of the digital baseband. In addition, by generating the same digital intermediate frequency pulse, outputting DRAG pulse data or chirped pulse data for quantum bit frequency search, it is possible to suppress leakage from adjacent quantum energy levels.

[0062] When the digital baseband for cryogenic qubit manipulation provided by the present invention operates in AWG mode, the XY SRAM of the XY driver in the XY channel is 24kByte, supporting a maximum waveform length of 16k points, or an 8μs waveform length for a 2Gsps 12-bit DAC. In the Z channel, the Z driver's waveform pulse data flows directly from the Z SRAM to the DAC connected to the digital baseband output, enriching the possibilities of qubit control. Furthermore, while most Z drivers can only provide rectangular pulses, the Z driver of the present invention utilizes AWG mode. The Z driver also includes an adder for modulating the configured bias parameters onto the waveform pulse data output from the Z channel memory. Therefore, in addition to a fast 0.5ns rising edge, it not only shapes the rising and falling edges of the Z pulse but also compensates for reflections between the qubit and the 50Ω coaxial cable. Two Z drivers share a separate 24kByte Z SRAM. Within the Z channel sequencer, each Z channel waveform pulse data has a predefined edge transition waveform followed by a DC encoding for long-term biasing.

[0063] Therefore, the digital baseband for low-temperature quantum bit manipulation provided by the present invention adopts the AWG mode in the Z channel, which can not only shape the rising and falling edges of the Z pulse (as fast as 0.5ns), but also compensate for the reflection between the Qubit and the 50Ω coaxial cable, thereby improving the fidelity of quantum bit control.

[0064] In implementation, both the XY drive and the Z drive have instruction sets that can coordinate sequence playback of up to 512 steps, and can sequentially output 512 different waveform sequences, with the duration t of each sequence, envelope parameters (V env,0 / 1 ), I wave amplitude parameter (α i0 / 1 ), Q wave amplitude parameter (α q0 / 1 ), phase parameters Phase calibration parameter (β 0 / 1 ) and DC calibration parameters (γ 0 / 1 ) are predefined in the sequencer. Among them, the envelope parameters (V env,0 / 1 ) can be configured and defined by XY SRAM.

[0065] like Figure 3 Figure 2 shows the digital pulse timing diagram for quantum bit control, with both XY drivers XY1 and XY2 operating in DDS mode and Z drivers Z1 and Z2 operating in AWG mode. After the hardware trigger (in) is activated, the XY drivers generate a 4-8 GHz RF pulse sequence under the control of a sequencer with a maximum depth of 512 for quantum logic gate control. The duration t (t1, t2, t3, t4) and envelope parameters (Venv,0 / 1 ), I wave amplitude parameter (α i0 / 1 ), Q wave amplitude parameter (α q0 / 1 ), phase parameters Phase calibration parameter (β 0 / 1 ) and DC calibration parameters (γ 0 / 1 ) are predefined in the XY channel sequencer. Therefore, the Z driver and the XY driver perform qubit initialization together. After the sequence is completed, another trigger (out) is issued, indicating the qubit readout. Therefore, the digital baseband for low-temperature qubit manipulation provided by the present invention not only ensures the accuracy and flexibility of qubit operations, but also can efficiently process a large number of quantum gate operations.

[0066] like Figure 2 As shown, one embodiment of the present invention further provides a qubit manipulator, which includes the digital baseband for low-temperature qubit manipulation provided by the invention, an X-channel DAC (IDAC), a Y-channel DAC (QDAC), and a Z-channel DAC (ZDAC); wherein the digital baseband for low-temperature qubit manipulation is connected to the input terminals of the X-channel DAC, the Y-channel DAC, and the Z-channel DAC respectively through their corresponding parallel-to-serial interfaces (i.e., PSI1, PSI2, and PSI3).

[0067] Further, as Figure 4 The FPGA verification architecture shown here verifies the digital baseband provided by this invention. After the digital baseband code is written in Verilog on the test carrier board, the FPGA performs initialization and configuration, interacting with external waveform files via the VIO (virtual input / output) module to generate the required control signals. The FPGA also communicates with the digital baseband portion of the chip via a digital SPI interface, generates core clock signals via the MMCM (multi-mode clock manager), and works in conjunction with the DAC (digital-to-analog converter) to produce precise analog signals. These signals are transmitted via the FMC (FPGA Mezzanine Card) daughter card, which includes a CLK_PLL (clock phase-locked loop) for clock synchronization and outputs to an oscilloscope via an SMA connector for waveform observation and analysis. The entire system uses LVCMOS (low-voltage CMOS) signals for triggering (Trig) and resetting (RST), ensuring signal synchronization and system stability. A waveform multiplexer allows waveform selection and switching under different test conditions for comprehensive verification.

[0068] like Figure 5 As shown, the digital baseband provided by the present invention works in the AWG mode and the digital single pulse continuous playback test results show that the XY channel can output a continuous sine wave (blue line) and the Z channel can output a fixed level (green line).

[0069] like Figure 6 As shown, the digital baseband provided by the present invention works in the DDS mode and the XY channel digital single pulse continuous playback test results can output a continuous sine wave.

[0070] After the FPGA verification architecture is completed, the actual digital baseband manufactured based on the digital baseband concept provided by the present invention is further tested and verified.

[0071] First, the XY and Z pulses are measured using a 4K hardware trigger, where the carrier frequency of the XY pulse is 6.4~GHz and its timing, amplitude, and envelope are controlled by a sequencer. Figure 7 The test results shown show that the XY pulse envelope includes multiple waveform types such as cosine, square, triangle, and Gaussian waves, allowing flexible control of pulse duration, interval, and amplitude. The figure also shows the time domain waveform of the Z driver, where each Z pulse in the Z channel sequencer has a predefined edge transition waveform followed by DC encoding for long-term biasing, providing high flexibility and controllability.

[0072] Next, test the DRAG pulse data of 4.2~K with a radio frequency of 6.4~GHz, such as Figure 8 As shown, 26 dB of suppression was achieved at the designed non-harmonic frequency of 1.72 MHz, confirming the effective nonlinear suppression of the digital baseband.

[0073] Finally, the performance of the Z drive is tested, where Figure 9 (a) shows the use of cable reflection compensation in AWG mode, which optimizes signal transmission. Figure 9 (b) shows the fast rise time and edge shaping of the Z pulse of 0.5ns, indicating that the digital baseband has excellent time domain response characteristics.

[0074] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should be included in the scope of protection of the present invention.

Claims

1. A digital baseband for low-temperature quantum bit manipulation, characterized in that: include: several drive units; Moreover, each of the drive units includes: an XY drive and a Z drive; wherein, The XY drive includes: XY channel memory, used to store waveform pulse data of X channel and Y channel; An XY channel sequencer configured with an instruction set for coordinating sequence playback of X channels and Y channels; and, X-channel DDS module and Y-channel DDS module, X-channel multiplexer and Y-channel multiplexer; The X channel is composed of a DDS sub-channel and an AWG sub-channel, each serving as an input to the X-channel multiplexer; the Y channel is composed of a DDS sub-channel and an AWG sub-channel, each serving as an input to the Y-channel multiplexer; the X-channel DDS sub-channel is provided with waveform pulse data output by the X-channel DDS module alone or by the X-channel DDS module in conjunction with the XY-channel memory; the Y-channel DDS sub-channel is provided with waveform pulse data output by the Y-channel DDS module alone or by the Y-channel DDS module in conjunction with the XY-channel memory; and the X-channel and Y-channel AWG sub-channels are both provided with waveform pulse data output directly by the XY-channel memory. The Z-driver comprises: Z channel memory, used to store waveform pulse data of Z channel; A Z-channel sequencer configured with an instruction set for coordinating sequential playback of the Z-channel; Wherein, the Z channel directly provides waveform pulse data output by the Z channel memory; Furthermore, the X channels, the Y channels, and the Z channels of the plurality of driver units respectively output waveform data streams in parallel through corresponding parallel-to-serial interfaces.

2. The digital baseband for low-temperature quantum bit manipulation according to claim 1, characterized in that: The X-channel DDS module and the Y-channel DDS module each have a digitally controlled oscillator for simultaneously generating independent digital intermediate frequency pulses; The X-channel DDS module and the Y-channel DDS module each have four adders and four multipliers; wherein, the first adder is used to modulate the configured phase parameters on the digital intermediate frequency pulse generated by the digitally controlled oscillator; the second adder is used to modulate the configured phase calibration parameters on the waveform pulse data output by the first adder; the waveform pulse data output by the second adder is converted by the cos function lookup table and input to the first multiplier; the waveform pulse data output by the first adder is converted by the sin function lookup table and input to the second multiplier; the third multiplier is used to convert the configured envelope parameters, I Wave amplitude parameters and Q The waveform pulse data converted by the cosine function lookup table is modulated by the first multiplier after the wave amplitude parameters are multiplied; the fourth multiplier is used to convert the configured envelope parameters, I Wave amplitude parameters and Q The waveform amplitude parameters are multiplied and input to the second multiplier to modulate the waveform pulse data converted by the sin function lookup table; the third adder is used to modulate the configured DC calibration parameters on the waveform pulse data output by the first multiplier; Furthermore, the fourth adder of the X-channel DDS module is used to modulate the waveform pulse data output by the second multiplier of the Y-channel DDS module onto the waveform pulse data output by the third adder of the X-channel DDS module; the fourth adder of the Y-channel DDS module is used to modulate the waveform pulse data output by the second multiplier of the X-channel DDS module onto the waveform pulse data output by the third adder of the Y-channel DDS module; and the waveform pulse data output by the fourth adders of the X-channel DDS module and the Y-channel DDS module are respectively output as the waveform pulse data of their respective DDS sub-channels.

3. The digital baseband for low-temperature quantum bit manipulation according to claim 2, characterized in that: The instruction set of the XY channel sequencer configuration defines the duration of each sequence, envelope parameters, I Wave amplitude parameters, Q Wave amplitude parameters, phase parameters, phase calibration parameters and DC calibration parameters; the XY channel memory stores envelope parameters for waveform pulse data modulation of the X channel DDS module and the Y channel DDS module respectively.

4. The digital baseband for low-temperature quantum bit manipulation according to claim 3, characterized in that: When the digitally controlled oscillators of the X-channel DDS module and the Y-channel DDS module generate the same digital intermediate frequency pulse, and the envelope parameters stored in the XY channel memory for the waveform pulse data modulation of the X-channel DDS module are Gaussian envelopes, and the envelope parameters for the waveform pulse data modulation of the Y-channel DDS module are Gaussian derivative envelopes, the X-channel and Y-channel output DRAG pulse data.

5. The digital baseband for low-temperature quantum bit manipulation according to claim 1, characterized in that: The Z driver further includes an adder, wherein the adder is used to modulate the configured bias parameters on the waveform pulse data output by the Z channel memory.

6. A quantum bit manipulator, characterized in that: The method comprises the digital baseband for low-temperature quantum bit manipulation according to any one of claims 1 to 5, an X-channel DAC, a Y-channel DAC, and a Z-channel DAC; wherein the digital baseband for low-temperature quantum bit manipulation is connected to the input terminals of the X-channel DAC, the Y-channel DAC, and the Z-channel DAC respectively through their corresponding parallel-to-serial interfaces.

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