Sampling point rearrangement method and device, equipment and storage medium

Abstract

The invention discloses a sampling point rearrangement method and device, equipment and a storage medium, and belongs to the field of image data processing. The method comprises the steps that m sampling points arranged according to a first arrangement mode are read from a storage unit, the m sampling points are sampling points in at least one pixel point, the first arrangement mode is an arrangement mode based on sampling point index arrangement of the m sampling points, and m is a positive integer; the m sampling points are rearranged to obtain m sampling points arranged according to a second arrangement mode, and the second arrangement mode is an arrangement mode based on position arrangement of the m sampling points in the at least one pixel point; and storing the m sampling points arranged according to the second arrangement mode into the storage unit. For m sampling points stored in the storage unit, the position information of the sampling points is recovered, and subsequent execution of various algorithms based on the position information of the sampling points is facilitated.

Description

Technical Field

[0001] This application relates to the field of image data processing, and particularly to a method, apparatus, device, and storage medium for rearranging sampling points. Background Art

[0002] Multi-Sampling Anti-Aliasing (MSAA) is an anti-aliasing method that samples and calculates multiple times at a single pixel point and finally aggregates to obtain the pixel information of the pixel point. This method can make the edges of the drawn image smoother.

[0003] After using the MSAA technology, when storing an image in a storage unit, instead of storing the pixel information corresponding to the pixel points in the storage unit, it is necessary to store the sampling point information of each sampling point in the storage unit. However, the related technology does not adapt to the storage method of sampling points in the storage unit, which results in the sampling points being stored in the storage unit only according to the sampling point index.

[0004] However, the storage method according to the sampling point index is not friendly to some algorithms that require the position information of the sampling points. Summary of the Invention

[0005] This application provides a method, apparatus, device, and storage medium for rearranging sampling points, and the technical solutions are as follows: According to one aspect of this application, a method for rearranging sampling points is provided. The method includes: Reading m sampling points arranged in a first arrangement manner from a storage unit, where the m sampling points are sampling points in at least one pixel point, the first arrangement manner is an arrangement manner based on the sampling point indexes of the m sampling points, and m is a positive integer greater than 1; Rearranging the m sampling points to obtain m sampling points arranged in a second arrangement manner, where the second arrangement manner is an arrangement manner based on the positions of the m sampling points in the at least one pixel point; Storing the m sampling points arranged in the second arrangement manner into the storage unit.

[0006] According to one aspect of this application, a device for rearranging sampling points is provided. The device includes: An acquisition module, configured to read m sampling points arranged in a first arrangement manner from a storage unit, where the m sampling points are sampling points in at least one pixel point, the first arrangement manner is an arrangement manner based on the sampling point indexes of the m sampling points, and m is a positive integer greater than 1; A rearrangement module, configured to rearrange the m sampling points to obtain m sampling points arranged in a second arrangement manner, where the second arrangement manner is an arrangement manner based on the positions of the m sampling points in the at least one pixel point; A storage module, configured to store the m sampling points arranged in the second arrangement manner into the storage unit.

[0007] According to an aspect of the present application, there is provided a computer device, including: a processor and a memory, where at least one program is stored in the memory; the processor is configured to execute the at least one program in the memory to implement the above-mentioned sampling point rearrangement method.

[0008] According to an aspect of the present application, there is provided a computer-readable storage medium, in which executable instructions are stored, and the executable instructions are loaded and executed by a processor to implement the above-mentioned sampling point rearrangement method.

[0009] According to an aspect of the present application, there is provided a computer program product, including computer instructions, where the computer instructions are stored in a computer-readable storage medium, and a processor reads and executes the computer instructions from the computer-readable storage medium to implement the above-mentioned sampling point rearrangement method.

[0010] The beneficial effects brought by the technical solution provided by the present application at least include: By means of rearrangement, the m sampling points originally stored in the storage unit in the first arrangement manner, that is, the m sampling points stored based on the sampling point index, are rearranged into m sampling points stored in the second arrangement manner, that is, the m sampling points stored based on the position of each of the m sampling points in the at least one pixel point. For the storage of sampling points, the position information of the sampling points in the at least one pixel point (or called an image or an image block) is introduced, so that the m sampling points arranged in the second arrangement manner support various algorithms that require the use of position information, such as image compression algorithms. It avoids the loss of the position information of the sampling points during the storage process of the m sampling points, and improves the flexibility of the storage of the m sampling points. Moreover, storing based on the second arrangement manner of the positions of the m sampling points in the at least one pixel point is more friendly to the data access method of accessing the storage unit based on the position information, and can improve the access efficiency of the m sampling points in the storage unit and improve the query performance. Description of the Drawings

[0011] To more clearly illustrate the technical solutions in the embodiments of the present application, the following will briefly introduce the accompanying drawings required for the description of the embodiments. Obviously, the accompanying drawings in the following description are only some embodiments of the present application. For those of ordinary skill in the art, without creative efforts, other accompanying drawings can be obtained based on these drawings.

[0012] Figure 1 Shows a schematic diagram of an image compression process; Figure 2 Shows a schematic diagram of an arrangement method of an image arranged in a storage unit; Figure 3 Shows a schematic diagram of another arrangement method of an image arranged in a storage unit; Figure 4 Shows an architecture diagram of a computer system provided by an exemplary embodiment of the present application; Figure 5 Shows a flowchart of a rearrangement method of sampling points provided by an exemplary embodiment of the present application; Figure 6 Shows a flowchart of a rearrangement method of sampling points provided by another exemplary embodiment of the present application; Figure 7 Shows a schematic diagram of a standard sampling position provided by an exemplary embodiment of the present application; Figure 8 Shows a schematic diagram of a rearrangement method of sampling points provided by an exemplary embodiment of the present application; Figure 9 Shows a schematic diagram of a determination method of pixel point indexes provided by an exemplary embodiment of the present application; Figure 10 Shows a schematic diagram of a rearrangement method of sampling points provided by another exemplary embodiment of the present application; Figure 11 Shows a schematic diagram of an arrangement method of sampling points provided by an exemplary embodiment of the present application; Figure 12 Shows a schematic diagram of a rearrangement method of sampling points provided by another exemplary embodiment of the present application; Figure 13 Shows a schematic diagram of a rearrangement method of sampling points provided by yet another exemplary embodiment of the present application; Figure 14 Shows a structural block diagram of a rearrangement device of sampling points provided by an exemplary embodiment of the present application; Figure 15 Shows a structural schematic diagram of a computer device provided by an exemplary embodiment of the present application. Detailed implementation manners

[0013] In order to make the objectives, technical solutions and advantages of the present application clearer, the implementation methods of the present application will be further described in detail below with reference to the accompanying drawings.

[0014] Exemplary embodiments will be described in detail herein, examples of which are shown in the accompanying drawings. When the following description refers to the drawings, the same numbers in different drawings represent the same or similar elements unless otherwise indicated. The implementations described in the following exemplary embodiments do not represent all implementations consistent with the present application. Instead, they are merely examples of devices and methods consistent with some aspects of the present application as detailed in the appended claims.

[0015] The terms used in the present disclosure are for the purpose of describing specific embodiments only and are not intended to limit the present disclosure. The singular forms "a", "said" and "the" used in the present disclosure and the appended claims are also intended to include the plural forms, unless the context clearly indicates otherwise.

[0016] It should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for analysis, stored data, displayed data, etc.) involved in this application are all information and data authorized by the user or fully authorized by all parties, and the collection, use and processing of relevant data must comply with the relevant laws, regulations and standards of relevant countries and regions. For example, the information such as setting operations involved in this application is obtained with full authorization.

[0017] It should be understood that although the terms first, second, etc. may be used in the present disclosure to describe various information, such information should not be limited to these terms. These terms are only used to distinguish the same type of information from each other. For example, without departing from the scope of the present disclosure, the first parameter may also be referred to as the second parameter, and similarly, the second parameter may also be referred to as the first parameter. Depending on the context, the word "if" as used herein may be interpreted as "at the time of" or "when" or "in response to determining".

[0018] First, the relevant terms involved in this application are introduced.

[0019] Image Compressions: is a technique to reduce the size of image files. Image compression can be achieved by reducing the amount of data in the image while maintaining the visual quality of the image as much as possible. In hardware, especially in GPU (Graphics Processing Unit), image compression is a common technical means to reduce bandwidth transmission requirements. Generally speaking, image compression requires the use of position information between pixels in order to achieve a higher compression rate. For example, in Figure 1In the image compression technology shown, for the frame image 10 of a certain frame extracted from a video or animation, the compression unit 11 is a hardware or software component in the GPU used to perform data compression and decompression operations. The compression unit 11 reads an image block 12 in the frame image 10 and processes the image block 12 within the compression unit 11 using wavelet frequency-domain transformation to generate information in four parts: the upper-left low-frequency information part 13, the lower-left high-frequency horizontal information part 14, the upper-right high-frequency vertical information part 15, and the lower-right high-frequency diagonal information part 16. After the wavelet frequency-domain transformation, each pixel in the information of the above four parts can be encoded to achieve the purpose of data compression. For example, encoding is performed for each 2×2 pixel information. For example, 2×2 pixel information is taken out from the upper-left low-frequency information part 13, and the pixel information at each pixel point is used to indicate the color information of the pixel point, such as the grayscale value. Among them, the taken-out 2×2 pixel information, that is, the pixel information 17 of 4 pixel points, the pixel information of each pixel point includes 8 bits, and the pixel information 17 of 4 pixel points has 32 bits. For the taken-out 4 pixel points, data compression can be understood as extracting the common part in the pixel information 17 of the 4 pixel points. It is determined that each pixel point's pixel information before includes 3 zeros. Therefore, compression can be performed for the common part and the non-common part to obtain the compressed pixel information 18. The compressed pixel information includes five parts. Among them, the first part represents the common part of the 4 pixel points, that is, there are "011 (i.e., 3)" zeros, and the second part to the fifth part respectively represent the non-common parts of the 4 pixel points. Thus, the pixel information of 32 bits is compressed to 23 bits. The above-shown image compression method first needs to perform wavelet frequency-domain transformation, whose essence is to perform frequency-domain conversion on the original image information and save the high-frequency and low-frequency signals separately. This requires the hardware to restore the position information between the pixel information continuously stored in the memory to the position information in the original image.

[0020] In the GPU, the original image is usually placed in the memory in two modes: linear layout and twiddle layout.

[0021] Linear layout: The pixel information of the same row of the image or image block is placed at consecutive addresses in the memory, and the pixel information of the next row is placed after the pixel information of each row. In other words, the addresses of adjacent pixel information in the same row of the image or image block are consecutive in the memory, such as Figure 2As shown in the figure, among the pixel information stored in the memory 20 for the image block 19, the pixel information of the first row in the image block 19, that is, the pixel information of the pixel points with coordinates from (0, 0) to (0, 3), is stored at the virtual addresses from 0x80000000 to 0x8000 0003; the pixel information of the second row in the image block 19, that is, the pixel information of the pixel points with coordinates from (1, 0) to (1, 3), is stored at the virtual addresses from 0x8000 0004 to 0x8000 0007; the pixel information of the third row in the image block 19, that is, the pixel information of the pixel points with coordinates from (2, 0) to (2, 3), is stored at the virtual addresses from 0x8000 0008 to 0x8000 000B; the pixel information of the fourth row in the image block 19, that is, the pixel information of the pixel points with coordinates from (3, 0) to (3, 3), is stored at the virtual addresses from 0x8000 000C to 0x8000 000F.

[0022] Interleaved arrangement: It can also be called tile layout. The pixel points in an image or an image block are divided into multiple groups of pixel points, and each group of pixel points is located in a rectangle or a tile, and each group of pixel points is stored in the memory in a fixed order. The fixed order can be the z-order curve arrangement. As Figure 3 shown in the figure, the image block 19 is divided into 4 tiles, each tile contains 2×2 pixel points, and the pixel points in each tile are stored in the memory 20 in the z-order curve arrangement manner, and at the same time, the tiles are also stored in the memory 20 in the z-order curve arrangement manner. The pixel information in the first tile, that is, the pixel information of the pixel points with coordinates (0, 0), (1, 0), (0, 1), (1, 1), is stored at the virtual addresses from 0x8000 0000 to 0x8000 0003; the pixel information in the second tile, that is, the pixel information of the pixel points with coordinates (2, 0), (3, 0), (2, 1), (3, 1), is stored at the virtual addresses from 0x8000 0004 to 0x8000 0007; the pixel information in the third tile, that is, the pixel information of the pixel points with coordinates (0, 2), (1, 2), (0, 3), (1, 3), is stored at the virtual addresses from 0x8000 0008 to 0x8000 000B; the pixel information in the fourth tile, that is, the pixel information of the pixel points with coordinates (2, 2), (3, 2), (2, 3), (3, 3), is stored at the virtual addresses from 0x8000 000C to 0x8000 000F.

[0023] When the compression unit gets a memory address storing the original image information, it will first restore the relationship between the original pixels according to the arrangement manner of this compression unit. As Figure 2As shown, under the Linear Layout, the pixel information stored at 0x8000 0000 and 0x8000 0003 is restored to the pixel information with coordinates (0, 0) and (0, 2). Under the Twiddle Layout, as Figure 3 shown, the pixel information at these two addresses is restored to the pixel information with coordinates (0, 0) and (0, 1).

[0024] MSAA (Multi-Sample Anti-Alias): An anti-aliasing technique that obtains the pixel information of a pixel point by performing multiple samplings and calculations on a single pixel point and finally summarizing them, thereby making the edges of the drawn image smoother. That is, a pixel point is further subdivided into multiple sampling points. In this way, multiple sampling points in each pixel point can be interpolated independently, perform fragment shading independently, calculate independent color values and depth values. Then, the arithmetic mean of all sampling points of the same pixel point is calculated to obtain the final color of this pixel point. Through this method, the drawing of the graphic edge will be more delicate and smoother. Of course, for a 1920×1280 grid, MSAA4 is equivalent to processing 1920×1280×4 grids, and the computational complexity also increases exponentially.

[0025] Physical Address: The address in the actual physical memory, which directly points to a specific location on the memory module. The physical address is the address at the hardware level. The CPU (Central Processing Unit), memory controller, and other hardware directly use these addresses to access the data in the memory. The physical address is a real and directly accessible memory address, and they are usually converted from virtual addresses by the Memory Management Unit (MMU).

[0026] Virtual Address: The address in the address space provided by the operating system for each process. It is the address from the perspective of the process and is used to access the memory. The virtual address space is created by the operating system for the process through virtual memory management technology, which allows each process to have an independent address space, thereby achieving memory protection and isolation. In a virtual memory system, the virtual address needs to be converted into a physical address by the MMU, and this process is called Address Translation.

[0027] Figure 4 The architecture diagram of a computer system provided by an exemplary embodiment of the present application is shown. The computer system includes: computer device 110.

[0028] Optionally, the computer device 110 may be at least one of a laptop computer, a desktop computer, a server, a server cluster, an artificial intelligence (AI) computing cluster, and a cloud computing cluster. Among them, the AI computing cluster may also be simply referred to as an intelligent computing cluster or a smart computing cluster.

[0029] For an image using the MSAA technology, each pixel contains multiple sample points. The positions of the sample points within a pixel are generally specified by a graphics standard, but at the same time, users are also allowed to use the Programmable Sample Location technology to customize the positions of the sample points. In related technologies, the storage methods of the relevant information of the sample points are not distinguished according to the above two sample point position definition methods, and they are all stored in the memory 20 in the first arrangement method shown below, that is, the relevant information of the sample points is sequentially stored in the memory 20 according to the sample point index order. That is, for the pixel 21 of MSAA8X, for the sample points 0 to 7 (i.e., S0 - S7), although the up, down, left, and right position relationships between the sample points are different, they are all stored in the memory 20 in the order of the sample point index from 0 to 7. When the compression unit performs interleaved recovery based on interleaved arrangement, it will be parsed into the situation shown by the pixel 22 in the following figure. This first arrangement method 23 of storing in the memory 20 according to the sample point index order is not conducive to the compression unit or the GPU to recover the position information of the sample points inside the pixel. Figure 4 The method provided by the embodiments of the present application rearranges the sample points in the memory so that the compression unit or the GPU can recover the position information of the sample points. The specific process is as follows. Figure 4 The method provided by the embodiments of the present application rearranges the sample points in the memory so that the compression unit or the GPU can recover the position information of the sample points. The specific process is as follows.

[0030] The method provided by the embodiments of the present application rearranges the sample points in the memory so that the compression unit or the GPU can recover the position information of the sample points. The specific process is as follows.

[0031] (1) Obtain m sample points and m first storage addresses.

[0032] Optionally, the m first storage addresses refer to the virtual addresses when the m sample points are stored in the memory 20 according to the sample point index.

[0033] (2) Rearrange the m sample points to obtain m second storage addresses.

[0034] Optionally, based on the order of the m sampling points indicated by the m first storage addresses, change the storage addresses of each of the m sampling points such that the m sampling points stored in the resulting m second storage addresses are arranged according to the positions of the sampling points in the pixel points, e.g., from left to right and from top to bottom, so as to obtain the m second storage addresses of the m sampling points stored in the order of "S3→S7→S5→S0→S1→S2→S4→S6". Among them, this storage order is related to the application scenario of the m sampling points. For example, when applied in an image compression scenario, the storage order is related to the mapping rule of the compression unit. The mapping rule of the compression unit refers to the rule that after the compression unit reads multiple sampling points from the storage unit, it maps each sampling point to different positions of its corresponding pixel points; or, the mapping rule of the compression unit refers to the rule that after the compression unit reads multiple sampling points from the storage unit, it maps each sampling point to different positions of an image or an image block.

[0035] That is, for the m sampling points corresponding to the m second storage addresses, after using interleaved recovery, the effect shown in pixel point 24 in Figure 4 is obtained. Pixel point 24 arranged according to the second arrangement method 25 retains the position information of each sampling point compared to pixel point 22 arranged according to the first arrangement method 23.

[0036] (3) Store it back into the memory 20.

[0037] Optionally, store the m sampling points arranged according to the second arrangement method 25 back into the memory 20 so that other subsequent units such as the compression unit can directly read the relevant information of the sampling points with position information from the memory 20.

[0038] Figure 5 FIG. shows a flowchart of a method for rearranging sampling points provided by an embodiment of the present application. This method is executed by a computer device, and the computer device can be the computer device shown in Figure 4 above. This method includes the following steps.

[0039] Step 210: Read m sampling points arranged according to the first arrangement method from the storage unit. The m sampling points are sampling points in at least one pixel point. The first arrangement method is an arrangement method based on the sampling point indices of the m sampling points, and m is a positive integer greater than 1.

[0040] Read m sampling points arranged according to the first arrangement method from the storage unit; or, read at least one pixel point from the storage unit, where the at least one pixel point includes m sampling points arranged according to the first arrangement method; or, read m sampling points corresponding to at least one pixel point from the storage unit, where the m sampling points are arranged according to the first arrangement method.

[0041] Optionally, each pixel in at least one pixel includes m sampling points; the sampling point indexes of the m sampling points included in each pixel are different or the sampling point indexes of the m sampling points included in each pixel are the same.

[0042] Exemplarily, the sampling point indexes of the m sampling points included in each pixel are the same. The sampling point index is used to indicate the index of the sampling point in the pixel where it is located. For example, each pixel includes 2 sampling points; for pixel 0, the sampling point indexes of the 2 sampling points it includes are 0 and 1 respectively; for pixel 1, the sampling point indexes of the 2 sampling points it includes are also 0 and 1 respectively; for pixel 2, the sampling point indexes of the 2 sampling points it includes are also 0 and 1 respectively; for pixel 3, the sampling point indexes of the 2 sampling points it includes are also 0 and 1 respectively.

[0043] Exemplarily, the sampling point indexes of the m sampling points included in each pixel are different. For example, the sampling point index is used to indicate the index of the sampling point in the image or image block. For example, each pixel includes 2 sampling points, and the sampling point index of each sampling point is determined based on the index of the sampling point in the pixel where it is located and the index of the pixel in the image or image block. For pixel 0, the sampling point indexes of the 2 sampling points it includes can be represented as P0S0 and P0S1, where P0 represents the index of the pixel in the image or image block, and S0 and S1 represent the indexes of the sampling points in the pixel where they are located; for pixel 1, the sampling point indexes of the 2 sampling points it includes can be represented as P1S0 and P1S1; for pixel 2, the sampling point indexes of the 2 sampling points it includes can be represented as P2S0 and P2S1; for pixel 3, the sampling point indexes of the 2 sampling points it includes can be represented as P3S0 and P3S1.

[0044] It should be noted that in the embodiments of the present application, the sampling point indexes of the m sampling points included in each pixel are the same, that is, the sampling point index is used to indicate the index of the sampling point in the pixel where it is located, or the sampling point index of the sampling point is used to indicate the index in the pixel corresponding to the sampling point. However, the embodiments of the present application do not limit this.

[0045] Step 220: Rearrange the m sampling points to obtain m sampling points arranged in a second arrangement manner, where the second arrangement manner is an arrangement manner based on the positions of the m sampling points in at least one pixel.

[0046] Rearrange the m sampling points to obtain m sampling points arranged in a second arrangement manner; or, according to the indication information, rearrange the m sampling points to obtain m sampling points arranged in a second arrangement manner, where the indication information is used to indicate that the arrangement manner after rearrangement is the second arrangement manner.

[0047] Optionally, at least one pixel is located in the image or image block, and the second arrangement is an arrangement based on the positions of the m sampling points in the image, or the second arrangement is an arrangement based on the positions of the m sampling points in the image block.

[0048] Optionally, the arrangement can be understood as the storage order in the storage unit, or the arrangement can be understood as the order of the m sampling points in the storage unit, or the arrangement can be understood as the order of the storage addresses corresponding to the m sampling points in the storage unit. That is, the first arrangement and the second arrangement are used to indicate the storage order of the m sampling points in the storage unit; or the first arrangement and the second arrangement are used to indicate the order of the m sampling points in the storage unit; or the first arrangement and the second arrangement are used to indicate the order of the storage addresses corresponding to the m sampling points in the storage unit.

[0049] Optionally, in the field of image compression, the first arrangement is an arrangement that is not related to the mapping rule of the compression unit, and the second arrangement is an arrangement that is related to the mapping rule of the compression unit. Or rather, the first arrangement is an arrangement based on the sampling point indexes of the m sampling points, and the sampling point indexes of the m sampling points are not related to the mapping rule of the compression unit. The second arrangement is an arrangement based on the mapping rule of the compression unit and the positions of the m sampling points in at least one pixel. It can also be said that the first arrangement is not an arrangement in accordance with the mapping order of the compression unit, and the second arrangement is an arrangement in accordance with the mapping order of the compression unit. Among them, the compression unit is a unit for performing a compression algorithm on an image or an image block. The mapping rule of the compression unit refers to the rule that after the compression unit reads multiple sampling points from the storage unit, it maps each sampling point to different positions of its corresponding pixel point; or the mapping rule of the compression unit refers to the rule that after the compression unit reads multiple sampling points from the storage unit, it maps each sampling point to different positions of the image or the image block. Not related to the mapping rule of the compression unit means that the first arrangement or the sampling point index is not set according to the mapping rule, but based on other rules. For example, the sampling point index is determined based on the standard sampling positions defined by the graphics standard, or the sampling point index is determined based on the programmable sampling positions set by the user.

[0050] Exemplarily, each pixel point in at least one pixel point includes 8 sampling points. For the first arrangement method, the 8 sampling points of each pixel point are sequentially stored in the storage unit according to the sampling point index. However, for different pixel points in at least one pixel point, each pixel point can be stored in the order of the pixel point index or according to the position of the pixel point in the image or image block. For the second arrangement method, m sampling points are regarded as independent points in the image or image block, and the order of each pixel point among the m sampling points is determined according to the actual positions of the m sampling points in the image or image block. That is, at this time, the storage positions of the sampling points belonging to the same pixel point can be adjacent or non - adjacent, which depends on the mapping rules of the storage unit or the compression unit for different storage positions. For example, the above Figure 2 and Figure 3 show two different mapping rules for pixel points.

[0051] Step 230: Store the m sampling points arranged according to the second arrangement method into the storage unit.

[0052] Re - store the m sampling points arranged according to the second arrangement method into the storage unit to obtain the m sampling points stored according to the second arrangement method.

[0053] Optionally, the above - shown m sampling points can also be understood as the relevant information of the m sampling points, or the sampling point information of the m sampling points, or the pixel information (color value, depth value, transparency, etc.) of the m sampling points, and so on.

[0054] In summary, the method provided by the embodiments of the present application rearranges the m sampling points originally stored in the storage unit according to the first arrangement method, that is, the m sampling points stored based on the sampling point index, into the m sampling points stored according to the second arrangement method, that is, the m sampling points stored based on the position of each sampling point among the m sampling points in at least one pixel point. For the storage of sampling points, the position information of the sampling points in at least one pixel point (or called image or image block) is introduced, so that the m sampling points arranged according to the second arrangement method support various algorithms that require the use of position information, such as image compression algorithms. It avoids the loss of the position information of the sampling points during the storage process of the m sampling points and improves the flexibility of the storage of the m sampling points. Moreover, storing based on the second arrangement method of the positions of the m sampling points in at least one pixel point is more friendly to the data access method of accessing the storage unit based on the position information, which can improve the access efficiency of the m sampling points in the storage unit and improve the query performance.

[0055] Next, the rearrangement method will be further described.

[0056] Based on Figure 5In an alternative embodiment, as Figure 6 shown, step 220 described above can be implemented as steps 221 to 223.

[0057] Step 221: Obtain m first storage addresses of m sampling points in the storage unit, where the m first storage addresses correspond one-to-one to the m sampling points.

[0058] Optionally, the m first storage addresses are virtual addresses, or physical addresses. In the embodiments of the present application, the case where the first storage address and the second storage address are virtual addresses is taken as an example for illustration, but the protection scope of the embodiments of the present application is not limited thereto.

[0059] Optionally, obtaining the m first storage addresses of the m sampling points in the storage unit can be understood as obtaining the first storage address of each sampling point among the m sampling points in the storage unit. Among them, the first storage address of each sampling point is used to indicate the storage location of each sampling point in the storage unit.

[0060] In some embodiments, this step 221 can be executed simultaneously with the above step 210 or the order of execution can be exchanged, that is, obtain the first storage address of each sampling point in the storage unit while reading the m sampling points; or, read the m sampling points after reading the m first storage addresses of the m sampling points in the storage unit; or, read the m first storage addresses of the m sampling points in the storage unit after reading the m sampling points.

[0061] Step 222: Determine m second storage addresses based on the m first storage addresses, where the second storage addresses correspond one-to-one to the m sampling points, and the m second storage addresses are different from the m first storage addresses.

[0062] Optionally, determine the second storage address of each sampling point based on the first storage address of each sampling point among the m sampling points to obtain m second storage addresses. That is, by changing the storage address of each sampling point among the m sampling points, the rearrangement of the m sampling points is realized.

[0063] Optionally, determine m second storage addresses based on the m first storage addresses and the mapping rule of the compression unit.

[0064] Step 223: Determine m sampling points arranged in the second arrangement manner based on the m second storage addresses.

[0065] Optionally, determine m sampling points arranged in the second arrangement manner based on the m second storage addresses; or, determine the storage location of the m sampling points in the storage unit based on the m second storage addresses, and rearrange the m sampling points based on the storage location of the m sampling points in the storage unit to obtain m sampling points arranged in the second arrangement manner.

[0066] It should be noted that the above first storage address refers to the original storage addresses of the m sampling points in the storage unit, while the second storage address is the storage address where the m sampling points will be stored determined based on the rearrangement method shown in the embodiments of the present application. However, after performing step 230 to store the m sampling points into the storage unit, the m second storage addresses become the actual corresponding storage addresses after the rearrangement of the m sampling points. That is to say, the second storage address can be understood as an analog storage address. When storing the m sampling points in step 230, the m sampling points can be stored according to the m second storage addresses, or they can be stored not according to the m second storage addresses but the m sampling points arranged in the second arrangement manner determined according to the m second storage addresses are stored into the storage unit. That is, the m sampling points arranged in the second arrangement manner correspond to m third storage addresses in the storage unit. The m third storage addresses are different from the m second storage addresses, but the m sampling points corresponding to the m third storage addresses and the m second storage addresses are all arranged in the second arrangement manner.

[0067] Optionally, the sampling positions of the m sampling points included in each pixel point of at least one pixel point are standard sampling positions; or, programmable sampling positions. Wherein, the standard sampling position refers to the sampling point position determined according to the graphics standard. The programmable sampling position refers to the sampling point position set by the user or developer.

[0068] Among them, both the standard sampling position and the programmable sampling position refer to the sampling method for a pixel point. The standard sampling position means that the sampling point positions of multiple sampling points within a pixel point are pre-agreed by the graphics standard. The programmable sampling position means that the sampling point positions of multiple sampling points within a pixel point are set by the user or developer. The standard sampling position is as Figure 7 shown. In the case where a pixel point includes 2 sampling points, the standard sampling position is as shown in part (1) of Figure 7 . This situation can also be referred to as adopting the MSAA2 technology; in the case where a pixel point includes 4 sampling points, the standard sampling position is as shown in part (2) of Figure 7 . This situation can also be referred to as adopting the MSAA4 technology; in the case where a pixel point includes 8 sampling points, the standard sampling position is as shown in part (3) of Figure 7 . This situation can also be referred to as adopting the MSAA8 technology. For the programmable position, it supports the user or developer to set the number of sampling points included in a pixel point and the sampling point positions (or sampling positions).

[0069] Optionally, the mapping rule of the compression unit is set based on the standard sampling position, or the mapping rule of the compression unit is set based on the programmable sampling position.

[0070] In summary, the method shown in the embodiments of the present application shows a rearrangement method for m sampling points. By changing m first storage addresses of the m sampling points in the storage unit to obtain m second storage addresses, wherein the first storage address corresponding to each sampling point can reflect the order of each sampling point among the m sampling points when arranged in the first arrangement manner, that is, the m first storage addresses can reflect the first arrangement manner, and the second storage address can reflect the second arrangement manner.

[0071] In addition, the sampling point positions of each sampling point in at least one pixel point support both standard sampling positions and programmable sampling positions, which improves the scalability of the sampling point rearrangement method provided by the embodiments of the present application. And for the standard sampling position, the method provided by the embodiments of the present application can better restore the position information between sampling points, reduce the probability of generating high-frequency signals to improve the compression ratio. For the programmable sampling position, the method provided by the embodiments of the present application provides a more flexible means for the driver to restore the position information of the sampling points.

[0072] Among them, the determination method for the m second storage addresses is as follows.

[0073] Determination method 1: Address Swizzle.

[0074] Determination method 2: Look Up Table (LUT).

[0075] Next, the above two determination methods will be introduced one by one (the introduction order does not represent the superiority or inferiority of the determination methods).

[0076] Determination method 1: Address Swizzle.

[0077] In some embodiments, the above step 222 can be implemented as follows: for the i-th first storage address among the m first storage addresses, obtain the last n bits of the i-th first storage address. The last bit in the last n bits is used to indicate the sampling point index of the sampling point corresponding to the i-th first storage address, and the first n - 1 bits in the last n bits are used to indicate the pixel point index of the pixel point corresponding to the i-th first storage address. Both i and n are positive integers; adjust the order of each bit in the last n bits to determine the second storage address corresponding to the i-th first storage address; let i = i + 1, and re-enter the step of obtaining the last n bits of the i-th first storage address to start execution until m second storage addresses are determined.

[0078] Optionally, n is related to the number of sampling points corresponding to the m sampling points. For example, , or, .

[0079] Optionally, the sampling point index is used to indicate the index of the sampling point in its corresponding pixel point. The pixel point index is used to indicate the index of the pixel point in the image or image block. Among them, the sampling point index has nothing to do with the position of the sampling point in the pixel point; or rather, there is no strong correlation between the sampling point index and the position of the sampling point in the pixel point. As Figure 7 shown in the 3 sampling point positions and sampling point indexes within a pixel point, especially for Figure 7 the case of using the MSAA2 technology shown in part (1) of Figure 7 and the case of using MSAA8 shown in part (3) of Figure 7 if the mapping rule of the compression unit is based on the standard sampling position mapping, then for Figure 7 the cases shown in part (1) of Figure 5 if arranged in the storage unit according to the sampling point index, the situation shown in

[0080] will occur, that is, due to the loss of the sampling point position, the compression unit will not be able to correctly recover the sampling point in the image or image block. Therefore, it is necessary to rearrange the m sampling points already stored in the storage unit.

[0081] Optionally, the order of each bit in the adjusted last n bits is adjusted to determine the second storage address corresponding to the i-th first storage address, including: adjusting the order of each bit in the adjusted last n bits to determine the last n bits of the second storage address corresponding to the i-th first storage address; determining the i-th second storage address based on the last n bits of the i-th second storage address. Optionally, the second storage address is an analog storage address, that is, the second storage address is mainly used to indicate the position of its corresponding sampling point among the m sampling points. Therefore, the address bits of the second storage address can be different from those of the first storage address. For example, if the i-th second storage address only includes n bits, then the order of each bit in the adjusted last n bits is adjusted to determine the last n bits of the second storage address corresponding to the i-th first storage address (i.e., the i-th second storage address is determined). Or, the second storage address is an actual storage address, that is, the i-th sampling point will be stored at the storage location corresponding to the second storage address after rearrangement. Then, the i-th second storage address is determined based on the last n bits of the i-th second storage address and the i-th first storage address. For example, if both the first storage address and the second storage address include m bits, then the first m - n bits of the i-th first storage address are concatenated with the last n bits of the i-th second storage address to obtain the i-th second storage address, that is, the i-th second storage address is the first m - n bits of the i-th first storage address + the last n bits of the i-th second storage address, and the above "+" is a concatenation symbol. For example, when m is 32, n is 4, and the i-th first storage address is 0x8000 0001, the last 4 bits of the i-th first storage address are 0x1, that is, 0b0001, and the last 4 bits of the determined i-th second storage address are 0x0, that is, 0b0000. Then, the first m - n (i.e., 32 - 4 = 28) bits of the i-th first storage address are 0x8000000, and the concatenated i-th second storage address is 0x8000 0000. In this case, m sampling points in a continuous storage location in the storage unit are taken out, rearranged, and then stored back in the continuous storage location. However, in actual implementation, it can also be implemented as storing the rearranged m sampling points in another continuous storage location. At this time, after determining the last n bits of the i-th second storage address, the i-th second storage address should be determined based on the storage address corresponding to the storage location to be stored. It should be noted that the embodiments of the present application take the example of taking out m sampling points in a continuous storage location in the storage unit, rearranging them, and then storing them back in the continuous storage location for illustration, but the protection scope of the embodiments of the present application is not limited thereto.

[0082] Exemplarily, for the i-th sampling point among m sampling points, it corresponds to the i-th first storage address. Assuming the first storage address is 32 bits, such as the i-th first storage address being 0x8000 0001, and assuming n is 4. Since 1 hexadecimal digit can be represented as 4 binary digits, the last 4 bits of the i-th first storage address are taken out as 0x1, that is, 0b0001. Among them, the first 3 bits "000" indicate that the pixel index of the pixel point corresponding to the i-th sampling point is "000", that is, 0b000 = 0, which means the pixel index is 0; the 4th bit "1" indicates that the sampling point index corresponding to the i-th sampling point is "1", that is, 0b1 = 1, which means the sampling point index is 1. By adjusting the last 4 bits of the i-th first storage address, the i-th second storage address is obtained, so that the i-th second storage address can be mapped to the correct position of the i-th sampling point in the image block according to the mapping rule. For example, the correct position of the i-th sampling point in the image block is (0, 0). If the mapping rule is that (0, 0) in the image block is mapped to the position of 0b0000 in the storage unit, then the last 4 bits of the i-th second storage address are 0b0000.

[0083] Optionally, adjust the order of each bit in the last n bits to determine the second storage address corresponding to the i-th first storage address; or, adjust the order of each bit in the last n bits so that the last n bits are used to indicate the position of the sampling point in the image or image block; or, adjust the order of each bit in the last n bits so that the last n bits are used to indicate the position of the sampling point among at least one pixel point.

[0084] Next, the method of adjusting each bit in the last n bits will be described.

[0085] In some embodiments, adjusting the order of each bit in the last n bits to determine the second storage address corresponding to the i-th first storage address includes: inverting the last bit in the last n bits; numbering from the last bit to obtain a plurality of odd bits and a plurality of even bits; swapping the j-th odd bit and the j-th even bit, where the j-th odd bit is the j-th odd bit from right to left in the last n bits, and the j-th even bit is the j-th even bit from right to left in the last n bits, and j is a positive integer; based on the last n bits after swapping the order of the bits, determine the second storage address corresponding to the i-th first storage address.

[0086] Optionally, numbering from the last bit to obtain a plurality of odd bits and a plurality of even bits; it can be understood as numbering from right to left to obtain a plurality of odd bits and a plurality of even bits. Optionally, the numbering starts from 0, or the numbering starts from 1. If the numbering starts from 0, the plurality of even bits may include the bit with the number 0, or may not include the bit with the number 0.

[0087] Optionally, adjust the order of each bit in the last n bits to determine the second storage address corresponding to the i-th first storage address. From the perspective of an image block, it means regarding m sampling points in the image block as basic elements and re-encoding the m sampling points in the image block using Morton encoding.

[0088] Optionally, the reason for inverting the last bit in the last n bits is that in the embodiments of the present application, Figure 7 as shown in part (1) of Figure 7 a pixel point includes 2 sampling points, and the sampling point index is also in the manner shown in part (1) of Figure 7 where the sampling point index of the upper sampling point is 1 and the sampling point index of the lower sampling point is 0. After inversion, it can be converted to the upper sampling point corresponding to 0 and the lower sampling point index being 1. Or rather, the original sampling point index is as shown in part (1) of

[0089] where the sampling point index of the left sampling point is 1 and the sampling point index of the right sampling point is 0. After inversion, it can be converted to the left sampling point having a sampling point index of 0 and the right sampling point having a sampling point index of 1.

[0089] Exemplarily, n is 4. The last 4 bits of the i-th first storage address from right to left are the first bit, the second bit, the third bit, and the fourth bit. The second bit, the third bit, and the fourth bit are used to indicate the pixel point index of the pixel point of the sampling point corresponding to the i-th storage address, and the first bit is used to indicate the sampling point index of the sampling point corresponding to the i-th first storage address; inverting the last bit in the last n bits includes: inverting the first bit to obtain the inverted first bit; swapping the j-th odd bit and the j-th even bit includes: swapping the fourth bit and the third bit, and swapping the second bit and the inverted first bit.

[0090] Exemplarily, as shown in Figure 8 for image block 50, it includes 8 pixel points, and each pixel point includes 2 sampling points. The sampling point index is set based on the standard sampling positions shown above in Figure 7 In image block 50, the 2 sampling points within a pixel point are regarded as having an up-and-down relationship, but these 2 sampling points are actually in the diagonal relationship shown in Figure 7 and it is a simulation made to simplify the rearrangement process in Figure 8 In the related art, at least one pixel point included in image block 50 is arranged in an interleaved manner. That is, in memory 20 for pixel points, the pixel point index is designed according to the interleaved arrangement. That is, the pixel point index can determine the position information of the pixel point in image block 50 according to the mapping rule. However, for the 2 sampling points included in the pixel point, they are stored according to the sampling point index, and the sampling points are arranged in the first arrangement manner, as shown in Figure 8As shown in the storage relationship 51 shown in the memory 20 (i.e., storage unit) in , each pixel point corresponds to 2 storage locations, and 8 pixel points are stored in the manner that the pixel points satisfy the mapping rule in the image block 50. The 2 sampling points included in each pixel point are sequentially stored in the 2 storage locations corresponding to the pixel point according to the sampling point index of the sampling point. Among them, for a pixel point, the storage location of the pixel point or the pixel point index of the pixel point is obtained by performing Morton encoding based on the position of the pixel point in the image block 50.

[0091] Among them, Morton encoding is an encoding method that converts multi-dimensional data into one-dimensional data. Morton encoding defines a Z-shaped space-filling curve, so Morton encoding is usually also called the Z-order curve. In the N-dimensional space, coordinates that are close to each other have close Morton codes, and it can be applied to generate a unique index for an integer pair. For example, for the coordinate points in the coordinate system, the Morton codes generated by using Morton encoding can uniquely index the corresponding points. As Figure 9 shown, for the 8 pixel points in an image or an image block, placing them in a two-dimensional plane coordinate system, first convert the row and column numbers into binary, Figure 9 in which are the converted binary row and column numbers, and the row and column numbers are numbered starting from 0. Among them, since the image block is arranged in a 2×4 pattern, 1 bit is required to represent the row number and 2 bits are required to represent the column number. The value of the row number Y is 0 and 1, and the value of the column number X is 00, 01, 10, 11. For the convenience of representation, the binary row and column numbers can be split and represented from right to left. For example, the first bit of the row number is represented as Y0, the first bit of the column number is represented as X0, and the second bit of the column number is represented as X1. Then, given the row and column numbers corresponding to each pixel point, the pixel point index of each pixel point can be obtained. Specifically, the row and column numbers corresponding to each pixel point are staggered in the order of YX, as Figure 9 shown, the pixel point index of each pixel point in is X1Y0X0. For example, for the pixel point at (0, 0), its corresponding X1 is 0, X0 is 0, and Y0 is also 0. Therefore, the corresponding sampling point index is 0b000 = 0; for another example, for the sampling point at (3, 1), its corresponding X1 is 1, X0 is 1, and Y0 is 1. Therefore, its corresponding sampling point index is 0b111 = 7.

[0092] In the embodiment of the present application, the adjustment operation on the last n bits of the first storage address is to convert the m sampling points arranged in the first arrangement manner into the arrangement according to their positions in the image or image block. For example, the above Figure 8The storage relationship 51 shown in it represents the storage relationship of m sampling points arranged according to the sampling point index in the related art in the memory 20. P0 to P7 represent pixel point indexes, which are obtained based on Morton coding. However, S0 and S1 represent sampling point indexes, which are determined from the standard sampling position or the programmable sampling position and are not obtained according to Morton coding. That is, the pixel index can represent the position of the pixel point in the image or image block, but the sampling point index cannot represent the position of the sampling point in the pixel point, image or image block. In the first storage address of the sampling point indicated after splicing the pixel point index and the sampling point index, the position of the sampling point in the image or image block cannot be represented. Therefore, it is necessary to use the method shown in the embodiments of the present application to re - execute Morton coding on the sampling point based on the known first storage address (pixel point index and sampling point index) of the sampling point to obtain a new second storage address (the actual index of the sampling point in the image or image block). The re - encoded second storage address is as shown in Figure 8 the storage relationship 52 shown in it. For the storage relationship 51 and the storage relationship 52, if the compression unit is used to perform interleaved recovery on the m sampling points corresponding to the storage relationship 51, the image block 53 will be obtained. By comparing the image block 50 and the image block 53, it can be known that the storage relationship 51 destroys or loses the position information of the m sampling points, and due to the arrangement based on this first arrangement method and the interleaved recovery, high - frequency information (sharp changes in gray values) is generated in the image block 53, and this high - frequency information is not conducive to image compression by the compression unit. After the address rearrangement shown in the embodiments of the present application is adopted, the image block 54 corresponding to the storage relationship 52 well retains the low - frequency information in the image block 54.

[0093] Exemplarily, the process of address rearrangement is as shown in Figure 10As shown, it should be noted that in this example, two sampling points within a pixel are taken as an example with an up-and-down relationship. For the case of the first arrangement method, it is equivalent to performing Morton encoding on at least one pixel, and then obtaining the first storage address based on the pixel index and the sampling point index; the address rearrangement process is to generate the second storage address for m sampling points, and this second storage address will be able to reflect the position information of the sampling points in the image or image block, that is, it can be understood as re-performing Morton encoding based on the known pixel index and sampling point index to obtain the second storage address of the sampling points or the last n bits of the second storage address. Since the sampling points within a pixel are taken as an up-and-down relationship, that is, for a 2×4 pixel, during the Morton encoding process, this image block needs to be regarded as a 4×4 sampling point. In the first arrangement method, the first storage address can be expressed as X1Y0X0S0, where X1Y0X0 represents the pixel index and S0 represents the sampling point index, that is, Address_Origin[3:0]=X1Y0X0S0. Since the sampling points within a pixel are taken as an up-and-down relationship, during the Morton encoding process, Y is expanded from one bit to two bits, and the expanded row number can be represented based on the original row number Y0 and the sampling point index S0, and the expanded row number can be expressed as Y0 ( S0), where, ( S0) represents the negation of the sampling point index. This is because according to the standard sampling position, the sampling point index of the upper sampling point is 1 and the lower sampling point is 0, which does not match the actual position of the sampling points in the image block. After the row number is expanded, the second storage address of each sampling point or the last n bits of the second storage address can be obtained by performing Morton encoding based on the expanded row number and the original column number. That is, Address_Remap[3:0]=Y0X1 ( S0)X0.

[0094] It should be noted that the value of n is related to the number of sampling points included in the image block, or rather, the value of n is related to the number of bits of the binary number representing the number of rows and columns of the image block. In addition, in the above example, the sampling points included in a pixel are taken as an up-and-down arrangement, and the expansion of the row number Y is used as an example for illustration; but in actual implementation, the sampling points included in the pixel can also be taken as a left-and-right arrangement, and the column number X is expanded. That is, the embodiment of the present application does not limit the method for determining the second storage address based on the first storage address during the address rearrangement process, but the protection scope of the embodiment of the present application is not limited thereto.

[0095] In addition, in the above example, 2×4 pixel points are used, and each pixel point includes 2 sampling points, which are expanded into a 4×4 Morton code for illustration. However, it can also be applied to scenarios such as 1×2 pixel points, 2×2 pixel points, 4×4 pixel points, etc. The embodiments of the present application do not limit this. For scenarios with different numbers of pixel points, the main difference lies in the row and column numbers when re-performing Morton encoding. It only needs to ensure that the row and column numbers are arranged alternately. When the binary bit corresponding to the row number is greater than the binary bit corresponding to the column number, or the binary bit corresponding to the column number is greater than the binary bit corresponding to the row number, for example, when the row number has 1 bit (Y0) and the column number has 3 bits (X2X1X0), it is still based on interleaved sorting, such as it can be expressed as X2X1Y0X0, so as to obtain the pixel point index.

[0096] In some embodiments, when the sampling points in a pixel point are regarded as arranged vertically, multiple even bits are used to indicate the row number after rearrangement, and multiple odd bits are used to indicate the column number after rearrangement. The multiple even bits include the last bit numbered 0; adjusting the order of each bit in the adjusted n bits to determine the second storage address corresponding to the i-th first storage address includes: adjusting the order of each bit in the adjusted n bits to obtain the last n bits of the second storage address corresponding to the i-th first storage address, so that the last n bits of the i-th second storage address are the Morton code corresponding to the position information of the i-th sampling point in the image block.

[0097] In some embodiments, when the sampling points in a pixel point are regarded as arranged horizontally, multiple even bits are used to indicate the row number after rearrangement, and multiple odd bits are used to indicate the column number after rearrangement. The multiple even bits do not include the last bit numbered 0, that is, the number of the first odd bit is 1, the number of the first even bit is 2, and so on. Adjusting the order of each bit in the adjusted n bits to determine the second storage address corresponding to the i-th first storage address includes: adjusting the order of each bit in the adjusted n bits to obtain the last n bits of the second storage address corresponding to the i-th first storage address, so that the last n bits of the i-th second storage address are the Morton code corresponding to the position information of the i-th sampling point in the image block.

[0098] In summary, the method provided by the embodiments of the present application shows a method for determining m second storage addresses based on address rearrangement. After address rearrangement, the second storage addresses or the last n bits of the second storage addresses that can represent the positions of m sampling points in the image or image block are obtained. The position information of the m sampling points can be restored and saved. In the scenario of image compression, it can avoid high-frequency information introduced due to the loss of the position information of the sampling points, and improve the compression ratio of image compression.

[0099] In addition, the specific process of address rearrangement is also shown. Based on the pixel point index and sampling point index in the last n bits of the first storage address, and re - based on the known pixel point index and sampling point index, using the method of Morton coding, with the sampling point as the basic element in the image block as the coding condition, the Morton code (i.e., the second storage address or the last n bits of the second storage address) in which the position information is implied for each sampling point in the image block is obtained, realizing the rearrangement of m sampling points. And the address rearrangement process in the case of 2×4 pixel points is also shown, thus clarifying the specific steps of the address rearrangement process, as well as how to obtain the Morton code for each sampling point based on the known pixel point index and sampling point index, maintaining the spatial locality in the image block, and being able to improve the efficiency of application scenarios that need to process local information in space, such as the rendering scenario for the detail area. In addition, the multi - dimensional information is converted into one - dimensional information, optimizing the storage of information. And a unique index related to the position information for each sampling point is generated, facilitating the improvement of the efficiency of the lookup and read operations for this unique index.

[0100] Determination method two: Look - up table.

[0101] In some embodiments, step 222 above can be implemented as: obtaining a look - up table, where the look - up table is used to indicate the mapping relationship between m first storage addresses and m second storage addresses; based on the look - up table, looking up the second storage address corresponding to each first storage address among the m first storage addresses to determine the m second storage addresses.

[0102] Optionally, the look - up table is stored in the terminal device. The look - up table is pre - set by the user or developer.

[0103] Optionally, there are at least one look - up table stored in the terminal device, and the mapping relationships and the number of mapping relationships included in each look - up table are different. For example, for standard sampling positions, there are 3 look - up tables. One look - up table corresponds to an application scenario of 2×4 pixel points, and each pixel point includes 2 sampling points; one look - up table corresponds to an application scenario of 1×2 pixel points, and each pixel point includes 8 sampling points; and there is also one look - up table corresponding to an application scenario of 2×2 pixel points, and each pixel point includes 8 sampling points, and so on. For programmable sampling positions, there are 3 look - up tables. One look - up table corresponds to programming method 1, one look - up table corresponds to programming method 2, and there is also one look - up table corresponding to programming method 3, and so on.

[0104] Optionally, the terminal device obtains the look - up table corresponding to the compression unit based on the compression unit.

[0105] Optionally, based on a lookup table, find the second storage address corresponding to each of the m first storage addresses to determine the m second storage addresses, including: for the i-th first storage address among the m first storage addresses, query the i-th second storage address corresponding to the i-th first storage address from the lookup table; let i = i + 1, and re-enter the step of querying the i-th second storage address corresponding to the i-th first storage address from the lookup table to start execution until the m second storage addresses are determined, where i is a positive integer.

[0106] In some embodiments, the lookup table is used to indicate the mapping relationship between the last n bits of the m first storage addresses and the last n bits of the m second storage addresses; based on the lookup table, find the second storage address corresponding to each of the m first storage addresses to determine the m second storage addresses, including: obtain the last n bits of the m first storage addresses; based on the last n bits of the m first storage addresses, find the last n bits of the second storage addresses corresponding to the m first storage addresses; based on the last n bits of the second storage addresses corresponding to the m first storage addresses, determine the m second storage addresses.

[0107] Optionally, the last n bits of the first storage address are used to indicate at least one of the sampling point index and the pixel point index of the sampling point corresponding to the first storage address. For example, among the last n bits of the first storage address, the first n - s bits represent the pixel point index, and the last s bits represent the sampling point index, where s is a positive integer.

[0108] Optionally, based on the last n bits of the second storage addresses corresponding to the m first storage addresses, that is, the last n bits of the m second storage addresses, determine the m second storage addresses. Optionally, the second storage address is an analog storage address, that is, the second storage address is mainly used to indicate the position of its corresponding sampling point among the m sampling points. Therefore, the address bits of the second storage address can be different from those of the first storage address. Or, the second storage address is an actual storage address, that is, the i-th sampling point will be stored at the storage position corresponding to the second storage address after rearrangement. Then, based on the last n bits of the i-th second storage address and the i-th first storage address, determine the i-th second storage address. For the specific description of the second storage address, reference can be made to the description in "Determination Method 1: Address Rearrangement" above, and details will not be elaborated here.

[0109] In some embodiments, the sampling point positions of the m sampling points included in each pixel point of at least one pixel point are standard sampling positions; or, the sampling point positions of the m sampling points included in each pixel point of at least one pixel point are programmable sampling positions.

[0110] Therefore, the process of determining the second storage address using the lookup table for standard sampling positions and programmable sampling positions will be described next.

[0111] (1) Standard sampling positions.

[0112] The standard sampling positions are as Figure 7 shown. Next, taking an example where one pixel includes 8 sampling points and one image block includes 1×2 pixels, for the 8 sampling points within one pixel, the corresponding second arrangement is as Figure 11 shown. That is, the storage order of the 8 sampling points S0 to S7 within one pixel in the storage unit should be S3→S7→S5→S0→S1→S2→S4→S6, that is, it should be stored in a manner that satisfies the mapping relationship in the Morton coding process.

[0113] Exemplarily, as Figure 12 shown, for the image block 60, if the m sampling points in the image block 60 are arranged using the first arrangement method, their storage relationship 61 in the memory 20 is as Figure 12 shown. If the interleaved recovery is performed on this storage relationship 61, the image block 63 will be recovered. Compared with the image block 60, the image block 63 introduces high-frequency information that is not conducive to image compression. If the m sampling points are rearranged using the lookup table shown in Table 1 below to obtain m sampling points arranged according to the second arrangement method, then the storage relationship 62 shown in Figure 12 can be obtained. For the interleaved recovery of this storage relationship 62, the image block 64 that retains the low-frequency information in the image block 60 can be recovered.

[0114] Table 1 Lookup Table

[0115] For example, for m first storage addresses, obtain the last 4 bits of the m first storage addresses. Then, the first 1 bit of the last 4 bits is used to represent the pixel index, and the last 3 bits are used to represent the sampling point index. That is, the last 4 bits of the first storage address can be expressed as Address_Origin[3:0]=X0S2S1S0. In the process of determining the last 4 bits of the m second storage addresses based on the lookup table, the last 4 bits of the second storage address can be expressed as Address_Remap[3:0]=LUT(Address_Origin[3:0]), that is, based on the last 4 bits of the first storage address, query the last 4 bits of the second storage address corresponding to these last 4 bits from the lookup table. And in the above Table 1, it is represented by taking 1 hexadecimal digit (equivalent to 4 binary digits) as an example. For example, when the last 4 bits of the first storage address are 0x1, that is, 0b0001, according to Table 1, the last 4 bits of its corresponding second storage address can be obtained as 0x8, that is, 0b1000. The determination methods for other first storage addresses are similar and will not be exemplified here.

[0116] (2) Programmable sampling positions.

[0117] Exemplarily, in the case of using programmable sampling positions, if it is set that one pixel includes 8 sampling points and one image block includes 1×2 pixels, the sampling point positions included in the image block can refer to Figure 13 the sampling point positions in the image block 70 shown in. At this time, the storage order of the 8 sampling points S0 to S7 within one pixel in the storage unit should be S7→S3→S6→S2→S5→S1→S4→S0, that is, they should be stored in a manner that satisfies the mapping relationship in the Morton coding process. For MSAA2X, MSAA4X, and MSAA8X, the hardware will re-arrange the 16 sampling points according to the LUT table configured by the driver.

[0118] Exemplarily, as Figure 13 shown, for the image block 70, if the m sampling points in the image block 70 are arranged using the first arrangement method, its storage relationship 71 in the memory 20 is as Figure 13 shown. If an interleaved recovery is performed on this storage relationship 71, the image block 73 will be recovered. Compared with the image block 70, the image block 73 introduces high-frequency information that is not conducive to image compression. If the lookup table shown in Table 2 below is used to re-arrange the m sampling points to obtain m sampling points arranged according to the second arrangement method, then the storage relationship 72 shown in Figure 13 can be obtained. For this storage relationship 72, an interleaved recovery can recover the image block 74 that retains the low-frequency information in the image block 70.

[0119] Table 2 Lookup Table

[0120] For example, for m first storage addresses, the last 4 bits of the m first storage addresses are obtained. Then, the first 1 bit in the last 4 bits is used to represent the pixel index, and the last 3 bits are used to represent the sampling point index. That is, the last 4 bits of the first storage address can be expressed as Address_Origin[3:0]=X0S2S1S0. In the process of determining the last 4 bits of the m second storage addresses based on the lookup table, the last 4 bits of the second storage address can be expressed as Address_Remap[3:0]=LUT_PROG(Address_Origin[3:0]), that is, based on the last 4 bits of the first storage address, the last 4 bits of the second storage address corresponding to these last 4 bits are queried from the lookup table. And in the above Table 1, it is shown by taking 1 hexadecimal digit (equivalent to 4 binary digits) as an example. For example, when the last 4 bits of the first storage address are 0x1, that is, 0b0001, according to Table 1, the last 4 bits of its corresponding second storage address can be obtained as 0x8, that is, 0b1000. The determination methods for other first storage addresses are similar and will not be exemplified here.

[0121] In summary, for the method provided by the embodiments of the present application, when determining m second storage addresses, direct query is performed based on the lookup table. Compared with the first determination method, the efficiency of determining the second storage address can be improved. Moreover, the applicable scenarios of the method for determining the second storage address according to the lookup table are more diverse, improving the usability of the rearrangement method of sampling points based on the lookup table.

[0122] In addition, the lookup table only includes the mapping relationship between the last n bits of the first storage address and the last n bits of the second storage address. Compared with the case where the lookup table includes the mapping relationship between m first storage addresses and m second storage addresses, the data volume of the lookup table is reduced, thereby improving the lookup efficiency of finding the second storage address based on the lookup table.

[0123] And for the standard sampling positions, the method provided by the embodiments of the present application can better restore the position information between sampling points, reduce the probability of generating high-frequency signals to improve the compression ratio. For programmable sampling positions, the method provided by the embodiments of the present application provides a more flexible means for the driver to restore the position information of sampling points.

[0124] It should be noted that the above "first determination method: address rearrangement" and "second determination method: lookup table" can be implemented as independent embodiments or as combined embodiments. For example, for a scenario where a pixel point includes 2 sampling points, the method shown in the above "first determination method: address rearrangement" is used for rearrangement; for a scenario where a pixel point includes more sampling points, such as 4 sampling points, 8 sampling points, etc., and if using the "first determination method: address rearrangement" may lead to excessive calculation amounts, the "second determination method: lookup table" can be used for rearrangement. The embodiments of the present application do not limit this.

[0125] In some embodiments, the method further includes: obtaining configuration information of an image block, where the image block includes at least one pixel point, and the configuration information of the image block is used to indicate the number of sampling points corresponding to each pixel point in the at least one pixel point.

[0126] Optionally, based on the configuration information of the image block, a determination method for determining m second storage addresses based on m first storage addresses is selected (i.e., the above first determination method or second determination method).

[0127] Optionally, the configuration information is further used to indicate that the sampling point positions in each pixel point are standard sampling positions or programmable sampling positions. Based on the configuration information, a lookup table corresponding to the sampling point positions of each pixel point is obtained.

[0128] Among them, information such as the number of sampling points in a pixel point is indicated through the configuration information, so as to determine the rearrangement method used based on information such as the number of sampling points, improving the diversity and flexibility of the rearrangement method.

[0129] Next, taking the application of the above rearrangement method to the field of image compression as an example, the rearrangement method of the above sampling points applied in the image compression process will be described.

[0130] Step 1: Based on the compression unit, read m sampling points arranged in the first arrangement manner from the storage unit. The m sampling points are the sampling points in at least one pixel point within the compression unit. The first arrangement manner is an arrangement manner based on the sampling point indices of the m sampling points, and m is a positive integer greater than 1.

[0131] Optionally, the first arrangement manner is not related to the mapping rule of the compression unit. The mapping rule of the compression unit refers to the rule that after the compression unit reads multiple sampling points from the storage unit, maps each sampling point to different positions of its corresponding pixel point; or, the mapping rule of the compression unit refers to the rule that after the compression unit reads multiple sampling points from the storage unit, maps each sampling point to different positions of the image or image block.

[0132] Step 2: Rearrange the m sampling points to obtain m sampling points arranged in the second arrangement manner. The second arrangement manner is an arrangement manner based on the positions of the m sampling points in at least one pixel point.

[0133] Optionally, the second arrangement manner is related to the mapping rule of the compression unit.

[0134] In some embodiments, rearranging the m sampling points to obtain m sampling points arranged in the second arrangement manner includes: obtaining m first storage addresses of the m sampling points in the storage unit, where the m first storage addresses correspond one-to-one to the m sampling points; based on the m first storage addresses, determining m second storage addresses, where the m second storage addresses correspond one-to-one to the m sampling points, and the m second storage addresses are different from the m first storage addresses; based on the m second storage addresses, determining the m sampling points arranged in the second arrangement manner.

[0135] In some embodiments, the determination method for determining the m second storage addresses based on the m first storage addresses can refer to the above "Determination Method 1: Address Rearrangement" and "Determination Method 2: Lookup Table", which will not be elaborated here.

[0136] Step 3: Store the m sampling points arranged in the second arrangement manner into the storage unit.

[0137] Step 4: The compression unit takes out the m sampling points arranged in the second arrangement manner from the storage unit; based on the taken-out m sampling points and the mapping rule of the compression unit, the image block is restored.

[0138] Optionally, the sampling point positions of the respective sampling points in the image block restored by the compression unit are the same as or similar to the sampling point positions of the sampling points in the image block before being stored in the storage unit.

[0139] In some embodiments, the sampling point positions of the m sampling points included in each pixel point of at least one pixel point are standard sampling positions; or, the sampling point positions of the m sampling points included in each pixel point of at least one pixel point are programmable sampling positions.

[0140] In some embodiments, the method further includes: obtaining configuration information of an image block, where the image block includes at least one pixel point, and the configuration information of the image block is used to indicate the number of sampling points corresponding to each pixel point in the at least one pixel point. Optionally, the configuration information of the image block is used to indicate at least one of the size of the compression unit, the mapping rule of the compression unit, and the sampling point positions in each pixel point.

[0141] In summary, the method provided in the embodiments of the present application shows an example of applying the method shown in the embodiments themselves to the field of image compression. By rearranging, the m sampling points originally stored in the storage unit in the first arrangement manner, that is, the m sampling points stored based on the sampling point index, are rearranged into the m sampling points stored in the second arrangement manner, that is, the m sampling points stored based on the position of each sampling point in at least one pixel point among the m sampling points. For the storage of sampling points, the position information of the sampling points in at least one pixel point (or image or image block) is introduced, so that the m sampling points arranged in the second arrangement manner support various algorithms that require position information, such as image compression algorithms. It avoids the loss of the position information of the sampling points during the storage of the m sampling points and improves the flexibility of the storage of the m sampling points. Moreover, storing based on the second arrangement manner of the positions of the m sampling points in at least one pixel point is more friendly to the data access method of accessing the storage unit based on position information, and can improve the access efficiency of the m sampling points in the storage unit and improve the query performance. Especially for the image compression algorithm designed for low-frequency information, performing image compression based on the m sampling points arranged in the second arrangement manner rather than the m sampling points arranged in the first arrangement manner can improve the image compression ratio, for example, improve the compression ratio of the image compression algorithm based on wavelet transform. This is because the first arrangement manner may introduce high-frequency information that does not exist in the original image or image block, resulting in a decrease in the compression ratio.

[0142] Please refer to Figure 14, which shows a structural block diagram of a rearrangement device for sampling points provided by an exemplary embodiment of the present application. This device has the function of implementing the example of the above-mentioned sampling point rearrangement method, and the function can be implemented by hardware or by hardware executing corresponding software. This device can be the computer device introduced above or can be set in the computer device. As Figure 14 shown, the device may include: an acquisition module 410, a rearrangement module 420, and a storage module 430.

[0143] The acquisition module 410 is configured to read m sampling points arranged in a first arrangement manner from a storage unit, where the m sampling points are sampling points in at least one pixel point, and the first arrangement manner is an arrangement manner based on the sampling point indexes of the m sampling points, and m is a positive integer greater than 1.

[0144] The rearrangement module 420 is configured to rearrange the m sampling points to obtain m sampling points arranged in a second arrangement manner, where the second arrangement manner is an arrangement manner based on the positions of the m sampling points in the at least one pixel point.

[0145] The storage module 430 is configured to store the m sampling points arranged in the second arrangement manner into the storage unit.

[0146] In some embodiments, the rearrangement module 420 is further configured to obtain m first storage addresses of the m sampling points in the storage unit, where the m first storage addresses correspond to the m sampling points one by one; based on the m first storage addresses, determine m second storage addresses, where the second storage addresses correspond to the m sampling points one by one, and the m second storage addresses are different from the m first storage addresses; based on the m second storage addresses, determine m sampling points arranged in a second arrangement manner.

[0147] In some embodiments, the rearrangement module 420 is further configured to, for the i-th first storage address among the m first storage addresses, obtain the last n bits of the i-th first storage address, where the last bit of the last n bits is used to indicate the sampling point index of the sampling point corresponding to the i-th first storage address, and the first n - 1 bits of the last n bits are used to indicate the pixel point index of the pixel point corresponding to the i-th first storage address, and both i and n are positive integers; adjust the order of each bit in the last n bits to determine the second storage address corresponding to the i-th first storage address; let i = i + 1, and re-enter the step of obtaining the last n bits of the i-th first storage address to start execution until the m second storage addresses are determined.

[0148] In some embodiments, the rearrangement module 420 is further configured to invert the last bit of the last n bits; number from the last bit to obtain a plurality of odd bits and a plurality of even bits; swap the j-th odd bit and the j-th even bit, where the j-th odd bit is the j-th odd bit from right to left in the last n bits, and the j-th even bit is the j-th even bit from right to left in the last n bits, and j is a positive integer; determine the second storage address corresponding to the i-th first storage address based on the last n bits after swapping the order of the bits.

[0149] In some embodiments, n is 4, and the last 4 bits of the i-th first storage address from right to left are the first bit, the second bit, the third bit, and the fourth bit respectively. The second bit, the third bit, and the fourth bit are used to indicate the pixel index of the pixel point of the sampling point corresponding to the i-th storage address, and the first bit is used to indicate the sampling point index of the sampling point corresponding to the i-th first storage address; the rearrangement module 420 is further configured to invert the first bit to obtain the inverted first bit; swap the fourth bit and the third bit, and swap the second bit and the inverted first bit.

[0150] In some embodiments, the rearrangement module 420 is further configured to obtain a lookup table, where the lookup table is used to indicate the mapping relationship between m first storage addresses and the m second storage addresses; based on the lookup table, look up the second storage address corresponding to each first storage address in the m first storage addresses, and determine the m second storage addresses.

[0151] In some embodiments, the lookup table is used to indicate the mapping relationship between the last n bits of the m first storage addresses and the last n bits of the m second storage addresses; the rearrangement module 420 is further configured to obtain the last n bits of the m first storage addresses; based on the last n bits of the m first storage addresses, look up the last n bits of the second storage address corresponding to the m first storage addresses; based on the last n bits of the second storage address corresponding to the m first storage addresses, determine the m second storage addresses.

[0152] In some embodiments, the sampling point positions of the m sampling points included in each pixel point of at least one pixel point are standard sampling positions; or, the sampling point positions of the m sampling points included in each pixel point of at least one pixel point are programmable sampling positions.

[0153] In some embodiments, the acquisition module 410 is further configured to acquire configuration information of an image block, where the image block includes at least one pixel point, and the configuration information of the image block is used to indicate the number of sampling points corresponding to each pixel point in the at least one pixel point.

[0154] In summary, the device provided by the embodiments of the present application shows an example of applying the method shown in its own embodiments to the field of image compression. By means of rearrangement, m sampling points originally stored in a storage unit in a first arrangement manner, that is, m sampling points stored based on sampling point indexes, are rearranged into m sampling points stored in a second arrangement manner, that is, m sampling points stored based on the positions of each of the m sampling points in at least one pixel point. For the storage of sampling points, the position information of the sampling points in at least one pixel point (or an image or an image block) is introduced, so that the m sampling points arranged in the second arrangement manner support various algorithms that require the use of position information, such as image compression algorithms. The loss of the position information of the sampling points during the storage of the m sampling points is avoided, and the flexibility of the storage of the m sampling points is improved. Moreover, by storing based on the second arrangement manner of the positions of the m sampling points in at least one pixel point, it is more friendly to the data access manner of accessing the storage unit based on the position information, and the access efficiency of the m sampling points in the storage unit and the query performance can be improved.

[0155] It should be noted that when the device provided in the above embodiment realizes its functions, only the above-mentioned division of each functional module is used for illustration. In actual applications, the above functions can be allocated to different functional modules according to needs, that is, the internal structure of the device is divided into different functional modules to complete all or part of the functions described above. In addition, the device provided in the above embodiment and the method embodiment belong to the same concept, and the specific implementation process is detailed in the method embodiment, which will not be repeated here.

[0156] Figure 15 The structural schematic diagram of a computer device provided by an exemplary embodiment of the present application is shown.

[0157] The computer device 800 includes a central processing unit (CPU) 801, a system memory 804 including a random access memory (RAM) 802 and a read-only memory (ROM) 803, and a system bus 805 connecting the system memory 804 and the central processing unit 801. The computer device 800 also includes a basic input / output system (Input / Output system, I / O system) 806 for facilitating the transmission of information between various components within the computer device, and a mass storage device 807 for storing an operating system 813, application programs 814, and other program modules 815.

[0158] The basic input / output system 806 includes a display 808 for displaying information and input devices 809 such as a mouse, keyboard, etc. for user input of information. Both the display 808 and the input devices 809 are connected to the central processing unit 801 through an input / output controller 810 connected to the system bus 805. The basic input / output system 806 may also include an input / output controller 810 for receiving and processing inputs from a plurality of other devices such as a keyboard, mouse, or electronic stylus. Similarly, the input / output controller 810 also provides outputs to a display screen, printer, or other types of output devices.

[0159] The mass storage device 807 is connected to the central processing unit 801 through a mass storage controller (not shown) connected to the system bus 805. The mass storage device 807 and its associated computer-readable storage medium provide non-volatile storage for the computer device 800. That is, the mass storage device 807 may include computer-readable storage media (not shown) such as a hard disk or a compact disc read-only memory (CD-ROM) drive.

[0160] Without loss of generality, the computer-readable storage medium may include computer storage media and communication media. Computer storage media includes volatile and non-volatile, removable and non-removable media implemented by any method or technology for storing information such as computer-readable storage instructions, data structures, program modules, or other data. Computer storage media includes RAM, ROM, erasable programmable read-only registers (EPROM), electrically-erasable programmable read-only memory (EEPROM), flash memory or other solid-state storage technologies, CD-ROM, digital versatile disc (DVD) or other optical storage, magnetic tape cartridges, tapes, disk storage or other magnetic storage devices. Of course, those skilled in the art will know that the computer storage media is not limited to the above several types. The above system memory 804 and mass storage device 807 may be collectively referred to as memory.

[0161] The memory stores one or more programs, the one or more programs are configured to be executed by one or more central processing units 801, the one or more programs contain instructions for implementing the above method embodiments, and the central processing unit 801 executes the one or more programs to implement the methods provided by the above respective method embodiments.

[0162] According to various embodiments of the present application, the computer device 800 may also run by connecting to a remote computer device on a network such as the Internet. That is, the computer device 800 may be connected to the network 812 through the network interface unit 811 connected to the system bus 805. Or rather, the network interface unit 811 may also be used to connect to other types of networks or remote computer device systems (not shown).

[0163] The memory further includes one or more programs, and the one or more programs are stored in the memory. The one or more programs include steps for performing the method provided by the embodiments of the present application and executed by the computer device.

[0164] In an exemplary embodiment, a non-transitory computer-readable storage medium is further provided, on which a computer program is stored. When the computer program is executed by a processor, the rearrangement method of the above sampling points is implemented.

[0165] In an exemplary embodiment, a computer program product is further provided. When the computer program product is executed by a processor, it is used to implement the rearrangement method of the above sampling points.

[0166] On the other hand, an embodiment of the present application provides a graphics card, and the graphics card includes the compression unit described in each of the above embodiments.

[0167] It should be understood that "a plurality of" mentioned herein refers to two or more. The character " / " generally indicates that the objects before and after are in an "or" relationship. In addition, the step numbers described herein only exemplarily show a possible execution sequence between steps. In some other embodiments, the above steps may not be executed in the order of the numbers. For example, two steps with different numbers may be executed simultaneously, or two steps with different numbers may be executed in the reverse order of the illustration. The embodiments of the present application do not limit this.

[0168] The above are only optional embodiments of the present application and are not intended to limit the present application. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims

1. A method for rearranging sampling points, characterized in that: The method comprises: Reading m sampling points arranged in a first arrangement from a storage unit, wherein the m sampling points are sampling points in at least one pixel, the first arrangement is an arrangement based on sampling point indexes of the m sampling points, and m is a positive integer greater than 1; Rearranging the m sampling points to obtain m sampling points arranged in a second arrangement manner, where the second arrangement manner is an arrangement manner based on positions of the m sampling points in the at least one pixel point; The m sampling points arranged in the second arrangement manner are stored in the storage unit.

2. The method according to claim 1, characterized in that The rearrangement of the m sampling points to obtain m sampling points arranged in a second arrangement manner includes: Obtaining m first storage addresses of the m sampling points in the storage unit, wherein the m first storage addresses correspond one-to-one to the m sampling points; Based on the m first storage addresses, determining m second storage addresses, wherein the second storage addresses correspond to the m sampling points one by one, and the m second storage addresses are different from the m first storage addresses; Based on the m second storage addresses, the m sampling points arranged in the second arrangement manner are determined.

3. The method according to claim 2, characterized in that The determining m second storage addresses based on the m first storage addresses comprises: For an i-th first storage address among the m first storage addresses, obtain the last n bits of the i-th first storage address, where the last bit of the last n bits is used to indicate a sampling point index of a sampling point corresponding to the i-th first storage address, and the first n-1 bits of the last n bits are used to indicate a pixel point index of a pixel point corresponding to the i-th first storage address, where i and n are both positive integers; Adjusting the order of each bit in the last n bits to determine the second storage address corresponding to the i-th first storage address; Let i=i+1, and re-enter the step of obtaining the last n bits of the i-th first storage address and start executing until the m second storage addresses are determined.

4. The method according to claim 3, characterized in that The adjusting the order of the bits in the last n bits to determine the second storage address corresponding to the i-th first storage address includes: Invert the last bit of the last n bits; Starting numbering from the last digit, a plurality of odd digits and a plurality of even digits are obtained; Swap the jth odd bit and the jth even bit, wherein the jth odd bit is the jth odd bit from right to left among the last n bits, and the jth even bit is the jth even bit from right to left among the last n bits, where j is a positive integer; Based on the last n bits after the order of the bits is swapped, the second storage address corresponding to the i-th first storage address is determined.

5. The method according to claim 4, characterized in that The n is 4, the last 4 bits of the i-th first storage address are respectively the first bit, the second bit, the third bit and the fourth bit from right to left, the second bit, the third bit and the fourth bit are used to indicate the pixel point index of the sampling point corresponding to the i-th storage address, and the first bit is used to indicate the sampling point index of the sampling point corresponding to the i-th first storage address; The step of inverting the last bit of the last n bits comprises: Inverting the first bit to obtain the inverted first bit; The exchanging the j-th odd bit and the j-th even bit comprises: The fourth bit and the third bit are exchanged, and the second bit and the inverted first bit are exchanged.

6. The method according to claim 2, characterized in that The determining m second storage addresses based on the m first storage addresses comprises: Obtaining a lookup table, wherein the lookup table is used to indicate a mapping relationship between the m first storage addresses and the m second storage addresses; Based on the lookup table, the second storage address corresponding to each of the m first storage addresses is searched to determine the m second storage addresses.

7. The method according to claim 6, characterized in that The lookup table is used to indicate a mapping relationship between the last n bits of the m first storage addresses and the last n bits of the m second storage addresses; The step of searching, based on the lookup table, for a second storage address corresponding to each of the m first storage addresses to determine the m second storage addresses comprises: Obtaining the last n bits of the m first storage addresses; Based on the last n bits of the m first storage addresses, searching for the last n bits of the second storage addresses corresponding to the m first storage addresses; The m second storage addresses are determined based on the last n bits of the second storage addresses corresponding to the m first storage addresses.

8. The method according to any one of claims 1 to 7, characterized in that: The sampling point positions of the m sampling points included in each pixel point of the at least one pixel point are standard sampling points; or the sampling point positions of the m sampling points included in each pixel point of the at least one pixel point are programmable sampling positions.

9. The method according to any one of claims 1 to 7, characterized in that: The method further comprises: Configuration information of an image block is acquired, where the image block includes at least one pixel point, and the configuration information of the image block is used to indicate the number of sampling points corresponding to each pixel point in the at least one pixel point.

10. A sampling point rearrangement device, characterized in that: The device comprises: An acquisition module, configured to read from a storage unit m sampling points arranged in a first arrangement manner, wherein the m sampling points are sampling points in at least one pixel point, and the first arrangement manner is an arrangement manner based on sampling point index arrangement of the m sampling points, and m is a positive integer greater than 1; a rearrangement module, configured to rearrange the m sampling points to obtain m sampling points arranged in a second arrangement manner, wherein the second arrangement manner is an arrangement manner based on positions of the m sampling points in the at least one pixel point; A storage module is used to store the m sampling points arranged in the second arrangement manner into the storage unit.

11. A computer device, characterized in that: The computer device comprises: a processor and a memory, wherein the memory stores at least one program; the processor is configured to execute the at least one program in the memory to implement the sampling point rearrangement method according to any one of claims 1 to 9.

12. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores executable instructions, and the executable instructions are loaded and executed by a processor to implement the sampling point rearrangement method according to any one of claims 1 to 9.

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