Scribing channel cutting anomaly detection method, system and equipment and storage medium

Abstract

The invention provides a scribing channel cutting abnormity detection method, system and device and a storage medium, and the detection method comprises the following steps: obtaining the size information of a to-be-scanned wafer, the to-be-scanned wafer comprises a plurality of chips and a plurality of cut scribing channels, and the size information is the position information of each chip on the to-be-scanned wafer; obtaining a theoretical coordinate data set of the simulated scribing channel according to the size information; optically scanning the to-be-scanned wafer to obtain an image of the to-be-scanned wafer; obtaining a grayscale image of the wafer to be scanned according to the image, and obtaining an actual measurement coordinate data set of each cut scribing channel according to the grayscale image; and according to the theoretical coordinate data set of the simulated scribing channel and the actually measured coordinate data set of each cut scribing channel, whether position deviation exists in each cut scribing channel or not is judged. According to the detection method, the characteristic that the gray value difference of the cut / uncut scribing channels is large is utilized, and rapid and accurate grabbing and monitoring of the abnormal cutting of the scribing channels are achieved.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor devices, and more particularly, to a method, system, device and storage medium for detecting abnormal dicing channels. Background Art

[0002] The dicing channel is a cutting channel reserved during the semiconductor wafer manufacturing process to separate each chip with independent electrical performance. The existing methods related to dicing channel scanning mainly use the front scanning method of the scanner in units of each exposure unit (shot), taking the dicing channel position as the scanning area, and confirming dicing channel abnormalities through scanning. This method can only scan the dicing channels within a complete exposure unit, cannot cover the dicing channel area of the entire wafer, and has extremely high noise, with insufficient detection ability for phenomena such as missed dicing, misdicing, and off-cutting of the dicing channel. Currently, the detection methods for dicing channel cutting abnormalities mostly rely on abnormal alarms in the machine tool program, manual macroscopic inspection, etc., and there is a high risk of missed detection.

[0003] It should be noted that the information disclosed in the above background art section is only used to enhance the understanding of the background of the present invention, and therefore may include information that does not constitute the prior art known to those skilled in the art. Summary of the Invention

[0004] Aiming at the problems in the prior art, the purpose of the present invention is to provide a method, system, device and storage medium for detecting abnormal dicing channels. This method for detecting abnormal dicing channels utilizes the characteristic that the gray levels of the cut / uncut dicing channels have a large difference. By scanning the cut dicing channels to obtain the gray-scale image of the cut dicing channels, and comparing it with the target dicing channel, it is possible to detect whether there is a deviation between the actually obtained dicing channel and the target dicing channel, thereby achieving rapid and accurate capture and monitoring of abnormal dicing channel cutting.

[0005] Specifically, an embodiment of the present invention provides a method for detecting abnormal dicing channels, and the detection method includes the following steps:

[0006] Obtain the size information of the wafer to be scanned, where the wafer to be scanned includes a plurality of chips and a plurality of cut dicing channels, and the size information is the position information of each chip on the wafer to be scanned;

[0007] Obtain the theoretical coordinate data set of the simulated dicing channel according to the size information;

[0008] Optically scan the wafer to be scanned to obtain an image of the wafer to be scanned;

[0009] Obtain the gray-scale image of the wafer to be scanned according to the image and obtain the measured coordinate data set of each cut dicing channel according to the gray-scale image;

[0010] Determine whether there is a position deviation for each of the scribing lanes after cutting according to the theoretical coordinate data set of the simulated scribing lanes and the measured coordinate data set of each of the scribing lanes after cutting.

[0011] According to some examples of the present invention, the step of determining whether there is a position deviation for each of the scribing lanes after cutting according to the theoretical coordinate data set of the simulated scribing lanes and the measured coordinate data set of each of the scribing lanes after cutting includes:

[0012] Spatially align the measured coordinate system with the reference coordinate system according to the theoretical coordinate data set of the simulated scribing lanes and the measured coordinate data set of each of the scribing lanes after cutting; establish an affine transformation relationship model between the measured coordinate system and the reference coordinate system;

[0013] Perform feature matching on the center point coordinates of each of the scribing lanes after cutting to determine the center point coordinates of the corresponding simulated scribing lane;

[0014] Calculate the position offset of the center point of each of the scribing lanes after cutting from the center point of the corresponding simulated scribing lane point by point;

[0015] Judge whether the position offset of the center point of each of the scribing lanes after cutting from the center point of the corresponding simulated scribing lane is greater than a set threshold distance;

[0016] If the position offset of the center point of a scribing lane after cutting from the center point of the corresponding simulated scribing lane is greater than a set threshold distance, then there is a position deviation for this scribing lane after cutting.

[0017] According to some examples of the present invention, the step of optically scanning the wafer to be scanned to obtain an image of the wafer to be scanned is to optically scan the back surface of the wafer to be scanned to obtain an image of the back surface of the wafer to be scanned.

[0018] According to some examples of the present invention, in the step of optically scanning the wafer to be scanned to obtain an image of the wafer to be scanned, a snake-shaped scan is used to obtain the image of the back surface of the wafer to be scanned according to the position information of the simulated scribing lanes.

[0019] According to some examples of the present invention, the detection method further includes the following steps:

[0020] Obtain depth information of multiple scribing lanes after cutting according to the grayscale image;

[0021] Judge whether multiple scribing lanes after cutting are cut according to the depth information.

[0022] According to some examples of the present invention, obtaining depth information of multiple scribing lanes after cutting according to the grayscale image includes the following steps:

[0023] Obtain the gray values at multiple cut scribing lanes based on the gray image;

[0024] Obtain the mapping relationship between the gray value and the depth of the scribing lane;

[0025] Obtain the depth information of multiple cut scribing lanes based on the gray values at multiple cut scribing lanes and the mapping relationship.

[0026] According to some examples of the present invention, the steps of determining whether multiple cut scribing lanes are cut based on the depth information include the following steps:

[0027] Traverse the depths at each position of multiple cut scribing lanes and determine whether the depth at each position is greater than the threshold depth;

[0028] If the depth at a position is not greater than the threshold depth, the position of the scribing lane is not cut.

[0029] An embodiment of the present invention also provides a scribing lane cutting anomaly detection system for implementing the steps of the scribing lane cutting anomaly detection method. The detection system includes a data module, a calculation module, an image module, and a judgment module;

[0030] The data module is used to obtain the size information of the wafer to be scanned. The wafer to be scanned includes multiple chips and multiple cut scribing lanes, and the size information is the position information of each chip on the wafer to be scanned;

[0031] The calculation module is used to obtain the position information of the simulated scribing lane according to the size information;

[0032] The image module is used to optically scan the wafer to be scanned to obtain an image of the wafer to be scanned;

[0033] Obtain a gray image of the wafer to be scanned according to the image and obtain the position information of multiple cut scribing lanes according to the gray image;

[0034] The judgment module is used to judge whether there is a position deviation of multiple cut scribing lanes according to the position information of the simulated scribing lane and the position information of multiple cut scribing lanes.

[0035] An embodiment of the present invention also provides an electronic device, including:

[0036] A processor;

[0037] A memory, in which executable instructions of the processor are stored;

[0038] Wherein, the processor is configured to execute the steps of the scribing lane cutting anomaly detection method by executing the executable instructions.

[0039] An embodiment of the present invention also provides a computer-readable storage medium for storing a program, characterized in that when the program is executed by a processor, the steps of the dicing channel cutting anomaly detection method are implemented.

[0040] The dicing channel cutting anomaly detection method of the present invention utilizes the characteristic that the gray levels of the diced / undiced dicing channels are quite different. By scanning the diced dicing channels, a gray-scale image of the diced dicing channels is obtained, and it is compared with the target dicing channels to detect whether there is a deviation between the actually obtained dicing channels and the target dicing channels. Further, this detection method can adopt the backside scanning method of the wafer, effectively avoiding the influence of excessive noise in the front-side scanning of the wafer. Gray levels can be accurately controlled to achieve precise capture of dicing channel cutting anomalies. In addition, optimizing the dicing channel scanning method can also speed up the entire scanning process, thereby improving the efficiency of dicing channel cutting anomaly detection. BRIEF DESCRIPTION OF THE DRAWINGS

[0041] The accompanying drawings herein are incorporated into the specification and form a part of the specification, showing embodiments consistent with the present application, and are used together with the specification to explain the principles of the present application. By reading the detailed description of the non-limiting embodiments with reference to the following drawings, other features, objects, and advantages of the present invention will become more apparent. Obviously, the drawings in the following description are only some embodiments of the present invention. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts. In addition, the drawings are only schematic illustrations of the present disclosure and are not necessarily drawn to scale. The same reference numerals in the drawings represent the same or similar parts, and thus repeated descriptions thereof will be omitted. Some of the block diagrams shown in the drawings are functional entities and do not necessarily correspond to physically or logically independent entities.

[0042] Figure 1 is a flowchart of the dicing channel cutting anomaly detection method according to an embodiment of the present invention;

[0043] Figure 2 is a schematic diagram of the modules of the dicing channel cutting anomaly detection system according to an embodiment of the present invention;

[0044] Figure 3 is a schematic diagram of the structure of an electronic device according to an embodiment of the present invention; and

[0045] Figure 4 is a schematic diagram of the structure of a computer-readable storage medium according to an embodiment of the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0046] Example embodiments will now be described more fully with reference to the accompanying drawings. However, the example embodiments can be implemented in various forms and should not be construed as limited to the examples set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the concept of the example embodiments to those skilled in the art. The described features, structures, or characteristics can be combined in any suitable manner in one or more embodiments.

[0047] In addition, the accompanying drawings are only schematic illustrations of the present disclosure and are not necessarily drawn to scale. The same reference numerals in the drawings denote the same or similar parts, and thus repeated descriptions thereof will be omitted. Some of the block diagrams shown in the drawings are functional entities and do not necessarily correspond to physically or logically independent entities. These functional entities can be implemented in software form, or in one or more hardware modules or integrated circuits, or in different networks and / or processor devices and / or microcontroller devices.

[0048] The dicing lane cutting anomaly detection method, system, device, and storage medium of the present invention will be further described below in conjunction with the accompanying drawings and specific embodiments. It can be understood that each specific embodiment does not limit the protection scope of the present invention.

[0049] An embodiment of the present invention provides a dicing lane cutting anomaly detection method. Figure 1 The flowchart of the dicing lane cutting anomaly detection method according to an embodiment of the present invention is shown. Specifically, the detection method includes the following steps:

[0050] Step S100: Obtain the size information of the wafer to be scanned. Here, the wafer to be scanned is a diced wafer, and the wafer to be scanned is obtained through the following steps: Prepare target chips on a standard wafer. The chips on the wafer are usually arranged regularly, such as in a matrix form. After the chip array preparation is completed, the wafer is diced. Specifically, first, according to the standard wafer map (Golden Map) and die map corresponding to the wafer to be scanned, through the layout editing function of the software, based on the preset dicing rules and parameters, simulate the dicing process to generate dicing lane cutting information, and dice the wafer with the chip array prepared according to the generated dicing lane cutting information. That is, the wafer to be scanned in step S100 includes multiple chips and multiple diced dicing lanes, and the size information is the position information of each chip on the wafer to be scanned. The position information of each chip on the wafer to be scanned is the die map of the wafer. The above size information can usually be obtained by importing the design file in the GDSII format of the wafer.

[0051] Step S200: Obtain the theoretical coordinate dataset of the simulated dicing lanes according to the dimension information. The theoretical coordinate dataset of the ideal dicing lanes can be calculated based on the row and column pitch of the chip. The S200 step is actually similar to the step of generating dicing lane cutting information. The difference is that generating dicing lane cutting information includes the position information of the dicing lanes and cutting process parameter information, such as cutting path, cutting width, etc. The theoretical coordinate dataset of the simulated dicing lanes includes the position information of the ideal dicing lanes generated by software simulation.

[0052] Step S300: Optically scan the wafer to be scanned to obtain an image of the wafer to be scanned. In this step, the surface of the wafer to be scanned is scanned through an optical imaging system to obtain the surface image of the wafer to be scanned. Since the dicing lanes cut change the thickness of the wafer, it will affect the reflection or transmission of light, thereby changing the gray value of the wafer image. Moreover, the depths of the cut dicing lanes are different, and the gray values of the images are also different. The deeper the cut dicing lane, the more light it may absorb or scatter more severely, resulting in a greater difference between the gray value of this area and the gray value of the wafer itself.

[0053] Step S400: Obtain the gray image of the wafer to be scanned according to the image and obtain the measured coordinate dataset of each cut dicing lane based on the gray image. The image of the wafer to be scanned obtained in the S300 step can theoretically be the front image of the wafer to be scanned or the back image of the wafer to be scanned. Since the front of the wafer to be scanned includes multiple cut dicing lanes and an array of chips, correspondingly, the noise in the gray image corresponding to the front image is greater. Preferably, the S300 step is to optically scan the back of the wafer to be scanned to obtain the back image of the wafer to be scanned. The S400 step involves image processing techniques, such as edge detection, threshold segmentation, or morphological operations, to identify the areas of the dicing lanes. The dicing lanes may appear as darker or brighter lines in the image. By analyzing the difference in gray values, the position coordinates of these areas can be determined. Obtaining the gray image of the wafer to be scanned according to the image in the S400 step may also include performing noise suppression and contrast enhancement processing on the gray image, including but not limited to Gaussian filtering, histogram equalization, or adaptive threshold segmentation, etc., to highlight the gray features of the cut dicing lanes.

[0054] Step S500: Determine whether there is a position deviation in each cut dicing lane according to the theoretical coordinate dataset of the simulated dicing lanes and the measured coordinate dataset of each cut dicing lane. Further, the S500 step may specifically include:

[0055] Step S510: Align the measured coordinate system and the reference coordinate system spatially according to the theoretical coordinate data set of the simulated scribing lanes and the measured coordinate data set of each cut scribing lane; establish an affine transformation relationship model between the measured coordinate system and the reference coordinate system. In step S510, calibration marks or reference points can be used to ensure the accuracy of coordinate transformation.

[0056] Step S520: Perform feature matching on the center point coordinates of each cut scribing lane to determine the center point coordinates of its corresponding simulated scribing lane; since there may be a slight difference between the width of the simulated scribing lane and the width of the actually cut scribing lane, in this embodiment, the center line of the scribing lane is extracted for comparison. In some other embodiments, the edge line of the scribing lane can also be extracted for comparison.

[0057] Step S530: Calculate the position offset of the center point of each cut scribing lane from the center point of its corresponding simulated scribing lane point by point;

[0058] Step S540: Determine whether the position offset of the center point of each cut scribing lane from the center point of its corresponding simulated scribing lane is greater than a set threshold distance;

[0059] If the position offset of the center point of a cut scribing lane from the center point of its corresponding simulated scribing lane is greater than a set threshold distance, then step S551: There is a position deviation in this cut scribing lane; if the position offset of the center point of a cut scribing lane from the center point of its corresponding simulated scribing lane is not greater than a set threshold distance, then step S552: There is no position deviation in this cut scribing lane. In some embodiments, a deviation map of the wafer to be scanned can also be generated, the out-of-tolerance areas can be marked and a detection report can be output, so that users can more intuitively grasp the cutting abnormal areas.

[0060] In the above steps of the scribing lane cutting anomaly detection method of the present invention, the accuracy and reliability of scribing lane cutting anomaly detection can be improved by improving the quality of image acquisition in step S300, refining the image processing algorithm in step S400, and performing reasonable deviation analysis in step S500. The scribing lane cutting anomaly detection method of the present invention utilizes the characteristic that the gray levels of the scribed / non-scribed scribing lanes are quite different. By scanning the cut scribing lanes, a gray-scale image of the cut scribing lanes is obtained, and it is compared with the target scribing lanes to detect whether there is a deviation between the actually obtained scribing lanes and the target scribing lanes. Further, this detection method can adopt the backside scanning method of the wafer, effectively avoiding the influence of excessive noise in the front-side scanning of the wafer, and can use the gray level to accurately control, so as to achieve accurate grasping of scribing lane cutting anomalies.

[0061] In some embodiments, the scanning process of the entire wafer to be scanned can be accelerated by optimizing the scribe lane scanning method, thereby improving the efficiency of scribe lane cutting anomaly detection. For example, in the step of obtaining the back image of the wafer to be scanned by optical scanning, the back image of the wafer to be scanned can be obtained by serpentine scanning according to the position information of the simulated scribe lanes, that is, only the areas of the scribe lanes after cutting are scanned in a horizontal and vertical serpentine manner. During the scanning process, the focus is on the line pattern part of the scribe lanes, reducing the scanning time and data acquisition amount for the background area, and improving the scanning efficiency and data validity.

[0062] In some other embodiments, the scribe lane cutting anomaly detection method of the present invention may further include the following steps:

[0063] Step S600: Obtain the depth information of multiple scribe lanes after cutting according to the grayscale image. Further, step S600 may include:

[0064] Step S610: Obtain the grayscale values at multiple scribe lanes after cutting according to the grayscale image;

[0065] Step S620: Obtain the mapping relationship between the grayscale value and the depth of the scribe lane;

[0066] Step S630: Obtain the depth information of multiple scribe lanes after cutting according to the grayscale values at multiple scribe lanes after cutting and the mapping relationship.

[0067] Step S700: Judge whether multiple scribe lanes after cutting are cut according to the depth information.

[0068] More specifically, step S700 may include:

[0069] Step S710: Traverse the depths of each position of multiple scribe lanes after cutting and judge whether the depth of each position is greater than the threshold depth;

[0070] Step S720: If the depth of a position is not greater than the threshold depth, the position of the scribe lane is not cut.

[0071] An embodiment of the present invention also provides a scribe lane cutting anomaly detection system for implementing the steps of the scribe lane cutting anomaly detection method. Figure 2 It is a module schematic diagram of a scribe lane cutting anomaly detection system according to an embodiment of the present invention. The detection system includes a data module M100, a calculation module M200, an image module M300, and a judgment module M400;

[0072] The data module M100 is used to obtain the size information of the wafer to be scanned. The wafer to be scanned includes multiple chips and multiple scribe lanes after cutting. The size information is the position information of each chip on the wafer to be scanned.

[0073] The calculation module M200 is configured to obtain a theoretical coordinate data set of the simulated scribing lanes according to the size information;

[0074] The image module M300 is configured to optically scan the wafer to be scanned to obtain an image of the wafer to be scanned;

[0075] Obtain a grayscale image of the wafer to be scanned according to the image and obtain an actual coordinate data set of each scribing lane after cutting according to the grayscale image;

[0076] The judgment module M400 is configured to judge whether there is a position deviation of each scribing lane after cutting according to the theoretical coordinate data set of the simulated scribing lanes and the actual coordinate data set of each scribing lane after cutting.

[0077] The functions of each functional module in the scribing lane cutting anomaly detection system of the embodiment can all be implemented by using the specific implementation manners of each step in the above scribing lane cutting anomaly detection method. For example, the data module M100, the calculation module M200, the image module M300, and the judgment module M400 can respectively implement their functions by using the specific implementation manners of the above steps S100 to S500 or steps S100 to S700, which will not be elaborated here.

[0078] Next, refer to Figure 3 to describe the electronic device 600 according to this embodiment of the present invention. Figure 3 The shown electronic device 600 is only an example and should not impose any limitation on the functions and usage scope of the embodiments of the present invention.

[0079] As Figure 3 shown, the electronic device 600 is presented in the form of a general-purpose computing device. The components of the electronic device 600 may include, but are not limited to: at least one processing unit 610, at least one storage unit 620, a bus 630 connecting different platform components (including the storage unit 620 and the processing unit 610), a display unit 640, etc.

[0080] Among them, the storage unit stores program codes, and the program codes can be executed by the processing unit 610, so that the processing unit 610 executes the steps according to various exemplary embodiments of the present invention described in the above method part of this specification. For example, the processing unit 610 can execute the steps as Figure 1 shown.

[0081] The storage unit 620 may include a readable medium in the form of a volatile storage unit, such as a random access storage unit (RAM) 6201 and / or a cache storage unit 6202, and may further include a read-only storage unit (ROM) 6203.

[0082] The storage unit 620 may also include a program / utilities 6204 having a set (at least one) of program modules 6205. Such program modules 6205 include, but are not limited to, an operating system, one or more application programs, other program modules, and program data. Each or some combination of these examples may include an implementation of a network environment.

[0083] The bus 630 may represent one or more of several types of bus structures, including a memory bus or memory controller, a peripheral bus, an accelerated graphics port, a processing unit, or a local bus using any of a variety of bus structures.

[0084] The electronic device 600 may also communicate with one or more external devices 700 (such as a keyboard, a pointing device, a Bluetooth device, etc.), and may also communicate with one or more devices that enable a user to interact with the electronic device 600, and / or communicate with any device that enables the electronic device 600 to communicate with one or more other computing devices (such as a router, a modem, etc.). Such communication may be through the input / output (I / O) interface 650. Moreover, the electronic device 600 may also communicate with one or more networks (such as a local area network (LAN), a wide area network (WAN), and / or a public network, such as the Internet) through the network adapter 660. The network adapter 660 may communicate with other modules of the electronic device 600 through the bus 630. It should be understood that, although not shown in the figure, other hardware and / or software modules may be used in conjunction with the electronic device 600, including but not limited to: microcode, device drivers, redundant processing units, external disk drive arrays, RAID systems, tape drives, and data backup storage platforms, etc.

[0085] An embodiment of the present invention also provides a computer-readable storage medium for storing a program, and when the program is executed, the steps of the dicing lane cutting anomaly detection method are implemented. In some possible implementation manners, various aspects of the present invention may also be implemented in the form of a program product, which includes program code. When the program product runs on a terminal device, the program code is used to cause the terminal device to execute the steps according to various exemplary embodiments of the present invention described in the above method part of this specification.

[0086] Reference Figure 4 As shown, a program product 800 for implementing the above method according to an embodiment of the present invention is described. It may be a portable compact disc read-only memory (CD-ROM) and includes program code, and may run on a terminal device, such as a personal computer. However, the program product of the present invention is not limited thereto. In this document, the readable storage medium may be any tangible medium that contains or stores a program, and the program may be used by or in combination with an instruction execution system, apparatus, or device.

[0087] The program product may employ any combination of one or more readable media. The readable media may be a readable signal medium or a readable storage medium. The readable storage medium may be, for example but not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination of the foregoing. More specific examples (a non-exhaustive list) of the readable storage medium include: an electrical connection having one or more wires, a portable disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.

[0088] The computer readable storage medium may include a data signal propagated in or as part of a carrier wave in a baseband, which carries the readable program code. Such propagated data signals may take many forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination of the foregoing. The readable storage medium may also be any readable medium other than the readable storage medium, which can send, propagate, or transmit a program for use by or in connection with an instruction execution system, apparatus, or device. The program code contained on the readable storage medium may be transmitted using any appropriate medium, including but not limited to wireless, wireline, optical fiber cable, RF, etc., or any suitable combination of the foregoing.

[0089] The program code for performing the operations of the present invention may be written in any combination of one or more programming languages, including object-oriented programming languages such as Java, C++, etc., and also including conventional procedural programming languages such as the "C" language or similar programming languages. The program code may be executed entirely on the user's computing device, partially on the user's device, executed as a stand-alone software package, partially on the user's computing device and partially on a remote computing device, or entirely on a remote computing device or server. In the case of a remote computing device, the remote computing device may be connected to the user's computing device through any type of network, including a local area network (LAN) or a wide area network (WAN), or may be connected to an external computing device (e.g., using an Internet service provider to connect through the Internet).

[0090] The above content is a further detailed description of the present invention in combination with specific preferred embodiments. It cannot be determined that the specific implementation of the present invention is only limited to these descriptions. For those skilled in the art, it is obvious that this application is not limited to the details of the above exemplary embodiments, and can be implemented in other specific forms without departing from the spirit or basic characteristics of this application. Therefore, from any point of view, the embodiments should be regarded as exemplary and non-limiting. The scope of this application is defined by the appended claims rather than the above description. Therefore, all changes falling within the meaning and scope of the equivalent elements of the claims are intended to be included in this application. Any reference signs in the claims should not be construed as limiting the claimed rights. In addition, obviously the word "comprising" does not exclude other elements or steps, and the singular does not exclude the plural. The multiple elements or devices stated in the apparatus claims can also be implemented by one element or device through software or hardware. The terms first, second, etc. are used to denote names and do not denote any particular order.

Claims

1. A method for detecting abnormality in dicing lane cutting, characterized in that: The detection method comprises the following steps: Acquire size information of a wafer to be scanned, wherein the wafer to be scanned includes a plurality of chips and a plurality of cut scribe lanes, and the size information is position information of each chip on the wafer to be scanned; Obtaining a theoretical coordinate data set of a simulated scribing street according to the size information; Optically scanning the wafer to be scanned to obtain an image of the wafer to be scanned; Obtaining a grayscale image of the wafer to be scanned according to the image and obtaining a measured coordinate data set of each cut dicing lane according to the grayscale image; It is determined whether there is a position deviation for each of the cut scribe lines according to the theoretical coordinate data set of the simulated scribe line and the measured coordinate data set of each of the cut scribe lines.

2. The method for detecting abnormality in dicing lane cutting according to claim 1, characterized in that: The step of judging whether there is a position deviation of each cut scribe line according to the theoretical coordinate data set of the simulated scribe line and the measured coordinate data set of each cut scribe line comprises: According to the theoretical coordinate data set of the simulated scribing road and the measured coordinate data set of each cut scribing road, the measured coordinate system and the reference coordinate system are spatially aligned; and an affine transformation relationship model between the measured coordinate system and the reference coordinate system is established; Perform feature matching on the center point coordinates of each cut scribe line to determine the center point coordinates of the corresponding simulated scribe line; Calculate point by point the positional offset between the center point of each cut scribe line and the center point of the corresponding simulated scribe line; Determine whether the position offset between the center point of each cut scribe line and the center point of the corresponding simulated scribe line is greater than a set threshold distance; If the positional offset between the center point of a cut scribe line and the center point of the corresponding simulated scribe line is greater than a set threshold distance, the cut scribe line has a positional deviation.

3. The method for detecting scribe line cutting anomalies according to claim 1, characterized in that: The step of optically scanning the wafer to be scanned to obtain an image of the wafer to be scanned is to optically scan the back side of the wafer to be scanned to obtain an image of the back side of the wafer to be scanned.

4. The method for detecting abnormality in dicing lane cutting according to claim 3, characterized in that: In the step of optically scanning the wafer to be scanned to obtain an image of the wafer to be scanned, a serpentine scan is used to obtain an image of the back side of the wafer to be scanned according to the position information of the simulated scribe line.

5. The method for detecting scribe line cutting anomalies according to claim 1, characterized in that: The detection method further comprises the following steps: Obtaining depth information of a plurality of cut scribe lines according to the grayscale image; It is determined whether the plurality of cut scribe lines are cut according to the depth information.

6. The method for detecting scribe line cutting anomalies according to claim 5, characterized in that: Obtaining depth information of a plurality of cut scribe lines according to the grayscale image comprises the following steps: Acquire grayscale values ​​at a plurality of cut scribe lanes according to the grayscale image; Obtaining a mapping relationship between a grayscale value and a depth of a scribe line; Depth information of the plurality of cut scribe lines is obtained according to the grayscale values ​​at the plurality of cut scribe lines and the mapping relationship.

7. The method for detecting scribe line cutting anomalies according to claim 5, characterized in that: The step of judging whether the plurality of cut scribe lanes are cut according to the depth information comprises the following steps: Traversing the depths of each position of the plurality of cut scribe lines and determining whether the depth of each position is greater than a threshold depth; If the depth of a location is not greater than the threshold depth, the location of the scribe line is not cut.

8. A scribe line cutting anomaly detection system, used to implement the steps of the scribe line cutting anomaly detection method according to any one of claims 1 to 7, characterized in that: The detection system includes a data module, a calculation module, an image module and a judgment module; The data module is used to obtain size information of a wafer to be scanned, wherein the wafer to be scanned includes a plurality of chips and a plurality of cut scribe lanes, and the size information is position information of each chip on the wafer to be scanned; The calculation module is used to obtain the position information of the simulated scribe line according to the size information; The image module is used to optically scan the wafer to be scanned to obtain an image of the wafer to be scanned; Obtaining a grayscale image of the wafer to be scanned according to the image and obtaining position information of a plurality of cut scribe lanes according to the grayscale image; The judgment module is used to judge whether there is a position deviation among the plurality of cut scribe lines according to the position information of the simulated scribe line and the position information of the plurality of cut scribe lines.

9. An electronic device, characterized in that: include: processor; a memory storing executable instructions of the processor; Wherein, the processor is configured to execute the steps of the scribe line cutting anomaly detection method according to any one of claims 1 to 7 by executing the executable instructions.

10. A computer-readable storage medium for storing a program, characterized in that: When the program is executed by a processor, the steps of the scribe line cutting abnormality detection method according to any one of claims 1 to 7 are implemented.

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