Ultrasonic sensor, ultrasonic fingerprint identification module and electronic equipment

Abstract

The invention relates to the field of ultrasonic sensors, and provides an ultrasonic sensor, an ultrasonic fingerprint identification module and electronic equipment, and the ultrasonic sensor comprises a substrate which is internally provided with a first groove; a signal processing chip, wherein the signal processing chip is located in the first groove; the insulating layer is positioned on the substrate and in the first groove; the acoustic-electric conversion layer is located on the insulating layer, the acoustic-electric conversion layer comprises a bottom electrode layer, a piezoelectric layer, a top electrode layer and a protective layer which are stacked, and the bottom electrode layer is located on the insulating layer; the interconnection layer is located between the substrate and the acoustic-electric conversion layer, and the interconnection layer is at least used for connecting the signal processing chip and the bottom electrode layer. According to the ultrasonic sensor, the ultrasonic fingerprint identification module and the electronic equipment provided by the embodiment of the invention, at least the detection area of the sensor chip can be increased, and the process manufacturing cost is reduced.

Description

Technical Field

[0001] The embodiments of the present application relate to the field of ultrasonic sensors, and particularly to an ultrasonic sensor, an ultrasonic fingerprint recognition module and an electronic device. Background Art

[0002] An ultrasonic sensor utilizes the mechanical-electrical conversion characteristics of piezoelectric materials. On the one hand, it emits ultrasonic signals externally by the voltage excitation output by a driving circuit. On the other hand, it converts the ultrasonic signals reflected from the outside into electrical signals, thereby obtaining information on the external sensing surface, and can be widely applied to the fields of medical imaging, structural flaw detection and biometric identification. For example, when an ultrasonic sensor is applied to an ultrasonic fingerprint module and is arranged in a specific area of the screen of an electronic device including but not limited to a smart phone, it can be used for fingerprint recognition to realize user identity authentication and enhance the anti-interference ability and security of the product.

[0003] When the ultrasonic sensor works, a pixel circuit is often required to be arranged below the ultrasonic sensing unit to amplify the received electrical signal; in order to perform post-processing on the received signal, a signal processing circuit is often required; in order to obtain a larger sound pressure signal, a very high emission voltage, reaching dozens to hundreds of volts, usually needs to be provided to the sensor. Therefore, in the ultrasonic fingerprint module, a boost chip is also required to boost the pulse signal given by the CMOS chip. The pixel circuit, the signal processing circuit and the boost chip circuit in the module usually require different process line widths and process manufacturing processes. The pixel circuit requires the largest process line width, and the signal processing circuit requires the smallest process line width. In the prior art solutions, the pixel circuit and the signal processing circuit are often processed on the same wafer substrate. In order to increase the area of the fingerprint recognition area, the prior art must increase the area of the ultrasonic sensor chip. However, since the signal processing circuit that requires an advanced process node is also processed on the same substrate, after the chip area increases, the chip cost rises rapidly.

[0004] Therefore, the cost of the current ultrasonic sensor is not balanced with the chip detection area of the sensor. Summary of the Invention

[0005] The embodiments of the present application provide an ultrasonic sensor, an ultrasonic fingerprint recognition module and an electronic device, which are at least beneficial to increasing the chip detection area of the sensor while reducing the process manufacturing cost.

[0006] According to some embodiments of the present application, on the one hand, an embodiment of the present application provides an ultrasonic sensor, including: a substrate having a first groove therein; a signal processing chip located in the first groove; an insulating layer located on the substrate and in the first groove; an acoustic-electric conversion layer located on the insulating layer, the acoustic-electric conversion layer including: a stacked bottom electrode layer, a piezoelectric layer, a top electrode layer, and a protective layer, the bottom electrode layer being located on the insulating layer; an interconnection layer located between the substrate and the acoustic-electric conversion layer, the interconnection layer being at least used to connect the signal processing chip and the bottom electrode layer.

[0007] In some embodiments, the signal processing chip includes an opposite first surface and a second surface, the first surface being attached to the bottom surface of the first groove, and the second surface being connected to the interconnection layer.

[0008] In some embodiments, a side surface of the piezoelectric layer forms an angle with the surface of the substrate, and the angle range of the angle α is 0 < α < 90°.

[0009] In some embodiments, the interconnection layer includes: a first interconnection layer located between the substrate and the acoustic-electric conversion layer; a second interconnection layer penetrating through the thickness of the substrate, the second interconnection layer being used to connect the signal processing chip and the bottom electrode layer; the insulating layer includes a first insulating layer and a second insulating layer, the first insulating layer being located between the substrate and the acoustic-electric conversion layer, and the second insulating layer being located between the first groove and the second interconnection layer and the substrate.

[0010] In some embodiments, there is an adhesive layer between the signal processing chip and the substrate.

[0011] According to some embodiments of the present application, on the other hand, an embodiment of the present application provides an ultrasonic fingerprint recognition module, including: the ultrasonic sensor as described in any one of the above embodiments and a circuit board; the ultrasonic sensor further includes: a pad located on the substrate; the pad is electrically connected to the signal processing chip and the top electrode respectively; wherein, the circuit board is electrically connected to the pad.

[0012] In some embodiments, the pad includes: a first pad on the top surface of the top electrode layer away from the bottom electrode layer; a second pad located on the bottom electrode layer; the circuit board is electrically connected to the first pad and the second pad respectively.

[0013] In some embodiments, it further includes: a conductive post that penetrates the thickness of the substrate and is electrically connected to the bottom surface of the interconnect layer close to the substrate; the pad is located on the side of the substrate away from the acousto-electric conversion layer and is electrically connected to the conductive post.

[0014] In some embodiments, the circuit board includes: a boost chip, the substrate further has a second groove, the boost chip is located in the second groove, the insulating layer fills the second groove, and the boost chip is electrically connected to the pad.

[0015] According to some embodiments of the present application, on the other hand, an embodiment of the present application provides an electronic device, including: the ultrasonic sensor according to any one of the above embodiments or the ultrasonic fingerprint recognition module according to any one of the above embodiments.

[0016] The technical solution provided by the embodiment of the present application has at least the following advantages:

[0017] In the technical solution provided by the embodiment of the present application, the ultrasonic sensor includes: a substrate, a signal processing chip, an electrical conversion layer, and an interconnect layer; a first groove is provided in the substrate, and the signal processing chip is embedded in the first groove, and then the electrical connection between the signal processing chip and the circuit conversion layer and the subsequent circuit board is realized through the interconnect layer, which can increase the detection area of the sensor chip while reducing the process manufacturing cost. Description of the Drawings

[0018] One or more embodiments are exemplarily illustrated by the figures in the corresponding drawings. These exemplary illustrations do not constitute a limitation on the embodiments. Unless otherwise stated, the figures in the drawings do not constitute a proportional limitation; in order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the following will briefly introduce the drawings required to be used in the embodiments. Obviously, the following-described drawings are only some embodiments of the present application. For those of ordinary skill in the art, without creative efforts, other drawings can be obtained based on these drawings.

[0019] Figure 1 It is a top view of an ultrasonic sensor provided by an embodiment of the present application;

[0020] Figure 2 It is a cross-sectional view of an ultrasonic sensor provided by an embodiment of the present application;

[0021] Figure 3 It is another cross-sectional view of an ultrasonic sensor provided by an embodiment of the present application;

[0022] Figures 4 to 13 It is a cross-sectional view of the ultrasonic sensor corresponding to each step of the preparation method of the ultrasonic sensor provided by another embodiment of the present application;

[0023] Figure 14 A top view of an ultrasonic fingerprint recognition module provided in another embodiment of the present application;

[0024] Figure 15 A sectional view of an ultrasonic fingerprint recognition module provided in another embodiment of the present application;

[0025] Figure 16 For Figure 15 A schematic structural diagram of fingerprint recognition for the corresponding electronic device;

[0026] Figure 17 Another sectional view of an ultrasonic fingerprint recognition module provided in another embodiment of the present application;

[0027] Figure 18 For Figure 17 A schematic structural diagram of fingerprint recognition for the corresponding electronic device;

[0028] Figure 19 Another sectional view of an ultrasonic fingerprint recognition module provided in another embodiment of the present application;

[0029] Figure 20 For Figure 19 A schematic structural diagram of fingerprint recognition for the corresponding electronic device;

[0030] Figure 21 Another top view of an ultrasonic fingerprint recognition module provided in another embodiment of the present application;

[0031] Figure 22 For Figure 21 A sectional view along the section of the axis of the signal processing chip;

[0032] Figure 23 For Figure 21 A sectional view along the section of the axis of the boost chip. Detailed implementation manners

[0033] As can be seen from the background art, currently, the cost of the ultrasonic sensor is not balanced with the chip detection area of the sensor.

[0034] The embodiments of the present application provide an ultrasonic sensor, an ultrasonic fingerprint recognition module, and an electronic device. By integrating the signal processing chip into the substrate, the area of the signal processing chip in the plane is reduced, thereby increasing the chip detection area of the sensor and reducing the manufacturing cost of the ultrasonic sensor.

[0035] In the description of the embodiments of the present application, technical terms such as "first" and "second" are only used to distinguish different objects, and cannot be construed as indicating or implying relative importance or implicitly specifying the quantity, specific order, or primary-secondary relationship of the indicated technical features. In the description of the embodiments of the present application, the meaning of "a plurality" is more than two, unless otherwise specifically and clearly defined.

[0036] Reference to "embodiments" herein means that a particular feature, structure, or characteristic described in connection with the embodiments can be included in at least one embodiment of the present application. The phrase appears in various places in the specification and does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment mutually exclusive with other embodiments. Those skilled in the art will explicitly and implicitly understand that the embodiments described herein can be combined with other embodiments.

[0037] In the description of the embodiments of the present application, the term "and / or" is merely a description of the association relationship of associated objects, indicating that there can be three relationships. For example, A and / or B can represent: the existence of A, the simultaneous existence of A and B, and the existence of B. In addition, the character " / " in this article generally represents an "or" relationship between the associated objects before and after.

[0038] In the description of the embodiments of the present application, the term "a plurality" refers to more than two (including two). Similarly, "multiple groups" refers to more than two groups (including two groups), and "multiple pieces" refers to more than two pieces (including two pieces).

[0039] In the description of the embodiments of the present application, the orientation or positional relationship indicated by technical terms such as "center", "longitudinal", "transverse", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc. is based on the orientation or positional relationship shown in the drawings. It is only for the convenience of describing the embodiments of the present application and simplifying the description, rather than indicating or implying that the indicated device or element must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be construed as a limitation on the embodiments of the present application.

[0040] In the description of the embodiments of the present application, unless otherwise clearly specified and limited, technical terms such as "installation", "connection", "connection", "fixation", etc. should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or integrated; it can also be a mechanical connection or an electrical connection; it can be directly connected or indirectly connected through an intermediate medium, and can be the communication inside two elements or the interaction relationship between two elements. For those of ordinary skill in the art, the specific meanings of the above terms in the embodiments of the present application can be understood according to specific circumstances.

[0041] In the accompanying drawings corresponding to the embodiments of the present application, for better understanding and description, the thickness and area of the layers are enlarged. When describing a component (such as a layer, film, region, or substrate) on or on the surface of another component, the component can be "directly" on the surface of the other component, or there can be a third component between the two components. Conversely, when describing a component on the surface of another component or when a surface of a component forms or is provided with another component, it means that there is no third component between the two components. In addition, when describing a component "substantially" formed on another component, it means that the component is not formed on the entire surface (or front surface) of the other component, nor on a partial edge of the entire surface.

[0042] In the description of the embodiments of the present application, when a certain component "includes" another component, unless otherwise specified, other components are not excluded, and other components may further be included. In addition, when components such as layers, films, regions, or plates are referred to as "on / located on" another component, it can be "directly on" the other component (i.e., located on the surface of the other component with no other components therebetween), or there can be another component therebetween. In addition, when components such as layers, films, regions, plates, etc. are "directly located on" another component, or when components such as layers, films, regions, plates, etc. are located on the surface of another component, it means that no other components are located therebetween.

[0043] The terms used in the description of the various embodiments herein are only for describing specific embodiments and are not intended to be limiting. As used in the description of the various embodiments and the appended claims, "the part" is also intended to include the plural form unless the context clearly indicates otherwise. Among them, the components include components such as layers, films, regions, or plates.

[0044] The embodiments of the present application will be described in detail below with reference to the accompanying drawings. However, those of ordinary skill in the art can understand that in the embodiments of the present application, many technical details are provided for readers to better understand the present application. However, even without these technical details and various changes and modifications based on the following embodiments, the technical solutions claimed in the present application can still be implemented.

[0045] Figure 1 A top view of an ultrasonic sensor provided for an embodiment of the present application; Figure 2 A cross-sectional view of an ultrasonic sensor provided for an embodiment of the present application.

[0046] Reference Figure 1 and Figure 2, according to some embodiments of the present application, on the one hand, an ultrasonic sensor is provided in an embodiment of the present application, which can increase the detection area of the sensor chip while reducing the process manufacturing cost. The ultrasonic sensor includes: a substrate 100, in which a first groove 102 is provided. The ultrasonic sensor includes: a signal processing chip 110, which is located in the first groove 102. The ultrasonic sensor includes: an insulating layer 115, which is located on the substrate 100 and in the first groove 102. The ultrasonic sensor includes: an acoustic-electric conversion layer 120, which is located on the insulating layer 115. The acoustic-electric conversion layer 120 includes: a stacked bottom electrode layer 121, a piezoelectric layer 122, a top electrode layer 123, and a protective layer. The bottom electrode layer 121 is located on the insulating layer 115. An interconnection layer 114 is located between the substrate 100 and the acoustic-electric conversion layer 120, and the interconnection layer 114 is at least used to connect the signal processing chip 110 and the bottom electrode layer 121.

[0047] In some embodiments, the material of the substrate 100 can be a semiconductor material, glass, polyimide, or other materials. The semiconductor material includes silicon, silicon-germanium, or germanium.

[0048] In some embodiments, the substrate 100 can be the substrate of a CMOS chip, that is, the acoustic-electric conversion layer 120 is located on the CMOS chip. The CMOS chip controls the signal transmission, signal reception, and signal acquisition of the ultrasonic sensor, and at the same time serves as the substrate 100 of the sensor.

[0049] In some embodiments, the thickness range of the substrate 100 is 50μm - 150μm. The thickness of the substrate 100 can be 50μm, 55μm, 60μm, 65μm, 70μm, 75μm, 80μm, 85μm, 90μm, 95μm, 100μm, 110μm, 120μm, 130μm, 140μm, or 150μm.

[0050] In some embodiments, the signal processing chip 110 includes any one of a digital filter, a digital amplifier, or an echo detection chip.

[0051] In some embodiments, the depth h of the first groove 102 ranges from 50μm to 100μm. The depth range of the first groove 102 can not only make the signal processing chip 110 located in the first groove 102, but also the depth of the first groove 102 is much smaller than the thickness of the substrate 100, thus avoiding the problem of substrate 100 fracture and affecting the yield of the finally formed ultrasonic sensor.

[0052] Among them, the depth h of the first groove 102 can be 50μm, 55μm, 60μm, 65μm, 70μm, 75μm, 80μm, 85μm, 90μm, 95μm, or 100μm.

[0053] It should be noted that the signal processing chip 110 is placed in the first groove 102, and the top surface of the signal processing chip 110 can be lower than, flush with, or slightly higher than the top surface of the substrate 100.

[0054] Reference Figure 2 , in some embodiments, the signal processing chip 110 includes opposite first surface 111 and second surface 112, the first surface 111 is attached to the bottom surface of the first groove 102, and the second surface 112 is connected to the interconnect layer 114. In this way, the signal processing chip 110 is close to the acoustic-electric conversion layer 120, the length of the formed interconnect layer 114 is short, and it does not involve excessive etching of the substrate 100, so that the strength of the substrate 100 itself is high, and the problem of cracking of the substrate 100 is avoided.

[0055] Figure 3 Another cross-sectional view of the ultrasonic sensor provided by an embodiment of the present application.

[0056] Reference Figure 3 , in some embodiments, the signal processing chip 110 is located on the side of the substrate 100 away from the acoustic-electric conversion layer 120, that is, there is a certain distance between the signal processing chip 110 and the acoustic-electric conversion layer 120. In this way, interference between the acoustic-electric conversion layer 120 and the signal processing chip 110 can be avoided, and the accuracy of the final fingerprint recognition can be improved.

[0057] The bottom electrode layer 121 is used to receive the voltage echo signal generated between the top electrode layer 123 and the bottom electrode layer 121 when the returned ultrasonic signal acts on the piezoelectric layer 122.

[0058] In some embodiments, reference Figure 1 , the bottom electrode layer 121 includes a plurality of sub-bottom electrode layers arranged in an array, and the insulating layer 115 is also filled between the plurality of sub-bottom electrode layers 121 to realize isolation between the sub-bottom electrode layers 121.

[0059] In some embodiments, the material of the bottom electrode layer 121 includes materials such as metals, metal compounds, indium tin oxide (ITO), etc.

[0060] In some embodiments, the thickness range of the bottom electrode layer 121 is 0.1 μm to 1 μm. The thickness of the bottom electrode layer 121 can be 0.1 μm, 0.2 μm, 0.3 μm, 0.4 μm, 0.5 μm, 0.6 μm, 0.7 μm, 0.8 μm, 0.9 μm, or 1 μm.

[0061] In some embodiments, the piezoelectric layer 122 is located above the bottom electrode layer 121 and covers the bottom electrode layer 121. When the piezoelectric layer 122 is subjected to ultrasonic waves, it causes the piezoelectric wafer to expand and contract, generating charges with opposite polarities on the two surfaces of the piezoelectric wafer. These charges are converted into voltage, amplified, and then sent to a measurement circuit, and finally recorded or displayed.

[0062] In some embodiments, the material of the piezoelectric layer 122 can be an organic polymer material, such as PVDF and its copolymer PVDF-TRFE or blend PVDF-graphene, etc.; the material of the piezoelectric layer 122 can also be a mixture of a piezoelectric ceramic material and glue, such as lead zirconate titanate piezoelectric ceramics (PZT) and its alloy materials (such as lanthanum lead zirconate titanate ceramics (PLZT), lead niobate magnesium (PNZT), potassium sodium niobate (KxNa1-xNbO 3 , KNN), perovskite phase structure lead magnesium niobate titanate (PMN-PT)) and other mixtures of piezoelectric materials and glue.

[0063] In some embodiments, the thickness range of the piezoelectric layer 122 is 8μm to 30μm. The thickness of the piezoelectric layer 122 can be 8μm, 10μm, 13μm, 15μm, 17μm, 20μm, 23μm, 25μm, 27μm, 29μm or 30μm.

[0064] In some embodiments, the side surface of the piezoelectric layer 122 forms an angle with the surface of the substrate 100, and the angle range of the angle α is 0 < α < 90°. The angle range of the angle can facilitate subsequent pad connection and wiring. The angle of the angle α can be 10°, 20°, 30°, 40°, 50°, 60°, 70° or 80°.

[0065] It should be noted that Figure 2 the angle α between the side surface of the piezoelectric layer 122 and the bottom surface of the piezoelectric layer 122 shown in

[0066] In some embodiments, the top electrode layer 123 is at least partially located above the piezoelectric layer 122 and extends to a part of the bottom electrode layer 121 that is not covered by the piezoelectric layer 122. The extended top electrode layer 123 is used for subsequent electrical connection to a circuit board.

[0067] In some embodiments, the material of the top electrode layer 123 can be a metal material, including but not limited to Au, Ag, Cu or Ni; it can also be a printed ink after mixing epoxy resin and silver nanoparticles.

[0068] In some embodiments, the thickness of the top electrode layer 123 ranges from 0.1 μm to 30 μm. The thickness of the top electrode layer 123 can be 0.1 μm, 0.5 μm, 2 μm, 5 μm, 8 μm, 10 μm, 13 μm, 15 μm, 17 μm, 20 μm, 23 μm, 25 μm, 27 μm, 29 μm, or 30 μm.

[0069] In some embodiments, the protective layer 124 is used to protect the top electrode layer 123 and the piezoelectric layer 122. The protective layer 124 is located above a part of the top electrode layer 123 and at least exposes the surface of a part of the top electrode layer 123.

[0070] In some embodiments, the material of the protective layer 124 can be various polymer materials, such as adhesives like optically clear adhesive (OCA), pressure sensitive adhesive (PSA), etc., plastics like polyimide and polyethylene terephthalate (PET), epoxy resin or a mixture of epoxy resin and metal particles. The material of the protective layer 124 can also be a metal material, including but not limited to Au, Ag, Cu, or Ni; the protective layer can be a single-layer material or a combination of multi-layer materials.

[0071] In some embodiments, the thickness of the protective layer 124 ranges from 5 μm to 40 μm. The thickness of the protective layer 124 can be 5 μm, 10 μm, 12 μm, 14 μm, 16 μm, 18 μm, 20 μm, 23 μm, 25 μm, 27 μm, 29 μm, 33 μm, 35 μm, 38 μm, or 40 μm.

[0072] Among them, the working principle of the acoustic-electric conversion layer 120 is as follows: when the ultrasonic sensor is in the acoustic emission mode, the bottom electrode layer 121 is grounded, and the top electrode layer 123 is used to be applied with an excitation signal to stimulate the piezoelectric layer 122 to emit an ultrasonic signal; when the ultrasonic sensor is in the acoustic reception mode, the top electrode layer 123 is grounded, and the bottom electrode layer 121 is used to receive the voltage echo signal generated between the top electrode layer 123 and the bottom electrode layer 121 when the returned ultrasonic signal acts on the piezoelectric layer 122.

[0073] In some embodiments, the substrate 100 has a pixel circuit in the area corresponding to the acoustic-electric conversion layer 120. The pixel circuit is connected to the bottom electrode layer 121 in the acoustic-electric conversion layer through the upper interconnect layer 114 to control the on / off of the bottom electrode layer 121 or perform primary signal amplification.

[0074] In some embodiments, the interconnect layer 114 includes at least a first type of interconnect layer and a second type of interconnect layer. The first type of interconnect layer is used to connect the pixel circuit to the bottom electrode layer 121 in the acoustic-electric conversion layer, and the second type of interconnect layer is used to connect the signal processing chip 110 to the bottom electrode layer 121. Among them, referring to Figure 2 , the first type of interconnect layer includes the first interconnect layer 101, and the second type of interconnect layer includes the third interconnect layer 104.

[0075] In some embodiments, the material of the interconnect layer 114 includes materials such as metals, metal compounds, indium tin oxide (ITO), etc.

[0076] In some embodiments, there is also a connection layer 106 between the interconnect layer 114 and the bottom electrode layer 121. The material of the connection layer 106 includes materials such as metals, metal compounds, indium tin oxide (ITO), etc.

[0077] In some embodiments, one of the conductive materials in the interconnect layer 114 can be used as a shielding layer to reduce crosstalk between embedded chips or interference from external electromagnetic waves to the sensor chip.

[0078] In some embodiments, the insulating layer 115 includes a first type of insulating layer and a second type of insulating layer 107. The first type of insulating layer is located between the first groove 102, the substrate 100 and the acoustic-electric conversion layer 120, and the second type of insulating layer 107 is located between the first type of insulating layer and the top electrode layer 123. The second type of insulating layer 107 is used to insulate between the bottom electrode layers 121, insulate between the bottom electrode layer 121 and the top electrode layer 123, and isolate the top electrode layer 123 of the acoustic-electric conversion layer 120 from other interconnect traces on the surface. Referring to Figure 2 , the first type of insulating layer includes the first insulating layer 105.

[0079] In some embodiments, referring to Figure 3 , the interconnect layer 114 includes: the first interconnect layer 101, the first interconnect layer 101 is located between the substrate 100 and the acoustic-electric conversion layer 120; the second interconnect layer 108, the second interconnect layer 108 penetrates through the thickness of the substrate 100, and the second interconnect layer 108 is used to connect the signal processing chip 110 to the bottom electrode layer 121; the insulating layer 115 includes the first insulating layer 105 and the second insulating layer 109, the first insulating layer 105 is located between the substrate 100 and the acoustic-electric conversion layer 120, and the second insulating layer 109 is located between the first groove 102 and the second interconnect layer 114 and the substrate 100. In this way, the signal processing chip 110 is placed on one side far from the acoustic-electric conversion layer 120, and both ends of the signal processing chip 110 can be respectively connected to the interconnect layer 114 and the subsequent pads, reducing the length of the pads in the plane, and thus reducing the process preparation cost.

[0080] In some embodiments, the material of the insulating layer 115 includes materials such as epoxy resin, PhotoSensitive Polyimide (PSPI), and Benzocyclobutene (BCB).

[0081] In some embodiments, there is an adhesive layer 103 between the signal processing chip 110 and the substrate 100. The material of the adhesive layer 103 includes, but is not limited to, adhesive materials such as epoxy resin and DAF (Die Attach Film).

[0082] In the solution of the ultrasonic sensor provided by the embodiments of the present application, the ultrasonic sensor includes: a substrate 100, a signal processing chip 110, an electrical conversion layer, and an interconnection layer 114; a first groove 102 is provided in the substrate 100, and the signal processing chip 110 is embedded in the first groove 102, and then the electrical connection between the signal processing chip 110 and the circuit conversion layer and the subsequent circuit board is realized through the interconnection layer 114, which can increase the detection area of the sensor chip while reducing the process manufacturing cost.

[0083] Correspondingly, another embodiment of the present application provides a method for manufacturing an ultrasonic sensor for manufacturing the ultrasonic sensor provided by the above embodiments. The same or corresponding technical features as those in the above embodiments will not be elaborated in detail here.

[0084] Figures 4 to 13 It is a cross-sectional view of the ultrasonic sensor corresponding to each step of the method for manufacturing the ultrasonic sensor provided by another embodiment of the present application.

[0085] It should be noted that the embodiments of the present application take Figure 2 the shown method for manufacturing the ultrasonic sensor as an example, Figure 3 the shown method for manufacturing the ultrasonic sensor can refer to Figure 2 the shown method for manufacturing the ultrasonic sensor. For the different parts, they will be described in the manner of another embodiment.

[0086] Referring to Figure 4 , the manufacturing method includes: providing a substrate 100.

[0087] In some embodiments, the material of the substrate 100 can be semiconductor materials, glass, polyimide and other materials. The semiconductor materials include silicon, silicon germanium or germanium. The substrate 100 can be the substrate 100 of a CMOS chip, that is, the acoustic-electric conversion layer 120 is located on the CMOS chip. The thickness range of the substrate 100 is 50μm to 150μm.

[0088] Continuing to refer to Figure 4, the preparation method includes: on the upper surface of the substrate 100, first form the patterns of the first interconnect layer 101 and the pad area by spin coating, photolithography, and development, and then prepare the first interconnect layer 101 and the pad area on the substrate 100 by sputtering or electron beam evaporation.

[0089] In some embodiments, the material of the interconnect traces can be a transparent conductive material or a non-transparent conductive material. For example, at least one of metal materials such as aluminum (Al), copper (Cu), gold (Au), platinum (Pt), etc., or may also include inorganic conductive materials such as indium tin oxide (ITO). The pad material is mainly a metal material.

[0090] In some embodiments, in the area of the substrate 100 corresponding to the acousto-electric conversion layer, a pixel circuit can be processed. The pixel circuit is connected to the bottom electrode in the acousto-electric conversion layer through the upper interconnect layer to control the on / off of the bottom electrode or perform primary signal amplification.

[0091] Reference Figure 5 , the preparation method includes: on the upper surface of the substrate 100, form the pattern of the first groove 102 area by spin coating, photolithography, and development, and use the deep reactive ion etching (DRIE) process to etch a first groove 102 with a set depth and size on the upper surface of the substrate 100. Among them, the depth of the first groove 102 can be 50 μm to 100 μm.

[0092] Reference Figure 6 , the preparation method includes: back-thin the wafer of the signal processing chip 110 that has passed the CP (Chip probing) test, then attach the wafer to the DAF film and cut it into die, and use the pick-up method to position the die with the front side facing up and attach it into the first groove 102 on the substrate 100.

[0093] In some embodiments, glue can be applied inside the first groove 102 first, and then the divided die are placed in the first groove 102.

[0094] Reference Figure 7 , the preparation method includes: on the upper surface of the substrate 100, first form the pattern of the third interconnect layer 104 by spin coating, photolithography, and development, and then prepare the third interconnect layer 104 on the signal processing chip 110 by sputtering or electron beam evaporation.

[0095] Reference Figure 8, the preparation method includes: under vacuum conditions, a layer of insulating layer, i.e., the first type of insulating layer, is processed on the surface of the substrate 100 by solution coating or dry film lamination. The insulating layer covers the surface of the substrate 100 and fills the gaps between the grains and the first groove 102. The first type of insulating layer includes the first insulating layer 105.

[0096] In some embodiments, the materials of the insulating layer include epoxy resin, Photo Sensitive Polyimide (PSPI), Benzocyclobutene (BCB), and other materials.

[0097] Reference Figure 9 , the preparation method includes: forming a via pattern on the first insulating layer 105 by photolithography and development, and then filling the via with a conductive material by sputtering or electroplating as the conductive channel between the first interconnect layer 101 and the next interconnect line, i.e., the connection layer 106.

[0098] Reference Figure 10 , the preparation method includes: continuing to deposit a conductive layer on the surface of the substrate 100 by sputtering, electron beam evaporation or electroplating, and then processing the second interconnect layer, i.e., the bottom electrode layer 121, by photolithography and etching.

[0099] In some embodiments, repeating the processing of the conductive layer, insulating layer, and via multiple times can form a multi-layer routing interconnect layer that meets the requirements.

[0100] In some embodiments, the materials of the bottom electrode layer 121 include metals, metal compounds, indium tin oxide (ITO), and other materials. The thickness range of the bottom electrode layer 121 is 0.1 μm to 1 μm.

[0101] Reference Figure 11 , the preparation method includes: under vacuum conditions, a layer of insulating layer, i.e., the second type of insulating layer 107, is processed on the surface of the substrate 100 by solution coating or dry film lamination.

[0102] Reference Figure 12 , the preparation method includes: processing the piezoelectric layer 122 above the bottom electrode layer 121 by spin coating, spraying or screen printing.

[0103] In some embodiments, the material of the piezoelectric layer 122 can be an organic polymer material. The material of the piezoelectric layer 122 can also be a mixture of a piezoelectric ceramic material and glue. The thickness range of the piezoelectric layer 122 is 8 μm to 30 μm. The side surface of the piezoelectric layer 122 forms an angle with the surface of the substrate 100, and the angle range of the angle α is 0 < α < 90°.

[0104] Reference Figure 13, the preparation method includes: then, a top electrode layer 123 is processed above the piezoelectric layer by means of screen printing, sputtering, or a combination of the two methods.

[0105] In some embodiments, the material of the top electrode layer 123 can be a metal material, including but not limited to Au, Ag, Cu, or Ni; it can also be a printing ink obtained by mixing epoxy resin and silver nanoparticles. The thickness range of the top electrode layer 123 is 0.1 μm to 30 μm.

[0106] Reference Figure 2 , the preparation method includes: preparing a protective layer 124 by means of coating, deposition, or attachment; thinning and polishing the substrate 100 to control the final thickness of the ultrasonic sensor chip to be less than 150 μm.

[0107] In some embodiments, the material of the protective layer 124 can be various polymer materials. The material of the protective layer 124 can also be a metal material, including but not limited to Au, Ag, Cu, or Ni; the protective layer can be a single-layer material or a combination of multi-layer materials. The thickness range of the protective layer 124 is 10 μm to 40 μm.

[0108] Figure 3 The ultrasonic sensor shown is different from Figure 2 the preparation method of the ultrasonic sensor shown in that Figures 5 to 8 the steps shown. The differences are as follows:

[0109] In another embodiment, reference Figure 3 , the preparation method includes: forming a pattern of the first groove 102 region on the lower surface of the substrate 100 away from the first interconnect layer 101 by means of glue coating, photolithography, and development, and etching a first groove 102 with a set depth and size on the lower surface of the substrate 100 using a deep silicon etching process. The preparation method includes: performing back thinning on the wafer of the signal processing chip 110 that has passed the CP test, then attaching the wafer to a DAF film and cutting it into die, and positioning the die with the front side facing up by means of picking and attaching it into the first groove 102 on the substrate 100. The preparation method includes: etching the substrate 100 to form a through hole, and the bottom of the through hole exposes the signal processing chip 110 to form a second interconnect layer 108. The preparation method includes: under vacuum conditions, processing an insulating layer, namely the first insulating layer 105 and the second insulating layer 109, on the surface of the substrate 100 by means of solution coating or dry film lamination, and the insulating layer covers the surface of the substrate 100, fills the through hole, and fills the gap between the die and the first groove 102.

[0110] Accordingly, in some embodiments of the present application, on the other hand, an ultrasonic fingerprint recognition module and an electronic device are provided, including an ultrasonic sensor as described in any one of the above embodiments and an ultrasonic sensor prepared by the method for preparing an ultrasonic sensor as described in any one of the above embodiments. The same or corresponding technical features as those in the above embodiments will not be elaborated in detail herein.

[0111] The ultrasonic fingerprint recognition technology utilizes the ability of ultrasonic waves to penetrate materials and generates echoes of different sizes according to different materials (that is, when ultrasonic waves reach the surfaces of different materials, the energy of the reflected ultrasonic waves and the traveled distance are different) for fingerprint recognition. Therefore, by utilizing the difference in acoustic impedance between the skin and the air, the positions of fingerprint ridges and valleys can be distinguished.

[0112] Figure 14 A top view of an ultrasonic fingerprint recognition module provided in another embodiment of the present application; Figure 15 A cross-sectional view of an ultrasonic fingerprint recognition module provided in another embodiment of the present application; Figure 16 is Figure 15 A schematic structural diagram of fingerprint recognition for the corresponding electronic device.

[0113] Reference Figure 14 and Figure 15 , the ultrasonic fingerprint recognition module includes: an ultrasonic sensor and a circuit board as shown in Figure 2 ; the ultrasonic sensor further includes: a pad 210, and the pad 210 is located on the substrate 100; the pad 210 is electrically connected to the signal processing chip 110 and the top electrode layer 123 respectively; wherein, the circuit board is electrically connected to the pad 210.

[0114] In some embodiments, the pad 210 includes: a first pad 211, and the first pad 211 is located on the top surface of the top electrode layer 123 away from the bottom electrode layer 121; a second pad 212, and the second pad 212 is located on the bottom electrode layer 121; the circuit board is electrically connected to the first pad 211 and the second pad 212 respectively.

[0115] In some embodiments, the circuit board includes: a substrate 200, a reinforcement member 224, passive devices 221, a boost chip 222, and a connector 223. Wherein the substrate 200 is connected to the ultrasonic sensor by a low-temperature bonding method, and the bonding medium includes but is not limited to anisotropic conductive adhesive (ACF); when the ultrasonic sensor works, the boost chip 222 on the substrate 200 is controlled by the embedded signal processing chip 110 to provide a high-voltage driving signal to the acoustic-electric conversion layer 120; the signal processing chip 110 is also responsible for processing the ultrasonic echo signal received by the acoustic-electric conversion layer 120 and transmitting the fingerprint acquisition data to the main control chip of the backend system through the connector 223.

[0116] In some embodiments, the substrate 200 can be a flexible substrate.

[0117] Reference Figure 16 , the electronic device includes: such as Figure 2 shown ultrasonic sensor 10 or as Figure 15 shown ultrasonic fingerprint recognition module.

[0118] In some embodiments, the ultrasonic fingerprint recognition module includes an ultrasonic sensor 10 and a circuit board 20.

[0119] In some embodiments, the electronic device can be a computer, a tablet computer, a personal digital assistant, a mobile phone, etc.

[0120] In some embodiments, the electronic device includes a screen 32. In the embodiments of the present application, the back surface of the substrate 100 of the ultrasonic sensor can be bonded to the lower side of the screen 32 of the electronic device through an adhesive layer 31 for ultrasonic biometric detection under the screen.

[0121] Figure 17 Another cross-sectional view of the ultrasonic fingerprint recognition module provided by another embodiment of the present application; Figure 18 For Figure 17 a schematic structural diagram of fingerprint recognition of the corresponding electronic device.

[0122] Reference Figure 17 , the ultrasonic fingerprint recognition module includes: an ultrasonic sensor and a circuit board as shown in Figure 3 ; the ultrasonic sensor further includes: pads 210 located on the substrate 100; the pads 210 are electrically connected to the signal processing chip 110 and the top electrode layer 123 respectively; wherein, the circuit board is electrically connected to the pads 210.

[0123] Reference Figure 18 , the electronic device includes: an ultrasonic sensor as shown in Figure 3 or an ultrasonic fingerprint recognition module as shown in Figure 17 .

[0124] In some embodiments, the electronic device includes a screen 32. In the embodiments of the present application, the front surface of the substrate 100 of the ultrasonic sensor (i.e., the surface of the acoustic-electric conversion layer 120) can be bonded to the lower side of the screen 32 of the electronic device through an adhesive layer 31 for ultrasonic biometric detection under the screen.

[0125] Figure 19 Another cross-sectional view of the ultrasonic fingerprint recognition module provided by another embodiment of the present application; Figure 20 For Figure 19 a schematic structural diagram of fingerprint recognition of the corresponding electronic device.

[0126] Reference Figure 19 , the ultrasonic fingerprint recognition module includes: as Figure 2 shown, an ultrasonic sensor and a circuit board; the ultrasonic sensor further includes: a pad 210, the pad is located on the substrate 100; the pad 210 is electrically connected to the signal processing chip 110 and the top electrode layer 123 respectively; wherein, the circuit board is electrically connected to the pad 210.

[0127] Reference Figure 19 , in some embodiments, the ultrasonic sensor further includes: a conductive pillar 213, the conductive pillar 213 penetrates through the thickness of the substrate 100 and is electrically connected to the bottom surface of the interconnection layer close to the substrate 100; the pad 210 is located on the side of the substrate 100 away from the acoustic-electric conversion layer 120 and is electrically connected to the conductive pillar 213.

[0128] Reference Figure 20 , the electronic device includes: as Figure 2 shown, an ultrasonic sensor or as Figure 19 shown, an ultrasonic fingerprint recognition module.

[0129] In some embodiments, the electronic device includes a screen 32. In the embodiments of the present application, the front surface of the substrate 100 of the ultrasonic sensor (i.e., the surface of the acoustic-electric conversion layer 120) can be bonded to the lower side of the screen 32 of the electronic device through an adhesive layer 31 for under-screen ultrasonic biometric detection.

[0130] Figure 21 Another top view of the ultrasonic fingerprint recognition module provided by another embodiment of the present application; Figure 22 is Figure 21 a cross-sectional view along the axis of the signal processing chip; Figure 23 is Figure 21 a cross-sectional view along the axis of the boost chip.

[0131] Reference Figures 21 to 23 , in some embodiments, the circuit board includes: a boost chip 222, the substrate 100 further has a second groove 125, the boost chip 222 is located in the second groove 125, the insulating layer fills the second groove 125, and the boost chip 222 is electrically connected to the pad 210. The signal processing chip 110 and the boost chip 222 are simultaneously embedded in the ultrasonic sensor. During operation, the embedded signal processing chip 110 controls the boost chip 222 to provide a high-voltage drive signal to the acoustic-electric conversion layer 120; the signal processing chip 110 is also responsible for processing the ultrasonic echo signal received by the acoustic-electric conversion layer 120 and transmitting the fingerprint acquisition data to the main control chip of the backend system through the connector 223. This ultrasonic fingerprint recognition module can achieve a larger area of ultrasonic fingerprint recognition function at a lower process cost.

[0132] In some embodiments, the electronic device includes: such as Figure 2 or Figure 3 an ultrasonic sensor or Figure 21 the ultrasonic fingerprint recognition module shown in

[0133] The electronic device may be a computer, a tablet computer, a personal digital assistant, a mobile phone, etc.

[0134] In some embodiments, the back surface of the ultrasonic sensor substrate may be bonded to the lower part of the screen of the electronic device through an adhesive layer for ultrasonic biometric detection under the screen; alternatively, the front surface of the substrate of the ultrasonic sensor (i.e., the surface of the acoustic-electric conversion layer) may be bonded to the lower part of the screen of the electronic device through an adhesive layer for ultrasonic biometric detection under the screen.

[0135] Those of ordinary skill in the art can understand that the above embodiments are specific embodiments for implementing the present application. In actual applications, various changes can be made in form and details without departing from the spirit and scope of the present application. Any person skilled in the art can make various modifications and changes without departing from the spirit and scope of the present application. Therefore, the protection scope of the present application should be subject to the scope defined by the claims.

Claims

1. An ultrasonic sensor, characterized in that: include: A substrate having a first groove therein; A signal processing chip, wherein the signal processing chip is located in the first groove; an insulating layer, the insulating layer being located on the substrate and in the first groove; an acoustic-to-electric conversion layer, the acoustic-to-electric conversion layer being located on the insulating layer, the acoustic-to-electric conversion layer comprising: a stacked bottom electrode layer, a piezoelectric layer, a top electrode layer and a protective layer, the bottom electrode layer being located on the insulating layer; The interconnection layer is located between the substrate and the acoustic-to-electric conversion layer, and the interconnection layer is at least used to connect the signal processing chip and the bottom electrode layer.

2. The ultrasonic sensor according to claim 1, characterized in that: The signal processing chip includes a first surface and a second surface that are opposite to each other. The first surface is attached to the bottom surface of the first groove, and the second surface is connected to the interconnection layer.

3. The ultrasonic sensor according to claim 1 or 2, characterized in that: The side surface of the piezoelectric layer forms an angle with the surface of the substrate, and the angle α is in the range of 0<α<90°.

4. The ultrasonic sensor according to claim 1, characterized in that: The interconnection layer includes: a first interconnection layer, which is located between the substrate and the acoustic-to-electric conversion layer; a second interconnection layer, which runs through the thickness of the substrate and is used to connect the signal processing chip and the bottom electrode layer; the insulating layer includes a first insulating layer and a second insulating layer, which is located between the substrate and the acoustic-to-electric conversion layer, and the second insulating layer is located between the first groove and the second interconnection layer and the substrate.

5. The ultrasonic sensor according to any one of claims 1, 2 or 4, characterized in that: An adhesive layer is provided between the signal processing chip and the substrate.

6. An ultrasonic fingerprint recognition module, characterized in that: include: The ultrasonic sensor and circuit board according to any one of claims 1 to 5; The ultrasonic sensor further comprises: a pad, the pad being located on the substrate; the pad being electrically connected to the signal processing chip and the top electrode respectively; Wherein, the circuit board is electrically connected to the pad.

7. The ultrasonic fingerprint recognition module according to claim 6, characterized in that: The pads include: a first pad located on the top surface of the top electrode layer away from the bottom electrode layer; a second pad located on the bottom electrode layer; and the circuit board is electrically connected to the first pad and the second pad respectively.

8. The ultrasonic fingerprint recognition module according to claim 6, characterized in that: Also includes: A conductive column runs through the thickness of the substrate and is electrically connected to the bottom surface of the interconnect layer close to the substrate; the pad is located on a side of the substrate away from the acoustic-to-electric conversion layer and is electrically connected to the conductive column.

9. The ultrasonic fingerprint recognition module according to claim 6, characterized in that: The circuit board comprises: a boost chip, the substrate further comprises a second groove, the boost chip is located in the second groove, the insulating layer fills the second groove, and the boost chip is electrically connected to the pad.

10. An electronic device, characterized in that: include: The ultrasonic sensor according to any one of claims 1 to 5 or the ultrasonic fingerprint recognition module according to any one of claims 6 to 9.

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