A bridge arm multiplexing soft switching AC-DC converter and a control circuit and a control method thereof

Abstract

The application discloses a bridge-arm multiplexing soft-switching AC-DC converter and a control circuit and a control method thereof. The bridge-arm multiplexing soft-switching AC-DC converter performs bridge-arm multiplexing on the primary side switch tube of a full-bridge LLC resonant converter and the rear bridge-arm switch tube of a bridgeless AC-DC converter, can realize power factor correction, soft switching of all switch tubes and reduction of the number of devices. The control circuit comprises an output voltage regulating circuit, an input voltage regulating circuit, an output voltage control phase-shifted clock generating circuit, an input voltage control phase-shifted clock generating circuit and a switch signal gating circuit. The application can realize full-domain soft switching, electrical isolation and wide-range voltage regulation, effectively reduces the number of devices, and can realize high power density, high conversion efficiency and high reliability.

Description

Technical Field

[0001] This invention belongs to the field of power electronic converter technology, specifically relating to a bridge arm multiplexed soft-switching AC-DC converter and its control circuit and control method. Background Technology

[0002] In daily life and industrial sectors, electrical energy is usually drawn from the AC power grid, while many electrical devices require DC power. Therefore, AC-DC converters are widely used in LED lighting power supplies, communication power supplies, battery chargers, and new energy vehicle charging piles.

[0003] Common AC-DC converters include Buck PFC converters, Boost PFC converters, and Buck-Boost PFC converters. Buck PFC converters have an input current dead zone and a low power factor; Boost PFC converters, due to the characteristics of their boost circuits, can only be used in high-voltage output applications; Buck-Boost PFC converters have a negative output voltage polarity and high voltage stress on the power switches. A four-transistor Buck-Boost PFC converter has too low an inductor current ripple when the input AC voltage crosses zero, making it impossible to achieve ZVS (zero-voltage switching) for the switches. A bridgeless four-transistor Buck-Boost AC-DC converter, compared to the four-transistor Buck-Boost PFC converter, can achieve full-range soft switching. In applications requiring electrical isolation and a wide voltage range, an isolated DC-DC module is often added after the PFC converter, thus forming a two-stage PFC converter. Two-stage architectures can broaden the voltage regulation range and achieve electrical isolation while ensuring soft switching. However, they also increase the number of components in the converter, leading to higher power density and cost. Integrating the bridgeless PFC converter and the isolated DC-DC converter in a two-stage architecture to minimize the number of components and achieve full-range soft switching and high power factor is a pressing issue that needs to be addressed. Summary of the Invention

[0004] The technical problem to be solved by the present invention is to address the shortcomings of the prior art by providing a bridge arm multiplexing type soft-switching AC-DC converter and its control circuit and control method, which can achieve full-range soft switching, high power factor and electrical isolation.

[0005] To achieve the above-mentioned technical objectives, the technical solution adopted by the present invention is as follows:

[0006] A bridge-arm multiplexing soft-switching AC-DC converter, the bridge-arm multiplexing soft-switching AC-DC converter including a bridgeless AC-DC converter and a full-bridge LLC resonant converter;

[0007] The bridgeless AC-DC converter includes an input AC voltage source v in Input capacitor C inA Input capacitor C inB Inductor L a Inductor L b Intermediate bus capacitor C bus Switching transistor Q A1 and its anti-parallel diode D A1 junction capacitance C A1 Switching transistor Q A2 and its anti-parallel diode D A2 junction capacitance C A2 Switching transistor Q A3 and its anti-parallel diode D A3 junction capacitance C A4 Switching transistor Q A4 and its anti-parallel diode D A4 junction capacitance C A4 Switching transistor Q B1 and its anti-parallel diode D B1 junction capacitance C B1 Switching transistor Q B2 and its anti-parallel diode D B2 junction capacitance C B2 Switching transistor Q B3 and its anti-parallel diode D B3 junction capacitance C B3 Switching transistor Q B4 and its anti-parallel diode D B4 junction capacitance C B4 Q A1 and Q A2 Q B1 and Q B2 Q A3 and Q A4 Q B3 and Q B4 They are respectively complementary in conduction, corresponding to bridge arms 1, 2, 3, and 4, C inA C inB C bus Connected in series at both ends of bridge arms 1, 2, and 3 respectively, v in Connected in series with Q A1 Drain and Q B1 Between the drain and the electrode, L a Connected in series between the midpoint of bridge arm 1 and the midpoint of bridge arm 3, L b Connected between the midpoint of bridge arm 2 and the midpoint of bridge arm 4;

[0008] A full-bridge LLC resonant converter includes a resonant inductor L r Magnetizing inductance L m Resonant capacitor C r Transformer Tr Output filter capacitor C o 1 Rectifier diode D R1 D R2 D R3 D R4 and load R Ld and reuse Q A3 and Q A4 The bridge arm 3 and Q constitute B3 and Q B4 The bridge arm 4; L m Parallel to T r The two ends of the original edge, and T r One end of the primary side is connected in series with L r C r Connect the midpoint of bridge arm 3, T r The other end of the original side is connected to the midpoint of bridge arm 4; D R1 D R2 Series, D R3 D R4 Series connection, and two series circuits connected in parallel, C o R Ld Both are connected in parallel with two series circuits, T r One end of the secondary side is connected to D R1 D R2 The connection point is , and the other end is connected to D. R3 D R4 The connection point;

[0009] Q A3 Q A4 Q B3 Q B4 The duty cycle is fixed at 50%; and Q A3 and Q B4 Simultaneous on / off, Q A4 and Q B3 Simultaneous on / off switching.

[0010] To optimize the above technical solution, the specific measures also include:

[0011] The above Q A1 The drain and D A1 cathode and C A1 Connect one end to Q A1 The source and D A1 anode and C A1 The other end is connected, Q A2 The drain and D A2 cathode and C A2 Connect one end to Q A2 The source and D A2 anode and C A2 The other end is connected, QA3 The drain and D A3 cathode and C A3 Connect one end to Q A3 The source and D A3 anode and C A3 The other end is connected, Q A4 The drain and D A4 cathode and C A4 Connect one end to Q A4 The source and D A4 anode and C A4 The other end is connected, Q B1 The drain and D B1 cathode and C B1 Connect one end to Q B1 The source and D B1 anode and C B1 The other end is connected, Q B2 The drain and D B2 cathode and C B2 Connect one end to Q B2 The source and D B2 anode and C B2 The other end is connected, Q B3 The drain and D B3 cathode and C B3 Connect one end to Q B3 The source and D B3 anode and C B3 The other end is connected, Q B4 The drain and D B4 cathode and C B4 Connect one end to Q B4 The source and D B4 anode and C B4 The other end is connected.

[0012] The above v in One end and C inA one end and Q A1 The drains are connected, Q A1 source and Q A2 The drain and L a One end is connected, L a The other end and Q A3 source and Q A4 The drain and C r One end is connected, C r The other end and L r One end is connected, L r The other end and L m one end and T r Connect one end of the original edge, Q A3Drain and Q B3 The drain and C bus One end is connected, v in The other end and C inB one end and Q B1 The drains are connected, Q B1 source and Q B2 Drain and inductance L b One end is connected, inductor L b The other end and Q B3 source and Q B4 The drain and L m The other end and T r The other end of the original edge is connected, Q A2 source and Q B2 source and Q A4 source and Q B4 The source and C inA The other end and C inB The other end and C bus The other end is connected, and one end of the secondary side is connected to D. R1 anode and D R3 The cathode is connected, D R1 cathode and D R2 cathode and C o One end and load R Ld One end is connected to D, and the other end of the secondary side is connected to D. R2 anode and D R4 The cathode is connected, D R3 anode and D R4 anode and C o The other end and R Ld The other end is connected.

[0013] The aforementioned bridge-arm multiplexed soft-switching AC-DC converter includes 14 switching modes, namely:

[0014] Switching mode 1 [t0, t1]: At time t0, Q is turned off. A1 L a Inductor current i La Give Q A1 C A1 Charging, while simultaneously supplying Q A2 C A2 Discharge; at time t1, C A1 The voltage is charged to V inA V inA For the input capacitor C inA Apply voltage, and simultaneously C A2 If the voltage is set to zero, then Q A2 anti-parallel diode D A2Natural conduction, at which point Q can be turned on with zero voltage. A2 Q B2 and Q B4 Conduction, applied to L b The voltage across the terminals is 0, L b Inductor current i Lb Remain unchanged; L r and C r Resonant operation, secondary rectifier diode D R1 and D R4 Turning on the transformer will convert the primary voltage V to voltage V. p Clamping to NV o Energy is transferred from the primary side to the secondary side, L m excitation current i Lm Linear increase;

[0015] Switching mode 2 [t1,t2]: Q A2 and Q A3 Simultaneously activated, applied to L a The voltage across the terminals is -V bus V bus C bus Voltage applied, i La Linear decrease; Q B2 and Q B4 Conduction, applied to L b The voltage across the terminals is 0, i Lb Remain unchanged; L r and C r Continue resonant operation;

[0016] Switching mode 3 [t2,t3]: Q A2 and Q A3 Simultaneously activated, applied to L a The voltage across the terminals is -V bus i La Linear decrease; Q B2 and Q B4 On, inductor L b The voltage across the terminals is 0, i Lb It remains unchanged; at time t2, the resonant current resonates with the excitation current i. Lm When the current is equal, the secondary rectifier diode current naturally decreases to zero, achieving zero-current turn-off; thereafter, L m L r and C r The three components resonate and operate under load C. o powered by;

[0017] Switching mode 4 [t3,t4]: Q is turned off at time t3. A3 i La Give Q A3 C A3Charging, while simultaneously supplying Q A4 C A4 Discharge; at time t4, C A3 The voltage is charged to V bus Meanwhile, C A4 If the voltage is set to zero, then Q A4 anti-parallel diode D A4 Natural conduction, at which point Q can be turned on with zero voltage. A4 Similarly, Q can be turned on with zero voltage. B3 L m L r and C r The three components continue to resonate, with the load being C. o powered by;

[0018] Switching mode 5 [t4,t5]: Q A2 and Q A4 Conduction, applied to L a The voltage across the terminals is 0, i La Keeps unchanged; Q B2 and Q B3 Simultaneously, the circuit is turned on, and the voltage applied across the inductor is -V. bus i Lb Linear decrease; L r and C r Resonant operation, secondary side D R2 and D R3 Turning on the transformer will convert the primary voltage V to voltage V. p Clamping to -NV o Energy is transferred from the primary side to the secondary side, and the excitation current i Lm Linear decrease;

[0019] Switching mode 6 [t5,t6]: Q A2 and Q A4 Conduction, applied to L a The voltage across the terminals is 0, i La Keep it unchanged; at time t5, turn off Q. B2 i Lb Give Q B2 C B2 Charging, while simultaneously supplying Q B1 C B1 Discharge; at time t6, C B2 The voltage is charged to V inB V inB C inB Apply voltage, and simultaneously C B1 If the voltage is set to zero, then Q B1 anti-parallel diode D B1 Natural conduction, at which point Q can be turned on with zero voltage. B1 L r and Cr Continue resonant operation;

[0020] Switching mode 7 [t6,t7]: Q A2 and Q A4 Conduction, applied to L a The voltage across the terminals is 0, i La Keeps unchanged; Q B1 and Q B3 Conduction, applied to L b The voltage across the terminals is V inB -V bus i Lb Linear decrease; L r and C r Continue resonant operation;

[0021] Switching mode 8 [t7, t8]: At time t7, Q is turned off. A2 i La Give Q A2 C A2 Charging, while simultaneously supplying Q A1 C A1 Discharge; at time t8, C A2 The voltage is charged to V inA Meanwhile, C A1 If the voltage is set to zero, then Q A1 anti-parallel diode D A1 Natural conduction, at which point Q can be turned on with zero voltage. A1 Q B1 and Q B3 Conduction, applied to L b The voltage across the terminals is V inB -V bus i Lb Linear decrease; L r and C r Continue resonant operation;

[0022] Switching mode 9 [t8,t9]: Q A1 and Q A4 Conduction, applied to L a The voltage across the terminals is V inA i La linearly increasing; Q B1 and Q B3 Conduction, applied to L b The voltage across the terminals is V inB -V bus i Lb Linear decrease; L r and C r Continue resonant operation;

[0023] Switching mode 10[t9,t 10 QA1 and Q A4 Conduction, applied to L a The voltage across the terminals is V inA i La linearly increasing; Q B1 and Q B3 Conduction, applied to L b The voltage across the terminals is V inB -V bus i Lb The current decreases linearly; at time t9, the resonant current reaches a point equal to the excitation current, and the current in the secondary rectifier diode naturally decreases to zero, achieving zero-current turn-off; thereafter, L m L r and C r The three components resonate and operate under load C. o powered by;

[0024] Switching mode 11[t 10 ,t 11 ]: In t 10 At any time, turn off Q. A4 i La Give Q A4 C A4 Charging, while simultaneously supplying Q A3 C A3 Discharge; at t 11 At that moment, C A4 The voltage is charged to V bus Meanwhile, C A3 If the voltage is set to zero, then Q A3 anti-parallel diode D A3 Natural conduction, at which point Q can be turned on with zero voltage. A3 Similarly, Q can be turned on with zero voltage. B4 L m L r and C r The three components continue to resonate, with the load being C. o powered by;

[0025] Switching mode 12[t] 11 ,t 12 Q A1 and Q A3 Conduction, applied to L a The voltage across the terminals is V inA -V bus i La linearly increasing; Q B1 and Q B4 Simultaneously, the circuit is turned on, and the voltage applied across the inductor is V. inB i Lb Linear increase; L r and C rResonant operation, secondary rectifier diode D R1 and D R4 Turning on the transformer will convert the primary voltage V to voltage V. p Clamping to NV o Energy is transferred from the primary side to the secondary side, and the excitation current i Lm Linear increase;

[0026] Switching mode 13[t] 12 ,t 13 Q A1 and Q A3 Conduction, applied to L a The voltage across the terminals is V inA -V bus i La Linear increase; at t 12 At any time, turn off Q. B1 i Lb Give Q B1 junction capacitance C B1 Charging, while simultaneously supplying Q B2 C B2 Discharge; at t 13 At that moment, C B1 The voltage is charged to V inB Meanwhile, C B2 If the voltage is set to zero, then Q B2 anti-parallel diode D B1 Natural conduction, at which point Q can be turned on with zero voltage. B2 L r and C r Continue resonant operation;

[0027] Switching mode 14[t 13 ,t 14 Q A1 and Q A3 Conduction, applied to L a The voltage across the terminals is V inA -V bus i La linearly increasing; Q B2 and Q B4 Conduction, applied to L b The voltage across the terminals is 0, i Lb Remain unchanged; L r and C r Continue resonant operation.

[0028] The control circuit of the bridge arm multiplexed soft-switching AC-DC converter includes an output voltage regulation circuit, an input voltage regulation circuit, an output voltage-controlled phase-shift clock generation circuit, an input voltage-controlled phase-shift clock generation circuit, and a switch signal gating circuit.

[0029] The output voltage regulation circuit is used to sample the output voltage and compare it with a given voltage reference, stabilize the output voltage through voltage regulator and current regulator, and achieve power factor correction.

[0030] The input voltage regulation circuit is used to sample the input capacitor voltage and compare it with a given voltage reference, and to control the input capacitor voltage through closed-loop regulation of the input voltage regulator.

[0031] The phase-shift clock generation circuit controlled by the output voltage is used to sample L. a or L b The valley current of the inductor, after passing through the inverter, is compared with the given current reference I. ZVS_ref(O) The comparison is performed, and the resulting error value is sent to phase shifter 1. The signal generated by phase shifter 1 is then processed by a subtractor to produce a phase shift signal V. θ(O) The phase-shifting signal V θ(O) After entering phase-shift pulse generation module 1, the phase-shift duty cycle D is generated first. θ(O) Ultimately, two phase differences are generated, which are affected by D. θ(O) Narrow pulses CLK1(O) and CLK2(O) are controlled, with CLK1(O) controlling Q. A4 Q B4 At the activation time, CLK2(O) controls Q. A1 Q B1 The opening time;

[0032] The input voltage-controlled phase-shift clock generation circuit is used to sample i Lb or i La peak current i L_max , with a given current reference I ZVS_ref(I) The comparison is performed, and the resulting error value is sent to phase shifter 2. Phase shifter 2 generates a phase shift signal V. θ(I) The phase-shifted signal V θ(I) After entering phase-shift pulse generation module 2, the phase-shift duty cycle D is generated first. θ(I) Ultimately, two phase differences are generated, which are affected by D. θ(I) Narrow pulses CLK1(I) and CLK2(I) are controlled, with CLK1(I) controlling Q. B3 Q A3 At the turn-on time, CLK2(I) controls the switching transistor Q. B1 Q A1 The opening time;

[0033] The switch signal selection circuit is used to compare the input voltage with 0 in comparator 5 to generate V. sel The signal, V, during the positive half-cycle of the input voltage. sel When the voltage is high, this selector switch channel 1 is turned on. During the negative half-cycle of the input voltage, Vsel When the signal is low, switch channel 2 is activated, while switch channel 1 is used to control Q. A4 Q A1、 Q B3 and Q B1 At the activation time, switch channel 2 is used to control Q. B4 Q B1 Q A3 and Q A1 The opening time.

[0034] The aforementioned output voltage regulation circuit includes an output voltage regulator, a multiplier, an input current regulator, an adder, comparator 1, and an RS flip-flop 1, with an output voltage V. o The sampled signal v o_s With a given voltage reference V o_ref The comparison is performed, and the resulting error signal is input to the output voltage regulator. The multiplier then multiplies the output voltage of the voltage regulator. c The absolute value of the input voltage sampling signal |v in_s | Multiplying them yields the reference signal i for the input current. g_ref , change i g_ref With input current i in The sampled signals are compared, and the resulting error signal is input to the current regulator. The adder then adds the current regulator's output V. err1 and V θ(O) The signal v is obtained after addition. err1 ′, v err1 ′ and triangular wave signal v saw The signal is fed into comparator 1 for comparison to obtain the duty cycle signal D. y(O) D y(O) CLK2(O) is fed into RS flip-flop 1, and the positive output signal of RS flip-flop 1 is Q. A1 Q B1 The driving signal, whose inverted signal is Q. A2 Q B2 The driving signal.

[0035] The aforementioned input voltage regulation circuit includes an input voltage regulator, an adder, comparator 2, and an RS flip-flop 2. The sampled signal of the input capacitor voltage is compared with a given voltage reference. The resulting error signal is input to the input voltage regulator. The adder converts the output voltage of the input voltage regulator into a voltage value. err2 and V θ(I) After adding them together, we get v err2 ′, will v err2 ′ and triangular wave signal v saw The signal is fed into comparator 2 for comparison, and the result is signal D. y(I) D y(I)CLK2(I) is fed into RS flip-flop 2, and the positive output signal of RS flip-flop 2 is the switching transistor Q. B1 Q A1 The drive signal, whose inverted signal is the switch Q. B2 Q A2 The driving signal.

[0036] The aforementioned output voltage controlled phase-shift clock generation circuit includes an output voltage controlled phase-shift signal generation module, a phase-shift pulse generation module 1, and a switching transistor drive circuit 1.

[0037] The phase-shift signal generation module controlled by the output voltage includes a valley current detection circuit, an inverter, a phase-shift regulator 1, and a subtractor; the valley current detection circuit samples and obtains L. a or L b The valley of the inductor current, after passing through the inverter, is compared with the given current reference I. ZVS_ref(O) The comparison is performed, and the resulting error value is sent to phase shifter 1. The signal generated by phase shifter 1 is then subtracted and compared with 0.5V. M Subtraction yields the phase-shifted signal V θ(O) V M For triangular wave signal v saw Peak voltage;

[0038] The phase-shifting pulse generation module 1 receives the phase-shifting signal V. θ(O) Then, V θ(O) With triangular wave signal v saw After being compared by comparator 3, the output phase shift duty cycle D is determined. θ(O) The phase-shifting pulse generation module 1 ultimately generates two phase-difference pulses controlled by D. θ(O) Narrow pulses CLK1(O) and CLK2(O) are used to control the switching transistor Q. A4 Q B4 At the turn-on time, CLK2(O) is used to control the switching transistor Q. A1 Q B1 The opening time;

[0039] The switching transistor driving circuit 1 includes a delay module 1 and an RS flip-flop 3. The delay module 1 delays the CLK1(O) pulse signal by half a switching cycle and then sends it along with CLK1(O) to the RS flip-flop 3 to generate a turn-off signal for half a switching cycle. The positive output signal of the RS flip-flop 3 is the switching transistor Q. A4 Q B4 The drive signal, whose inverted signal is the switch Q. A3 Q B3 The driving signal.

[0040] The aforementioned input voltage controlled phase-shift clock generation circuit includes an input voltage controlled phase-shift signal generation module, a phase-shift pulse generation module 2, and a switching transistor drive circuit 2.

[0041] The input voltage-controlled phase-shift generation module includes a peak current detection circuit and a phase-shift regulator 2; the peak current detection circuit samples and obtains L. a or L b The peak value of the inductor current is compared with a given current reference I. ZVS_ref(I) The comparison is performed, and the resulting error value is sent to phase shifter 2. Phase shifter 2 generates a phase shift signal V. θ(I) ;

[0042] The phase-shifting pulse generation module 2 receives the phase-shifting signal V. θ(I) Then, V θ(I) With triangular wave signal v saw After being compared by comparator 3, the output phase shift duty cycle D is determined. θ(I) The phase-shifting pulse generation module 2 ultimately generates two phase differences affected by D. θ(I) Narrow pulses CLK1(I) and CLK2(I) are used to control the switching transistor Q. B3 Q A3 At the turn-on time, CLK2(I) is used to control the switching transistor Q. B1 Q A1 The opening time;

[0043] The switching transistor driving circuit 2 includes a delay module 2 and an RS flip-flop 4. The delay module 2 delays the CLK1(I) pulse signal by half a switching cycle and then sends it along with CLK1(I) to the RS flip-flop 4 to generate a turn-off signal for half a switching cycle. The positive output signal of the RS flip-flop 4 is the Q signal of the switching transistor. B3 Q A3 The drive signal, whose inverted signal is the switching transistor Q. B4 Q A4 The driving signal.

[0044] A control method for a bridge-arm multiplexed soft-switching AC-DC converter, the control method comprising: comparing the input voltage with 0 in comparator 5 to generate V. sel The signal, V, during the positive half-cycle of the input voltage. sel When the signal is high, switch channel 1 is turned on. The output voltage sampling signal passes through a voltage regulator, then a multiplier and a current regulator to achieve power factor correction and generate Q. A1 Duty cycle D y1(O) Its inverted signal is used to control Q. A2 L aThe inductor current valley value is output as phase shift duty cycle D after passing through an inverter, phase shift regulator, and subtractor. θ(O) Two narrow pulses, CLK1(O) and CLK2(O), are generated by the phase-shifting pulse signal generation module 1, which control Q respectively. A4 and Q A1 The turn-on time, where CLK1(O) generates Q after a delay of half a switching cycle. A4 The shutdown signal; C inB The voltage sampling signal is used to generate the switching transistor Q after passing through the voltage regulator. B1 Duty cycle D y1(I) Its inverted signal is used to control Q. B2 L b The peak inductor current is output as phase shift duty cycle D after passing through the phase shift regulator. θ(I) Two narrow pulses, CLK1(I) and CLK2(I), are generated by the phase-shifting pulse signal generation module 2, which control Q respectively. B3 and Q B1 The turn-on time, where CLK1(I) generates Q after a delay of half a switching cycle. B3 The shutdown signal;

[0045] During the negative half-cycle of the input voltage, V sel When the signal is low, switch channel 2 is turned on. The output voltage sampling signal passes through a voltage regulator, then a multiplier and a current regulator to achieve power factor correction and generate the Q signal of the switching transistor. B1 Duty cycle D y1(O) Its inverted signal is used to control Q. B2 L b The inductor current valley value is output as phase shift duty cycle D after passing through an inverter, phase shift regulator, and subtractor. θ(O) Two narrow pulses, CLK1(O) and CLK2(O), are generated by the phase-shifting pulse signal generation module 1, which control Q respectively. B4 and Q B1 The turn-on time, where CLK1(O) generates Q after a delay of half a switching cycle. B4 The shutdown signal; C inA The voltage sampling signal is used to generate the switching transistor Q after passing through the voltage regulator. A1 Duty cycle D y1(I) Its inverted signal is used to control Q. A2 L a The peak inductor current is output as phase shift duty cycle D after passing through the phase shift regulator. θ(I) Two narrow pulses, CLK1(I) and CLK2(I), are generated by the phase-shifting pulse signal generation module 2, which control Q respectively. A3 and Q A1 The turn-on time, where CLK1(I) generates Q after a delay of half a switching cycle. A3The shutdown signal.

[0046] The present invention has the following beneficial effects:

[0047] This invention innovates the circuit topology based on a bridgeless AC-DC converter and a full-bridge LLC resonant converter by multiplexing the primary-side switches of the full-bridge LLC resonant converter and the rear-side switches of the bridgeless AC-DC converter. Compared with traditional AC-DC converters, this invention's bridge-side multiplexed soft-switching AC-DC converter can achieve power factor correction, soft switching of all switches, and effectively reduce the number of components.

[0048] This invention can also electrically isolate the input voltage from the output voltage, better protect downstream electrical equipment, achieve wide-range voltage regulation, and has high power density, high conversion efficiency and high reliability. Attached Figure Description

[0049] Figure 1 This is a circuit diagram of a bridge arm multiplexed soft-switching AC-DC converter.

[0050] Figure 2 This is the control circuit diagram for a bridge arm multiplexed soft-switching AC-DC converter.

[0051] Figure 3 This is a waveform diagram of the working state of a bridge arm multiplexed soft-switching AC-DC converter.

[0052] Figure 4a This is the equivalent circuit diagram of the switching mode 1 of the bridge arm multiplexed soft-switching AC-DC converter.

[0053] Figure 4b This is the equivalent circuit diagram of the switching mode 2 of the bridge arm multiplexed soft-switching AC-DC converter.

[0054] Figure 4c This is the equivalent circuit diagram of the switching mode 3 of the bridge arm multiplexed soft-switching AC-DC converter.

[0055] Figure 4d This is the equivalent circuit diagram of the switching mode 4 of the bridge arm multiplexed soft-switching AC-DC converter.

[0056] Figure 4e This is the equivalent circuit diagram of the switching mode 5 of the bridge arm multiplexed soft-switching AC-DC converter.

[0057] Figure 4f This is the equivalent circuit diagram of the switching mode 6 of the bridge arm multiplexed soft-switching AC-DC converter.

[0058] Figure 4g This is the equivalent circuit diagram of the switching mode 7 of the bridge arm multiplexed soft-switching AC-DC converter.

[0059] Figure 4h This is the equivalent circuit diagram of the switching mode 8 of the bridge arm multiplexed soft-switching AC-DC converter.

[0060] Figure 4i This is the equivalent circuit diagram of the switching mode 9 of the bridge arm multiplexed soft-switching AC-DC converter.

[0061] Figure 4j This is the equivalent circuit diagram of the switching mode 10 of the bridge arm multiplexed soft-switching AC-DC converter.

[0062] Figure 4k This is the equivalent circuit diagram of the switching mode 11 of the bridge arm multiplexed soft-switching AC-DC converter.

[0063] Figure 4l This is the equivalent circuit diagram of the switching mode 12 of the bridge arm multiplexed soft-switching AC-DC converter.

[0064] Figure 4m This is the equivalent circuit diagram of the switching mode 13 of the bridge arm multiplexed soft-switching AC-DC converter.

[0065] Figure 4n This is the equivalent circuit diagram of the switching mode 14 of the bridge arm multiplexed soft-switching AC-DC converter.

[0066] Figure 5 The simulation waveform of PFC for a bridge arm multiplexed soft-switching AC-DC converter.

[0067] Figure 6 The simulation waveform diagram of the FSBB A module of the bridge arm multiplexed soft-switching AC-DC converter.

[0068] Figure 7 The simulation waveform diagram of the FSBB B module of the bridge arm multiplexed soft-switching AC-DC converter.

[0069] Figure 8 Simulation waveform of LLC module in bridge arm multiplexed soft-switching AC-DC converter. Detailed Implementation

[0070] The embodiments of the present invention will be described in further detail below with reference to the accompanying drawings.

[0071] The circuit structure of the bridge arm multiplexed soft-switching AC-DC converter of the present invention is as follows: Figure 1 As shown, the bridge-arm multiplexed soft-switching AC-DC converter includes an input AC voltage source v in Input capacitor C inA Input capacitor C inB Inductor L a Inductor L b Intermediate bus capacitor Cbus Resonant inductor L r Magnetizing inductance L m Resonant capacitor C r Transformer T r Output filter capacitor C o Switch Q A1 and its anti-parallel diode D A1 junction capacitance C A1 Switch Q A2 and its anti-parallel diode D A2 junction capacitance C A2 Switch Q A3 and its anti-parallel diode D A3 junction capacitance C A4 Switch Q A4 and its anti-parallel diode D A4 junction capacitance C A4 Switch Q B1 and its anti-parallel diode D B1 junction capacitance C B1 Switch Q B2 and its anti-parallel diode D B2 junction capacitance C B2 Switch Q B3 and its anti-parallel diode D B3 junction capacitance C B3 Switch Q B4 and its anti-parallel diode D B4 junction capacitance C B4 rectifier diode D R1 rectifier diode D R2 rectifier diode D R3 rectifier diode D R4 Load R Ld In the bridge arm multiplexed soft-switching AC-DC converter, the switching transistor Q... A1 and Q A2 Q B1 and Q B2 Q A3 and Q A4 Q B3 and Q B4 They conduct in a complementary manner, and the switching transistor Q... A3 Q A4 Q B3 Q B4 The duty cycle is fixed at 50%; and the switching transistor Q... A3 and switching transistor Q B4 Simultaneously turn on and off, switch Q A4 and switching transistor Q B3 Simultaneously open and close.

[0072] This invention innovates the circuit topology based on a bridgeless AC-DC converter and a full-bridge LLC resonant converter by multiplexing the primary-side switches of the full-bridge LLC resonant converter and the rear-side switches of the bridgeless AC-DC converter. This enables power factor correction, soft switching of all switches, and a reduction in the number of components.

[0073] The bridge arm multiplexed soft-switching AC-DC converter includes a bridgeless AC-DC converter and a full-bridge LLC resonant converter.

[0074] The bridgeless AC-DC converter includes an input AC voltage source v in Input capacitor C inA Input capacitor C inB Inductor L a Inductor L b Intermediate bus capacitor C bus Switching transistor Q A1 and its anti-parallel diode D A1 junction capacitance C A1 Switching transistor Q A2 and its anti-parallel diode D A2 junction capacitance C A2 Switching transistor Q A3 and its anti-parallel diode D A3 junction capacitance C A4 Switching transistor Q A4 and its anti-parallel diode D A4 junction capacitance C A4 Switching transistor Q B1 and its anti-parallel diode D B1 junction capacitance C B1 Switching transistor Q B2 and its anti-parallel diode D B2 junction capacitance C B2 Switching transistor Q B3 and its anti-parallel diode D B3 junction capacitance C B3 Switching transistor Q B4 and its anti-parallel diode D B4 junction capacitance C B4 Q A1 and Q A2 Q B1 and Q B2 Q A3 and Q A4 Q B3 and Q B4 They are respectively complementary in conduction, corresponding to bridge arms 1, 2, 3, and 4, C inA C inB C bus Connected in series at both ends of bridge arms 1, 2, and 3 respectively, v inConnected in series with Q A1 Drain and Q B1 Between the drain and the electrode, L a Connected in series between the midpoint of bridge arm 1 and the midpoint of bridge arm 3, L b Connected between the midpoint of bridge arm 2 and the midpoint of bridge arm 4;

[0075] A full-bridge LLC resonant converter includes a resonant inductor L r Magnetizing inductance L m Resonant capacitor C r Transformer T r Output filter capacitor C o 1 Rectifier diode D R1 D R2 D R3 D R4 and load R Ld and reuse Q A3 and Q A4 The bridge arm 3 and Q constitute B3 and Q B4 The bridge arm 4; L m Parallel to T r The two ends of the original edge, and T r One end of the primary side is connected in series with L r C r Connect the midpoint of bridge arm 3, T r The other end of the original side is connected to the midpoint of bridge arm 4; D R1 D R2 Series, D R3 D R4 Series connection, and two series circuits connected in parallel, C o R Ld Both are connected in parallel with two series circuits, T r One end of the secondary side is connected to D R1 D R2 The connection point is , and the other end is connected to D. R3 D R4 The connection point;

[0076] In the bridge-arm multiplexed AC-DC converter of the present invention, the switches in the same bridge arm are complementary in conduction, and the multiplexed bridge arm switch Q... A3 Q A4 Q B3 Q B4 The duty cycle is fixed at 50%; and the switching transistor Q... A3 and switching transistor Q B4 Simultaneously turn on and off, switch Q A4 and switching transistor Q B3 Simultaneously open and close.

[0077] The control circuit of the bridge arm multiplexed soft-switching AC-DC converter of the present invention is as follows: Figure 2 As shown, the control circuit of the bridge arm multiplexed soft-switching AC-DC converter includes:

[0078] The output voltage regulation circuit samples the output voltage and compares it with a given voltage reference. It then uses a closed-loop regulation system with an outer voltage regulator and an inner current regulator to stabilize the output voltage and achieve power factor correction.

[0079] The input voltage regulation circuit samples the input capacitor voltage and compares it with a given voltage reference, and then controls the input capacitor voltage through closed-loop regulation of the voltage regulator.

[0080] The phase-shift clock generation circuit controlled by the output voltage samples i. La (i Lb Valley current i L_min After passing through an inverter, it becomes -i L_min , with a given current reference I ZVS_ref(O) The comparison is performed, and the error value is sent to phase shifter 1. The signal generated by phase shifter 1 is then processed by a subtractor to generate the switching transistor Q. A4 (Q B4 ) and Q A1 (Q B1 The phase-shifted signal V between the turn-on times θ(O) Phase-shifted signal V θ(O) After entering the phase-shifting pulse generation module, the phase-shifting duty cycle D is generated first. θ(O) Ultimately, two phase differences are generated, which are affected by D. θ(O) The narrow pulses CLK1(O) and CLK2(O) control the switching transistor Q, respectively. A4 (Q B4 ) and Q A1 (Q B1 The opening time of ).

[0081] The input voltage-controlled phase-shift clock generation circuit samples i Lb (i La Peak current i L_max , with a given current reference I ZVS_ref(I) The comparison is performed, and the error value is sent to phase shifter 2. Phase shifter 2 generates the switching transistor Q. B3 (Q A3 ) and Q B1 (Q A1 The phase-shifted signal V between the turn-on times θ(I) Phase-shifted signal V θ(I) After entering the phase-shifting pulse generation module, the phase-shifting duty cycle D is generated first. θ(I) Ultimately, two phase differences are generated, which are affected by D. θ(I) The narrow pulses CLK1(I) and CLK2(I) control the switching transistor Q, respectively. B3 (QA3 ) and Q B1 (Q A1 The opening time of ).

[0082] The switching signal gating circuit, during the positive half-cycle of the input AC voltage, V sel When the voltage is high, switch channel 1 is turned on. During the negative half-cycle of the input AC voltage, V... sel When the signal is low, switch channel 2 is activated.

[0083] like Figure 1 In a bridge-arm multiplexed soft-switching AC-DC converter, the switching transistor Q... A1 The drain and diode D A1 Cathode and junction capacitance C A1 One end is connected, and the switching transistor Q is connected. A1 The source and diode D A1 anode and junction capacitance C A1 The other end is connected to the switching transistor Q. A2 The drain and diode D A2 Cathode and junction capacitance C A2 One end is connected, and the switching transistor Q is connected. A2 The source and diode D A2 anode and junction capacitance C A2 The other end is connected to the switching transistor Q. A3 The drain and diode D A3 Cathode and junction capacitance C A3 One end is connected, and the switching transistor Q is connected. A3 The source and diode D A3 anode and junction capacitance C A3 The other end is connected to the switching transistor Q. A4 The drain and diode D A4 Cathode and junction capacitance C A4 One end is connected, and the switching transistor Q is connected. A4 The source and diode D A4 anode and junction capacitance C A4 The other end is connected to the switching transistor Q. B1 The drain and diode D B1 Cathode and junction capacitance C B1 One end is connected, and the switching transistor Q is connected. B1 The source and diode D B1 anode and junction capacitance C B1 The other end is connected to the switching transistor Q. B2 The drain and diode D B2 Cathode and junction capacitance C B2 One end is connected, and the switching transistor Q is connected. B2 The source and diode D B2 anode and junction capacitance CB2 The other end is connected to the switching transistor Q. B3 The drain and diode D B3 Cathode and junction capacitance C B3 One end is connected, and the switching transistor Q is connected. B3 The source and diode D B3 anode and junction capacitance C B3 The other end is connected to the switching transistor Q. B4 The drain and diode D B4 Cathode and junction capacitance C B4 One end is connected, and the switching transistor Q is connected. B4 The source and diode D B4 anode and junction capacitance C B4 The other end is connected;

[0084] Input AC voltage source v in One end is connected to the input capacitor C inA One end and the switching transistor Q A1 The drains of the transistors are connected, and the switching transistor Q is connected. A1 The source and switch Q A2 Drain and inductance L a One end is connected, inductor L a The other end is connected to the switching transistor Q. A3 The source and switch Q A4 Drain and resonant capacitor C r One end is connected to the resonant capacitor C. r The other end and the resonant inductor L r One end is connected to the resonant inductor L. r The other end is connected to the magnetizing inductor L m One end and transformer T r One end of the primary side is connected, and the switching transistor Q is connected. A3 The drain and the switching transistor Q B3 The drain and intermediate bus capacitor C bus One end is connected to the AC voltage source V. in The other end is connected to the input capacitor C inB One end and the switching transistor Q B1 The drains of the transistors are connected, and the switching transistor Q is connected. B1 The source and switch Q B2 Drain and inductance L b One end is connected, inductor L b The other end is connected to the switching transistor Q. B3 The source and switch Q B4 Drain and magnetizing inductance L m The other end and transformer T r The other end of the primary side is connected, and the switching transistor Q is connected. A2 The source and switch Q B2The source and switch Q A4 The source and switch Q B4 The source and input capacitor C inA The other end and the input capacitor C inB The other end and the intermediate bus capacitor C bus The other end is connected, one end of the transformer secondary side and the rectifier diode D R1 anode and rectifier diode D R3 The cathode is connected, and the rectifier diode D R1 Cathode and rectifier diode D R2 Cathode and output filter capacitor C o One end and load R Ld One end is connected to the transformer secondary side, and the other end is connected to the rectifier diode D. R2 anode and rectifier diode D R4 The cathode is connected, and the rectifier diode D R3 anode and rectifier diode D R4 anode and output filter capacitor C o The other end and load R Ld The other end is connected.

[0085] The bridge arm multiplexing soft-switching AC-DC converter of the present invention includes 14 switching modes. Figure 3 Figure 4 shows the operating waveforms of the bridge-arm multiplexed soft-switching AC-DC converter. The equivalent circuit diagrams of the bridge-arm multiplexed soft-switching AC-DC converter under different switching modes are as follows:

[0086] like Figure 4a Switching mode 1 [t0, t1]: At time t0, Q is turned off. A1 Inductor current i La Give Q A1 junction capacitance C A1 Charging, while simultaneously supplying Q A2 junction capacitance C A2 Discharge. At time t1, C A1 The voltage is charged to V inA V inA For the input capacitor C inA Apply voltage, and simultaneously C A2 If the voltage is set to zero, then Q A2 anti-parallel diode D A2 Natural conduction, at which point Q can be turned on with zero voltage. A2 Q B2 and Q B4 When the circuit is turned on, the current applied to inductor L is... b When the voltage across the terminals is 0, the inductor current i Lb Remain unchanged; L r and C rResonant operation, secondary rectifier diode D R1 and D R4 Turning on the transformer will convert the primary voltage V to voltage V. p Clamping to NV o Energy is transferred from the primary side to the secondary side, and the excitation current i Lm It increases linearly.

[0087] like Figure 4b Switching mode 2 [t1,t2]: Q A2 and Q A3 Simultaneously conduction, applied to inductor L a The voltage across the terminals is -V bus V bus For the intermediate bus capacitor C bus Voltage applied, inductor current i La Linear decrease; Q B2 and Q B4 When the circuit is turned on, the current applied to inductor L is... b When the voltage across the terminals is 0, the inductor current i Lb Remain unchanged; L r and C r Continue resonant operation.

[0088] like Figure 4c Switching mode 3 [t2,t3]: Q A2 and Q A3 Simultaneously conduction, applied to inductor L a The voltage across the terminals is -V bus Inductor current i La Linear decrease; Q B2 and Q B4 When the circuit is turned on, the current applied to inductor L is... b When the voltage across the terminals is 0, the inductor current i Lb The current remains unchanged; at time t2, the resonant current resonates to be equal to the excitation current, and the current of the secondary rectifier diode naturally decreases to zero, achieving zero-current turn-off. After this, L... m L r and C r The three components resonate, and the load is supplied by the output capacitor C. o powered by.

[0089] like Figure 4d Switching mode 4 [t3,t4]: At time t3, Q is turned off. A3 Inductor current i La Give Q A3 junction capacitance C A3 Charging, while simultaneously supplying Q A4 junction capacitance C A4 Discharge. At time t4, C A3 The voltage is charged to V bus Meanwhile, CA4 If the voltage is set to zero, then Q A4 anti-parallel diode D A4 Natural conduction, at which point Q can be turned on with zero voltage. A4 Similarly, Q can be turned on with zero voltage. B3 L m L r and C r The three components continue to resonate, with the load consisting of the output capacitor C. o powered by.

[0090] like Figure 4e Switching mode 5 [t4,t5]: Q A2 and Q A4 When the circuit is turned on, the current applied to inductor L is... a When the voltage across the terminals is 0, the inductor current i La Keeps unchanged; Q B2 and Q B3 Simultaneously, the circuit is turned on, and the voltage applied across the inductor is -V. bus Inductor current i Lb Linear decrease; L r and C r Resonant operation, secondary rectifier diode D R2 and D R3 Turning on the transformer will convert the primary voltage V to voltage V. p Clamping to -NV o Energy is transferred from the primary side to the secondary side, and the excitation current i Lm Linear decrease.

[0091] like Figure 4f Switching mode 6 [t5,t6]: Q A2 and Q A4 When the circuit is turned on, the current applied to inductor L is... a When the voltage across the terminals is 0, the inductor current i La Keep it unchanged; at time t5, turn off Q. B2 Inductor current i Lb Give Q B2 junction capacitance C B2 Charging, while simultaneously supplying Q B1 junction capacitance C B1 Discharge. At time t6, C B2 The voltage is charged to V inB V inB For the input capacitor C inB Apply voltage, and simultaneously C B1 If the voltage is set to zero, then Q B1 anti-parallel diode D B1 Natural conduction, at which point Q can be turned on with zero voltage. B1 L r and C rContinue resonant operation.

[0092] like Figure 4g Switching mode 7 [t6,t7]: Q A2 and Q A4 When the circuit is turned on, the current applied to inductor L is... a When the voltage across the terminals is 0, the inductor current i La Keeps unchanged; Q B1 and Q B3 When the circuit is turned on, the current applied to inductor L is... b The voltage across the terminals is V inB -V bus Inductor current i Lb Linear decrease; L r and C r Continue resonant operation.

[0093] like Figure 4h Switching mode 8 [t7, t8]: At time t7, Q is turned off. A2 Inductor current i La Give Q A2 junction capacitance C A2 Charging, while simultaneously supplying Q A1 junction capacitance C A1 Discharge. At time t8, C A2 The voltage is charged to V inA Meanwhile, C A1 If the voltage is set to zero, then Q A1 anti-parallel diode D A1 Natural conduction, at which point Q can be turned on with zero voltage. A1 Q B1 and Q B3 When the circuit is turned on, the current applied to inductor L is... b The voltage across the terminals is V inB -V bus Inductor current i Lb Linear decrease; L r and C r Continue resonant operation.

[0094] like Figure 4i Switching mode 9 [t8,t9]: Q A1 and Q A4 When the circuit is turned on, the current applied to inductor L is... a The voltage across the terminals is V inA Inductor current i La linearly increasing; Q B1 and Q B3 When the circuit is turned on, the current applied to inductor L is... b The voltage across the terminals is V inB -V bus Inductor current i Lb Linear decrease; L r and Cr Continue resonant operation.

[0095] like Figure 4j Switching mode 10[t9,t 10 Q A1 and Q A4 When the circuit is turned on, the current applied to inductor L is... a The voltage across the terminals is V inA Inductor current i La linearly increasing; Q B1 and Q B3 When the circuit is turned on, the current applied to inductor L is... b The voltage across the terminals is V inB -V bus Inductor current i Lb The current decreases linearly; at time t9, the resonant current reaches a state equal to the excitation current, and the current in the secondary rectifier diode naturally decreases to zero, achieving zero-current turn-off. Afterwards, L... m L r and C r The three components resonate, and the load is supplied by the output capacitor C. o powered by.

[0096] like Figure 4k Switching mode 11[t 10 ,t 11 ]: In t 10 At any time, turn off Q. A4 Inductor current i La Give Q A4 junction capacitance C A4 Charging, while simultaneously supplying Q A3 junction capacitance C A3 Discharge. At t 11 At that moment, C A4 The voltage is charged to V bus Meanwhile, C A3 If the voltage is set to zero, then Q A3 anti-parallel diode D A3 Natural conduction, at which point Q can be turned on with zero voltage. A3 Similarly, Q can be turned on with zero voltage. B4 L m L r and C r The three components continue to resonate, with the load consisting of the output capacitor C. o powered by.

[0097] like Figure 4l Switching mode 12[t] 11 ,t 12 Q A1 and Q A3 When the circuit is turned on, the current applied to inductor L is... a The voltage across the terminals is VinA -V bus Inductor current i La linearly increasing; Q B1 and Q B4 Simultaneously, the circuit is turned on, and the voltage applied across the inductor is V. inB Inductor current i Lb Linear increase; L r and C r Resonant operation, secondary rectifier diode D R1 and D R4 Turning on the transformer will convert the primary voltage V to voltage V. p Clamping to NV o Energy is transferred from the primary side to the secondary side, and the excitation current i Lm It increases linearly.

[0098] like Figure 4m Switching mode 13[t] 12 ,t 13 Q A1 and Q A3 When the circuit is turned on, the current applied to inductor L is... a The voltage across the terminals is V inA -V bus Inductor current i La Linear increase; at t 12 At any time, turn off Q. B1 Inductor current i Lb Give Q B1 junction capacitance C B1 Charging, while simultaneously supplying Q B2 junction capacitance C B2 Discharge. At t 13 At that moment, C B1 The voltage is charged to V inB Meanwhile, C B2 If the voltage is set to zero, then Q B2 anti-parallel diode D B1 Natural conduction, at which point Q can be turned on with zero voltage. B2 L r and C r Continue resonant operation.

[0099] like Figure 4n Switching mode 14[t 13 ,t 14 Q A1 and Q A3 When the circuit is turned on, the current applied to inductor L is... a The voltage across the terminals is V inA -V bus Inductor current i La linearly increasing; Q B2 and Q B4 When the circuit is turned on, the current applied to inductor L is...b When the voltage across the terminals is 0, the inductor current i Lb Remain unchanged; L r and C r Continue resonant operation.

[0100] like Figure 2 In circuit A, the output voltage regulation circuit includes an output voltage regulator, a multiplier, an input current regulator, an adder, a comparator 1, and an RS flip-flop 1, which regulates the output voltage V. o The sampled signal v o_s With a given voltage reference V o_ref The error signal is compared and input to the output voltage regulator, which then outputs the voltage regulator's V... c The absolute value of the input voltage sampling signal |v in_s | Multiplying them yields the reference signal i for the input current. g_ref , input current i in The sampled signal i ina_s (i inb_s ) and input current reference signal i g_ref The error signal is compared and input to the current regulator, which then outputs v to the current regulator. err1 and V θ(O) The signal v is obtained after addition. err1 ′, will v err1 ′ and triangular wave v saw The signal is fed into comparator 1 for comparison, and the duty cycle signal D is obtained. y(O) D y(O) For the switching transistor Q A1 (Q B1 Duty cycle D y1(O) and switching transistor Q A4 (Q B4 ) before Q A1 (Q B1 The duty cycle D corresponding to the conduction time θ(O) The sum of these will give signal D y(O) CLK2(O) is fed into RS flip-flop 1, and the positive output signal of RS flip-flop 1 is the switching transistor Q. A1 (Q B1 The drive signal of the transistor Q is the inverted signal of the transistor Q. A2 (Q B2 The driving signal of ).

[0101] like Figure 2 The input voltage circuit in circuit B includes an input voltage regulator, an adder, a comparator 2, and an RS flip-flop 2, which converts the sampled signal v of the input capacitor voltage into a voltage regulator. inB_s (v inA_s ) and the given voltage reference V in_refB (Vin_refA The error signal is compared with the input voltage regulator, and the output voltage of the voltage regulator is adjusted accordingly. err2 and V θ(I) After adding them together, we get v err2 ′, will v err2 ′ and triangular wave v saw The signal is fed into comparator 2 for comparison, and the result is signal D. y(I) D y(I) For the switching transistor Q B1 (Q A1 Duty cycle D y1(I) and switching transistor Q B3 (Q A3 ) before Q B1 (Q A1 The duty cycle D corresponding to the conduction time θ(I) The sum of D y(I) CLK2(I) is fed into RS flip-flop 2, and the positive output signal of RS flip-flop 2 is the switching transistor Q. B1 (Q A1 The drive signal of the transistor Q is the inverted signal of the transistor Q. B2 (Q A2 The driving signal of ).

[0102] like Figure 2 The C circuit, specifically the output voltage-controlled phase-shift clock generation circuit, includes an output voltage-controlled phase-shift signal generation module, a phase-shift pulse generation module 1, and a switching transistor Q. A3 (Q B3 ) and Q A4 (Q B4 The driving circuit (switching transistor driving circuit 1) is used. The phase-shift signal generation module controlled by the output voltage includes a valley current detection circuit, an inverter, a phase-shift regulator 1, and a subtractor. The valley current detection circuit samples the inductor current i. La (i Lb The valley value i L_min After passing through an inverter, it becomes -i L_min , with a given current reference I ZVS_ref(O) The comparison is performed, and the error value is sent to phase shifter 1. Phase shifter 1 generates the switching transistor Q. A1 (Q B1 ) and Q A3 (Q B3 The phase-shifted signal v between the turn-on times err3 Phase-shifted signal v eror3 After subtraction and 0.5V M Subtraction yields the switching transistor Q. A4 (Q B4 ) and Q A1 (Q B1The phase-shifted signal V between the turn-on times θ(O) V M For triangular wave v saw Peak voltage;

[0103] The phase-shifting pulse generation module 1 receives the phase-shifting signal V. θ(O) Then, V θ(O) With triangular wave v saw After being compared by comparator 3, the output phase shift duty cycle D is determined. θ(O) The phase-shifting pulse generation module ultimately generates two phase-difference pulses controlled by D. θ(O) Narrow pulses CLK1(O) and CLK2(O) are used to control the switching transistor Q. A4 (Q B4 At the turn-on time of ), CLK2(O) is used to control the switching transistor Q. A1 (Q B1 The opening time of )

[0104] The switching transistor Q A3 (Q B3 ) and Q A4 (Q B4 The driving circuit includes a delay module 1 and an RS flip-flop 3, where the CLK1(O) pulse signal is delayed by T. s After / 2, it is fed into RS flip-flop 3 along with CLK1(O) to generate a turn-off signal for half a switching cycle. The positive output signal of RS flip-flop 3 is the switching transistor Q. A4 (Q B4 The drive signal of the transistor Q is the inverted signal of the transistor Q. A3 (Q B3 The driving signal of ).

[0105] like Figure 2 The input voltage controlled phase-shift clock generation circuit in the D circuit includes an input voltage controlled phase-shift signal generation module, a phase-shift pulse generation module 2, and a switching transistor Q. B3 (Q A3 ) and Q B4 (Q A4 The driving circuit (switching transistor driving circuit 2) is used. The phase-shift generation module controlled by the input voltage includes a peak current detection circuit and a phase-shift regulator 2. The peak current detection circuit samples the inductor current i. Lb (i La peak i L_max , with a given current reference I ZVS_ref(I) The comparison is performed, and the error value is sent to phase shifter 2. Phase shifter 2 generates the switching transistor Q. B3 (Q A3 ) and Q B1 (Q A1The phase-shifted signal V between the turn-on times θ(I) ;

[0106] The phase-shifting pulse generation module 2 receives the phase-shifting signal V. θ(I) Then, V θ(I) With triangular wave v saw After being compared by comparator 3, the output phase shift duty cycle D is determined. θ(I) The phase-shifting pulse generation module ultimately generates two phase-difference pulses controlled by D. θ(I) Narrow pulses CLK1(I) and CLK2(I) are used to control the switching transistor Q. B3 (Q A3 At the turn-on time of ), CLK2(I) is used to control the switching transistor Q. B1 (Q A1 The opening time of )

[0107] The switching transistor Q B3 (Q A3 ) and Q B4 (Q A4 The driving circuit includes a delay module 2 and an RS flip-flop 4, with the CLK1(I) pulse signal delayed by T. s After / 2, it is fed into RS flip-flop 4 along with CLK1(I) to generate a turn-off signal for half a switching cycle. The positive output signal of RS flip-flop 4 is the switching transistor Q. B3 (Q A3 The drive signal of the transistor Q is the inverted signal of the transistor Q. B4 (Q A4 The driving signal of ).

[0108] like Figure 2 The E circuit, specifically the switch signal gating circuit, includes comparator 5 and a switch signal gating module. The input voltage is compared with 0 by comparator 5 to generate V. sel The signal, V, during the positive half-cycle of the input voltage. sel When the voltage is high, this selector switch channel 1 is turned on. During the negative half-cycle of the input voltage, V sel When the signal is low, switch channel 2 is activated.

[0109] This invention also proposes a control method for a bridge-arm multiplexed soft-switching AC-DC converter, the specific control method being as follows:

[0110] During the positive half-cycle of the input voltage, V sel When the signal is high, switch channel 1 is turned on. The output voltage sampling signal passes through a voltage regulator, then a multiplier and a current regulator to achieve power factor correction and generate the Q signal of the switching transistor. A1 Duty cycle D y1(O) Its inverted signal is used to control Q.A2 Inductor L a The inductor current valley value is output as phase shift duty cycle D after passing through an inverter, phase shift regulator, and subtractor. θ(O) Two narrow pulses, CLK1(O) and CLK2(O), are generated by the phase-shifting pulse signal generation module 1, which control Q respectively. A4 and Q A1 The turn-on time, where CLK1(O) generates Q after a delay of half a switching cycle. A4 The off signal; input capacitor C inB The voltage sampling signal is used to generate the switching transistor Q after passing through the voltage regulator. B1 Duty cycle D y1(I) Its inverted signal is used to control Q. B2 Inductance L b The peak inductor current is output as phase shift duty cycle D after passing through the phase shift regulator. θ(I) Two narrow pulses, CLK1(I) and CLK2(I), are generated by the phase-shifting pulse signal generation module 2, which control Q respectively. B3 and Q B1 The turn-on time, where CLK1(I) generates Q after a delay of half a switching cycle. B3 The shutdown signal.

[0111] During the negative half-cycle of the input voltage, V sel When the signal is low, switch channel 2 is turned on. The output voltage sampling signal passes through a voltage regulator, then a multiplier and a current regulator to achieve power factor correction and generate the Q signal of the switching transistor. B1 Duty cycle D y1(O) Its inverted signal is used to control Q. B2 Inductor L b The inductor current valley value is output as phase shift duty cycle D after passing through an inverter, phase shift regulator, and subtractor. θ(O) Two narrow pulses, CLK1(O) and CLK2(O), are generated by the phase-shifting pulse signal generation module 1, which control Q respectively. B4 and Q B1 The turn-on time, where CLK1(O) generates Q after a delay of half a switching cycle. B4 The off signal; input capacitor C inA The voltage sampling signal is used to generate the switching transistor Q after passing through the voltage regulator. A1 Duty cycle D y1(I) Its inverted signal is used to control Q. A2 Inductance L a The peak inductor current is output as phase shift duty cycle D after passing through the phase shift regulator. θ(I) Two narrow pulses, CLK1(I) and CLK2(I), are generated by the phase-shifting pulse signal generation module 2, which control Q respectively. A3 and QA1 The turn-on time, where CLK1(I) generates Q after a delay of half a switching cycle. A3 The shutdown signal.

[0112] This invention can achieve full-range soft switching, electrical isolation, and wide-range voltage regulation, while effectively reducing the number of devices, and can achieve high power density, high conversion efficiency, and high reliability.

[0113] To further illustrate the superiority of the circuit topology and control strategy of this invention, a simulation example of this invention is given below.

[0114] Based on the main parameters of the 500W bridge arm multiplexed soft-switching AC-DC converter given in Table 1, a simulation circuit was built using Saber simulation software.

[0115] Table 1. Main parameters of bridge arm multiplexed soft-switching AC-DC converter

[0116] parameter symbol numerical values parameter symbol numerical values Input voltage <![CDATA[V in ]]> 220V / 50Hz Magnetizing inductor <![CDATA[L m ]]> 483μH Output voltage <![CDATA[V o ]]> 24V Resonant inductor <![CDATA[L r ]]> 22.8μH Output power <![CDATA[P o ]]> 500W Resonant capacitor <![CDATA[C r ]]> 91.8nF Switching frequency <![CDATA[f s ]]> 100kHz Transformer turns ratio N 15:1 Input capacitor <![CDATA[C in ,C in2 ]]> 2μF Intermediate bus capacitor <![CDATA[C bus ]]> 1mF inductance <![CDATA[L a ,L b ]]> 75μH Output capacitor <![CDATA[C o ]]> 5mF

[0117] Figure 5 , Figure 6 , Figure 7 , Figure 8 Simulation waveforms of a 500W bridge-arm multiplexed soft-switching AC-DC converter are presented. Figure 5 It can be seen that v in and i in These are the input AC voltage and input AC current, respectively, V o It is the output voltage, i La and i Lb They are L a and L b The inductor current, i in Both can track v relatively well. in The waveform enables high power factor correction. Figure 6 It can be seen that during the switching cycle, L a Inductor current i La Modulated into a quadrilateral shape, it enables ZVS (zero-voltage turn-on) of the switching transistor. Figure 7 It can be seen that during the switching cycle, L b Inductor current i Lb Modulated into a quadrilateral shape, it enables ZVS (zero-voltage turn-on) of the switching transistor. Figure 8 It can be seen that the secondary rectifier diode also achieves ZCS zero-current turn-off.

[0118] The above are merely preferred embodiments of the present invention. The scope of protection of the present invention is not limited to the above embodiments. All technical solutions falling within the scope of the present invention's concept are within the scope of protection of the present invention. It should be noted that for those skilled in the art, any improvements and modifications made without departing from the principles of the present invention should be considered within the scope of protection of the present invention.

Claims

1. A bridge-arm multiplexed soft-switching AC-DC converter, characterized in that, The bridge arm multiplexed soft-switching AC-DC converter includes a bridgeless AC-DC converter and a full-bridge LLC resonant converter. The bridgeless AC-DC converter includes an input AC voltage source v in Input capacitor C inA Input capacitor C inB Inductor L a Inductor L b Intermediate bus capacitor C bus Switching transistor Q A1 and its anti-parallel diode D A1 junction capacitance C A1 Switching transistor Q A2 and its anti-parallel diode D A2 junction capacitance C A2 Switching transistor Q A3 and its anti-parallel diode D A3 junction capacitance C A4 Switching transistor Q A4 and its anti-parallel diode D A4 junction capacitance C A4 Switching transistor Q B1 and its anti-parallel diode D B1 junction capacitance C B1 Switching transistor Q B2 and its anti-parallel diode D B2 junction capacitance C B2 Switching transistor Q B3 and its anti-parallel diode D B3 junction capacitance C B3 Switching transistor Q B4 and its anti-parallel diode D B4 junction capacitance C B4 Q A1 and Q A2 Q B1 and Q B2 Q A3 and Q A4 Q B3 and Q B4 They are respectively complementary in conduction, corresponding to bridge arms 1, 2, 3, and 4, C inA C inB C bus Connected in series at both ends of bridge arms 1, 2, and 3 respectively, v in Connected in series with Q A1 Drain and Q B1 Between the drain and the electrode, L a Connected in series between the midpoint of bridge arm 1 and the midpoint of bridge arm 3, L b Connected between the midpoint of bridge arm 2 and the midpoint of bridge arm 4; A full-bridge LLC resonant converter includes a resonant inductor L r Magnetizing inductance L m Resonant capacitor C r Transformer T r Output filter capacitor C o 1 Rectifier diode D R1 D R2 D R3 D R4 and load R Ld and reuse Q A3 and Q A4 The bridge arm 3 and Q constitute B3 and Q B4 The bridge arm 4; L m Parallel to T r The two ends of the original edge, and T r One end of the primary side is connected in series with L r C r Connect the midpoint of bridge arm 3, T r The other end of the original side is connected to the midpoint of bridge arm 4; D R1 D R2 Series, D R3 D R4 Series connection, and two series circuits connected in parallel, C o R Ld Both are connected in parallel with two series circuits, T r One end of the secondary side is connected to D R1 D R2 The connection point is connected to D at the other end. R3 D R4 The connection point; Q A3 Q A4 Q B3 Q B4 The duty cycle is fixed at 50%; and Q A3 and Q B4 Simultaneous on / off, Q A4 and Q B3 Simultaneous on / off; The control circuit of the bridge arm multiplexed soft-switching AC-DC converter includes an output voltage regulation circuit, an input voltage regulation circuit, an output voltage-controlled phase-shift clock generation circuit, an input voltage-controlled phase-shift clock generation circuit, and a switch signal gating circuit. The output voltage regulation circuit is used to sample the output voltage and compare it with a given voltage reference, stabilize the output voltage through voltage regulator and current regulator, and achieve power factor correction. The input voltage regulation circuit is used to sample the input capacitor voltage and compare it with a given voltage reference, and to control the input capacitor voltage through closed-loop regulation of the input voltage regulator. The phase-shift clock generation circuit controlled by the output voltage is used to sample L. a or L b The valley current of the inductor, after passing through the inverter, is compared with the given current reference I. ZVS_ref(O) The comparison is performed, and the resulting error value is sent to phase shifter 1. The signal generated by phase shifter 1 is then processed by a subtractor to produce a phase shift signal V. θ(O) The phase-shifting signal V θ(O) After entering phase-shift pulse generation module 1, the phase-shift duty cycle D is generated first. θ(O) Ultimately, two phase differences are generated, which are affected by D. θ(O) Narrow pulses CLK1(O) and CLK2(O) are controlled, with CLK1(O) controlling Q. A4 Q B4 At the activation time, CLK2(O) controls Q. A1 Q B1 The opening time; The input voltage-controlled phase-shift clock generation circuit is used to sample i Lb or i La peak current i L_max , with a given current reference I ZVS_ref(I) The comparison is performed, and the resulting error value is sent to phase shifter 2. Phase shifter 2 generates a phase shift signal V. θ(I) The phase-shifted signal V θ(I) After entering phase-shift pulse generation module 2, the phase-shift duty cycle D is generated first. θ(I) Ultimately, two phase differences are generated, which are affected by D. θ(I) Narrow pulses CLK1(I) and CLK2(I) are controlled, with CLK1(I) controlling Q. B3 Q A3 At the turn-on time, CLK2(I) controls the switching transistor Q. B1 Q A1 The opening time; The switch signal selection circuit is used to compare the input voltage with 0 in comparator 5 to generate V. sel The signal, V, during the positive half-cycle of the input voltage. sel When the voltage is high, this selector switch channel 1 is turned on. During the negative half-cycle of the input voltage, V sel When the signal is low, switch channel 2 is activated.

2. The bridge-arm multiplexing type soft-switching AC-DC converter according to claim 1, characterized in that, Q A1 The drain and D A1 cathode and C A1 Connect one end to Q A1 The source and D A1 anode and C A1 The other end is connected, Q A2 The drain and D A2 cathode and C A2 Connect one end to Q A2 The source and D A2 anode and C A2 The other end is connected, Q A3 The drain and D A3 cathode and C A3 Connect one end to Q A3 The source and D A3 anode and C A3 The other end is connected, Q A4 The drain and D A4 cathode and C A4 Connect one end to Q A4 The source and D A4 anode and C A4 The other end is connected, Q B1 The drain and D B1 cathode and C B1 Connect one end to Q B1 The source and D B1 anode and C B1 The other end is connected, Q B2 The drain and D B2 cathode and C B2 Connect one end to Q B2 The source and D B2 anode and C B2 The other end is connected, Q B3 The drain and D B3 cathode and C B3 Connect one end to Q B3 The source and D B3 anode and C B3 The other end is connected, Q B4 The drain and D B4 cathode and C B4 Connect one end to Q B4 The source and D B4 anode and C B4 The other end is connected.

3. The bridge-arm multiplexing type soft-switching AC-DC converter according to claim 1, characterized in that, v in One end and C inA one end and Q A1 The drains are connected, Q A1 source and Q A2 The drain and L a One end is connected, L a The other end and Q A3 source and Q A4 The drain and C r One end is connected, C r The other end and L r One end is connected, L r The other end and L m one end and T r Connect one end of the original edge, Q A3 Drain and Q B3 The drain and C bus One end is connected, v in The other end and C inB one end and Q B1 The drains are connected, Q B1 source and Q B2 Drain and inductance L b One end is connected, inductor L b The other end and Q B3 source and Q B4 The drain and L m The other end and T r The other end of the original edge is connected, Q A2 source and Q B2 source and Q A4 source and Q B4 The source and C inA The other end and C inB The other end and C bus The other end is connected, and one end of the secondary side is connected to D. R1 anode and D R3 The cathode is connected, D R1 cathode and D R2 cathode and C o One end and load R Ld One end is connected to D, and the other end of the secondary side is connected to D. R2 anode and D R4 The cathode is connected, D R3 anode and D R4 anode and C o The other end and R Ld The other end is connected.

4. The bridge-arm multiplexing type soft-switching AC-DC converter according to claim 1, characterized in that, The bridge arm multiplexed soft-switching AC-DC converter includes 14 switching modes, namely: Switching mode 1 [t0, t1]: At time t0, Q is turned off. A1 L a Inductor current i La Give Q A1 C A1 Charging, while simultaneously supplying Q A2 C A2 Discharge; at time t1, C A1 The voltage is charged to V inA V inA For the input capacitor C inA Apply voltage, and simultaneously C A2 If the voltage is set to zero, then Q A2 anti-parallel diode D A2 Natural conduction, at which point Q can be turned on with zero voltage. A2 Q B2 and Q B4 Conduction, applied to L b The voltage across the terminals is 0, L b Inductor current i Lb Remain unchanged; L r and C r Resonant operation, secondary rectifier diode D R1 and D R4 Turning on the transformer will convert the primary voltage V to voltage V. p Clamping to NV o Energy is transferred from the primary side to the secondary side, L m excitation current i Lm The voltage increases linearly, where N is the number of turns on the primary and secondary sides of the transformer, and V... o This refers to the output voltage. Switching mode 2 [t1,t2]: Q A2 and Q A3 Simultaneously activated, applied to L a The voltage across the terminals is -V bus V bus C bus Voltage applied, i La Linear decrease; Q B2 and Q B4 Conduction, applied to L b The voltage across the terminals is 0, i Lb Remain unchanged; L r and C r Continue resonant operation; Switching mode 3 [t2,t3]: Q A2 and Q A3 Simultaneously activated, applied to L a The voltage across the terminals is -V bus i La Linear decrease; Q B2 and Q B4 On, inductor L b The voltage across the terminals is 0, i Lb The resonant current i remains unchanged; at time t2, the resonant current i Lr Resonance with excitation current i Lm When the current is equal, the secondary rectifier diode current naturally decreases to zero, achieving zero-current turn-off; thereafter, L m L r and C r The three components resonate and operate under load C. o powered by; Switching mode 4 [t3,t4]: Q is turned off at time t3. A3 i La Give Q A3 C A3 Charging, while simultaneously supplying Q A4 C A4 Discharge; at time t4, C A3 The voltage is charged to V bus Meanwhile, C A4 If the voltage is set to zero, then Q A4 anti-parallel diode D A4 Natural conduction, at which point Q can be turned on with zero voltage. A4 ; Similarly, Q can be turned on with zero voltage. B3 L m L r and C r The three components continue to resonate, with the load being C. o powered by; Switching mode 5 [t4,t5]: Q A2 and Q A4 Conduction, applied to L a The voltage across the terminals is 0, i La Keeps unchanged; Q B2 and Q B3 Simultaneously conduction, applied to inductor L a The voltage across the terminals is -V bus i Lb Linear decrease; L r and C r Resonant operation, secondary side D R2 and D R3 Turning on the transformer will convert the primary voltage V to voltage V. p Clamping to -NV o Energy is transferred from the primary side to the secondary side, and the excitation current i Lm Linear decrease; Switching mode 6 [t5,t6]: Q A2 and Q A4 Conduction, applied to L a The voltage across the terminals is 0, i La Keep it unchanged; at time t5, turn off Q. B2 i Lb Give Q B2 C B2 Charging, while simultaneously supplying Q B1 C B1 Discharge; at time t6, C B2 The voltage is charged to V inB V inB C inB Apply voltage, and simultaneously C B1 If the voltage is set to zero, then Q B1 anti-parallel diode D B1 Natural conduction, at which point Q can be turned on with zero voltage. B1 L r and C r Continue resonant operation; Switching mode 7 [t6,t7]: Q A2 and Q A4 Conduction, applied to L a The voltage across the terminals is 0, i La Keeps unchanged; Q B1 and Q B3 Conduction, applied to L b The voltage across the terminals is V inB -V bus i Lb Linear decrease; L r and C r Continue resonant operation; Switching mode 8 [t7, t8]: At time t7, Q is turned off. A2 i La Give Q A2 C A2 Charging, while simultaneously supplying Q A1 C A1 Discharge; at time t8, C A2 The voltage is charged to V inA Meanwhile, C A1 If the voltage is set to zero, then Q A1 anti-parallel diode D A1 Natural conduction, at which point Q can be turned on with zero voltage. A1 Q B1 and Q B3 Conduction, applied to L b The voltage across the terminals is V inB -V bus i Lb Linear decrease; L r and C r Continue resonant operation; Switching mode 9 [t8,t9]: Q A1 and Q A4 Conduction, applied to L a The voltage across the terminals is V inA i La linearly increasing; Q B1 and Q B3 Conduction, applied to L b The voltage across the terminals is V inB -V bus i Lb Linear decrease; L r and C r Continue resonant operation; Switching mode 10[t9,t 10 Q A1 and Q A4 Conduction, applied to L a The voltage across the terminals is V inA i La linearly increasing; Q B1 and Q B3 Conduction, applied to L b The voltage across the terminals is V inB -V bus i Lb The linear decrease occurs; at time t9, the resonant current i Lr When the resonant current equals the excitation current, the current in the secondary rectifier diode naturally decreases to zero, achieving zero-current turn-off; thereafter, L m L r and C r The three components resonate and operate under load C. o powered by; Switching mode 11[t 10 ,t 11 ]: In t 10 At any time, turn off Q. A4 i La Give Q A4 C A4 Charging, while simultaneously supplying Q A3 C A3 Discharge; at t 11 At that moment, C A4 The voltage is charged to V bus Meanwhile, C A3 If the voltage is set to zero, then Q A3 anti-parallel diode D A3 Natural conduction, at which point Q can be turned on with zero voltage. A3 Similarly, Q can be turned on with zero voltage. B4 L m L r and C r The three components continue to resonate, with the load being C. o powered by; Switching mode 12[t] 11 ,t 12 Q A1 and Q A3 Conduction, applied to L a The voltage across the terminals is V inA -V bus i La linearly increasing; Q B1 and Q B4 Simultaneously conduction, applied to inductor L a The voltage across the terminals is V inB i Lb Linear increase; L r and C r Resonant operation, secondary rectifier diode D R1 and D R4 Turning on the transformer will convert the primary voltage V to voltage V. p Clamping to NV o Energy is transferred from the primary side to the secondary side, and the excitation current i Lm Linear increase; Switching mode 13[t] 12 ,t 13 Q A1 and Q A3 Conduction, applied to L a The voltage across the terminals is V inA -V bus i La Linear increase; at t 12 At any time, turn off Q. B1 i Lb Give Q B1 junction capacitance C B1 Charging, while simultaneously supplying Q B2 C B2 Discharge; at t 13 At that moment, C B1 The voltage is charged to V inB Meanwhile, C B2 If the voltage is set to zero, then Q B2 anti-parallel diode D B1 Natural conduction, at which point Q can be turned on with zero voltage. B2 L r and C r Continue resonant operation; Switching mode 14[t 13 ,t 14 Q A1 and Q A3 Conduction, applied to L a The voltage across the terminals is V inA -V bus i La linearly increasing; Q B2 and Q B4 Conduction, applied to L b The voltage across the terminals is 0, i Lb Remain unchanged; L r and C r Continue resonant operation.

5. A bridge-arm multiplexing type soft-switching AC-DC converter according to claim 1, characterized in that, The output voltage regulation circuit includes an output voltage regulator, a multiplier, an input current regulator, an adder, a comparator 1, and an RS flip-flop 1, with an output voltage V. o The sampled signal v o_s With a given voltage reference V o_ref The comparison is performed, and the resulting error signal is input to the output voltage regulator. The multiplier then multiplies the output voltage of the voltage regulator. c The absolute value of the input voltage sampling signal |v in_s | Multiplying them yields the reference signal i for the input current. g_ref , change i g_ref With input current i in The sampled signals are compared, and the resulting error signal is input to the current regulator. The adder then adds the current regulator's output V. err1 and V θ(O) The signal v is obtained after addition. err1 ′, v err1 ′ and triangular wave signal v saw The signal is fed into comparator 1 for comparison to obtain the duty cycle signal D. y(O) D y(O) CLK2(O) is fed into RS flip-flop 1, and the positive output signal of RS flip-flop 1 is Q. A1 Q B1 The driving signal, whose inverted signal is Q. A2 Q B2 The driving signal.

6. A bridge-arm multiplexing type soft-switching AC-DC converter according to claim 1, characterized in that, The input voltage regulation circuit includes an input voltage regulator, an adder, a comparator 2, and an RS flip-flop 2. The sampled signal of the input capacitor voltage is compared with a given voltage reference. The resulting error signal is input to the input voltage regulator. The adder converts the output voltage of the input voltage regulator to voltage. err2 and V θ(I) After adding them together, we get v err2 ′, will v err2 ′ and triangular wave signal v saw The signal is fed into comparator 2 for comparison, and the result is signal D. y(I) D y(I) CLK2(I) is fed into RS flip-flop 2, and the positive output signal of RS flip-flop 2 is the switching transistor Q. B1 Q A1 The drive signal, whose inverted signal is the switching transistor Q. B2 Q A2 The driving signal.

7. A bridge-arm multiplexing type soft-switching AC-DC converter according to claim 1, characterized in that, The output voltage controlled phase-shift clock generation circuit includes an output voltage controlled phase-shift signal generation module, a phase-shift pulse generation module 1, and a switching transistor drive circuit 1. The phase-shift signal generation module controlled by the output voltage includes a valley current detection circuit, an inverter, a phase-shift regulator 1, and a subtractor. Valley current detection circuit samples L a or L b The valley of the inductor current, after passing through the inverter, is compared with the given current reference I. ZVS_ref(O) The comparison is performed, and the resulting error value is sent to phase shifter 1. The signal generated by phase shifter 1 is then subtracted and compared with 0.5V. M Subtraction yields the phase-shifted signal V θ(O) V M For triangular wave signal v saw Peak voltage; The phase-shifting pulse generation module 1 receives the phase-shifting signal V. θ(O) Then, V θ(O) With triangular wave signal v saw After being compared by comparator 3, the output phase shift duty cycle D is determined. θ(O) The phase-shifting pulse generation module 1 ultimately generates two phase-difference pulses controlled by D. θ(O) Narrow pulses CLK1(O) and CLK2(O) are used to control the switching transistor Q. A4 Q B4 At the turn-on time, CLK2(O) is used to control the switching transistor Q. A1 Q B1 The opening time; The switching transistor driving circuit 1 includes a delay module 1 and an RS flip-flop 3. The delay module 1 delays the CLK1(O) pulse signal by half a switching cycle and then sends it along with CLK1(O) to the RS flip-flop 3 to generate a turn-off signal for half a switching cycle. The positive output signal of the RS flip-flop 3 is the switching transistor Q. A4 Q B4 The drive signal, whose inverted signal is the switching transistor Q. A3 Q B3 The driving signal.

8. A bridge-arm multiplexing type soft-switching AC-DC converter according to claim 1, characterized in that, The input voltage controlled phase-shift clock generation circuit includes an input voltage controlled phase-shift signal generation module, a phase-shift pulse generation module 2, and a switching transistor drive circuit 2. The input voltage-controlled phase-shift generation module includes a peak current detection circuit and a phase-shift regulator 2; the peak current detection circuit samples and obtains L. a or L b The peak value of the inductor current is compared with a given current reference I. ZVS_ref(I) The comparison is performed, and the resulting error value is sent to phase shifter 2. Phase shifter 2 generates a phase shift signal V. θ(I) ; The phase-shifting pulse generation module 2 receives the phase-shifting signal V. θ(I) Then, V θ(I) With triangular wave signal v saw After being compared by comparator 3, the output phase shift duty cycle D is determined. θ(I) The phase-shifting pulse generation module 2 ultimately generates two phase differences affected by D. θ(I) Narrow pulses CLK1(I) and CLK2(I) are used to control the switching transistor Q. B3 Q A3 At the turn-on time, CLK2(I) is used to control the switching transistor Q. B1 Q A1 The opening time; The switching transistor driving circuit 2 includes a delay module 2 and an RS flip-flop 4. The delay module 2 delays the CLK1(I) pulse signal by half a switching cycle and then sends it along with CLK1(I) to the RS flip-flop 4 to generate a turn-off signal for half a switching cycle. The positive output signal of the RS flip-flop 4 is the Q signal of the switching transistor. B3 Q A3 The drive signal, whose inverted signal is the switching transistor Q. B4 Q A4 The driving signal.

9. A control method for a bridge-arm multiplexed soft-switching AC-DC converter according to any one of claims 1-8, characterized in that, The control method includes: comparing the input voltage with 0 in comparator 5 to generate V. sel The signal, V, during the positive half-cycle of the input voltage. sel When the signal is high, switch channel 1 is turned on. The output voltage sampling signal passes through a voltage regulator, then a multiplier and a current regulator to achieve power factor correction and generate Q. A1 Duty cycle D y1(O) Its inverted signal is used to control Q. A2 L a The inductor current valley value is output as phase shift duty cycle D after passing through an inverter, phase shift regulator, and subtractor. θ(O) Two narrow pulses, CLK1(O) and CLK2(O), are generated by the phase-shifting pulse signal generation module 1, which control Q respectively. A4 and Q A1 The turn-on time, where CLK1(O) generates Q after a delay of half a switching cycle. A4 The shutdown signal; C inB The voltage sampling signal is used to generate the switching transistor Q after passing through the voltage regulator. B1 Duty cycle D y1(I) Its inverted signal is used to control Q. B2 L b The peak inductor current is output as phase shift duty cycle D after passing through the phase shift regulator. θ(I) Two narrow pulses, CLK1(I) and CLK2(I), are generated by the phase-shifting pulse signal generation module 2, which control Q respectively. B3 and Q B1 The turn-on time, where CLK1(I) generates Q after a delay of half a switching cycle. B3 The shutdown signal; During the negative half-cycle of the input voltage, V sel When the signal is low, switch channel 2 is turned on. The output voltage sampling signal passes through a voltage regulator, then a multiplier and a current regulator to achieve power factor correction and generate the Q signal of the switching transistor. B1 Duty cycle D y1(O) Its inverted signal is used to control Q. B2 L b The inductor current valley value is output as phase shift duty cycle D after passing through an inverter, phase shift regulator, and subtractor. θ(O) Two narrow pulses, CLK1(O) and CLK2(O), are generated by the phase-shifting pulse signal generation module 1, which control Q respectively. B4 and Q B1 The turn-on time, where CLK1(O) generates Q after a delay of half a switching cycle. B4 The shutdown signal; C inA The voltage sampling signal is used to generate the switching transistor Q after passing through the voltage regulator. A1 Duty cycle D y1(I) Its inverted signal is used to control Q. A2 L a The peak inductor current is output as phase shift duty cycle D after passing through the phase shift regulator. θ(I) Two narrow pulses, CLK1(I) and CLK2(I), are generated by the phase-shifting pulse signal generation module 2, which control Q respectively. A3 and Q A1 The turn-on time, where CLK1(I) generates Q after a delay of half a switching cycle. A3 The shutdown signal.

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