A PUF Key Generation and Device Identity Authentication System for Cold Chain Environment

Abstract

The present invention discloses a PUF key generation and device identity authentication system for cold chain environments, specifically related to the field of information security technology, including temperature change data perception, drift modeling, dynamic error correction, and closed-loop optimization. The original response data of the PUF hardware and the readings of the temperature sensors are collected by simulating the cold chain environment in a temperature-controlled experimental chamber; the non-linear mapping relationship between the dynamic temperature change and the PUF response drift is learned, and a drift compensation matrix is output; based on the drift compensation matrix, a two-level error correction mechanism is constructed; the first-level error correction unit non-linearly calibrates the original PUF response sequence according to the drift compensation matrix; the second-level error correction unit adopts a temperature-aware reconfigurable LDPC coding architecture, obtains the LDPC parity-check matrix based on the temperature-drift joint constraint model, and optimizes the error correction performance in high-drift scenarios through the LDPC parity-check matrix, so as to solve the problem of unstable keys caused by the response drift of the PUF hardware in the cold chain environment.

Description

Technical Field

[0001] The present invention relates to the field of information security technology. More specifically, the present invention relates to a PUF key generation and device identity authentication system for cold chain environments. Background Art

[0002] Cold chain transportation is a key link in ensuring the quality of temperature-sensitive products such as food and medicine. Its environmental temperature is usually maintained between -20°C and 4°C and exhibits significant dynamic fluctuation characteristics. During the cold chain logistics process, factors such as the frequent opening and closing of refrigerated truck doors, temperature differences between regions, and the periodic operation of refrigeration equipment result in a temperature change rate that can be as high as ±5°C / min, forming a complex dynamic temperature field. However, in the cold chain environment, the response of PUF hardware is sensitive to temperature changes. The dynamic temperature fluctuations directly affect the transistor delay, oscillation frequency, or the flip probability of storage units, thereby causing drift in the PUF response. This drift significantly reduces the consistency of key generation and may lead to device identity authentication failures, posing a serious threat to the security of cold chain devices.

[0003] In the prior art, regarding the temperature drift problem of PUF response, the research mainly focuses on the stability analysis under static low-temperature conditions. Usually, the PUF response at different temperatures is measured through experiments, a static drift model is constructed, and traditional error correction codes (ECCs) such as BCH codes or Hamming codes are used for correction. Traditional ECCs are based on the assumption of a linear noise model and cannot effectively cope with the non-linear drift effects caused by dynamic temperature changes in the cold chain environment. For example, the transistor delay or the flip probability of SRAM units may change exponentially rather than linearly with temperature, resulting in insufficient error correction ability of traditional methods in high-drift scenarios.

[0004] Therefore, there is an urgent need for a technical solution that can model and correct the non-linear drift effects caused by dynamic temperature changes in the cold chain environment to improve the robustness and reliability of the PUF key generation and device identity authentication system. Summary of the Invention

[0005] In order to overcome the above-mentioned defects of the prior art, the present invention provides a PUF key generation and device identity authentication system for cold chain environments, which uses non-linear drift modeling and an adaptive error correction algorithm to solve the problems proposed in the above background art.

[0006] To achieve the above object, the present invention provides the following technical solution: A PUF key generation and device identity authentication system for cold chain environments, comprising:

[0007] The temperature-variable data perception module collects the original response data of the PUF hardware and the readings of the temperature sensor by simulating the cold chain environment in a temperature-controlled experimental chamber; by analyzing the original PUF response sequence, it extracts the joint feature vector; and outputs the temperature time-series data, the original PUF response sequence, and the joint feature vector.

[0008] The drift modeling module learns the non-linear mapping relationship between the temperature dynamic change and the PUF response drift through the joint feature vector, and outputs the drift compensation matrix. The drift compensation matrix includes the expected offset and confidence level of each response bit in each temperature interval. The expected offset represents the probability of bit drift, and the confidence level represents the credibility of the expected offset, with a range of [0, 1].

[0009] The dynamic error correction module constructs a two-level error correction mechanism based on the output of the drift modeling module; the first-level error correction unit non-linearly calibrates the original PUF response sequence according to the drift compensation matrix; the second-level error correction unit adopts a temperature-aware reconfigurable LDPC coding architecture to obtain the LDPC parity-check matrix based on the temperature-drift joint constraint model, including the column weight, redundancy ratio, and number of iterations, and optimizes the error correction performance in high-drift scenarios through the LDPC parity-check matrix.

[0010] Preferably, the process of obtaining the drift compensation matrix includes the following steps:

[0011] According to the temperature range of the cold chain environment, the temperature time-series data is segmented into multiple temperature intervals, and the PUF response sequence at a stable reference temperature is selected as the reference response sequence. Denote the reference response sequence of the i-th bit as ;

[0012] For each temperature interval, the original PUF response sequence is measured multiple times, and the temperature gradient change rate is used as the weight factor , and the dynamic drift amount of each bit relative to the reference response sequence is calculated to generate a preliminary drift distribution.

[0013] Suppose Q tests are performed, and s is used to represent the index of the test order, represents the value of the i-th bit in the s-th measurement; the expected offset is calculated through the following formula; , and the way to obtain the confidence level is: ; where represents the variance of the expected offset in multiple measurements; represents the maximum allowable variance of the bit.

[0014] Preferably, the drift compensation matrix is obtained based on a dual-channel drift model. A dual-channel drift model is built by combining a long short-term memory network and a self-attention mechanism, which processes the temperature time-series data and the original PUF response sequence respectively, and outputs the drift compensation matrix, including:

[0015] Using the temperature time-series data, the original PUF response sequence, and the joint feature vector as structured training data, input them into the dual-channel drift model;

[0016] The long short-term memory network captures the cumulative effect of the dynamic change of temperature through the temperature sensitivity coefficient, and the attention mechanism is used to locate the influence of the temperature mutation point on the sensitive response bits;

[0017] After training, the dual-channel drift model predicts the drift probability and prediction reliability of each response bit in each temperature interval. Denote the drift probability as the expected offset, and the prediction reliability as the confidence level, and finally output the drift compensation matrix.

[0018] Preferably, the operation process of the first-level error correction unit includes the following steps:

[0019] Denote the original PUF response sequence as , where i represents the sequential number of the bit, represents the original PUF response of the i-th bit, and N represents the total number of bits;

[0020] Obtain the drift compensation vector for each temperature interval by fusing the expected offset and the confidence level. Denote the drift compensation vector as ;

[0021] For each temperature interval, generate a drift compensation vector, and calibrate the original PUF response sequence through the following formula: ;

[0022] The drift compensation vectors of all temperature intervals form the drift compensation matrix, and the drift compensation matrix is stored in the hardware in the form of a lookup table;

[0023] Perform binary processing on each drift compensation vector through the threshold decision formula and output the calibrated PUF response sequence.

[0024] Preferably, the operation process of the second-level error correction unit includes the following steps:

[0025] Input the calibrated PUF response sequence, the drift compensation matrix, and the real-time temperature;

[0026] Calculate the drift severity S corresponding to the current temperature interval by using the drift compensation matrix;

[0027] Calculate the column weight and redundancy ratio through the temperature-drift joint constraint model, and calculate the number of iterations through the average confidence level;

[0028] Generate the LDPC parity-check matrix H based on the column weight, redundancy ratio, and number of iterations; the LDPC parity-check matrix H is a binary sparse matrix used to define the error correction rules of the LDPC code;

[0029] Perform LDPC encoding on the calibrated PUF response sequence based on the LDPC parity-check matrix, add redundant bits, perform iterative decoding on the calibrated PUF response sequence through the belief propagation algorithm, and control the number of decoding loops based on the number of iterations;

[0030] Output: Output the finally error-corrected PUF response sequence, and generate a key through a hash function for device identity authentication.

[0031] Preferably, the temperature-drift joint constraint model includes: ; ;

[0032] Among them, represents the minimum redundancy ratio, β represents the adjustment coefficient used to control the increase amplitude of the redundancy ratio; represents the minimum column weight, γ represents the adjustment coefficient used to control the increase amplitude of the column weight;

[0033] The calculation method of the drift severity S is: ;

[0034] Among them, represents the absolute value of the expected offset of the i-th bit, reflecting the drift amplitude, represents the complement of the confidence, highlighting the influence of the predicted unstable bits.

[0035] Preferably, the system further includes:

[0036] A closed-loop optimization module, which builds an embedded verification platform and integrates the output of the dynamic error correction module into a programmable PUF controller implemented by an FPGA; by injecting the real cold chain logistics temperature curve, continuously monitor the key reconstruction success rate and Hamming distance distribution; establish a dual feedback loop: the short-term loop uses online learning to fine-tune the temperature sensitivity coefficient of the dual-channel drift model, including: according to the key reconstruction failure rate and Hamming distance distribution, real-time fine-tune the temperature sensitivity coefficient, and the optimization goal is to minimize the drift probability prediction error; the long-term loop generates adversarial training samples based on the cumulative failure data and iteratively optimizes the neural network structure of the dual-channel drift model.

[0037] Preferably, the closed-loop optimization module includes a periodic drift analysis unit for analyzing the coupled influence of the time periodicity of temperature changes in the cold chain environment and the long-term aging effect of the PUF hardware, specifically including:

[0038] Extract the periodic characteristics of the temperature time series data through Fourier transform. The periodic characteristics include the frequency, amplitude, and phase of the temperature change, and determine the main periodic components;

[0039] Based on the cumulative running time and the key reconstruction failure rate, construct an aging effect model. The aging effect model uses an exponential decay function to describe the drift of the transistor threshold voltage, where represents the amount of threshold voltage drift varying with time t, is the initial drift amplitude, is the aging rate, and t is the running time;

[0040] Through the periodic characteristics and the aging effect model, predict the long-term drift trend of the PUF response and dynamically update the drift compensation matrix.

[0041] Preferably, the closed-loop optimization module includes an adaptive time window adjustment unit for dynamically adjusting the training time window of the dual-channel drift model according to the temperature periodicity and the aging stage. The specific steps include:

[0042] In the initial running stage, train the dual-channel drift model with a short time window to focus on capturing the drift driven by temperature periodicity;

[0043] In the middle running stage, train the model with a medium time window to balance the influence of temperature periodicity and aging effect;

[0044] In the long-term running stage, train the model with a long time window to focus on capturing the drift dominated by the aging effect;

[0045] Through online learning, dynamically switch the time window length according to the key reconstruction failure rate to ensure the effectiveness of the drift compensation matrix over time.

[0046] Preferably, the closed-loop optimization module includes an aging compensation factor generation unit for generating a time-related aging compensation factor and integrating it into the drift compensation matrix. The specific steps include:

[0047] Based on the cumulative failure data, calculate the aging compensation factor ;

[0048] where k is the aging influence coefficient, t is the running time, is the nominal threshold voltage of the transistor for normalization; is the temperature periodicity influence coefficient for adjusting the contribution of periodicity to aging. Its value can be determined through experiments. For example, by comparing the key reconstruction failure rates under different temperature periodicities; A represents the amplitude, and f represents the frequency; reflects the accelerating effect of temperature change on aging;

[0049] The aging compensation factor The expected offset applied to the drift compensation matrix is updated by the formula ;

[0050] where represents the updated expected offset; the updated drift compensation matrix is verified through an embedded verification platform, and the key reconstruction success rate during long-term operation is monitored to ensure key consistency.

[0051] Technical effects and advantages of the present invention:

[0052] The PUF key generation and device identity authentication system for cold chain environment provided by the present invention application collects dynamic temperature data through a temperature change data sensing module, models the non-linear drift relationship through a dual-channel drift model (LSTM + self-attention mechanism), and realizes two-level error correction through temperature-aware LDPC coding, significantly improving the calibration and error correction capabilities of PUF responses in the cold chain environment, solving the problem of key reconstruction failure in dynamic temperature change and high-drift scenarios, and providing a stable and reliable key generation basis for device identity authentication.

[0053] The PUF key generation and device identity authentication system for cold chain environment provided by the present invention application realizes the long-term dynamic update of the drift compensation matrix through the double feedback loop of the closed-loop optimization module, the trend prediction of the periodic drift analysis unit, the dynamic modeling of the adaptive time window adjustment unit, and the precise compensation of the aging compensation factor generation unit, solving the problem of drift compensation failure caused by the coupling of temperature periodicity (such as daily door opening and closing, refrigeration cycle) and aging effect (such as transistor threshold voltage drift) in the cold chain environment, and ensuring the robustness and key consistency of the system during long-term operation. BRIEF DESCRIPTION OF THE DRAWINGS

[0054] Figure 1 is a block diagram of the PUF key generation management structure for cold chain environment of the present invention;

[0055] Figure 2 is a flowchart of the operation of the second-level error correction unit of the present invention;

[0056] Figure 3 is a block diagram of the PUF key generation management structure based on the closed-loop optimization module of the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0057] Hereinafter, exemplary embodiments of the present disclosure will be described in more detail with reference to the accompanying drawings. Although the exemplary embodiments of the present disclosure are shown in the drawings, it should be understood that the present disclosure can be implemented in various forms and should not be limited by the embodiments set forth herein. On the contrary, these embodiments are provided so that the present disclosure can be more thoroughly understood and the scope of the present disclosure can be fully conveyed to those skilled in the art.

[0058] Meanwhile, it should be understood that, for the convenience of description, the dimensions of the various parts shown in the drawings are not drawn according to the actual proportional relationship.

[0059] The following description of at least one exemplary embodiment is merely illustrative in nature and is in no way a limitation on the present application, its application, or its use.

[0060] Techniques, methods, and devices known to those of ordinary skill in the relevant art may not be discussed in detail, but where appropriate, such techniques, methods, and devices should be regarded as part of the specification.

[0061] For the convenience of those skilled in the art to understand and implement, the following terms are explained. The PUF response sequence is a binary output sequence generated by a PUF hardware unit (such as an SRAM or ring oscillator structure) under specific environmental conditions (temperature, voltage), usually generated by a physical entropy source (such as transistor process variations); the PUF response sequence is the raw material for key generation. In the low-temperature dynamic drift scenario, the stability of the PUF response sequence directly affects key consistency (KRR), and its bit value is determined by the initial power-on state of the storage unit.

[0062] A response bit refers to a single binary digit (0 or 1) in the PUF response sequence, corresponding to the microstructure of the physical hardware (such as SRAM cell pairs, ring oscillator path delay comparison results); a response bit is the smallest unit for key generation, and the physical characteristics of the response bit (such as the transistor threshold voltage Vth) determine the bit value; in the low-temperature model, the drift behavior of each response bit is independently modeled; for example, the 25th bit of a certain PUF hardware unit is determined by the process variation of a storage unit in the upper left corner of the chip.

[0063] The response bit flip probability refers to the probability that the bit value (0 → 1 or 1 → 0) of a response bit changes during multiple measurements, reflecting the environmental sensitivity of the bit; for example, a bit with a response bit flip probability < 3% can be regarded as a stable bit (for key generation), and a bit with a response bit flip probability > 10% needs to be screened or compensated; in low-temperature drift analysis, the response bit flip probability increases exponentially with the temperature gradient.

[0064] A sensitive response bit refers to a response bit that exhibits extremely high sensitivity to dynamic temperature changes, and its response bit flip probability or offset is significantly higher than the average level.

[0065] Example 1, referring to Figure 1 the block diagram of the PUF key generation management structure for the cold chain environment, the present invention provides a Figure 1 PUF key generation and device identity authentication system for the cold chain environment as shown in

[0066] The temperature-variation data sensing module simulates a cold-chain environment (-20°C to 4°C dynamic temperature cycle) in a controllable temperature experimental chamber, synchronously collects the original response data of the PUF hardware (such as SRAM startup value, ring oscillator frequency) and the readings of the temperature sensor, and obtains temperature time-series data and the original PUF response sequence; the sampling frequency needs to cover the temperature mutation scenarios during cold-chain transportation (such as ±5°C / min change caused by the opening and closing of the refrigerated truck door); high-frequency noise is removed through wavelet transform, and by analyzing the original PUF response sequence, joint feature vectors such as the temperature gradient change rate (dT / dt), response bit flip probability (BER), and time-series features (such as standard deviation of oscillation period) are extracted, and the temperature time-series data, the original PUF response sequence, and the joint feature vectors are output.

[0067] In the embodiments of the present invention, it needs to be further explained that the temperature-variation data sensing module is used to provide structured training data for the drift modeling module, where the temperature gradient change rate directly determines the time-series window length of the LSTM network; the temperature gradient change rate reflects the severity of temperature fluctuations. When the LSTM (Long Short-Term Memory network) processes time-series data, a "window length" needs to be specified (that is, how many consecutive time-step data are input each time), and the window length determines the range of historical data that the model can "see"; the magnitude of the temperature gradient change rate dynamically adjusts the window length of the LSTM; simply put, a short window is used when the temperature changes rapidly, and a long window is used when the change is slow to adapt to the dynamic characteristics of the cold-chain environment; in the specific implementation process, when the absolute value of the temperature gradient change rate is greater than 5°C / min, the LSTM window length is set to 5 time steps to quickly respond to temperature mutations; when it is less than 2°C / min, the window length is set to 20 time steps to capture long-term temperature dependencies; the intermediate values are determined by linear interpolation.

[0068] The drift modeling module learns the non-linear mapping relationship between temperature dynamic changes and PUF response drift through the joint feature vectors, and outputs a drift compensation matrix. The drift compensation matrix includes the expected offset and confidence of each response bit in each temperature range. The expected offset represents the probability of bit drift, and the confidence represents the credibility of the expected offset, with a range of [0, 1], and the higher the value, the more stable the prediction.

[0069] In the embodiments of the present invention, it needs to be further explained that the way to obtain the expected offset is as follows:

[0070] According to the temperature range of the cold-chain environment, the temperature time-series data is segmented into multiple temperature ranges (such as -20°C to -15°C, -15°C to -10°C, etc.), and the PUF response sequence at a stable reference temperature (such as 0°C) is selected as the reference response sequence Rref, and the reference response sequence of the i-th bit is denoted as ;

[0071] For each temperature range, the original PUF response sequence is measured multiple times, and the temperature gradient change rate is used as a weight factor , calculate the dynamic drift amount of each bit relative to Rref, and generate a preliminary drift distribution;

[0072] Suppose Q tests are carried out, and s represents the index of the test order, represents the value (0 or 1) of the i-th bit in the s-th measurement; the expected offset is calculated through the following formula; , in a possible embodiment, the expected offset of each bit is output through LSTM, and the attention mechanism weights the influence of key temperature points.

[0073] The confidence is obtained in the following way: ; where, represents the variance of the expected offset in multiple measurements; represents the maximum allowable variance of the bit.

[0074] Explanation: In the embodiment of the present invention, a preliminary drift compensation matrix is generated through experimental measurement as the training data of the dual-channel drift model; based on the preliminary drift compensation matrix, the dual-channel drift model is trained to predict the real-time drift compensation matrix.

[0075] In a possible embodiment, a long short-term memory network and a self-attention mechanism are combined to build a dual-channel drift model, which processes temperature time-series data and the original PUF response sequence respectively, and outputs a drift compensation matrix, including:

[0076] Using temperature time-series data, the original PUF response sequence and the joint feature vector as structured training data, and inputting them into the dual-channel drift model;

[0077] The long short-term memory network captures the cumulative effect of temperature dynamic changes through the temperature sensitivity coefficient (such as the transistor hysteresis characteristics caused by repeated freezing and thawing), and the attention mechanism is used to locate the influence of temperature mutation points (such as the -10°C phase change critical region) on sensitive response bits; when training the drift model, an adversarial sample generation technology is introduced to simulate extreme temperature fluctuation scenarios to enhance the robustness of the model, and the network hyperparameters are determined through Bayesian optimization;

[0078] The temperature sensitivity coefficient refers to the parameter related to the temperature time-series data in the input gate weight matrix of the LSTM network in the dual-channel drift model, which is used to control the influence degree of temperature change on the hidden state; the temperature sensitivity coefficient is adjusted through online learning to enhance the model's response ability to temperature mutations (such as ±5°C / min) and improve the accuracy of drift probability prediction;

[0079] After training is completed, the dual-channel drift model predicts the drift probability and prediction reliability of each response bit in each temperature range. The drift probability is denoted as the expected offset, and the prediction reliability is denoted as the confidence level. Finally, a drift compensation matrix is output for use by the dynamic error correction module.

[0080] In the embodiments of the present invention, it needs to be further explained that the drift compensation matrix of the drift modeling module serves as the basic mapping relationship of the ECC parameter space of the dynamic error correction module, and its confidence level parameter is used to dynamically adjust the number of iterative decoding times of the LDPC code;

[0081] Explanation: In the embodiments of the present invention, the ECC parameter space mainly refers to the LDPC code parameters, which are used to control the error correction performance and calculation efficiency; the basic mapping relationship refers to the correspondence between the expected offset and the confidence level in the drift compensation matrix and the LDPC code parameters; the LDPC code refers to the low-density parity-check code, which is an efficient error correction code that defines the error correction rules through a sparse parity-check matrix and is used to correct the residual errors in the PUF response; in the embodiments of the present invention, the basic mapping relationship refers to the temperature-drift joint constraint model.

[0082] The dynamic error correction module constructs a two-level error correction mechanism based on the output of the drift modeling module; the first-level error correction unit non-linearly calibrates the original PUF response sequence according to the drift compensation matrix;

[0083] In the embodiments of the present invention, it needs to be further explained that the operation process of the first-level error correction unit includes the following steps:

[0084] The operation process of the first-level error correction unit includes the following steps:

[0085] Denote the original PUF response sequence as , where i represents the sequential number of the bit, represents the original PUF response of the i-th bit, and N represents the total number of bits;

[0086] Obtain the drift compensation vector for each temperature range by fusing the expected offset and the confidence level. The drift compensation vector is denoted as ;

[0087] For each temperature range, generate a drift compensation vector, and calibrate the original PUF response sequence through the following formula:

[0088] , and the drift compensation vectors of all temperature ranges form a drift compensation matrix, which is stored in hardware (such as FPGA or MCU memory) in the form of a lookup table;

[0089] Through the threshold decision formula For each drift compensation vector Perform binarization processing and output the calibrated PUF response sequence.

[0090] Explanation: By introducing a confidence-weighted mechanism, the intensity of drift compensation is dynamically adjusted to ensure the robustness and consistency of the calibration result under the temperature fluctuations in the cold chain environment. Finally, the calibrated PUF response sequence Rcal is output for subsequent key generation and device authentication.

[0091] The second-level error correction unit adopts a temperature-aware reconfigurable LDPC coding architecture. Based on the temperature-drift joint constraint model, the LDPC parity-check matrix is obtained, including the column weight, redundancy ratio, and number of iterations, to optimize the error correction performance in high-drift scenarios.

[0092] Explanation: The column weight is the number of 1s in each column of the LDPC parity-check matrix, indicating the number of parity equations that the codeword bit participates in, which directly affects the error correction ability. The higher the column weight, the more parity equations each codeword bit participates in, and the stronger the error correction ability of the LDPC code, but the higher the computational complexity. In high-drift scenarios (such as the phase change point at -10°C, with a high drift severity 𝑆high): increase the column weight to enhance the error correction ability. In low-drift scenarios (such as stable temperature, with a low drift severity S low): reduce the column weight to reduce the computational overhead. The column weight determines the sparsity and structure of the parity-check matrix, directly affecting LDPC encoding and decoding. When the number of 1s in each column of the parity-check matrix increases, a denser matrix is generated. A matrix with a high column weight can correct more errors and is suitable for high-drift scenarios.

[0093] The redundancy ratio is the ratio of the redundant bits (parity bits) in the LDPC code to the total codeword length, which determines the amount of "spare information" used for error correction in the codeword. The higher the redundancy ratio, the more redundant bits, and the stronger the error correction ability, but the code rate (the ratio of information bits) decreases, and the computational and storage overheads increase. In high-drift scenarios: increase the redundancy ratio to add more redundant bits and enhance the error correction ability. In low-drift scenarios: reduce the redundancy ratio to reduce the redundant bits and improve efficiency. The redundancy ratio determines the number of rows of the parity-check matrix. More redundant bits provide more parity equations, enhancing the error correction ability.

[0094] The number of iterations is the number of loops of the iterative algorithm (such as the belief propagation algorithm) during LDPC decoding. Each iteration attempts to correct errors. The more iterations, the more opportunities the algorithm has to repair errors, and the stronger the error correction ability, but the greater the computational time and resource consumption. When the confidence level is low, the prediction is unstable, and the error distribution is complex, increasing the number of iterations to ensure error correction. When the confidence level is high, the prediction is stable, and the error distribution is simple, reducing the number of iterations to save resources.

[0095] In the embodiments of the present invention, it needs to be further explained that, referring to Figure 2 the flowchart of the operation of the second-level error correction unit, the operation process of the second-level error correction unit includes the following steps:

[0096] Input: Calibrated PUF response sequence after the first - stage calibration, drift compensation matrix, real - time temperature;

[0097] Calculate the drift severity S corresponding to the current temperature range using the drift compensation matrix;

[0098] Calculate the column weight, redundancy ratio, and number of iterations through the temperature - drift joint constraint model;

[0099] Generate an LDPC check matrix according to the column weight and redundancy ratio; The LDPC check matrix H is a binary sparse matrix used to define the error - correction rules of the LDPC code; The rows of the LDPC check matrix H represent the codeword length (information bits + redundant bits), and the columns represent the number of redundant bits (which is also equal to the number of parity - check equations);

[0100] Perform LDPC encoding on the calibrated PUF response sequence based on the LDPC check matrix, add redundant bits, and repair errors through iterative decoding; The specific implementation method is: calculate the number of iterations through the average confidence, perform iterative decoding on the calibrated PUF response sequence through the belief - propagation algorithm, and control the number of decoding loops based on the number of iterations;

[0101] Output: Output the finally error - corrected PUF response sequence, and generate a key through a hash function (such as SHA - 256) for device identity authentication.

[0102] Explanation: The first - stage error - correction unit is used to calibrate most errors, and the second - stage error - correction unit is used to correct residual errors;

[0103] Explanation: Based on the temperature - drift joint constraint model, an algorithm for calculating and optimizing the redundancy ratio of LDPC - encoded redundant bits in real - time is used to improve the error - correction performance of PUF responses in high - drift scenarios in the cold - chain environment; Taking the drift characteristics (expected offset and confidence) output by the drift compensation matrix as input, quantifying the drift severity S of the PUF response in the current temperature range, and dynamically adjusting the redundancy ratio Re, column weight, and number of iterations of LDPC encoding through a predefined mapping function, so as to achieve a balance between error - correction ability and computational efficiency;

[0104] In the embodiments of the present invention, it needs to be further explained that the process of dynamically adjusting LDPC parameters according to temperature and drift characteristics includes the following steps:

[0105] The larger the value of the drift severity, the more unstable the PUF response is at the current temperature. The calculation formula of the drift severity S is as follows: ;

[0106] Among them, represents the absolute value of the expected offset of the i - th bit, reflecting the drift amplitude, Represents the complement of the confidence level, highlighting the impact of predicting unstable bits;

[0107] Based on the drift severity S, calculate the redundancy ratio through the mapping function : ;

[0108] Among them, represents the minimum redundancy ratio (such as 10%) to ensure the basic error correction ability, β represents the adjustment coefficient (such as 0.5) used to control the increase in the redundancy ratio; Re is the final redundancy ratio, and the range is usually 10% - 30%, and the redundancy increases in high-drift scenarios.

[0109] Based on the drift severity S, calculate the column weight Wc through the mapping function: ;

[0110] Among them, represents the minimum column weight, and γ represents the adjustment coefficient used to control the increase in the column weight.

[0111] In the embodiments of the present invention, it needs to be further explained that the number of iterations is calculated through the average confidence level to balance the error correction performance and the calculation efficiency:

[0112] ;

[0113] Among them, represents the maximum number of iterations, represents the average confidence level.

[0114] Explanation: The two-level error correction mechanism is based on a hardware-friendly parameter updater of the CORDIC algorithm to achieve microsecond-level code rate switching triggered by temperature changes.

[0115] In a possible embodiment, in order to avoid the drift contribution being 0 when the confidence level C is 1, a small weight is introduced to optimize the calculation formula of the drift severity S:

[0116] ; In this way, even when the confidence level is 1, 10% of the drift contribution is still retained.

[0117] Summary: The embodiments of the present invention provide the core architecture and operation mechanism of a PUF key generation and device identity authentication system for the cold chain environment, including a temperature change data perception module, a drift modeling module, and a dynamic error correction module. The temperature change data perception module simulates the cold chain environment in a controllable temperature experimental chamber, collects the original response data of the PUF hardware and the readings of the temperature sensors, extracts joint feature vectors such as the temperature gradient change rate and the response bit flip probability, outputs structured training data, and dynamically adjusts the time series window length of the LSTM according to the temperature gradient change rate to adapt to the dynamic characteristics of the cold chain environment. The drift modeling module uses the joint feature vectors to learn the non-linear mapping relationship between the dynamic temperature change and the PUF response drift through a dual-channel drift model, and generates a drift compensation matrix. The expected offset is calculated by combining experimental measurement and model prediction, and the confidence level is calculated based on the variance. The drift compensation matrix provides the basic mapping relationship for the dynamic error correction module. The dynamic error correction module adopts a two-level error correction mechanism: the first-level error correction unit non-linearly calibrates the original PUF response sequence through the drift compensation matrix, and the second-level error correction unit adopts a temperature-aware reconfigurable LDPC coding architecture to dynamically adjust the LDPC parameters based on the temperature-drift joint constraint model, optimize the error correction performance in high-drift scenarios, and finally output the error-corrected response for key generation.

[0118] Embodiment 2. The difference between the embodiment of the present invention and Embodiment 1 is that the system further includes:

[0119] A closed-loop optimization module, which builds an embedded verification platform and integrates the output of the dynamic error correction module into a programmable PUF controller implemented by an FPGA. By injecting real cold chain logistics temperature curves (including door opening events, regional temperature differences, etc.), continuously monitor the key reconstruction success rate and Hamming distance distribution. Establish a double feedback loop: the short-term loop uses online learning to fine-tune the temperature sensitivity coefficient of the dual-channel drift model, including:

[0120] According to the key reconstruction failure rate and Hamming distance distribution, real-time fine-tune the temperature sensitivity coefficient, and the optimization goal is to minimize the drift probability prediction error;

[0121] The long-term loop generates adversarial training samples based on the cumulative failure data and iteratively optimizes the neural network structure of the dual-channel drift model.

[0122] Explanation: If there are bits with low confidence or calibration failure, generate adversarial training samples based on the cumulative failure data (such as the temperature range and bit positions where key reconstruction fails), and use the genetic algorithm to iteratively optimize the neural network structure of the dual-channel drift model (such as adjusting the number of LSTM hidden units and the number of self-attention heads);

[0123] Or refine the temperature interval granularity: If the confidence level is lower than 0.5 or the calibration failure rate is higher than 10%, trigger the refinement of the temperature interval; based on the statistical analysis of the cumulative failure data, identify the temperature interval with a large prediction error in the drift probability (such as near -10°C), refine the temperature interval granularity from 5°C to 2°C, and regenerate the drift compensation matrix to ensure the high precision and robustness of the drift compensation matrix in the cold chain dynamic environment.

[0124] In the embodiment of the present invention, the implementation method of building the embedded verification platform is as follows:

[0125] First, select the hardware platform. Select a high - performance FPGA such as the Xilinx Zynq - 7000 series, which supports the dual - core architecture of programmable logic (PL) and processing system (PS). The PL part implements the dynamic error - correction module and the PUF controller, which are used for hardware - accelerated LDPC encoding and decoding. The PS part runs the embedded Linux system to execute online learning and data - processing tasks; the FPGA integrates a high - precision temperature sensor such as DS18B20 to collect real - time temperature data with a resolution of 0.0625°C, meeting the requirements of the cold chain environment (-20°C to 4°C). Use an SD card or Flash to store the drift compensation matrix (stored in the form of a look - up table) and the cold chain logistics temperature curve data, and integrate UART or Ethernet interfaces for communication with the host computer to upload the key reconstruction success rate and Hamming distance distribution data;

[0126] Next, conduct software architecture design. Run the embedded PetaLinux in the PS part of the FPGA to manage data acquisition, online learning, and logging. Develop a temperature sensor driver to collect real - time temperature data, develop an FPGA control driver to communicate with the PUF controller in the PL part through the AXI interface, implement a data pre - processing program to parse the cold chain logistics temperature curve (CSV format), implement a calculation program for the key reconstruction success rate and Hamming distance distribution, and record the results of each key generation;

[0127] Then, implement a programmable PUF controller in the FPGA, and implement a PUF circuit (SRAM - based PUF or ring oscillator PUF) in the PL part to generate an original PUF response sequence, such as a 128 - bit PUF response sequence;

[0128] Implement the dynamic error - correction module, including the first - stage error - correction unit (fuzzy extractor), store the drift compensation matrix (in the form of a look - up table), query the drift compensation vector according to the real - time temperature, and the calibration formula is , threshold decision generation ; Implement the second-level error correction unit (LDPC error correction), calculate the LDPC parameters (column weight, redundancy ratio, number of iterations) according to the temperature-drift joint constraint model, dynamically generate the LDPC parity-check matrix, perform encoding and decoding, implement the key generation module, and generate a key by passing the error-corrected PUF response through a hash function (such as SHA-256);

[0129] Then, perform temperature curve injection and monitoring. Pre-collect the real cold chain logistics temperature data (refrigerated truck operation data), including door opening events (temperature mutations, such as from -15°C to -5°C) and regional temperature differences (temperature gradients at different positions); simulate door opening events (±5°C / min), inject the temperature curve into the system through software, control the analog output of the temperature sensor, monitor the key reconstruction success rate, compare the matching rate between the generated key and the reference key (generated at a stable temperature), for example, success rate = number of successful reconstructions / total number of tests, monitor the Hamming distance distribution, calculate the Hamming distance between the error-corrected PUF response and the reference response, and analyze the drift calibration effect;

[0130] Finally, perform integration and testing. Integrate the output of the dynamic error correction module (error-corrected PUF response) into the PUF controller to generate a key, implement data interaction between the PS and the PL through the AXI interface, the PS part records the monitoring data, and the PL part performs error correction and key generation. Test the system performance under different temperature scenarios. Verify the basic error correction ability in the stable scenario (-15°C constant temperature), and verify the dynamic adaptability in the mutation scenario (-15°C to -5°C rapid change). Record the key reconstruction success rate and the Hamming distance distribution, evaluate the system robustness. Use the Xilinx Zynq-7020 FPGA, integrate the DS18B20 temperature sensor, store the temperature curve with a 16GB SD card, run the online learning program with PetaLinux, implement the PUF controller and the error correction module with Verilog, inject the temperature curve (-15°C to -5°C, including door opening events), and the test results show that the key reconstruction success rate reaches 98%, and the average Hamming distance < 2.

[0131] Summary: In Example 2 of the present invention, a closed-loop optimization module is added on the basis of Example 1 to further improve the robustness and adaptability of the system; the closed-loop optimization module builds an embedded verification platform, integrates the output of the dynamic error correction module into the programmable PUF controller implemented by the FPGA, injects the real cold chain logistics temperature curve, and continuously monitors the key reconstruction success rate and the Hamming distance distribution; through the short-term loop, use online learning to adjust the temperature sensitivity coefficient of the dual-channel drift model in real time according to the key reconstruction failure rate and the Hamming distance distribution, and the optimization goal is to minimize the drift probability prediction error; the long-term loop generates adversarial training samples based on the cumulative failure data, and uses the genetic algorithm to iteratively optimize the neural network structure of the dual-channel drift model.

[0132] Example 3, refer toFigure 3 Block diagram of the PUF key generation management structure based on the closed-loop optimization module. The difference between the embodiment of the present invention and Embodiment 2 is that the closed-loop optimization module includes a periodic drift analysis unit for analyzing the coupled effect of the time periodicity of temperature change in the cold chain environment and the long-term aging effect of PUF hardware. The specific steps include:

[0133] Extract the periodic characteristics of the temperature time series data through Fourier transform to determine the main periodic components (such as the daily door opening and closing cycle, refrigeration cycle);

[0134] Build an aging effect model based on the cumulative running time and the key reconstruction failure rate. The aging effect model uses an exponential decay function to describe the drift of the transistor threshold voltage, where represents the amount of threshold voltage drift changing with time t, is the initial drift amplitude, is the aging rate, and t is the running time;

[0135] Predict the long-term drift trend of the PUF response through the periodic characteristics and the aging effect model, and dynamically update the drift compensation matrix.

[0136] Explanation: Voltage drift is the direct manifestation of the aging effect. Due to transistor aging (such as hot carrier injection or bias temperature instability), its threshold voltage will shift over time, resulting in changes in the response generated by the PUF. The aging effect model quantifies the law of this drift changing with time mathematically and verifies the accuracy of the model by combining the key reconstruction failure rate (i.e., the probability of inconsistent PUF output). By continuously monitoring and recording the key reconstruction failure rate of the PUF, use the aging effect model to predict the drift of the transistor threshold voltage over time, and deduce the change trend of the PUF response, such as the increasing probability of certain bit flips; compare the drift trend predicted by the aging effect model with the actually observed key reconstruction failure rate; if the predicted drift trend (such as the voltage drift increasing over time) should be consistent with the rising trend of the key reconstruction failure rate, it indicates that the aging effect model is effective; adjust the parameters (initial drift amplitude, aging rate) of the aging effect model according to the comparison result to make the prediction closer to the actual failure rate; the verified aging effect model is used for the dynamically updated drift compensation mechanism. For example, adjust the drift compensation matrix according to the predicted drift trend to ensure that the PUF response can still stably reconstruct the key during the aging process.

[0137] It should be further explained in the embodiment of the present invention that the closed-loop optimization module includes an adaptive time window adjustment unit for dynamically adjusting the training time window of the dual-channel drift model according to the temperature periodicity and the aging stage. The specific steps include:

[0138] In the initial operation stage (operation time less than 3 months), a dual-channel drift model is trained with a short time window (1 day) to focus on capturing the drift driven by temperature periodicity;

[0139] In the middle operation stage (operation time from 3 months to 10 months), the model is trained with a medium time window (3 days) to balance the effects of temperature periodicity and aging;

[0140] In the long-term operation stage (operation time greater than 10 months), the model is trained with a long time window (1 week) to focus on capturing the drift dominated by the aging effect.

[0141] In the embodiments of the present invention, it needs to be further explained that the closed-loop optimization module includes an aging compensation factor generation unit for generating a time-related aging compensation factor and incorporating it into the drift compensation matrix. The specific steps include:

[0142] Calculate the aging compensation factor based on the cumulative failure data, , where k is the aging influence coefficient, t is the operation time, is the nominal threshold voltage of the transistor for normalization; is the temperature periodicity influence coefficient for adjusting the contribution of periodicity to aging, and its value can be determined through experiments. For example, by comparing the key reconstruction failure rates under different temperature periodicities; A represents the amplitude, and f represents the frequency; reflects the accelerating effect of temperature change on aging;

[0143] Apply the aging compensation factor to the expected offset in the drift compensation matrix. The update formula is, , where represents the updated expected offset; verify the updated drift compensation matrix through an embedded verification platform and monitor the key reconstruction success rate during long-term operation to ensure key consistency;

[0144] It should be explained that the main function of the aging compensation factor generation unit is to generate a time-related aging compensation factor , and the aging compensation factor adjusts the expected offset in the drift compensation matrix to dynamically compensate for the response change of the PUF hardware caused by long-term aging (such as transistor threshold voltage drift); the aging compensation factor generation unit focuses on the long-term drift effect caused by hardware aging, generates a time-related compensation factor, and adjusts the drift compensation matrix to offset the aging effect.

[0145] Finally: The above are only the preferred embodiments of the present invention and are not used to limit the present invention. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present invention shall be included in the protection scope of the present invention.

Claims

1. A PUF key generation and device identity authentication system for cold chain environment, characterized in that Including: A temperature-variable data perception module, which simulates a cold chain environment in a controllable temperature experimental chamber to collect the original response data of the PUF hardware and the readings of the temperature sensor; by analyzing the original PUF response sequence, extracting a joint feature vector; outputting temperature time-series data, the original PUF response sequence, and the joint feature vector; A drift modeling module, which learns the non-linear mapping relationship between temperature dynamic changes and PUF response drift through the joint feature vector, and outputs a drift compensation matrix. The drift compensation matrix includes the expected offset and confidence level of each response bit in each temperature range. The expected offset represents the probability of bit drift; A dynamic error correction module, which constructs a two-level error correction mechanism based on the output of the drift modeling module; the first-level error correction unit non-linearly calibrates the original PUF response sequence according to the drift compensation matrix; The second-level error correction unit adopts a temperature-aware reconfigurable LDPC coding architecture to obtain an LDPC parity-check matrix based on the temperature-drift joint constraint model, including column weight, redundancy ratio, and number of iterations, and optimizes the error correction performance in high-drift scenarios through the LDPC parity-check matrix; the temperature-drift joint constraint model can dynamically adjust the column weight, redundancy ratio, and number of iterations of the LDPC parity-check matrix to adapt to different temperatures and drift degrees.

2. The PUF key generation and device identity authentication system for cold chain environment according to claim 1, wherein The process of obtaining the drift compensation matrix includes the following steps: According to the temperature range of the cold chain environment, the temperature time series data is segmented into multiple temperature intervals, and the PUF response sequence at the stable reference temperature is selected as the reference response sequence. Denote the reference response sequence of the i-th bit as ; For each temperature range, the original PUF response sequence is measured multiple times, and the temperature gradient change rate is used as a weight factor , calculate the dynamic drift amount of each bit relative to the reference response sequence, and generate a preliminary drift distribution; Suppose there are Q tests, and s represents the index of the test order. represents the value of the i-th bit in the s-th measurement; the expected offset is calculated by the following formula; , the confidence level is obtained as follows: , where represents the variance of the expected offset in multiple measurements; represents the maximum allowable variance of bits.

3. The PUF key generation and device identity authentication system for cold chain environment according to claim 2, characterized in that, Obtaining the drift compensation matrix based on a dual-channel drift model. Combining a long short-term memory network and a self-attention mechanism to build a dual-channel drift model, which processes the temperature time-series data and the original PUF response sequence respectively, and outputs the drift compensation matrix, including: Taking the temperature time-series data, the original PUF response sequence, and the joint feature vector as structured training data and inputting them into the dual-channel drift model; The long short-term memory network captures the cumulative effect of temperature dynamic changes through a temperature sensitivity coefficient, and the attention mechanism is used to locate the influence of temperature mutation points on sensitive response bits; After training, the dual-channel drift model predicts the drift probability and prediction reliability of each response bit in each temperature range, records the drift probability as the expected offset, records the prediction reliability as the confidence level, and finally outputs the drift compensation matrix.

4. The PUF key generation and device identity authentication system for cold chain environment according to claim 3, characterized in that, The operation process of the first-level error correction unit includes the following steps: Denote the original PUF response sequence as , where i represents the sequential number of the bit, represents the original PUF response of the i-th bit, and N represents the total number of bits; By fusing the expected offset and confidence, a drift compensation vector for each temperature range is obtained, and the drift compensation vector is denoted as ; For each temperature range, generating a drift compensation vector and calibrating the original PUF response sequence through the following formula: ; The drift compensation vectors for all temperature ranges form a drift compensation matrix, which is stored in hardware in the form of a look-up table; Through the threshold decision formula For each drift compensation vector Perform binarization processing to output the calibrated PUF response sequence.

5. The PUF key generation and device identity authentication system for cold chain environment according to claim 4, characterized in that, The operation process of the second-level error correction unit includes the following steps: Inputting the calibrated PUF response sequence, the drift compensation matrix, and the real-time temperature; Calculating the drift severity S corresponding to the current temperature range by using the drift compensation matrix; Calculating the column weight and redundancy ratio through the temperature-drift joint constraint model, and calculating the number of iterations through the average confidence level; Generating an LDPC parity-check matrix H according to the column weight, redundancy ratio, and number of iterations; the LDPC parity-check matrix H is a binary sparse matrix used to define the error correction rules of the LDPC code; Performing LDPC coding on the calibrated PUF response sequence based on the LDPC parity-check matrix, adding redundant bits, and performing iterative decoding on the calibrated PUF response sequence through the belief propagation algorithm, and controlling the decoding loop times based on the number of iterations; Output: Output the finally corrected PUF response sequence, and generate a key through a hash function for device identity authentication.

6. The PUF key generation and device identity authentication system for cold chain environment according to claim 5, characterized in that The temperature-drift joint constraint model includes: ； ； Among them, represents the minimum redundancy ratio, and β represents the adjustment coefficient, which is used to control the increase amplitude of the redundancy ratio; represents the minimum column weight, and γ represents the adjustment coefficient, which is used to control the increase amplitude of the column weight; The calculation method of the drift severity S is as follows: , where represents the absolute value of the expected offset of the i-th bit, reflecting the drift amplitude, represents the complement of the confidence level, highlighting the influence of the predicted unstable bits.

7. The PUF key generation and device identity authentication system for cold chain environment according to claim 3, characterized in that, The system further includes: A closed-loop optimization module that builds an embedded verification platform and integrates the output of the dynamic error correction module into a programmable PUF controller implemented by an FPGA; by injecting the real cold chain logistics temperature curve, continuously monitor the key reconstruction success rate and Hamming distance distribution; establish a double feedback loop: the short-term loop uses online learning to fine-tune the temperature sensitivity coefficient of the dual-channel drift model, including: according to the key reconstruction failure rate and Hamming distance distribution, real-time fine-tune the temperature sensitivity coefficient, and the optimization goal is to minimize the drift probability prediction error; the long-term loop generates adversarial training samples based on the cumulative failure data and iteratively optimizes the neural network structure of the dual-channel drift model.

8. The PUF key generation and device identity authentication system for cold chain environment according to claim 7, characterized in that, The closed-loop optimization module includes a periodic drift analysis unit for analyzing the coupled influence of the time periodicity of temperature changes in the cold chain environment and the long-term aging effect of PUF hardware, specifically including: Extract the periodic characteristics of the temperature time series data through Fourier transform. The periodic characteristics include the frequency, amplitude, and phase of temperature changes, and determine the main periodic components; Construct an aging effect model based on the cumulative running time and the key reconstruction failure rate, where the aging effect model uses an exponential decay function to describe the transistor threshold voltage drift, where represents the threshold voltage drift amount varying with time t, is the initial drift amplitude, is the aging rate, and t is the running time; Predict the long-term drift trend of the PUF response through the periodic characteristics and the aging effect model, and dynamically update the drift compensation matrix.

9. The PUF key generation and device identity authentication system for cold chain environment according to claim 7, characterized in that, The closed-loop optimization module includes an adaptive time window adjustment unit for dynamically adjusting the training time window of the dual-channel drift model according to temperature periodicity and aging stage. The specific steps include: In the initial operation stage, train the dual-channel drift model with a short time window to focus on capturing the drift driven by temperature periodicity; In the middle operation stage, train the model with a medium time window to balance the influence of temperature periodicity and aging effect; In the long-term operation stage, train the model with a long time window to focus on capturing the drift dominated by the aging effect; Through online learning, dynamically switch the time window length according to the key reconstruction failure rate to ensure the effectiveness of the drift compensation matrix over time.

10. A PUF key generation and device identity authentication system for cold chain environment according to claim 8, characterized in that, The closed-loop optimization module includes an aging compensation factor generation unit for generating a time-related aging compensation factor and integrating it into the drift compensation matrix. The specific steps include: Calculate the aging compensation factor based on the cumulative failure data where k is the aging impact coefficient, t is the operating time, is the nominal threshold voltage of the transistor, used for normalization; is the temperature periodicity impact coefficient, used to adjust the contribution of periodicity to aging, and its value can be determined by experiments, A represents the amplitude, and f represents the frequency; Apply the aging compensation factor to the expected offset in the drift compensation matrix, and the update formula is: ; wherein, represents the updated expected offset; verify the updated drift compensation matrix through the embedded verification platform, monitor the key reconstruction success rate during long-term operation, and ensure key consistency.

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