NAT (Network Address Translation) service data processing method and equipment, medium and program product

Abstract

The embodiment of the invention provides an NAT (Network Address Translation) service data processing method and device, a medium and a program product, and relates to the technical field of data processing. The method comprises the following steps: acquiring scheduling record information of a forward message in real time and storing the scheduling record information into a preset message scheduling information list; in response to the multi-core scheduling request of the reverse message, obtaining a load state of a multi-core processor; acquiring corresponding target scheduling record information based on quintuple information of the reverse message under the condition of determining that the load state meets a preset merging scheduling condition; and determining a multi-core scheduling strategy of the reverse message according to the target scheduling record information. According to the embodiment of the invention, the scheduling information of the forward message is recorded, and the load state of the multi-core processor and the recording information corresponding to the forward message are combined to determine the multi-core scheduling strategy before the reverse message is processed, so that time-consuming operations such as inter-core communication of the multi-core processor are reduced, and the processing efficiency of the multi-core processor is improved. And the overall processing efficiency of the multi-core processor on the IP message is effectively improved.

Description

Technical Field

[0001] The present application relates to the technical field of data processing, and in particular, to a method, device, medium, and program product for processing NAT service data. Background Art

[0002] A multi-core processor refers to a CPU chip integrated with multiple independent computing cores, and each core can execute instructions independently. Compared with a single-core processor, a multi-core processor can process multiple tasks simultaneously, thereby significantly improving the computing efficiency.

[0003] NAT (Network Address Translation) is a technology born to solve the problem of insufficient address resources in the IPv4 (Internet Protocol version 4) network. This technology can map multiple private network addresses to one or more public network addresses, realizing a high degree of reuse of network addresses to solve the problem of insufficient address resources. During the NAT service processing, there will be forward and reverse packets in the same group of IP packets, and the two have opposite five-tuple information.

[0004] Currently, forward and reverse packets belonging to the same group are usually assigned to different cores in the multi-core processor for processing, so a large number of inter-core communication and locking operations will be brought, resulting in low processing efficiency of the multi-core device for IP packets. Summary of the Invention

[0005] The purpose of the embodiments of the present application is to provide a method, device, medium, and program product for processing NAT service data to improve the processing efficiency of the multi-core device for IP packets.

[0006] In a first aspect, the embodiments of the present application provide a method for processing NAT service data, including: Obtaining the scheduling record information of each forward IP packet in the NAT service data in real time, and storing each piece of the scheduling record information in a preset packet scheduling information list; wherein, the scheduling record information includes the forward five-tuple marking information of each forward IP packet and the core label information of the forward IP packet scheduled to the multi-core processor; Responding to a multi-core scheduling request for a reverse IP packet in the NAT service data, and obtaining the load status of the multi-core processor; When it is determined that the load status meets a preset combined scheduling condition, based on the five-tuple information of the reverse IP packet, obtaining the target scheduling record information corresponding to the reverse IP packet from the packet scheduling information list; Determining a multi-core scheduling strategy for the reverse IP packet according to the target scheduling record information.

[0007] In the embodiments of the present application, by recording the five-tuple marking information of each forward packet and the kernel label information for processing the packet, when performing multi-core scheduling on the reverse packet, if the load status of the multi-core processor permits, the corresponding forward packet record information is searched and the scheduling policy is determined according to the corresponding kernel label, so as to reduce time-consuming operations such as inter-core communication of the multi-core processor, thereby improving the overall processing efficiency of the multi-core processor for IP packets.

[0008] In some possible embodiments, determining that the load status meets the preset combined scheduling condition includes: When it is determined that there is no core in the multi-core processor with a load rate exceeding the preset load threshold, it is determined that the load status meets the preset combined scheduling condition; Or, when it is determined that the difference value of the load rates of the cores in the multi-core processor is lower than the preset difference threshold, it is determined that the load status meets the preset combined scheduling condition.

[0009] In the embodiments of the present application, by judging whether the load situation of the multi-core processor meets the combined scheduling condition according to the preset load threshold or difference threshold, the flexibility of multi-core scheduling is further improved.

[0010] In some possible embodiments, the method for processing NAT service data further includes: When it is determined that the load status does not meet the combined scheduling condition, the multi-core scheduling policy for the reverse IP packet is determined according to the principle of load balancing.

[0011] In the embodiments of the present application, by performing multi-core scheduling on the reverse IP packet according to the principle of load balancing when the combined scheduling condition is not met, the processing performance of the multi-core processor for IP packets is further improved.

[0012] In some possible embodiments, obtaining the target scheduling record information corresponding to the reverse IP packet from the packet scheduling information list based on the five-tuple information of the reverse IP packet includes: Determining reverse five-tuple marking information based on the five-tuple information of the reverse IP packet; Matching the reverse five-tuple marking information with the packet scheduling information list, and using the matched scheduling record information as the target scheduling record information corresponding to the reverse IP packet.

[0013] In the embodiments of the present application, by first determining the corresponding reverse five-tuple marking information according to the five-tuple information of the reverse IP packet, and then matching the record information according to the reverse five-tuple marking information, the matching efficiency of the record information is improved.

[0014] In some possible embodiments, determining the multi-core scheduling policy for the reverse IP packet according to the target scheduling record information includes: Determining a target core in the multi-core processor according to the core label information corresponding to the target scheduling record information; Determining the multi-core scheduling policy for the reverse IP packet as scheduling to the target core.

[0015] In the embodiments of the present application, by determining the target core of the scheduling policy according to the matched core label information, the accuracy of the multi-core scheduling policy is further improved.

[0016] In some possible embodiments, determining the multi-core scheduling policy for the reverse IP packet as scheduling to the target core includes: Obtaining the current load information of the target core, and when it is determined that the current load information meets the preset load condition, determining the multi-core scheduling policy for the reverse IP packet as scheduling to the target core.

[0017] In the embodiments of the present application, after determining the target core, and then determining the final multi-core scheduling policy according to whether the current load condition of the target core meets the preset condition, thereby further improving the accuracy of the multi-core scheduling policy.

[0018] In some possible embodiments, determining the multi-core scheduling policy for the reverse IP packet as scheduling to the target core includes: Determining candidate allocation cores for the reverse IP packet according to the principle of load balancing; Obtaining a first predicted processing efficiency of the reverse IP packet based on the candidate allocation cores, and obtaining a second predicted processing efficiency of the reverse IP packet based on the target core; When it is determined that the first predicted processing efficiency is higher than the second predicted processing efficiency, determining the multi-core scheduling policy for the reverse IP packet as scheduling to the candidate allocation cores; When it is determined that the first predicted processing efficiency is lower than the second predicted processing efficiency, determining the multi-core scheduling policy for the reverse IP packet as scheduling to the target core.

[0019] In the embodiments of the present application, after determining the target core, then determining a candidate allocation core according to the principle of load balancing, and by comparing the predicted processing efficiencies of two candidate allocation policies of the target core and the candidate allocation cores, to determine the final allocation policy according to the corresponding core with higher efficiency, thereby further improving the performance of multi-core processing.

[0020] Second aspect, an embodiment of the present application provides a processing device for NAT service data, including: An information recording module, configured to obtain the scheduling record information of each forward IP packet in the NAT service data in real time, and store each of the scheduling record information into a preset packet scheduling information list; wherein, the scheduling record information includes the forward five-tuple marking information of each forward IP packet and the core label information of the forward IP packet scheduled to a multi-core processor; A load acquisition module, configured to respond to a multi-core scheduling request of a reverse IP packet in the NAT service data, and obtain the load status of the multi-core processor; An information matching module, configured to, when determining that the load status meets a preset combined scheduling condition, obtain target scheduling record information corresponding to the reverse IP packet from the packet scheduling information list based on the five-tuple information of the reverse IP packet; A policy determination module, configured to determine a multi-core scheduling policy of the reverse IP packet according to the target scheduling record information.

[0021] Third aspect, an embodiment of the present application provides an electronic device, including a memory, a processor, and a computer program stored on the memory and executable on the processor, wherein when the processor executes the program, the method described in any embodiment of the first aspect can be implemented.

[0022] Fourth aspect, an embodiment of the present application provides a computer-readable storage medium, on which a computer program is stored, and when the computer program is run by a processor, the method described in any embodiment of the first aspect can be implemented.

[0023] Fifth aspect, an embodiment of the present application provides a computer program product, the computer program product includes a computer program, wherein when the computer program is executed by a processor, the method described in any embodiment of the first aspect can be implemented. Description of the Drawings

[0024] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required to be used in the embodiments of the present application will be briefly introduced below. It should be understood that the following drawings only show some embodiments of the present application, and therefore should not be regarded as limiting the scope. For those of ordinary skill in the art, other related drawings can be obtained based on these drawings without creative efforts.

[0025] Figure 1 It is a schematic flowchart of a method for processing NAT service data provided by an embodiment of the present application; Figure 2Schematic diagram of a processing device for NAT service data provided by an embodiment of the present application; Figure 3 Schematic diagram of an electronic device provided by an embodiment of the present application. Detailed implementation manners

[0026] Next, the technical solutions in the embodiments of the present application will be described with reference to the accompanying drawings in the embodiments of the present application.

[0027] It should be noted that similar reference numerals and letters denote similar items in the following drawings. Therefore, once an item is defined in one drawing, it does not need to be further defined and explained in subsequent drawings. At the same time, in the description of the present application, the terms "first", "second", etc. are only used for distinguishing descriptions and cannot be understood as indicating or implying relative importance.

[0028] It should be noted that NAT (Network Address Translation) refers to network address translation, which is a technology used to use private addresses in a local network and switch to using global IP addresses when connecting to the Internet. The NAT technology aims to convert IP addresses by mapping an external IP address and port to a larger set of internal IP addresses.

[0029] During the process of IP packet processing, usually the same group of packets includes forward packets from end A to end B and reverse packets from end B to end A. In a device based on a multi-core processor, for the processing of IP packets, usually the packets are randomly assigned to processing cores according to the principle of load balancing, which may cause the forward and reverse packets of the same group of packets to be assigned to different processing cores, increasing a large number of time-consuming operations such as inter-core communication, and thus resulting in low overall processing efficiency of the multi-core device for IP packets.

[0030] In view of the problems existing in the above-mentioned prior art, an embodiment of the present application provides a method for processing NAT service data, which effectively improves the processing efficiency of the multi-core processor for IP packets by allocating forward and reverse packets to the same processing core for data processing and reducing time-consuming operations such as inter-core communication.

[0031] As Figure 1 shown, an embodiment of the present application provides a method for processing NAT service data, which may include the steps: S1. Obtain the scheduling record information of each forward IP packet in the NAT service data in real time, and store each scheduling record information in a preset packet scheduling information list; wherein, the scheduling record information includes the forward five-tuple marking information of each forward IP packet and the core label information to which the forward IP packet is scheduled in the multi-core processor.

[0032] It should be noted that the method of the embodiments of the present application can be executed by a device on the internal network side of the NAT device. Based on this, for the convenience of description, the embodiments of the present application can uniformly describe the packets sent from the internal network side to the external network side as forward IP packets, and similarly, the packets sent from the external network side to the internal network side as reverse IP packets.

[0033] It should be noted that NAT service data includes the data to be address-converted using the NAT device and the data after being address-converted by the NAT device.

[0034] In the device on the internal network side of the NAT device, when using a multi-core processor to process each unit (for example, a TCP packet segment as a unit) of forward IP packets (when NAT conversion is about to be performed on these forward IP packets), the scheduling record information of the forward IP packet can be obtained, where the scheduling record information includes the identification information of the forward IP packet and the kernel information to be scheduled (which kernel processes it).

[0035] Specifically, the identification information of the forward IP packet can be to first obtain the five-tuple information of the IP packet (including source IP address, source port, destination IP address, destination port, and transport layer protocol), and then select one or more fields from it as the forward five-tuple marking information of the forward IP packet. For example, the specific source port can be selected as the forward five-tuple marking information, or the source port and the source IP address can be selected together as the forward five-tuple marking information.

[0036] The kernel label information refers to the label of the kernel that processes the forward IP packet. For example, for a quad-core processor, kernel labels a, b, c, and d can be assigned respectively. When the kernel that processes a certain forward IP packet is kernel a, the kernel label information corresponding to the forward IP packet is a. Therefore, the format of each scheduling record information can be "forward five-tuple marking information--kernel label information".

[0037] It should be noted that each unit of forward IP packet corresponds to a scheduling record information, and the obtained scheduling record information is stored in real time through a preset packet scheduling information list. It should be noted that the forward five-tuple marking information can be used as the unique identifier of each entry in the packet scheduling information list. Therefore, before storing the current scheduling record information, it can be first determined whether the same forward five-tuple marking information already exists in the original packet scheduling information list. If it exists, the storage of the current scheduling record information is omitted; if not, the current scheduling record information is stored.

[0038] S2. In response to the multi-core scheduling request of the reverse IP packet in the NAT service data, obtain the load status of the multi-core processor.

[0039] Accordingly, in the devices on the internal network side of the NAT device, when receiving the service data (reverse IP packets) after address conversion by the NAT device and needing to use a multi-core processor to process these reverse IP packets, a multi-core scheduling request for the reverse IP packets is responded to, and the load status of the multi-core processor is obtained. The load status of the multi-core processor includes the overall load condition of the multi-core processor and the load conditions of each processing core, and this load status information will be used as the basis for formulating the scheduling policy.

[0040] S3. When it is determined that the load status meets the preset combined scheduling condition, based on the five-tuple information of the reverse IP packet, obtain the target scheduling record information corresponding to the reverse IP packet from the packet scheduling information list.

[0041] Specifically, according to the preset combined scheduling condition, it can be judged whether the currently obtained load status meets the condition. When the condition is met, based on the five-tuple information of the currently obtained reverse IP packet, the corresponding target scheduling record information is matched from the packet scheduling information list. In this way, by combining the load conditions of the multi-core processor for multi-core allocation of packets, the scheduling reliability and accuracy of the multi-core processor are further improved.

[0042] It should be noted that since in the same group of IP packets, the five-tuple information of the forward packet and the reverse packet is opposite (corresponding), if there is a corresponding forward IP packet for the reverse IP packet to be processed, then the five-tuple information of the reverse IP packet must contain a value corresponding (identical) to the scheduling record information in the packet scheduling information list. For example, the destination IP address in the five-tuple information of the reverse IP packet is the same as the source IP address in the scheduling record information. Based on this, according to the five-tuple information of the reverse IP packet, the target scheduling record information corresponding to the reverse IP packet can be obtained from the packet scheduling information list.

[0043] S4. Determine the multi-core scheduling policy for the reverse IP packet according to the target scheduling record information.

[0044] Since the target scheduling record information contains the corresponding core label information, the multi-core scheduling policy for the current reverse IP packet can be determined according to this core label information. For example, the reverse IP packet is scheduled to the core corresponding to the core label information for processing.

[0045] Based on this, by recording the marking information of each forward packet and the corresponding core label, when performing multi-core scheduling on the reverse packet, if the load status of the multi-core processor permits, the corresponding forward packet record information is searched and the scheduling policy is determined according to the corresponding core label, thereby being able to reduce time-consuming operations such as inter-core communication of the multi-core processor, and further effectively improving the overall processing efficiency of the multi-core processor for IP packets.

[0046] In some possible embodiments, in step S3, determining that the load status meets the preset combined scheduling condition includes: Determining that the load status meets the preset combined scheduling condition when it is determined that there is no core in the multi-core processor with a load rate exceeding the preset load threshold; Or, determining that the load status meets the preset combined scheduling condition when it is determined that the difference value of the load rates of the cores in the multi-core processor is lower than the preset difference threshold.

[0047] It should be noted that the load rate is used to characterize the processing pressure of the processor (or core). Exemplarily, the load rate refers to the ratio between the actual workload borne by the processor (or core) and its maximum bearing capacity.

[0048] Specifically, in a feasible manner, the load rates of the cores in the multi-core processor can be obtained, and it can be respectively determined whether the load rate of each core exceeds the preset load threshold. Only when the load rate of any core does not exceed the load threshold, it is considered that the load status of the multi-core processor meets the preset combined scheduling condition; otherwise, it is determined that the load status of the multi-core processor does not meet the preset combined scheduling condition. It should be noted that the preset load thresholds corresponding to each core can be set to equal values, or different values can be set according to requirements.

[0049] In a feasible manner, the difference value of the load rates of the cores in the multi-core processor can also be obtained. When this difference value is lower than the preset difference threshold, it is determined that the load status of the multi-core processor meets the preset combined scheduling condition; otherwise, it is determined that the load status of the multi-core processor does not meet the preset combined scheduling condition. It should be noted that the difference value between the current highest and lowest load rates can be directly obtained as the judgment object, or the difference values of the load rates between each pair of cores can be obtained respectively as the judgment objects.

[0050] Based on this, by judging whether the load situation of the multi-core processor meets the combined scheduling condition according to the preset load threshold or difference threshold, the flexibility and accuracy of multi-core scheduling can be further improved.

[0051] In some possible embodiments, the method for processing NAT service data further includes: When it is determined that the load status does not meet the combined scheduling condition, determining the multi-core scheduling strategy for the reverse IP packet according to the principle of load balancing.

[0052] It should be noted that when it is determined that the load status of the multi-core processor meets the combined scheduling condition, the multi-core scheduling policy for the reverse IP packet is determined according to the process of steps S3 to S4. Otherwise, when the load status of the multi-core processor does not meet the combined scheduling condition, the multi-core scheduling policy for the reverse IP packet is determined according to the principle of load balancing.

[0053] It can be understood that the principle of load balancing means making the pressure of each core to process tasks as balanced as possible. For example, the current packet to be processed is preferentially allocated to the core with the least processing pressure in the multi-core processor. If there are multiple cores with equal processing pressure, random allocation is performed.

[0054] Based on this, when the combined scheduling condition is not met, the multi-core scheduling of the reverse IP packet is performed according to the principle of load balancing, thus taking into account both load balancing and time-consuming operations such as reducing inter-core communication, and further improving the processing performance of the multi-core processor for IP packets.

[0055] In some possible embodiments, in step S3, based on the five-tuple information of the reverse IP packet, the target scheduling record information corresponding to the reverse IP packet is obtained from the packet scheduling information list, including: Determine the reverse five-tuple marking information based on the five-tuple information of the reverse IP packet; Match based on the reverse five-tuple marking information and the packet scheduling information list, and use the matched scheduling record information as the target scheduling record information corresponding to the reverse IP packet.

[0056] It should be noted that in the same group of IP packets, the five-tuple information of the forward packet and the reverse packet is opposite. Specifically, the source IP address of the forward IP packet is the same as the destination IP address of the reverse IP packet, and the source port number of the forward IP packet is the same as the destination port number of the reverse IP packet.

[0057] Therefore, the reverse five-tuple marking information with the opposite type to the forward five-tuple marking information can be obtained according to the five-tuple information of the reverse IP packet as the information to be matched. In this way, by reducing the type of matching information, the efficiency of information matching is effectively improved.

[0058] Exemplarily, if the forward five-tuple marking information of the scheduling record information uses the source port and source IP address of the forward IP packet, for the five-tuple information of the reverse IP packet, the destination port and destination IP address therein can be obtained as the information to be matched. Based on this, the target scheduling record information with the same information can be matched from the packet scheduling information list according to the information to be matched.

[0059] Based on this, by first determining the corresponding reverse five-tuple marking information according to the five-tuple information of the reverse IP packet, and then matching the record information according to the reverse five-tuple marking information, the efficiency of record information matching is improved.

[0060] In some possible embodiments, step S4 of determining the multi-core scheduling policy of the reverse IP packet according to the target scheduling record information may include: S401. Determine the target core in the multi-core processor according to the core label information corresponding to the target scheduling record information; S402. Determine the multi-core scheduling policy of the reverse IP packet as scheduling to the target core.

[0061] It should be noted that according to the core label information corresponding to the target scheduling record information obtained by matching, the target core for the corresponding forward IP packet to be scheduled and processed can be determined. In this way, the reverse IP packet corresponding to the forward IP packet can also be scheduled to the target core, so as to effectively reduce time-consuming operations such as inter-core communication, and further improve the accuracy of the multi-core scheduling policy.

[0062] In some possible embodiments, step S402 of determining the multi-core scheduling policy of the reverse IP packet as scheduling to the target core may include: S4021. Obtain the current load information of the target core. When it is determined that the current load information meets the preset load condition, determine the multi-core scheduling policy of the reverse IP packet as scheduling to the target core.

[0063] It should be noted that after determining the target core, the current load information corresponding to the target core can be obtained again. When the current load information meets the preset load condition, the multi-core scheduling policy of the reverse IP packet is determined as scheduling to the target core; otherwise, the multi-core scheduling policy can be determined according to the principle of load balancing.

[0064] Based on this, by determining the final multi-core scheduling policy according to whether the current load situation of the target core meets the preset condition after determining the target core, the pertinence of load situation judgment is improved, and further the flexibility and accuracy of the multi-core scheduling policy are improved.

[0065] In some possible embodiments, step S402 of determining the multi-core scheduling policy of the reverse IP packet as scheduling to the target core may include: S40211. Determine the candidate allocation cores of the reverse IP packet according to the principle of load balancing; S40212. Obtain the first estimated processing efficiency of the reverse IP packet based on the candidate allocation cores, and obtain the second estimated processing efficiency of the reverse IP packet based on the target core; S40213. When it is determined that the first predicted processing efficiency is higher than the second predicted processing efficiency, determine the multi-core scheduling policy for the reverse IP packet as scheduling to the candidate allocation core; S40214. When it is determined that the first predicted processing efficiency is lower than the second predicted processing efficiency, determine the multi-core scheduling policy for the reverse IP packet as scheduling to the target core.

[0066] It should be noted that after matching the target scheduling record information corresponding to the reverse IP packet and determining the target core, a candidate allocation core can be determined according to the principle of load balancing. If the candidate allocation core is the same as the target core, directly determine the multi-core scheduling policy for the reverse IP packet as scheduling to the target core; if the candidate allocation core is different from the target core, respectively obtain the predicted processing efficiencies corresponding to the candidate allocation core and the target core, and determine the core with the higher predicted processing efficiency as the multi-core scheduling policy.

[0067] Exemplarily, the predicted processing efficiency can be determined according to the predicted duration from when the packet is allocated to a certain core until it is processed and completed. The shorter the predicted duration, the higher the corresponding predicted processing efficiency.

[0068] Specifically, based on the same efficiency calculation method, respectively obtain the first predicted processing efficiency of the reverse IP packet based on the candidate allocation core, and the second predicted processing efficiency of the reverse IP packet based on the target core; then compare the first predicted processing efficiency and the second predicted processing efficiency, and use the core corresponding to the higher one of the two as the core to be scheduled by the final multi-core scheduling policy. It can be understood that if the first predicted processing efficiency and the second predicted processing efficiency are equal, randomly select one from the candidate allocation core and the target core as the core to be scheduled by the multi-core scheduling policy.

[0069] Based on this, by comparing the predicted processing efficiencies of the two candidate allocation policies of the target core and the candidate allocation core, determine the final allocation policy according to the core with the higher efficiency, so as to further improve the performance of multi-core processing.

[0070] Please refer to Figure 2 , Figure 2 which shows the block diagram of the composition of the processing device for NAT service data provided by some embodiments of the present application. It should be understood that the processing device for NAT service data corresponds to the above Figure 1 method embodiments and can execute each step involved in the above method embodiments. The specific functions of the processing device for NAT service data can be seen in the above description. To avoid repetition, the detailed description is appropriately omitted here.

[0071] Figure 2The NAT service data processing device includes at least one software function module that can be stored in a memory in the form of software or firmware or solidified in the NAT service data processing device, and the NAT service data processing device includes: The information recording module 210 is used to obtain the scheduling record information of each forward IP message in the NAT service data in real time, and store each scheduling record information in a preset message scheduling information list; wherein the scheduling record information includes the forward five-tuple tag information of each forward IP message and the core tag information of the forward IP message being scheduled to the multi-core processor; A load acquisition module 220, configured to obtain a load status of a multi-core processor in response to a multi-core scheduling request of a reverse IP message in the NAT service data; The information matching module 230 is used to obtain the target scheduling record information corresponding to the reverse IP message from the message scheduling information list based on the quintuple information of the reverse IP message when it is determined that the load state meets the preset merge scheduling condition; The policy determination module 240 is used to determine the multi-core scheduling policy of the reverse IP message according to the target scheduling record information.

[0072] It can be understood that the above-mentioned device item embodiment corresponds to the method item embodiment of the present invention. A NAT service data processing device provided by the embodiment of the present invention can implement the NAT service data processing method provided by any method item embodiment of the present invention.

[0073] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working process of the device described above can refer to the corresponding process in the aforementioned method, and will not be described in detail here.

[0074] like Figure 3 As shown, some embodiments of the present application provide an electronic device 300, which includes: a memory 310, a processor 320, and a computer program stored in the memory 310 and executable on the processor 320, wherein the processor 320 reads the program from the memory 310 through the bus 330 and executes the program to implement the method of any embodiment included in the above-mentioned method for processing NAT business data.

[0075] Processor 320 can process digital signals and can include various computing structures, such as complex instruction set computer structure, reduced instruction set computer structure, or a structure that implements a combination of multiple instruction sets. In some examples, processor 320 can be a microprocessor.

[0076] The memory 310 can be used to store instructions executed by the processor 320 or data related to the instruction execution process. These instructions and / or data may include code for implementing some or all of the functions of one or more modules described in the embodiments of the present application. The processor 320 of the embodiments of the present disclosure can be used to execute the instructions in the memory 310 to implement the methods shown above. The memory 310 includes a dynamic random access memory, a static random access memory, a flash memory, an optical memory, or other memories well known to those skilled in the art.

[0077] Some embodiments of the present application also provide a computer-readable storage medium, on which a computer program is stored. When the computer program is run by a processor, it executes the method described in the method embodiments.

[0078] Some embodiments of the present application also provide a computer program product. When the computer program product runs on a computer, it causes the computer to execute the method described in the method embodiments.

[0079] It should be noted that the embodiments in this specification are all described in a progressive manner. Each embodiment focuses on the differences from other embodiments. The same or similar parts among the embodiments can be referred to each other. For the device embodiments, since they are basically similar to the method embodiments, the description is relatively simple. The relevant parts can refer to the partial description of the method embodiments.

[0080] In several embodiments provided by the present application, it should be understood that the disclosed devices and methods can also be implemented in other ways. The device embodiments described above are only illustrative. For example, the flowcharts and block diagrams in the drawings show the possible architectures, functions, and operations of devices, methods, and computer program products according to multiple embodiments of the present application. In this regard, each block in the flowchart or block diagram can represent a module, a program segment, or a part of code, and the module, program segment, or part of code contains one or more executable instructions for implementing the specified logical function. It should also be noted that in some alternative implementations, the functions marked in the blocks may occur in a different order than marked in the drawings. For example, two consecutive blocks can actually be executed substantially in parallel, and they can sometimes be executed in the reverse order, depending on the functions involved. It should also be noted that each block in the block diagram and / or flowchart, and the combination of blocks in the block diagram and / or flowchart, can be implemented by a dedicated hardware-based system for performing the specified functions or actions, or can be implemented by a combination of dedicated hardware and computer instructions.

[0081] In addition, in each embodiment of the present application, each functional module can be integrated together to form an independent part, or each module can exist alone, or two or more modules can be integrated to form an independent part.

[0082] If the above-mentioned function is implemented in the form of a software functional module and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on such an understanding, the technical solution of the present application, in essence, or the part that contributes to the prior art, or a part of this technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions for causing a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the methods described in each embodiment of the present application. The aforementioned storage medium includes: various media such as USB flash drives, mobile hard disks, read-only memories (ROM, Read-Only Memory), random access memories (RAM, Random Access Memory), magnetic disks, or optical discs that can store program codes.

[0083] The above are only the embodiments of the present application and are not used to limit the protection scope of the present application. For those skilled in the art, the present application can have various changes and modifications. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application. It should be noted that similar reference numerals and letters represent similar items in the following drawings. Therefore, once an item is defined in one drawing, it does not need to be further defined and explained in subsequent drawings.

[0084] As mentioned above, this is only the specific implementation manner of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art within the technical scope disclosed by the present application can easily think of changes or replacements, which should all be covered by the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claimed rights.

[0085] It should be noted that in this article, relational terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the term "comprising", "including" or any other variant thereof is intended to cover non-exclusive inclusion, so that a process, method, article or device comprising a series of elements not only includes those elements, but also includes other elements not expressly listed, or also includes elements inherent in such process, method, article or device. Without further limitation, an element defined by the statement "comprising an..." does not exclude the presence of additional identical elements in the process, method, article or device comprising the said element.

Claims

1. A method for processing NAT service data, characterized in that: include: Acquire the scheduling record information of each forward IP message in the NAT service data in real time, and store each of the scheduling record information in a preset message scheduling information list; wherein the scheduling record information includes the forward five-tuple tag information of each of the forward IP messages and the core tag information of the forward IP message being scheduled to the multi-core processor; In response to a multi-core scheduling request of a reverse IP message in the NAT service data, obtaining a load state of the multi-core processor; When it is determined that the load state satisfies a preset merge scheduling condition, based on the quintuple information of the reverse IP message, obtaining target scheduling record information corresponding to the reverse IP message from the message scheduling information list; The multi-core scheduling strategy of the reverse IP message is determined according to the target scheduling record information.

2. The method for processing NAT service data according to claim 1, characterized in that: The determining that the load state satisfies a preset merge scheduling condition includes: In the case where it is determined that there is no core in the multi-core processor whose load rate exceeds a preset load threshold, determining that the load state satisfies a preset merge scheduling condition; Alternatively, when it is determined that the load rate difference value of each core in the multi-core processor is lower than a preset difference threshold, it is determined that the load state meets the preset merge scheduling condition.

3. The method for processing NAT service data according to claim 1, characterized in that: Also includes: When it is determined that the load state does not satisfy the combined scheduling condition, a multi-core scheduling strategy for the reverse IP message is determined according to a load balancing principle.

4. The method for processing NAT service data according to claim 1, characterized in that: The step of acquiring target scheduling record information corresponding to the reverse IP message from the message scheduling information list based on the quintuple information of the reverse IP message comprises: Determine reverse quintuple tag information based on the quintuple information of the reverse IP message; A match is performed based on the reverse five-tuple tag information and the message scheduling information list, and the scheduling record information that matches the match is used as the target scheduling record information corresponding to the reverse IP message.

5. The method for processing NAT service data according to claim 1, characterized in that: The determining the multi-core scheduling strategy of the reverse IP message according to the target scheduling record information includes: Determine a target core in the multi-core processor according to the core label information corresponding to the target scheduling record information; The multi-core scheduling policy of the reverse IP message is determined to be scheduled to the target core.

6. The method for processing NAT service data according to claim 5, characterized in that: The step of determining the multi-core scheduling strategy of the reverse IP message to be scheduled to the target core includes: The current load information of the target core is obtained, and when it is determined that the current load information meets a preset load condition, the multi-core scheduling strategy of the reverse IP message is determined to be scheduled to the target core.

7. The method for processing NAT service data according to claim 5, characterized in that: The step of determining the multi-core scheduling strategy of the reverse IP message to be scheduled to the target core includes: Determine the candidate allocation core of the reverse IP message according to the principle of load balancing; Obtaining a first estimated processing efficiency of the reverse IP message based on the candidate allocation core, and obtaining a second estimated processing efficiency of the reverse IP message based on the target core; In the case where it is determined that the first estimated processing efficiency is higher than the second estimated processing efficiency, determining the multi-core scheduling strategy of the reverse IP message to be scheduled to the candidate allocation core; When it is determined that the first estimated processing efficiency is lower than the second estimated processing efficiency, the multi-core scheduling policy of the reverse IP message is determined to be scheduled to the target core.

8. An electronic device, characterized in that: The invention comprises a memory, a processor and a computer program stored in the memory and executable on the processor, wherein the processor can implement the method for processing NAT service data as described in any one of claims 1 to 7 when executing the program.

9. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the method for processing NAT service data according to any one of claims 1 to 7 is executed.

10. A computer program product, characterized in that The computer program product comprises a computer program, and when the computer program is executed by a processor, the method for processing NAT service data according to any one of claims 1 to 7 is implemented.

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