Active backboard based on dissimilar redundant bus and control cabinet formed by active backboard

Abstract

The invention provides an active backplane based on a dissimilar redundant bus and a control cabinet formed by the active backplane, and relates to the technical field of computers. The active backplane comprises a first active backplane bus module and a second active backplane bus module which have the same structure and are mutually independent; the first active backplane bus module and the second active backplane bus module are connected with a processor module and two control board cards through dissimilar redundant buses; and the first active backplane bus module or the second active backplane bus module is used for allocating addresses for the two control board cards and communicating with the two control board cards / the cascaded active backplane in response to a control instruction of the processor module. The control board cards do not need to be connected through a bus, addresses and communication forwarding are allocated to the control board cards through the active backplane of the redundant structure, reliability can be improved, communication forwarding nodes are reduced, and the communication rate is improved.

Description

Technical Field

[0001] The present invention relates to the field of computer technologies, and in particular, to an active backplane based on a non-similar redundant bus and a control cabinet constituted thereby. Background Art

[0002] Existing control cabinets usually make control boards output digital and analog signals according to the control logic of a controller. The controller needs to be connected to all control boards, and address allocation for the control boards is achieved by configuring DIP switches or through an internal bus communication method, so as to realize signal acquisition and control.

[0003] The method of configuring DIP switches means that DIP switches are set on each control board, and different encodings represent different module addresses. Configuring DIP switches is relatively simple, but it requires manual configuration. Configuration errors or accidental dials may cause the control cabinet to get out of control, with low reliability. In the solution of the internal bus communication method, the lower-level control boards rely on the upper-level control boards for communication. When the upper-level control board fails, all the lower-level control boards will be unable to work, with poor reliability, and communication needs to be forwarded through multiple control boards, resulting in low communication rate.

[0004] Therefore, it is necessary to provide a technical solution with high reliability and communication rate. Summary of the Invention

[0005] The present invention provides an active backplane based on a non-similar redundant bus and a control cabinet constituted thereby, which can improve communication reliability and communication rate.

[0006] The present invention provides an active backplane based on a non-similar redundant bus, including a first active backplane bus module and a second active backplane bus module that are identical in structure and independent of each other. Both the first active backplane bus module and the second active backplane bus module are connected to a processor module and two control boards through a non-similar redundant bus. The non-similar redundant bus includes a first communication protocol bus and a second communication protocol bus, and the communication rate of the second communication protocol bus is higher than that of the first communication protocol bus. The first active backplane bus module or the second active backplane bus module is used to allocate addresses to the two control boards, and, in response to a control instruction of the processor module, communicate with the two control boards / communicate with a cascaded active backplane.

[0007] According to an active backplane based on a non-similar redundant bus provided by the present invention, the first active backplane bus module or the second active backplane bus module is used to allocate addresses and communicate with the two control boards based on the second communication protocol bus, and communicate with the processor module and the cascaded active backplane based on the first communication protocol bus.

[0008] According to an active backplane based on dissimilar redundant buses provided by the present invention, the first communication protocol bus includes a low-speed diagnostic bus and a high-speed communication bus. The first active backplane bus module or the second active backplane bus module is connected to the processor module, the control board, and the cascaded active backplanes based on the low-speed diagnostic bus, and is connected to the processor module and the first active backplane bus module or the second active backplane bus module of the cascaded active backplanes based on the high-speed communication bus.

[0009] According to an active backplane based on dissimilar redundant buses provided by the present invention, the first active backplane bus module and the second active backplane bus module are powered by redundant power supplies. The redundant power supply includes two power sources. One of the power sources supplies power to the first active backplane bus module through a DC / DC isolated power supply, and supplies power to the processor module and the control board through a power isolator respectively. The other power source supplies power to the second active backplane bus module through a DC / DC isolated power supply.

[0010] According to an active backplane based on dissimilar redundant buses provided by the present invention, the power isolator includes a constant current and constant voltage protection unit, a filtering unit, a DCDC buck unit, and a linear voltage regulation unit connected in sequence.

[0011] According to an active backplane based on dissimilar redundant buses provided by the present invention, fault monitoring is performed between the first active backplane bus module and the second active backplane bus module through two UART-TTL lines.

[0012] According to an active backplane based on dissimilar redundant buses provided by the present invention, the first active backplane bus module or the second active backplane bus module is used to assign addresses to the two control boards, including: The first active backplane bus module or the second active backplane bus module responds to the address assignment instruction of the processor module or the address assignment instruction of the upper-level active backplane, parses the received address assignment instruction, and assigns addresses to the two control boards according to the parsing result; The first active backplane bus module or the second active backplane bus module is also used for mutual communication verification, and sends an address assignment instruction to the first active backplane bus module or the second active backplane bus module of the lower-level active backplane.

[0013] The present invention further provides a control cabinet, which includes the active backplane based on dissimilar redundant buses according to any one of the above, and further includes a processor module, a control board, dissimilar redundant buses, and redundant power supplies. The redundant power supplies supply power to the processor module and the control board respectively, and the active backplane, the processor module, and the control board are connected through the dissimilar redundant buses.

[0014] According to a control cabinet provided by the present invention, the processor module includes at least one CPU module, and the CPU modules are connected through a synchronous bus.

[0015] According to a control cabinet provided by the present invention, the control board includes an IO module, which is used to collect digital or analog signals of a preset scenario, or output digital or analog signals.

[0016] The active backplane based on dissimilar redundant buses and the control cabinet constituted thereby provided by the present invention. The active backplane includes a first active backplane bus module and a second active backplane bus module with the same structure and independent of each other. Both the first active backplane bus module and the second active backplane bus module are connected to a processor module and two control boards through dissimilar redundant buses. The dissimilar redundant buses include a first communication protocol bus and a second communication protocol bus, and the communication rate of the second communication protocol bus is higher than that of the first communication protocol bus. The first active backplane bus module or the second active backplane bus module is used to assign addresses to the two control boards, and in response to the control instructions of the processor module, communicate with the two control boards / communicate with the cascaded active backplane. There is no need for the control boards to be connected through a bus anymore. The redundant-structured active backplane assigns addresses and forwards communications for the control boards, which can improve reliability, reduce communication forwarding nodes, and improve communication rate. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] In order to more clearly illustrate the technical solutions in the present invention or the prior art, the following will briefly introduce the drawings required for the description of the embodiments or the prior art. Obviously, the drawings in the following description are some embodiments of the present invention. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0018] Figure 1 is a schematic diagram of the internal topology structure of the existing control cabinet.

[0019] Figure 2 is a circuit principle block diagram of the active backplane based on dissimilar redundant buses provided by the present invention.

[0020] Figure 3It is a circuit schematic diagram of the SPI integrated chip provided by the present invention.

[0021] Figure 4 It is a circuit schematic diagram of the connection between the active backplane and the processor module provided by the present invention.

[0022] Figure 5 It is a circuit schematic diagram of the power isolator provided by the present invention.

[0023] Figure 6 It is a circuit schematic diagram of the active backplane based on the dissimilar redundant bus provided by the present invention.

[0024] Figures 7-9 It is one of the address allocation schematic diagrams of the active backplane based on the dissimilar redundant bus provided by the present invention - three.

[0025] Figure 10 It is a circuit structure schematic diagram of an embodiment of the control cabinet provided by the present invention. Detailed implementation manners

[0026] To make the objectives, technical solutions and advantages of the present invention clearer, the technical solutions in the present invention will be clearly and completely described below with reference to the accompanying drawings in the present invention. Obviously, the described embodiments are some but not all of the embodiments of the present invention. All other embodiments obtained by those of ordinary skill in the art based on the embodiments in the present invention without creative efforts shall fall within the protection scope of the present invention.

[0027] Figure 1 It is a schematic diagram of the internal topology structure of the existing control cabinet, as Figure 1 shown, the internal circuit structure of the existing control cabinet for collecting digital and analog signals includes a processor composed of a CPU module and several control boards connected to the processor through an internal communication bus. The control boards can be collectively referred to as IO modules. Since the IO modules are universal, the CPU module needs to assign different addresses to the IO modules so that the CPU module can determine the positions of the IO modules.

[0028] Existing control cabinets often use DIP switches configured on IO modules to achieve address allocation, or internal bus communication methods such as UART serial communication for address allocation. The method of configuring DIP switches is to set DIP switches on each IO module, and different encodings represent different module addresses. This implementation method is relatively simple, but it requires manual configuration, and incorrect configuration or accidental dialing may cause the control cabinet to get out of control. The method of using internal bus communication such as UART serial communication can achieve automatic address allocation, but the transmission rate is low, there is no redundancy, and the lower-level IO module depends on the upper-level IO module for communication. When an IO module fails, the IO modules that depend on its communication may not be able to work. This method has poor reliability, and the communication is forwarded through multiple IO modules, resulting in slow communication speed.

[0029] To solve the above technical problems, the present invention provides an active backplane based on a non-similar redundant bus and a control cabinet constituted thereby, which will be described in detail below with reference to the accompanying drawings.

[0030] Figure 2 is the circuit principle block diagram of the active backplane based on the non-similar redundant bus provided by the present invention, as Figure 2 shown, the present invention provides an active backplane based on a non-similar redundant bus, which includes a first active backplane bus module and a second active backplane bus module with the same structure and independent of each other. Both the first active backplane bus module and the second active backplane bus module are connected to a processor module and two control boards through non-similar redundant buses. The non-similar redundant bus includes a first communication protocol bus and a second communication protocol bus, and the communication rate of the second communication protocol bus is higher than that of the first communication protocol bus. Among them, the control board includes an IO module.

[0031] The first active backplane bus module or the second active backplane bus module is used to allocate addresses to the two control boards, and, in response to the control instructions of the processor module, communicate with the two control boards / communicate with the cascaded active backplane. Communicating with the two control boards specifically refers to realizing the input or output of digital and analog signals, and communicating with the cascaded active backplane specifically refers to allocating addresses to the control boards or realizing the forwarding of digital and analog signals.

[0032] The first active backplane bus module and the second active backplane bus module are physically redundant. Any failure of the first active backplane bus module or the second active backplane bus module will not affect the function of the active backplane, which can effectively improve the reliability of the active backplane.

[0033] Non - similar redundant buses can be used to improve the reliability and fault - tolerance of the active backplane. Improving reliability means that by using multiple non - similar redundant buses, the problem of the entire active backplane crashing due to the failure of one bus can be effectively prevented. When one bus fails, the active backplane can switch to another redundant bus and continue to work. Fault - tolerance means that non - similar redundant buses can transfer data between different physical paths and signal protocols. Even if one bus fails due to environmental factors or collisions, other buses can still transfer data normally, ensuring the continuous operation of the active backplane.

[0034] It can be understood that there is no need for control boards to be connected through buses anymore. The active backplane with a redundant structure assigns addresses and forwards communications for the control boards, which can improve reliability. The communication forwarding nodes are reduced, and the communication rate is increased.

[0035] Based on the above - mentioned embodiments, as an optional embodiment, the first active backplane bus module or the second active backplane bus module is used to assign addresses and communicate for the two control boards based on the second communication protocol bus, and communicate with the processor module and the cascaded active backplane based on the first communication protocol bus.

[0036] Both the first active backplane bus module and the second active backplane bus module are connected to the first communication protocol bus and the second communication protocol bus. When the active backplane is working, only one of the first active backplane bus module and the second active backplane bus module needs to be selected to work. The working module assigns addresses and communicates for the two control boards based on the second communication protocol bus, and communicates with the processor module and the cascaded active backplane based on the first communication protocol bus.

[0037] In application, the first active backplane bus module and the second active backplane bus module can also be set to the master - slave mode. One is selected as the master module and the other as the slave module from the first active backplane bus module and the second active backplane bus module. By default, the master module works first, and the slave module monitors whether the master module fails. If the master module fails, the slave module replaces the master module and continues to work, and issues a fault alarm.

[0038] Optionally, the first communication protocol bus includes a low-speed diagnostic bus and a high-speed communication bus. The first active backplane bus module or the second active backplane bus module connects the processor module, the control board, and the cascaded active backplanes based on the low-speed diagnostic bus, and connects the processor module and the first or second active backplane bus module of the cascaded active backplanes based on the high-speed communication bus. The first active backplane bus module of the current active backplane is respectively connected to the first active backplane bus module of the upper-level active backplane (left active backplane) and the first active backplane bus module of the lower-level active backplane (right active backplane). The second active backplane bus module of the current active backplane is respectively connected to the second active backplane bus module of the upper-level active backplane (left active backplane) and the second active backplane bus module of the lower-level active backplane (right active backplane).

[0039] The first communication protocol bus can be a CAN bus, the second communication protocol bus can be an SPI bus, and both the first communication protocol bus and the second communication protocol bus can be redundant bus structures. Correspondingly, the active backplane uses redundant SPI buses to achieve automatic allocation of control board addresses and high-speed communication, and uses redundant CAN communication to achieve direct communication between the active backplane and the processor module.

[0040] Optionally, the cascaded active backplanes can be connected not only through the high-speed CAN bus but also through the SPI bus. Figure 3 A circuit schematic diagram of the SPI integrated chip is provided, as Figure 3 shown. The SPI integrated chip U15 can process the SPI data transmitted by the upper-level active backplane and transmit the processed SPI data to the first active backplane bus module of the current active backplane.

[0041] It can be understood that the present invention uses a non-similar redundant bus composed of a CAN bus and an SPI bus, which can effectively improve the reliability and fault tolerance of the active backplane.

[0042] Figure 4 This is a circuit schematic diagram of the connection between the active backplane provided by the present invention and the processor module, as Figure 4 shown. On the basis of the above embodiments, as an optional embodiment, the first active backplane bus module and the second active backplane bus module are powered by redundant power supplies. The redundant power supply includes two power supplies. One power supply powers the first active backplane bus module through a DC / DC isolated power supply, and powers the processor module and the control board through a power isolator respectively. The other power supply powers the second active backplane bus module through a DC / DC isolated power supply.

[0043] When the active backplane has a communication requirement with relatively high real-time performance, CAN is used to directly communicate with the processor module. Each of the first active backplane bus module and the second active backplane bus module has a CAN communication link, and two easy CAN communication links are required for one active backplane. The CAN communication link can improve the real-time performance of communication and, as a diagnostic signal channel, output the respective diagnostic information of the first active backplane bus module and the second active backplane bus module, improving the reliability of the active backplane.

[0044] The processor module can communicate with each active backplane at high speed through a redundant SPI bus or a redundant CAN bus.

[0045] It can be understood that the present invention uses two power supplies to supply power to two independent modules of the active backplane. When one circuit fails, it does not affect the power supply of the other circuit. The power output monitoring circuit can monitor the power output status. When one fails, it ensures the availability of the device. At the same time, both power supplies are completely isolated through a power isolator. When one is short-circuited or severely damaged, the other power supply is completely unaffected.

[0046] On the basis of the above embodiments, as an optional embodiment, the power isolator includes a constant current and constant voltage protection unit, a filtering unit, a DCDC buck unit, and a linear voltage regulation unit connected in sequence. As Figure 5 shown, the constant current and constant voltage protection unit includes a fuse, a transient voltage suppression diode, and a zener diode. The filtering unit includes multiple capacitors connected in parallel. The DCDC buck unit is composed of a buck chip, and the linear voltage regulation unit is composed of a linear voltage regulation chip. The power isolator can also be used for the processor module and the control board to ensure the power isolation of the processor module and the control board.

[0047] Figure 6 is a circuit schematic diagram of the active backplane based on a non-similar redundant bus provided by the present invention. As Figure 6 shown, fault monitoring is carried out between the first active backplane bus module and the second active backplane bus module through two UART-TTL lines. The UART-TTL line includes a CA-IS3722HS chip, and filtering capacitors are connected to the VDDA pin and VDDB pin of the CA-IS3722HS chip to reduce interference.

[0048] It can be understood that serial communication is carried out between the first active backplane bus module and the second active backplane bus module using 2 UART-TTLs. The first active backplane bus module and the second active backplane bus module monitor each other. When one of the modules fails, it does not affect the operation of the active backplane. The other module will monitor this failure and give a fault signal to remind the user to repair, improving the reliability of the active backplane.

[0049] Based on the above embodiments, as an optional embodiment, the first active backplane bus module or the second active backplane bus module is used to assign addresses to the two control boards, including: The first active backplane bus module or the second active backplane bus module responds to the address assignment instruction of the processor module or the address assignment instruction of the upper-level active backplane, parses the received address assignment instruction, and assigns addresses to the two control boards according to the parsing result; The first active backplane bus module or the second active backplane bus module is also used for mutual communication verification, and sends an address assignment instruction to the first active backplane bus module or the second active backplane bus module of the lower-level active backplane.

[0050] As Figure 7 shown, the active backplane provided by the present invention has a physical redundancy structure. Under normal circumstances, two address assignment paths are constructed through the first active backplane bus module and the second active backplane bus module of the cascaded active backplanes respectively. The processor module sends an address assignment instruction to the active backplane connected to it, and the address in the address assignment instruction is zero. The active backplane connected to the processor module updates the address in the address assignment instruction to obtain new addresses 1 and 2, and assigns address 1 and address 2 to IO module 1 and 2 from left to right, and then transmits the address assignment instruction constructed according to the new address 2 to the next-level active backplane.

[0051] As Figure 8 shown, the active backplane provided by the present invention allows single-point failures. The first active backplane bus module and the second active backplane bus module communicate and verify with each other to determine whether a fault occurs in the address assignment path. If a fault occurs, the fault point is skipped and the address assignment continues. As Figure 9 shown, the redundant active backplane allows multiple-point failures to a certain extent to ensure the availability of address assignment.

[0052] It can be understood that the present invention constructs an address assignment path through the active backplane with a redundant structure, improves reliability and availability, and solves the defect in the prior art that the address assignment path is single, and any active backplane failure or communication channel failure will cause the control cabinet to be unavailable.

[0053] The control cabinet provided by the present invention will be described below. The control cabinet described below can be mutually referred to the active backplane based on the non-similar redundant bus described above.

[0054] Figure 10 is a schematic circuit structure diagram of an embodiment of the control cabinet provided by the present invention. As Figure 10As shown in the figure, the present invention also provides a control cabinet, which includes the active backplane based on the dissimilar redundant bus described in any one of the above, and further includes a processor module, a control board, a dissimilar redundant bus, and redundant power supplies. The redundant power supplies supply power to the processor module and the control board respectively, and the active backplane, the processor module, and the control board are connected through the dissimilar redundant bus.

[0055] The control cabinet includes a processor module, several control boards, and several active backplanes. Each active backplane is connected to two control boards, and the active backplanes are connected in sequence from left to right to form a cascaded structure. The processor module assigns addresses to the control boards through the active backplane and also exchanges signals with the control boards through the active backplane. Optionally, the multiple active backplanes can be cascaded using D-type connectors, which provides a stable and reliable connection and can improve the anti-electromagnetic interference ability.

[0056] As an embodiment, the processor module includes at least one CPU module, and the CPU modules are connected through a synchronous bus. Specifically, the CPU modules are connected through two high-speed synchronous buses. Each CPU module includes an ARM / FPGA processor, and the ARM / FPGA processor is connected to the upper computer / master control through Ethernet, connected to the dissimilar redundant bus through a signal isolator, and connected to the redundant power supply through a power isolator.

[0057] As an embodiment, the control board includes an IO module for collecting digital or analog signals of a preset scenario, or outputting digital or analog signals. Each IO module includes an ARM / FPGA processor, and the ARM / FPGA processor is connected to the dissimilar redundant bus through a signal isolator and connected to the redundant power supply through a power isolator. The ARM / FPGA processor is also connected to a signal acquisition circuit or a signal output circuit.

[0058] As an embodiment, both the first active backplane bus module and the second active backplane bus module include an ARM / FPGA processor. The ARM / FPGA processor is connected to the redundant power supply through a DC / DC isolated power supply and connected to the dissimilar redundant bus through a signal isolator.

[0059] As an embodiment, the first active backplane bus module or the second active backplane bus module is used to assign addresses and communicate with the two control boards based on the second communication protocol bus, and communicate with the processor module and the cascaded active backplanes based on the first communication protocol bus.

[0060] As an embodiment, the first communication protocol bus includes a low-speed diagnostic bus and a high-speed communication bus. The first active backplane bus module or the second active backplane bus module is connected to the processor module, the control board, and the cascaded active backplane based on the low-speed diagnostic bus, and is connected to the processor module and the first active backplane bus module or the second active backplane bus module of the cascaded active backplane based on the high-speed communication bus.

[0061] As an embodiment, the first active backplane bus module and the second active backplane bus module are powered by redundant power supplies. The redundant power supply includes two power supplies. One power supply powers the first active backplane bus module through a DC / DC isolated power supply, and powers the processor module and the control board through a power isolator respectively. The other power supply powers the second active backplane bus module through a DC / DC isolated power supply.

[0062] As an embodiment, the power isolator includes a constant current and constant voltage protection unit, a filtering unit, a DCDC buck unit, and a linear voltage regulation unit connected in sequence.

[0063] As an embodiment, fault monitoring is performed between the first active backplane bus module and the second active backplane bus module through two UART-TTL lines.

[0064] As an embodiment, the first active backplane bus module or the second active backplane bus module is used to assign addresses to the two control boards, including: The first active backplane bus module or the second active backplane bus module responds to the address assignment instruction of the processor module or the address assignment instruction of the upper-level active backplane, parses the received address assignment instruction, and assigns addresses to the two control boards according to the parsing result; The first active backplane bus module or the second active backplane bus module is further used for mutual communication verification and sends an address assignment instruction to the first active backplane bus module or the second active backplane bus module of the lower-level active backplane.

[0065] It should be noted that the control cabinet provided by the present invention is composed of an active backplane based on the non-similar redundant bus according to any of the above embodiments, and has technical effects corresponding to the active backplane based on the non-similar redundant bus. Details are not described in this embodiment.

[0066] In the description of the embodiments of the present invention, it should be noted that the orientation or positional relationships indicated by the terms "center", "longitudinal", "transverse", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc. are based on the orientation or positional relationships shown in the drawings. These are only for the convenience of describing the embodiments of the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation. Therefore, it should not be construed as a limitation on the embodiments of the present invention. In addition, the terms "first", "second", and "third" are only used for descriptive purposes and cannot be construed as indicating or implying relative importance.

[0067] In the description of this specification, the description with reference to terms such as "one embodiment", "some embodiments", "example", "specific example", or "some examples" means that the specific features, structures, materials, or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the embodiments of the present invention. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described can be combined in a suitable manner in any one or more embodiments or examples. In addition, without contradiction, those skilled in the art can combine and combine the different embodiments or examples described in this specification and the features of different embodiments or examples.

[0068] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and are not intended to limit them. Although the present invention has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that they can still modify the technical solutions described in the foregoing embodiments or perform equivalent replacements for some of the technical features. However, such modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. An active backplane based on a non-similar redundant bus, characterized in that: The invention comprises a first active backplane bus module and a second active backplane bus module which are identical in structure and independent of each other, wherein the first active backplane bus module and the second active backplane bus module are both connected to a processor module and two control boards via a non-similar redundant bus, wherein the non-similar redundant bus comprises a first communication protocol bus and a second communication protocol bus, wherein the communication rate of the second communication protocol bus is higher than the communication rate of the first communication protocol bus; The first active backplane bus module or the second active backplane bus module is used to allocate addresses to the two control boards, and, in response to control instructions from the processor module, communicate with the two control boards / communicate with the cascaded active backplane.

2. The active backplane based on non-similar redundant bus according to claim 1, characterized in that: The first active backplane bus module or the second active backplane bus module is used to allocate addresses and communicate for the two control boards based on the second communication protocol bus, and to communicate with the processor module and the cascaded active backplane based on the first communication protocol bus.

3. The active backplane based on non-similar redundant bus according to claim 2, characterized in that: The first communication protocol bus includes a low-speed diagnostic bus and a high-speed communication bus. The first active backplane bus module or the second active backplane bus module is connected to the processor module, the control board and the cascaded active backplane based on the low-speed diagnostic bus, and is connected to the processor module and the first active backplane bus module or the second active backplane bus module of the cascaded active backplane based on the high-speed communication bus.

4. The active backplane based on non-similar redundant bus according to any one of claims 1 to 3, characterized in that: The first active backplane bus module and the second active backplane bus module are powered by a redundant power supply, and the redundant power supply includes two power supplies, one of which supplies power to the first active backplane bus module via a DC / DC isolated power supply, and supplies power to the processor module and the control board respectively via a power isolator, and the other supplies power to the second active backplane bus module via a DC / DC isolated power supply.

5. The active backplane based on non-similar redundant bus according to claim 4, characterized in that: The power isolator comprises a constant current and constant voltage protection unit, a filtering unit, a DCDC step-down unit and a linear voltage stabilization unit which are connected in sequence.

6. The active backplane based on non-similar redundant bus according to any one of claims 1 to 3, characterized in that: Fault monitoring is performed between the first active backplane bus module and the second active backplane bus module via two UART-TTL lines.

7. The active backplane based on non-similar redundant bus according to claim 6, characterized in that: The first active backplane bus module or the second active backplane bus module is used to allocate addresses to the two control boards, including: The first active backplane bus module or the second active backplane bus module responds to the address allocation instruction of the processor module or the address allocation instruction of the upper active backplane, parses the received address allocation instruction and allocates addresses to the two control boards according to the parsing result; The first active backplane bus module or the second active backplane bus module is also used for mutual communication verification and sending an address allocation instruction to the first active backplane bus module or the second active backplane bus module of the subordinate active backplane.

8. A control cabinet, characterized in that: An active backplane based on a non-similar redundant bus as described in any one of claims 1 to 7, further comprising a processor module, a control board, a non-similar redundant bus and a redundant power supply, wherein the redundant power supply supplies power to the processor module and the control board respectively, and the active backplane, the processor module and the control board are connected via the non-similar redundant bus.

9. The control cabinet according to claim 8, characterized in that: The processor module includes at least one CPU module, and the CPU modules are connected via a synchronous bus.

10. The control cabinet according to claim 8, characterized in that: The control board includes an IO module for collecting switch quantity or analog quantity signals of preset scenes, or outputting switch quantity or analog quantity signals.

Images