A broadband low-noise amplifier circuit

Abstract

The present invention discloses a broadband low-noise amplifier circuit, which belongs to the field of radio frequency circuit technology. The circuit includes a first-stage amplifier, a second-stage amplifier, an input matching circuit, an inter-stage matching circuit, an output matching circuit, a negative feedback circuit, and a first-stage amplifier bias circuit and a second-stage amplifier bias circuit for providing the required operating voltage and current to the first-stage amplifier and the second-stage amplifier, respectively. The first-stage amplifier bias circuit and the second-stage amplifier bias circuit are both powered by a positive and negative dual power supply circuit. The present invention adopts the above-mentioned broadband low-noise amplifier circuit, adopts a two-stage PHEMT transistor amplification structure, rationally designs the input, output, inter-stage matching circuits, and a suitable bias circuit and negative feedback circuit, and continuously optimizes them. Within the operating frequency band of 10.7GHz to 12.7GHz, the noise figure is less than 1.35dB, the gain is 17dB±0.5dB, the input and output standing wave ratios are <-10dB, and a good matching effect is achieved.

Description

Technical Field

[0001] The present invention relates to the technical field of radio frequency circuits, and in particular to a broadband low-noise amplifier circuit. Background Art

[0002] A low-noise amplifier (LNA) is a crucial component of communication reception systems. Located at the front end of the receiver, it is widely used in satellite reception systems, satellite ground stations, and wireless communication systems (such as microwave links, Wi-Fi, and 5G base stations). Its primary function is to amplify weak signals received from satellites while minimizing the introduction of additional noise. This is because the performance of the first-stage noise amplifier is a key factor affecting the sensitivity and noise of the entire receiving system.

[0003] To meet the needs of high-speed communication systems, low-noise amplifier circuits must simultaneously take into account low noise, appropriate gain, and wide bandwidth. How to maintain low noise and appropriate gain under broadband conditions is a complex challenge. Summary of the Invention

[0004] The purpose of the present invention is to provide a broadband low-noise amplifier circuit with a noise figure of less than 1.35dB, a gain of 17dB±0.5dB, an input and output standing wave ratio of less than -10dB, and a good matching effect within the operating frequency range of 10.7GHz to 12.7GHz.

[0005] To achieve the above objectives, the present invention provides a broadband low-noise amplifier circuit, comprising a first-stage amplifier, a second-stage amplifier, an input matching circuit, an inter-stage matching circuit, an output matching circuit, a negative feedback circuit, and a first-stage amplifier bias circuit and a second-stage amplifier bias circuit for providing the required operating voltage and current to the first-stage amplifier and the second-stage amplifier, respectively. The first-stage amplifier bias circuit and the second-stage amplifier bias circuit are both powered by a positive and negative dual power supply circuit.

[0006] Preferably, the first-stage amplifier bias circuit is powered by a ±5V dual power supply, the positive pole of the negative power supply Vgg1 is connected to the series-connected resistor R1 and resistor R2 in sequence, and the other port of the resistor R2 is grounded; the common point of the resistor R1 and the resistor R2 is grounded through the capacitor C2, the common point of the resistor R1 and the resistor R2 is connected to the microstrip transmission line TL25, the microstrip transmission line TL26, and the microstrip transmission line TL27 in sequence, and is connected to the input end of the first-stage amplifier, and the other port of the microstrip transmission line TL26 is connected to the fan-shaped microstrip line stub1 to form a negative bias; the positive pole of the positive power supply Vdd1 is grounded to the resistor R3 and the capacitor C3 in sequence, and the common point of the resistor R3 and the capacitor R3 is connected to the microstrip transmission line TL28, the microstrip transmission line TL29, and the microstrip transmission line TL30 in sequence, and is connected to the output end of the first-stage amplifier, and the other port of the microstrip transmission line TL29 is connected to the fan-shaped microstrip line stub2 to form a positive bias.

[0007] Preferably, the two ends of the capacitor C2 are composed of a microstrip transmission line TL37 and a microstrip transmission line TL38, the width of the microstrip transmission line TL37 and the microstrip transmission line TL38 are the same, both are W2=0.5mm, the length of the microstrip transmission line TL37 and the microstrip transmission line TL38 are the same, both are L2=0.4mm, the width of the gap Gap1 between the microstrip transmission line TL37 and the microstrip transmission line TL38 is W1=0.5mm, and the spacing is L1=0.4mm; the other end of the microstrip transmission line TL38 is grounded through a ground via Via1, the width of the ground via Via1 is W3=0.5mm, and the aperture size is 0.3mm; the microstrip transmission line TL37 is connected to the common point of the resistor R1 and the resistor R2 and the microstrip transmission line TL25 respectively through the microstrip transmission line TL39.

[0008] Preferably, the second-stage amplifier bias circuit is powered by a ±5V dual power supply, the positive pole of the negative power supply Vgg2 is connected to the series-connected resistors R4 and R5 in sequence, and the other port of the resistor R5 is grounded; the common point of the resistor R4 and the resistor R5 is grounded through the capacitor C4, the common point of the resistor R4 and the resistor R5 is connected to the microstrip transmission line TL31, the microstrip transmission line TL32, and the microstrip transmission line TL33 in sequence, and is connected to the input end of the second-stage amplifier, and the other port of the microstrip transmission line TL32 is connected to the fan-shaped microstrip line stub3 to form a negative bias; the positive pole of the positive power supply Vdd2 is grounded to the resistor R6 and the capacitor C5 in sequence, and the common point of the resistor R6 and the capacitor R5 is connected to the microstrip transmission line TL34, the microstrip transmission line TL35, and the microstrip transmission line TL36 in sequence, and is connected to the output end of the second-stage amplifier, and the other port of the microstrip transmission line TL35 is connected to the fan-shaped microstrip line stub4 to form a positive bias.

[0009] Preferably, the first-stage amplifier is a transistor M1, and the second-stage amplifier is a transistor M2; the bias operating voltage of the first-stage amplifier and the second-stage amplifier are both 2V, and the operating current is both 15mA.

[0010] Preferably, the negative feedback circuit includes a microstrip transmission line TL23 connected to the source of the transistor M1 and a microstrip transmission line TL24 connected to the source of the transistor M2; the other ends of the microstrip transmission line TL23 and the microstrip transmission line TL24 are both grounded.

[0011] Preferably, the input matching circuit includes a microstrip transmission line TL1, a microstrip transmission line TL2, a microstrip transmission line TL4, a microstrip transmission line TL5, and a microstrip transmission line TL6 connected in series in sequence, the other end of the microstrip transmission line TL1 is connected to the input end of the circuit, and is connected to the microstrip transmission line TL3, the microstrip transmission line TL4 is also connected to the microstrip transmission line TL3, and the microstrip transmission line TL6 is also respectively connected to the microstrip transmission line TL27 and the input end of the first-stage amplifier.

[0012] Preferably, the inter-stage matching circuit includes a microstrip transmission line TL7, a microstrip transmission line TL8, a microstrip transmission line TL9, a microstrip transmission line TL10, a microstrip transmission line TL11, a capacitor C7, a microstrip transmission line TL12, a microstrip transmission line TL13, a microstrip transmission line TL15, a microstrip transmission line TL16, and a microstrip transmission line TL17 connected in series in sequence; the microstrip transmission line TL7 is also connected to the output end of the first-stage amplifier and the negative power supply circuit of the first-stage amplifier bias circuit respectively, and the microstrip transmission line TL15 is also connected to a micro The microstrip transmission line TL14 and the microstrip transmission line TL17 are also connected to the input end of the second-stage amplifier and the bias circuit of the second-stage amplifier, respectively; wherein the microstrip transmission line TL14 is a low-impedance microstrip line, and the microstrip transmission line TL7, microstrip transmission line TL8, microstrip transmission line TL9, microstrip transmission line TL10, microstrip transmission line TL11, capacitor C7, microstrip transmission line TL12, microstrip transmission line TL13, microstrip transmission line TL15, microstrip transmission line TL16, and microstrip transmission line TL17 are all high-impedance microstrip lines.

[0013] Preferably, the output matching circuit includes a microstrip transmission line TL18, a microstrip transmission line TL19, a microstrip transmission line TL20, a microstrip transmission line TL21, and a microstrip transmission line TL22 connected in series in sequence, and all the microstrip transmission lines in the output matching circuit are high-impedance microstrip transmission lines; wherein the microstrip transmission line TL18 is a matching block, and the microstrip transmission line TL18 is also respectively connected to the output end of the second-stage amplifier and the negative power supply circuit of the second-stage amplifier bias circuit.

[0014] Preferably, the rear end of the RF input port RFin and the front end of the RF output port RFout in the overall circuit both use standard 50-ohm transmission lines, that is, they are respectively connected to a 1 / 4 wavelength microstrip transmission line TL40 and a 1 / 4 wavelength microstrip transmission line TL41, and the rear of the microstrip transmission line TL40 is connected to a capacitor C1, and the other end of the capacitor C1 is connected to the input end of the input matching circuit, and the front of the microstrip transmission line TL41 is connected to a capacitor C6, and the other end of the capacitor C6 is connected to the output end of the output matching circuit.

[0015] Therefore, the beneficial effects of the present invention using the above-mentioned broadband low-noise amplifier circuit are as follows:

[0016] (1) The stability of the amplifier is increased by negative feedback. The bias circuit of the amplifier uses a choke circuit formed by a high-impedance microstrip line and a fan-shaped microstrip line. It is simulated and optimized separately to generate a layout. The best effect is substituted into the schematic diagram and then simulated to prevent the influence of the RF signal on the DC circuit. At the same time, the influence of the bias on the input and output matching is minimized.

[0017] (2) The input matching circuit, output matching circuit, and inter-stage matching circuit were all simulated in a schematic and layout co-simulation. The parasitic capacitance of the transistor pins, the parasitic capacitance of the discrete component pins, the ground hole, and other factors that affect noise and gain were all taken into account in the simulation tuning. After optimization, the generated layout simulation results were not much different from the actual results, with a total noise of <1.35dB. The gain was 17dB±0.5dB, and the input and output standing wave ratios were <-10dB, indicating good matching and meeting the overall performance requirements.

[0018] The technical solution of the present invention is further described in detail below through the accompanying drawings and embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 A circuit schematic diagram of an embodiment of a broadband low-noise amplifier circuit of the present invention;

[0020] Figure 2 This is a simulation result diagram of the stability of a broadband low-noise amplifier circuit of the present invention;

[0021] Figure 3 This is a partial bias circuit simulation schematic;

[0022] Figure 4 Figure 2 is the S21 simulation result of part of the bias circuit;

[0023] Figure 5 Figure 3 is the S31 simulation result of part of the bias circuit;

[0024] Figure 6 Schematic diagram of input matching circuit;

[0025] Figure 7 Schematic diagram of the inter-stage matching circuit;

[0026] Figure 8 Schematic diagram of output matching circuit;

[0027] Figure 9 This is the simulation result diagram of gain;

[0028] Figure 10 The simulation result diagram of input matching performance is shown;

[0029] Figure 11 The simulation result diagram of the output matching performance;

[0030] Figure 12 This is the simulation result diagram of the noise coefficient. DETAILED DESCRIPTION

[0031] The technical solution of the present invention is further described below with reference to the accompanying drawings and embodiments.

[0032] Example 1

[0033] like Figure 1 As shown, the present invention provides a broadband low-noise amplifier circuit, including a first-stage amplifier, a second-stage amplifier, an input matching circuit, an inter-stage matching circuit, an output matching circuit, a negative feedback circuit, and a first-stage amplifier bias circuit and a second-stage amplifier bias circuit for providing the required operating voltage and current to the first-stage amplifier and the second-stage amplifier, respectively.

[0034] The first-stage amplifier is a transistor M1, and the second-stage amplifier is a transistor M2. The bias operating voltage of the first-stage amplifier and the second-stage amplifier are both 2V, and the operating current is both 15mA.

[0035] The first-stage amplifier bias circuit uses a ±5V dual power supply. The positive terminal of the negative power supply Vgg1 is connected to resistors R1 and R2 in series, with the other terminal of resistor R2 connected to ground. The common point of resistors R1 and R2 is connected to ground via capacitor C2. The common point of resistors R1 and R2 is connected to microstrip transmission lines TL25, TL26, and TL27, which are then connected to the input of the first-stage amplifier. The other terminal of microstrip transmission line TL26 is connected to fan-out microstrip line stub1, providing a negative bias. The positive terminal of the positive power supply Vdd1 is connected to ground, along with resistor R3 and capacitor C3. The common point of resistor R3 and capacitor R3 is connected to microstrip transmission lines TL28, TL29, and TL30, which are then connected to the output of the first-stage amplifier. The other terminal of microstrip transmission line TL29 is connected to fan-out microstrip line stub2, providing a positive bias.

[0036] The negative power supply Vgg1 is divided by resistors R1 and R2, while the positive power supply Vdd1 is divided by resistor R3. This bias circuit provides the appropriate operating voltage and current for the first-stage amplifier. In the first-stage amplifier bias circuit, the fan-shaped microstrip line stub1, microstrip transmission lines TL25, TL26, and TL27, and capacitor C2 form a choke circuit at the gate of transistor M1. The fan-shaped microstrip lines stub2, TL28, TL29, and TL30, along with capacitor C3, form a choke circuit at the drain of transistor M1, choking the AC current at the input. Microstrip transmission lines TL26 and TL27 are quarter-wavelength high-impedance microstrip lines, acting as series inductors. The fan-shaped microstrip line stub1 acts as a shunt capacitor, forming a simple low-pass filter to prevent RF signals from affecting the DC circuit.

[0037] The second-stage amplifier bias circuit uses a ±5V dual power supply. The positive electrode of the negative power supply Vgg2 is connected to resistors R4 and R5 in series, with the other end of resistor R5 connected to ground. The common point between resistors R4 and R5 is connected to ground via capacitor C4. The common point between resistors R4 and R5 is connected to microstrip transmission lines TL31, TL32, and TL33, respectively, and then to the input of the second-stage amplifier. The other end of microstrip transmission line TL32 is connected to fan-out microstrip line stub3, creating a negative bias. The positive electrode of the positive power supply Vdd2 is connected to resistor R6 and capacitor C5, respectively, and then to ground. The common point between resistor R6 and capacitor R5 is connected to microstrip transmission lines TL34, TL35, and TL36, respectively, and then to the output of the second-stage amplifier. The other end of microstrip transmission line TL35 is connected to fan-out microstrip line stub4, creating a positive bias.

[0038] The negative power supply Vgg2 is divided by resistors R4 and R5, and the positive power supply Vdd2 is divided by resistor R6, allowing the bias circuit to provide appropriate operating voltage and current for the second-stage amplifier. The choke circuit in the second-stage amplifier bias circuit includes: fan-shaped microstrip line stub3, microstrip transmission line TL31, microstrip transmission line TL32, microstrip transmission line TL33, capacitor C4, fan-shaped microstrip line stub4, microstrip transmission line TL34, microstrip transmission line TL35, microstrip transmission line TL36, and capacitor C5. Its structure is the same as the choke circuit in the first amplifier bias circuit, but its specific dimensions are different, requiring optimization to achieve the optimal design.

[0039] The negative feedback circuit includes a microstrip transmission line TL23 connected to the source of transistor M1 and a microstrip transmission line TL24 connected to the source of transistor M2. The other ends of the microstrip transmission line TL23 and the microstrip transmission line TL24 are both grounded. The purpose of the negative feedback circuit is to make the transistor operate in a stable state within the operating frequency band, that is, to meet the stability coefficient K>1. The inductor is connected in series with the source of the transistor and introduced into the circuit, which has good stability. Since the errors and parasitic parameters of the discrete components themselves have a great influence, according to the formula:

[0040]

[0041] Calculate its size and replace the inductor with microstrip transmission line TL23 and microstrip transmission line TL24. Here: is the inductance value, is the characteristic impedance of the microstrip line on the substrate, is the dielectric constant of the substrate.

[0042] The input matching circuit includes microstrip transmission lines TL1, TL2, TL4, TL5, and TL6, connected in series. The other end of microstrip transmission line TL1 is connected to the circuit's input, which then connects to microstrip transmission line TL3. Microstrip transmission line TL4 is also connected to microstrip transmission line TL3. Microstrip transmission line TL6 is also connected to microstrip transmission line TL27 and the input of the first-stage amplifier. Microstrip impedance transformation matching is employed. A suitable LC matching circuit is first obtained using a Smith chart. An open microstrip line replaces the capacitor and a short microstrip line replaces the inductor. A series section of microstrip transmission line TL2 is used for admittance conversion. Finally, an open microstrip stub TL3 is connected in parallel to achieve parallel admittance matching. A quarter-wavelength section of microstrip transmission line TL1 is connected in series before microstrip transmission line TL2. Microstrip transmission line TL5 is added in series, and tuning optimization is performed to ensure good gain flatness under broadband matching conditions. The microstrip transmission line TL4 connects the microstrip transmission line TL2, the microstrip transmission line TL3, and the microstrip transmission line TL5. The microstrip transmission line TL6 connects the microstrip transmission line TL5, the microstrip transmission line TL27, and the input end of the transistor M1. Its function is to eliminate discontinuity.

[0043] The inter-stage matching circuit includes microstrip transmission lines TL7, TL8, TL9, TL10, TL11, capacitor C7, TL12, TL13, TL15, TL16, and TL17, which are connected in series. Microstrip transmission line TL7 is also connected to the output of the first-stage amplifier and the negative power supply circuit of the first-stage amplifier bias circuit, respectively. Microstrip transmission line TL15 is also connected to microstrip transmission line TL14. Microstrip transmission line TL17 is also connected to the input of the second-stage amplifier and the second-stage amplifier bias circuit, respectively.

[0044] Capacitor C7 is used to block DC current. Microstrip transmission line TL14 is a low-impedance microstrip line, while the other microstrip transmission lines are high-impedance microstrip lines. Connecting multiple microstrip lines in series offers significant advantages in impedance matching, signal gain optimization, reflection noise reduction, bandwidth expansion, and gain balance.

[0045] The output matching circuit comprises microstrip transmission lines TL18, TL19, TL20, TL21, and TL22, connected in series. All microstrip transmission lines in the output matching circuit are high-impedance microstrip transmission lines. Microstrip transmission line TL18 serves as a matching block and is also connected to the output of the second-stage amplifier and the negative power supply circuit of the second-stage amplifier's bias circuit. Conjugate matching and microstrip impedance matching are employed, and the length and width of the microstrip transmission lines are optimized to achieve broadband matching within the target frequency band and minimize reflection loss.

[0046] The back end of the RF input port RFin and the front end of the RF output port RFout in the overall circuit both use standard 50-ohm transmission lines, connected to quarter-wavelength microstrip transmission lines TL40 and TL41, respectively. Capacitor C1 is connected to the back of microstrip transmission line TL40, with the other end of capacitor C1 connected to the input of the input matching circuit. Capacitor C6 is connected to the front of microstrip transmission line TL41, with the other end of capacitor C6 connected to the output of the output matching circuit. Capacitors C1 and C6 isolate the DC input, allowing for more complete input and output of RF signals within the circuit.

[0047] In this embodiment, the amplifier circuit uses a Rogers 5880 substrate with a dielectric constant of 2.2, a loss angle of tanδ of the dielectric substrate of 0.0009, and a dielectric thickness of 0.508 mm. A two-stage PHEMT tube ATF36163 is used for amplification, and the operating voltage and current are both 2V and 15mA for DC bias at the static operating point. To meet the above requirements, Figure 1In the circuit, the resistance values ​​of resistors R1 and R4 are 1000Ω, the resistance values ​​of resistors R2 and R5 are 30Ω, and the resistance values ​​of resistors R3 and R6 are 200Ω.

[0048] Capacitors C1, C6, and C7 are GJM Murata capacitors with a capacitance of 1pF, and capacitors C2, C3, C4, and C5 are GJM Murata capacitors with a capacitance of 47pF. Negative feedback is performed through microstrip transmission lines TL23 and TL24, so that the entire amplifier circuit is in a stable state within a certain frequency band, such as Figure 2 As shown, K (stability coefficient)>1, that is, the working circuit is in a stable state.

[0049] During the design process, it was found that the actual circuit layout of the bias circuit had a significant impact on the input and output matching. In order to reduce its impact, the bias circuit was taken out for separate simulation. Figure 3 As shown, port Term1 serves as the RF front-end input, port Term2 serves as the input of transistor M1, and port Term3 serves as the DC bias input port. Capacitor C2 is connected to microstrip transmission lines TL37 and TL38 at both ends. These microstrip transmission lines TL37 and TL38 have the same width (W2 = 0.5 mm) and length (L2 = 0.4 mm). The gap Gap1 between the two microstrip transmission lines TL37 and TL38 has a width (W1 = 0.5 mm) and a spacing (L1 = 0.4 mm). The other end of microstrip transmission line TL38 is grounded via a ground via Via1, which has a width (W3 = 0.5 mm) and an aperture (0.3 mm). Microstrip transmission line TL37 is connected to the common point of resistors R1 and R2, as well as to microstrip transmission line TL27, via microstrip transmission line TL39.

[0050] After simulating the bias circuit of the first-stage amplifier, the generated layout is brought back to the schematic diagram for further simulation. The size of the microstrip line is continuously tuned and optimized. The optimal result is as follows: Figure 4 As shown, S21 is >-0.05dB, indicating that the signal at term1 port is almost transmitted to term2 port. Figure 5 As shown, S31 < -30dB, indicating that the DC bias has almost no effect on the matching circuit. Therefore, it is used as the bias circuit to continue the design of the overall schematic diagram.

[0051] The purpose of input matching is to make the noise as low as possible while ensuring a good input standing wave ratio. The circuit principle diagram is as follows Figure 6 As shown, in refers to the RF input through capacitor C1, bias1 refers to the gate input of the first-stage amplifier bias circuit, and gate1 refers to the gate input of transistor M1.

[0052] The purpose of inter-stage matching is to conjugate match the impedance of the second-stage amplifier with the output impedance of the first-stage amplifier, so as to obtain a larger gain while taking into account the flatness. The circuit principle diagram is as follows Figure 7 As shown, drain1 refers to the drain output of transistor M1, bias2 refers to the drain input of the first-stage amplifier bias circuit, bias3 refers to the gate input of the second-stage amplifier bias circuit, and gate2 refers to the drain output of the second-stage amplifier.

[0053] Output matching is to make the amplifier have maximum power gain and optimal output standing wave ratio. The circuit principle diagram is as follows: Figure 8 As shown, drain2 refers to the drain output of the transistor M2, bias3 refers to the drain input of the second-stage amplifier bias circuit, and out refers to the RF output, which is connected to one side of the capacitor C6.

[0054] After the circuit design is completed, the schematic and layout are jointly simulated, and the parameters of each component are manually optimized through the tuning tool to observe which parameters are more sensitive to the circuit performance. During the optimization, adjustment is given priority. After continuous optimization, the parameters of each component are finally determined.

[0055] After the overall circuit simulation, its performance parameters are good within the 10.7GHz to 12.7GHz operating frequency band, such as Figure 9 As shown, the gain is within the range of 17dB±0.5dB. Figure 12 As shown, the noise nf(2) < 1.35dB, as Figure 10 As shown, the input standing wave ratio is <-10dB and the input matching is good, such as Figure 11 As shown, the output standing wave ratio is <-10dB, the output matching is good, and the overall performance meets the requirements.

[0056] Therefore, the present invention adopts the above-mentioned broadband low-noise amplifier circuit, adopts a two-stage PHEMT transistor amplification structure, reasonably designs the input, output, inter-stage matching circuits and appropriate bias circuits and negative feedback circuits, and continuously optimizes them. In the operating frequency band of 10.7GHz to 12.7GHz, the noise figure is less than 1.35dB, the gain is 17dB±0.5dB, the input and output standing wave ratios are <-10dB, and a good matching effect is achieved.

[0057] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention rather than to limit the same. Although the present invention has been described in detail with reference to the preferred embodiments, those skilled in the art should understand that they can still modify or replace the technical solutions of the present invention with equivalents, and these modifications or equivalent replacements cannot cause the modified technical solutions to deviate from the spirit and scope of the technical solutions of the present invention.

Claims

1. A broadband low-noise amplifier circuit, characterized in that: The system comprises a first-stage amplifier, a second-stage amplifier, an input matching circuit, an inter-stage matching circuit, an output matching circuit, a negative feedback circuit, and a first-stage amplifier bias circuit and a second-stage amplifier bias circuit for providing required operating voltage and current to the first-stage amplifier and the second-stage amplifier, respectively. The first-stage amplifier bias circuit and the second-stage amplifier bias circuit are both powered by a positive and negative dual power supply circuit. The first-stage amplifier bias circuit is powered by a ±5V dual power supply, the positive electrode of the negative power supply Vgg1 is connected to the series resistor R1 and the resistor R2 in sequence, and the other end of the resistor R2 is grounded; the common point of the resistor R1 and the resistor R2 is grounded through the capacitor C2, the common point of the resistor R1 and the resistor R2 is connected to the microstrip transmission line TL25, the microstrip transmission line TL26, and the microstrip transmission line TL27 in sequence, and is connected to the input end of the first-stage amplifier, and the other end of the microstrip transmission line TL26 is connected to the fan-shaped microstrip line stub1 to form a negative bias; the positive electrode of the positive power supply Vdd1 is grounded to the resistor R3 and the capacitor C3 in sequence, the common point of the resistor R3 and the capacitor R3 is connected to the microstrip transmission line TL28, the microstrip transmission line TL29, and the microstrip transmission line TL30 in sequence, and is connected to the output end of the first-stage amplifier, and the other end of the microstrip transmission line TL29 is connected to the fan-shaped microstrip line stub2 to form a positive bias; The second-stage amplifier bias circuit is powered by a ±5V dual power supply, the positive electrode of the negative power supply Vgg2 is connected to the series-connected resistors R4 and R5 in sequence, and the other end of the resistor R5 is grounded; the common point of the resistors R4 and R5 is grounded through the capacitor C4, the common point of the resistors R4 and R5 is connected to the microstrip transmission line TL31, the microstrip transmission line TL32, and the microstrip transmission line TL33 in sequence, and is connected to the input end of the second-stage amplifier, and the other end of the microstrip transmission line TL32 is connected to the fan-shaped microstrip line stub3 to form a negative bias; the positive electrode of the positive power supply Vdd2 is grounded to the resistor R6 and the capacitor C5 in sequence, the common point of the resistor R6 and the capacitor R5 is connected to the microstrip transmission line TL34, the microstrip transmission line TL35, and the microstrip transmission line TL36 in sequence, and is connected to the output end of the second-stage amplifier, and the other end of the microstrip transmission line TL35 is connected to the fan-shaped microstrip line stub4 to form a positive bias; The first-stage amplifier is a transistor M1, and the second-stage amplifier is a transistor M2; the bias operating voltage of the first-stage amplifier and the second-stage amplifier are both 2V, and the operating current is both 15mA; The negative feedback circuit includes a microstrip transmission line TL23 connected to the source of the transistor M1 and a microstrip transmission line TL24 connected to the source of the transistor M2; the other ends of the microstrip transmission line TL23 and the microstrip transmission line TL24 are both grounded; The inter-stage matching circuit includes a microstrip transmission line TL7, a microstrip transmission line TL8, a microstrip transmission line TL9, a microstrip transmission line TL10, a microstrip transmission line TL11, a capacitor C7, a microstrip transmission line TL12, a microstrip transmission line TL13, a microstrip transmission line TL15, a microstrip transmission line TL16, and a microstrip transmission line TL17 connected in series in sequence; the microstrip transmission line TL7 is also connected to the output end of the first-stage amplifier and the negative power supply circuit of the first-stage amplifier bias circuit respectively, and the microstrip transmission line TL15 is also connected to a microstrip transmission line. The microstrip transmission line TL14 is connected to the input end of the second-stage amplifier and the bias circuit of the second-stage amplifier, respectively; wherein the microstrip transmission line TL14 is a low-impedance microstrip line, and the microstrip transmission line TL7, microstrip transmission line TL8, microstrip transmission line TL9, microstrip transmission line TL10, microstrip transmission line TL11, capacitor C7, microstrip transmission line TL12, microstrip transmission line TL13, microstrip transmission line TL15, microstrip transmission line TL16, and microstrip transmission line TL17 are all high-impedance microstrip lines.

2. The broadband low-noise amplifier circuit according to claim 1, wherein: The two ends of the capacitor C2 are composed of a microstrip transmission line TL37 and a microstrip transmission line TL38. The width of the microstrip transmission line TL37 and the microstrip transmission line TL38 are the same, both are W2=0.5mm, and the length of the microstrip transmission line TL37 and the microstrip transmission line TL38 are the same, both are L2=0.4mm. The width of the gap Gap1 between the microstrip transmission line TL37 and the microstrip transmission line TL38 is W1=0.5mm, and the spacing is L1=0.4mm; the other end of the microstrip transmission line TL38 is grounded through a ground via Via1, and the width of the ground via Via1 is W3=0.5mm, and the aperture size is 0.3mm; the microstrip transmission line TL37 is connected to the common point of the resistor R1 and the resistor R2 and the microstrip transmission line TL25 respectively through a microstrip transmission line TL39.

3. The broadband low-noise amplifier circuit according to claim 1, wherein: The input matching circuit includes a microstrip transmission line TL1, a microstrip transmission line TL2, a microstrip transmission line TL4, a microstrip transmission line TL5, and a microstrip transmission line TL6 connected in series in sequence. The other end of the microstrip transmission line TL1 is connected to the input end of the circuit and connected to the microstrip transmission line TL3. The microstrip transmission line TL4 is also connected to the microstrip transmission line TL3. The microstrip transmission line TL6 is also connected to the microstrip transmission line TL27 and the input end of the first-stage amplifier, respectively.

4. The broadband low-noise amplifier circuit according to claim 1, wherein: The output matching circuit includes a microstrip transmission line TL18, a microstrip transmission line TL19, a microstrip transmission line TL20, a microstrip transmission line TL21, and a microstrip transmission line TL22 connected in series in sequence. All the microstrip transmission lines in the output matching circuit are high-impedance microstrip transmission lines; wherein the microstrip transmission line TL18 is a matching block, and the microstrip transmission line TL18 is also respectively connected to the output end of the second-stage amplifier and the negative power supply circuit of the second-stage amplifier bias circuit.

5. The broadband low-noise amplifier circuit according to claim 1, wherein: The rear end of the RF input port RFin and the front end of the RF output port RFout in the overall circuit both use standard 50-ohm transmission lines, that is, they are connected to a 1 / 4 wavelength microstrip transmission line TL40 and a 1 / 4 wavelength microstrip transmission line TL41, respectively. A capacitor C1 is connected to the rear of the microstrip transmission line TL40, and the other end of the capacitor C1 is connected to the input end of the input matching circuit. A capacitor C6 is connected to the front of the microstrip transmission line TL41, and the other end of the capacitor C6 is connected to the output end of the output matching circuit.

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