On-chip two-dimensional sparse lattice light generation device based on linear gradual change device

Abstract

The invention discloses an on-chip optical system based on linear gradient device design, which is used for generating a coherent optical pattern with a sparse lattice structure. The cross section of the on-chip device sequentially comprises a waveguide layer, a bottom cladding layer and a substrate layer from top to bottom, a plurality of input waveguides are used, a linear gradual change device is coupled with an on-chip system, input light is guided into an interference area, and an optical lattice structure with specific symmetry is generated. Through the disclosed calculation method, a specified coherent lattice structure can be obtained by calculating a corresponding light beam configuration scheme. According to the method, while the periodicity and symmetry of the crystal lattice are kept, the movement of the crystal lattice pattern on a two-dimensional plane can be realized by regulating and controlling the phase of the input light beam through the phase modulator. Compared with a traditional method, the system has the advantages of being compact in structure, high in interference efficiency, flexible and adjustable in pattern and the like, and is suitable for application of biosensing, quantum calculation, microscopic imaging and the like.

Description

Technical Field

[0001] The present invention relates to the field of photonic integrated circuits, and particularly to an on-chip optical structure implemented using a linear gradient device for generating tunable sparse lattice interference patterns for applications in fields such as biosensing, quantum computing, and microscopy imaging. Background Art

[0002] Sparse lattice structured light has important applications in quantum computing, microscopy imaging, and biosensing. However, due to the limitations of light sources and complex optical systems, traditional multi-beam interference methods require a large space and professional operators. Therefore, it is of great significance to develop a compact and calibration-free on-chip system for generating sparse lattice light. Summary of the Invention

[0003] Based on the above problems, the present invention proposes an on-chip optical system based on a linear gradient device, which combines prime number decomposition and Moiré principle to calculate the wave vector configuration scheme of the input light, and determines the position and direction of the corresponding input optical waveguides in the on-chip system. The system uses multiple input waveguides to provide coherent beams in multiple directions, and guides the light waves into the interference region through a linear gradient device, thereby generating various tunable optical interference patterns in a small-sized on-chip interference region. Compared with traditional optical lattice pattern generation methods, the present system has significant advantages such as compact structure, high-efficiency integration, and strong optical pattern flexibility.

[0004] An on-chip optical system based on a linear gradient device provided by the present invention includes a substrate layer, a bottom cladding layer, and a waveguide layer, all of which are materials with different refractive indices. The substrate layer is used for the physical support of the on-chip two-dimensional sparse lattice light generation device; the bottom cladding layer is covered on the substrate layer to limit the light field, and the light field will be mainly restricted in the waveguide layer; a high refractive index material is plated on the substrate layer as the waveguide layer of the device.

[0005] The waveguide layer includes multiple input waveguides, a matching linear gradient device, and a central interference region;

[0006] The input waveguides, the ends of which are coupled to the linear gradient device, are used to receive input light and conduct the light beams into the linear gradient device;

[0007] The linear gradient device is used to broaden the input light before entering the planar waveguide layer, and then introduce it into the central region of the on-chip system for interference.

[0008] The interference region is located in the central region of the on-chip system, and is configured to receive multiple coherent light beams from the input optical waveguides. The light beams interfere in this region to generate a preset optical pattern with a sparse lattice structure, and the sparsity and symmetry of the optical pattern can be determined by the wave vector configuration scheme of the input light.

[0009] As a further optimized solution of the above on-chip optical system, the base layer material is silicon with a refractive index of 3.4 - 3.5, the bottom cladding material is silica with a refractive index of 1.4 - 1.5, and the waveguide layer material is silicon nitride with a refractive index of 2.0 - 2.1 and a thickness of about 140 - 200 nm.

[0010] As a further optimized solution of the above on-chip optical system, each input is provided with a corresponding phase modulator for regulating the phase of the input light. The linear gradient devices are all tapered waveguides with a linearly varying width, whose narrow ends are connected to the input waveguides and wide ends are connected to the planar waveguide layer.

[0011] As a further optimized solution of the above on-chip optical system, the starting width of the linear gradient device of the linear gradient device is 500 - 800 nm, the ending width is 10 - 20 μm, and the tapered length is 300 - 1000 μm.

[0012] As a further optimized solution of the above on-chip optical system, the area of the interference region is 0.25 mm 2 - 1 mm 2 .

[0013] The present invention further provides a method for calculating a wave vector configuration scheme based on prime factorization to generate a designed optical lattice structure in the interference region. Researchers can calculate according to different requirements to generate an optical lattice structure with target symmetry and sparsity in the interference region. The specific operation process includes:

[0014] (a) Let where m ≥ 3 and is an even number, thus generating an algebraic field Z is the set of integers.

[0015] (b) Let When selecting n, it must be decomposable into elements within the algebraic field Z[g m .

[0016] (c) Determine m and n according to different experimental requirements, calculate all complex number points that satisfy to obtain the corresponding point set, that is, the wave vector configuration scheme ψ[θ i |i = 1,..,i max of the required lattice structure. Different n determines different corresponding configuration schemes, and i max changes according to the specific calculation result of n.

[0017] Couple the light beam into the interference region according to the wave vector configuration scheme obtained from the above steps, and the designed coherent lattice structure pattern can be obtained in the interference region.

[0018] Furthermore, the present invention provides a solution for moving a coherent lattice pattern within a two-dimensional plane. Assuming that the generated lattice light image needs to be moved by Δx and Δy in the horizontal and vertical directions, respectively, then for a light beam with a wave vector direction of θ i , the phase change is as follows:

[0019]

[0020] where ω represents the angular frequency of the light source and c is the speed of light in vacuum.

[0021] The present invention can achieve a variety of efficient and sparse optical lattice structures in a small-size area. The system has significant advantages in terms of space utilization, optical intensity distribution, and symmetry regulation. By adjusting the wavelength and phase of the input light, the sparsity and symmetry of the interference pattern can be conveniently adjusted, various tunable optical interference patterns can be generated, and the spatial position of the illumination pattern can be changed without moving the hardware position, which can meet the requirements of fields such as biosensing, quantum computing, and microscopy imaging. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1 is a schematic side view of the device structure;

[0023] Figure 2 is a schematic diagram of the overall setting of the on-chip device;

[0024] Figure 3 is a schematic diagram of the generated sparse square lattice pattern;

[0025] Figure 4 is Figure 3 a schematic diagram after the lattice structure in DETAILED DESCRIPTION OF THE EMBODIMENTS

[0026] To further understand the content, features, and effects of the present invention, the present invention will be described in detail below with reference to the accompanying drawings and the following examples.

[0027] This embodiment is an on-chip two-dimensional sparse square lattice generating device designed based on a linear gradient device, which is used to generate a two-dimensional sparse square lattice optical structure. The device realizes the phase adjustment and interference of the input light beam by integrating eight input waveguides, a linear gradient device, and a phase modulator, thereby generating a square lattice optical pattern with specific sparsity and symmetry on the surface of the on-chip device, and can realize the movement of the optical pattern in the two-dimensional plane. The device has the characteristics of compact structure, high optical efficiency, and flexible regulation, and can meet the application requirements of quantum computing, microscopy imaging, and biosensing.

[0028] In this embodiment, the on-chip system is composed of three materials with different refractive indices, combined withFigure 1 As shown in the figure, the overall structure of the device includes a base layer 100, a bottom cladding layer 200, and a planar waveguide layer 300. A designed linear gradient device is used to connect the input straight waveguide to receive the externally input optical signal, and finally, a lattice pattern with a specific structure is formed by interference in the middle area of the device.

[0029] Specifically, as Figure 1 shown, the material of the base layer 100 is silicon, which is used for the physical support of the on-chip two-dimensional sparse lattice light generation device. A bottom cladding layer 200 with a thickness of about 200 μm is covered on the base layer 100, and the material used is silicon dioxide, which is used to confine the optical field. The optical field will be mainly confined in the waveguide layer. A silicon nitride with a thickness of about 150 nm is covered on the bottom cladding layer 200 as the waveguide layer 300 of the device, which is used for optical field propagation and interference.

[0030] Furthermore, as Figure 2 shown, the on-chip device includes eight input waveguides 500, each of which is used to receive and transmit the externally input optical signal, and the wavelength of the input light is 488 nm. These optical waveguides are arranged at specific positions so that all the input light beams interfere with each other in the central area of the device to form a square lattice structure. At the end of each input waveguide, the same linear gradient device 600 is connected, which is used to couple the externally input optical signal into the central interference area of the on-chip system.

[0031] In this embodiment, the linear gradient device 600 in the device is a designed tapered waveguide, which is used to connect the on-chip system and the input waveguide 500, so that the light beam in each input optical waveguide reaches the desired wave vector direction when entering the interference area.

[0032] Each gradient device 600 presents a linear tapered structure from narrow to wide. As Figure 2 shown, its wide end is connected to the interference area 700 of the device, and the narrow end is connected to the input waveguide 500. By designing the geometric parameters of this linear gradient tapered structure, the externally input light beam can be broadened and introduced into the planar waveguide layer, and propagated in the waveguide layer in the form of a plane wave. At the same time, the coupling efficiency of the optical signal can be improved and the transmission loss can be reduced; the linear gradient device 600 can alleviate the mode mismatch problem between the input waveguide and the interference area. The width of the gradient device is designed to gradually decrease as the length increases to ensure smooth mode conversion of light and achieve efficient coupling from the waveguide to the interference area.

[0033] An electro-optic modulator 400 is provided for each input waveguide 500 to adjust the phase of each input light beam.

[0034] The interference region is set at the center of the silicon nitride waveguide layer 300 and is a planar optical waveguide region for forming the square sparse lattice optical structure designed in this example. This region has a specific dielectric constant distribution to maintain the mode distribution and coherence of the optical field. After the input light beam enters the interference region through the linear gradient device 600, it forms a plane wave along the predetermined wave vector direction and interferes. The interference result presents a sparse lattice structure with square symmetry on the two-dimensional plane. By using the high-contrast medium in the interference region, the resolution of the lattice pattern can be effectively enhanced.

[0035] In this embodiment, the calculation of the wave vector configuration scheme is an important step for the system to interfere out the designed square sparse lattice pattern. According to the prime factorization method, the wave vector directions that satisfy specific symmetry are calculated. In this embodiment, the ring Z[g4] is used to define the wave vector directions of the square lattice structure, where g4 is the fourth root of unity, and in this way, a four-fold symmetric wave vector distribution is generated. By limiting the wave vector directions of the input light to these directions and positions, the light beams in the interference region can form optical intensity peaks at the lattice nodes, thereby generating a sparse square lattice optical structure. After determining the required lattice optical structure, the wave vector directions of the configured light beams are obtained by calculating all the co-circular points of a given integer n. The specific calculation includes the following steps:

[0036] (a) Take the set of integer roots of unity U = {±1, ±i} on the complex plane

[0037] (b) To determine the beam configuration scheme of the illumination light of the required lattice structure, all complex points that satisfy N(α) = n are found. The integer pairs corresponding to different n are different. In this embodiment, n = 5 is set, and 5 is factorized into the form of complex conjugate pairs as 5 = (2 + i)(2 - i). By multiplying (2 + i) and (2 - i) with the roots of unity U = Z[g4] × respectively, the co-circular point set P(5) = U·(2 + i) ∪ U·(2 - i) can be obtained.

[0038] (c) By calculating the results of the two factors U·(2 + i) and U·(2 - i) respectively, all co-circular points can be obtained, that is, the beam configuration scheme corresponding to the designed square lattice structure pattern is generated, P(5) = {2 + i, -1 + 2i, -2 - i, 1 - 2i, 2 - i, 1 + 2i, -2 + i, -1 - 2i}.

[0039] (d) Using the set P(5) obtained in step (c) above as the beam configuration scheme ψ[θ i = {θ =

[0040] 0.4636, 2.0344, -2.6779, -1.1071, -0.4636, 1.1071, 2.6779, -2.0344|i = 1,.., 8}。

[0041] Furthermore, the device can move the generated coherent lattice structure pattern on the two-dimensional plane by adjusting the phase of the input beam, change the spatial position of the illumination pattern without moving the hardware position, meet the specific requirements for the spatial position of the spot illumination in different application scenarios, and achieve further optimization and dynamic control of the square lattice symmetry. The change amount of the phase can be correspondingly controlled by using a phase modulator. In this example, electro-optic modulators 400 are set at 8 input beam positions to regulate the phase of each input beam.

[0042] In this example, it is assumed that the generated lattice light image needs to move Δy = 500 nm in the vertical direction. Then, for the beam with the wave vector direction of θ i the phase change is:

[0043]

[0044] The above-generated lattice structure moves downward by 500 nm in the vertical direction, and the corresponding phase change Δφ i of each input wave vector = {3.1284, 6.2568, 6.2568, 3.1284, -3.1284, -6.2568, -6.2568, -3.1284}, and Δφ i corresponds one-to-one with θ i Specifically, as shown in Figure 3 is the position of the lattice pattern before movement, and as shown in Figure 4 is the position of the lattice pattern after moving downward.

[0045] In summary, the on-chip system proposed by the present invention reduces the volume of the traditional multi-beam interference system and can generate various efficient and sparse optical lattice structures in a small-size area. The system has significant advantages in terms of space utilization rate, optical intensity distribution, lattice sparsity, and symmetry regulation. According to actual requirements, different beam configuration schemes can be designed to conveniently design various tunable interference patterns with different sparsity and symmetry requirements. At the same time, the phase of the input light can be changed by the phase modulator to move the illumination pattern on the two-dimensional plane without moving the hardware position, which can meet the requirements of fields such as biosensing, quantum computing, and microscopy imaging.

[0046] The above are only the preferred embodiments of the present invention. It should be noted that for those of ordinary skill in the art, without departing from the technical principle of the present invention, several improvements and substitutions can be made, and these improvements and substitutions should also be regarded as the protection scope of the present invention.

Claims

1. An on-chip optical system based on a linear gradient device design, characterized in that include: A base layer, a bottom cladding layer and a waveguide layer, wherein the bottom cladding layer is located above the base layer, and the waveguide layer is located above the bottom cladding layer; The waveguide layer comprises a plurality of input waveguides, a matching linear gradient device and a central interference region; The input waveguide, whose end is coupled to the linear gradient device, is used to receive input light and guide the light beam into the linear gradient device; The linear gradient device is used to broaden the input light before entering the planar waveguide layer, and then introduce it into the central area of ​​the on-chip system for interference. The interference region, located in the central area of ​​the on-chip system, is configured to receive multiple coherent light beams from an input optical waveguide to generate a preset optical interference pattern with a sparse lattice structure, and the sparsity and symmetry of the interference pattern can be determined by a wave vector configuration scheme of the input light wave.

2. The on-chip optical system according to claim 1, characterized in that: The base layer material is silicon, and the refractive index is 3.4-3.

5.

3. The on-chip optical system according to claim 1, wherein: The bottom cladding material is silicon dioxide, and the refractive index is 1.4-1.

5.

4. The on-chip optical system according to claim 1, wherein: The waveguide layer is made of silicon nitride, with a refractive index of 2.0 to 2.1 and a thickness of about 140 to 200 nm.

5. The on-chip optical system according to claim 1, characterized in that: Multiple waveguide inputs are each provided with a corresponding phase modulator for adjusting the phase of the input light.

6. The on-chip optical system according to claim 1, characterized in that: The linear gradient devices are all tapered with linear gradient width, the narrow end of which is connected to the input waveguide, and the wide end of which is connected to the planar waveguide layer.

7. The on-chip optical system according to claim 1, characterized in that: The linear gradient device has a starting width of 500-800 nm, a terminating width of 10-20 μm, and a tapered length of 300-1000 μm.

8. The on-chip optical system according to claim 1, wherein: The interference area is 0.25 mm 2 -1mm 2 , silicon nitride materials can support plane waves to propagate in the interference region, thereby maintaining high interference contrast and structural stability in the interference of input light waves.

9. The on-chip optical system according to claim 1, characterized in that: The input waveguide calculates the wave vector configuration scheme based on the prime number decomposition method, thereby determining the position and direction of the corresponding input optical waveguide in the on-chip system, so that the interference region can form a specific optical lattice structure.

10. The on-chip optical system according to claim 9, characterized in that: The method for generating a preset sparse optical lattice structure and realizing the movement of a light pattern comprises the following steps: (a) using the prime number decomposition method to select a set of wave vector directions that satisfy the set field norm, determine the position and direction of each input waveguide, and obtain a wave vector configuration scheme corresponding to the designed lattice pattern; (b) designing an on-chip system according to an existing wave vector configuration scheme, coupling multiple input lights to the input optical waveguide of the system, so that the input lights form the designed lattice structure in the interference region; (c) The phase of each light wave is adjusted by a phase modulator to achieve the movement of the lattice pattern in a two-dimensional plane.

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