Drive circuit for magnetic latching relay

Abstract

Provided is a drive circuit for a magnetic latching relay, comprising a reference voltage circuit for providing a reference voltage; the capacitor comprises a first end used for receiving a control signal and a second end used for receiving the reference voltage; the first comparison circuit is used for receiving the voltage of the second end of the capacitor, comparing the voltage with a first threshold voltage, and outputting a turn-on signal when the voltage of the second end of the capacitor is greater than the first threshold voltage; and the second comparison circuit is used for receiving the voltage of the second end of the capacitor, comparing the voltage with a second threshold voltage, and outputting a turn-off signal when the voltage of the second end of the capacitor is smaller than the second threshold voltage.

Description

Technical Field

[0001] The present invention relates to the field of relays, and particularly to a drive circuit for a magnetic latching relay. Background Art

[0002] The statements in this section are only provided to help understand the present invention by providing background information related to the present invention, and these background information do not necessarily constitute the prior art.

[0003] As a kind of relay, the magnetic latching relay plays a role in connecting and disconnecting the circuit. Different from general electromagnetic relays, the opening and closing of the magnetic latching relay rely on the action of a permanent magnet, and the conversion of its opening and closing states is completed by triggering a certain amount of pulsed electrical signals. The magnetic latching relay has the characteristics of small volume, small contact resistance, small bounce time when attracting, and no drive power consumption. However, both single-coil and double-coil magnetic latching relays need to use two drive terminals to control their opening and closing, and the compatibility is poor. Therefore, a magnetic latching relay drive circuit with better compatibility is needed. Summary of the Invention

[0004] Based on the above problems of the prior art, the present invention provides a drive circuit for a magnetic latching relay, including:

[0005] A reference voltage circuit for providing a reference voltage;

[0006] A capacitor, including a first end for receiving a control signal and a second end for receiving the reference voltage;

[0007] A first comparison circuit for receiving the voltage at the second end of the capacitor and comparing it with a first threshold voltage, and when the voltage at the second end of the capacitor is greater than the first threshold voltage, outputting an on signal; and

[0008] A second comparison circuit for receiving the voltage at the second end of the capacitor and comparing it with a second threshold voltage, and when the voltage at the second end of the capacitor is less than the second threshold voltage, outputting an off signal.

[0009] In one embodiment, the reference voltage circuit includes a second power supply and a first resistor connected between the second power supply and the second end of the capacitor.

[0010] In one embodiment, the reference voltage circuit further includes:

[0011] A third diode connected between the second power supply and the first resistor, and the cathode of the third diode is connected to the positive pole of the second power supply;

[0012] A fourth diode and a second resistor connected in series between the second power supply and the second end of the capacitor, with the anode of the fourth diode connected to the positive pole of the second power supply.

[0013] In one embodiment, the first comparison circuit includes:

[0014] A first comparator, which includes a positive input terminal for receiving the voltage at the second end of the capacitor, a negative input terminal for receiving the first threshold voltage, and an output terminal for outputting an on signal.

[0015] In one embodiment, the first comparison circuit further includes a third resistor and a fourth resistor connected in series between the first power supply and ground, and the negative input terminal of the first comparator is connected to the node between the third resistor and the fourth resistor.

[0016] In one embodiment, the second comparison circuit includes:

[0017] A second comparator, which includes a positive input terminal for receiving the second threshold voltage, a negative input terminal for receiving the voltage at the second end of the capacitor, and an output terminal for outputting an off signal.

[0018] In one embodiment, the second comparison circuit further includes a sixth resistor and a seventh resistor connected in series between the first power supply and ground, and the positive input terminal of the second comparator is connected to the node between the sixth resistor and the seventh resistor.

[0019] In one embodiment, the magnetic latching relay is a dual-coil magnetic latching relay, and the on signal is output to the on control terminal of the dual-coil magnetic latching relay, and the off signal is output to the off control terminal of the dual-coil magnetic latching relay.

[0020] In one embodiment, the magnetic latching relay is a single-coil magnetic latching relay, and the driving circuit further includes a full-bridge driving circuit, which includes: a first switching tube and a second switching tube connected in series across the third power supply, and a third switching tube and a fourth switching tube connected in series across the third power supply;

[0021] The first control terminal of the single-coil magnetic latching relay is connected to the node between the first switching tube and the second switching tube, and the second control terminal of the single-coil magnetic latching relay is connected to the node between the third switching tube and the fourth switching tube; the control terminals of the first switching tube and the fourth switching tube are used to receive the on signal, and the control terminals of the second switching tube and the third switching tube are used to receive the off signal.

[0022] In one embodiment, the first threshold voltage is greater than the reference voltage and less than the high level of the control signal, and the second threshold voltage is less than the reference voltage and greater than the low level of the control signal.

[0023] For the drive circuit of the magnetic latching relay of the present invention, when the control signal is at the rising edge, the drive circuit outputs a turn-on signal, and when the control signal is at the falling edge, the drive circuit outputs a turn-off signal. Its control logic is the same as that of a common electromagnetic relay and can be compatible with a circuit using a common electromagnetic relay. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] Figure 1 The schematic diagram of the drive circuit for the magnetic latching relay according to an embodiment of the present invention is shown.

[0025] Figure 2 The waveform diagram of the voltage at node R and the control signal according to an embodiment of the present invention is shown.

[0026] Figure 3 The circuit diagram of the drive circuit for the magnetic latching relay according to an embodiment of the present invention is shown.

[0027] Figure 4 Shown is Figure 3 The schematic diagram of the turn-on (ON) signal output by the drive circuit in

[0028] Figure 5 Shown is Figure 3 The schematic diagram of the turn-off (OFF) signal output by the drive circuit in

[0029] Figure 6 The schematic diagram of the full-bridge drive circuit for the single-coil magnetic latching relay according to an embodiment of the present invention is shown. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0030] In order to make the objectives, technical solutions and advantages of the present invention clearer and more understandable, the present invention will be further described in detail below with reference to the accompanying drawings through specific embodiments. It should be noted that the embodiments given in the present invention are only for illustration and do not limit the protection scope of the present invention.

[0031] A magnetic latching relay usually has two control terminals. For a dual-coil magnetic latching relay, it usually has an ON control terminal and an OFF control terminal. When a pulse signal is provided to the ON control terminal, the dual-coil magnetic latching relay can be controlled to turn on; when a pulse signal is provided to the OFF control terminal, the dual-coil magnetic latching relay can be controlled to turn off. For a single-coil magnetic latching relay, it usually has a first control terminal and a second control terminal. When a control signal is applied such that the current in the single-coil magnetic latching relay is in the forward direction (e.g., from the first control terminal to the second control terminal), the single-coil magnetic latching relay turns on; when a control signal is applied such that the current in the single-coil magnetic latching relay is in the reverse direction (e.g., from the second control terminal to the first control terminal), the single-coil magnetic latching relay turns off.

[0032] Therefore, a magnetic latching relay requires two control signals, which means it needs two control ports, such as two control IO ports. While an ordinary relay only has one control terminal. When the control signal at the control terminal is at a high level, the relay turns on; when the control signal at the control terminal becomes a low level, the relay turns off. Therefore, when replacing an ordinary relay in an existing circuit with a magnetic latching relay, the control board and control logic need to be changed.

[0033] The present invention provides a drive circuit for a magnetic latching relay, which can control the turning on and off of the magnetic latching relay with only one control port (such as a control IO port), and its circuit is simple, and the control logic is the same as that of an ordinary electromagnetic relay.

[0034] Figure 1 The schematic diagram of a drive circuit for a magnetic latching relay according to an embodiment of the present invention is shown. As Figure 1 shown, the drive circuit 100 includes: a capacitor C1, whose first end is used to receive a control signal, and the second end (i.e., node R) is connected to a reference voltage circuit 103; a reference voltage circuit 103, which is used to provide a reference voltage for the second end of the capacitor C1; a comparison circuit 101, which is used to receive the voltage from the second end of the capacitor C1 and compare it with a first threshold voltage. When the voltage at the second end of the capacitor C1 is greater than the first threshold voltage, an ON signal is output to the magnetic latching relay; a comparison circuit 102, which is used to receive the voltage from the second end of the capacitor C1 and compare it with a second threshold voltage. When the voltage at the second end of the capacitor C1 is less than the second threshold voltage, an OFF signal is output to the magnetic latching relay.

[0035] In one embodiment, the control signal comes from the IO port of a single-chip microcomputer, a processor, a microcontroller, etc.

[0036] In one embodiment, the reference voltage circuit 103 is a voltage source, which can provide a reference voltage of 5V, for example. In another embodiment, the reference voltage circuit 103 includes a voltage source and a resistor, and the resistor is used to control the charge and discharge time of the capacitor C1. In one embodiment, the reference voltage is less than the high level of the control signal.

[0037] In one embodiment, the comparison circuits 101 and 102 may include comparators. In another embodiment, the comparison circuits 101 and 102 may include controllers.

[0038] Figure 2 A waveform diagram of the voltage at node R and the control signal according to an embodiment of the present invention is shown. In combination with Figure 1 and Figure 2 it further illustrates the principle of the driving circuit for the magnetic holding relay of the present invention. As Figure 2 shown, the control signal is a square wave signal, which includes a rising edge and a falling edge, and the control signal can have any suitable high and low level values. In this embodiment, the high level of this square wave signal is 24V, the low level is 0V, and the output voltage of the reference voltage circuit 103 is 5V. When the control signal does not reach the capacitor C1, the voltage at node R (i.e., the second end of the capacitor C1) is the reference voltage of 5V. When the rising edge of the control signal reaches the capacitor C1, the voltage at the second end of the capacitor C1 rapidly rises to 24V. Subsequently, since the control signal remains at 24V, the second end of the capacitor C1 gradually discharges to the reference voltage of 5V. When the falling edge of the control signal reaches the capacitor C1, the voltage at the second end of the capacitor C1 rapidly drops to 0V. Subsequently, since the control signal remains at 0V, the second end of the capacitor C1 gradually charges to the reference voltage of 5V. It can be seen from the voltage curve of node R that by changing the level of the control signal, two pulses, a rising edge pulse and a falling edge pulse, can be generated at the second end of the capacitor C1. The voltage of the rising edge pulse is greater than the reference voltage, and the voltage of the falling edge pulse is less than the reference voltage.

[0039] When the rising edge pulse is greater than the first threshold voltage, the driving circuit 100 outputs an ON signal. When the falling edge pulse is less than the second threshold voltage, the driving circuit 100 outputs an OFF signal. Wherein the first threshold voltage is greater than the reference voltage and less than the high level of the control signal (e.g., 24V), and the second threshold voltage is less than the reference voltage and greater than the low level of the control signal (e.g., 0V). When the driving circuit 100 is powered on, since the voltage at node R is between the low level of the control signal and the reference voltage, an OFF signal will also be output.

[0040] Therefore, when the control signal is at the rising edge, the drive circuit 100 outputs an ON signal, and when the control signal is at the falling edge, the drive circuit 100 outputs an OFF signal. That is, the control logic of the drive circuit 100 of the present invention is the same as that of a conventional electromagnetic relay, making the magnetic latching relay of the present invention compatible with circuits using conventional electromagnetic relays.

[0041] Figure 3 FIG. shows a circuit diagram of a drive circuit for a magnetic latching relay according to an embodiment of the present invention. In conjunction with Figure 1 and Figure 3 , the reference voltage circuit 103 includes a power supply V2 for providing a reference voltage; a diode D4 and a resistor R2 connected in series between the power supply V2 and a node R, with the anode of the diode D4 connected to the positive pole of the power supply V2; a diode D3 and a resistor R1 connected in series between the power supply V2 and the node R, with the cathode of the diode D3 connected to the positive pole of the power supply V2. When the control signal is at the rising edge, the voltage at the node R is high, the voltage at the node R is greater than the voltage of the power supply V2, and the current flows from the node R through the resistor R1 and the diode D3 to the power supply V2 to discharge the second terminal of the capacitor C1. Therefore, the resistor R1 can control the discharge time of the second terminal of the capacitor C1, and the larger the resistor R1, the longer the discharge time. When the control signal is at the falling edge, the voltage at the node R is low, the voltage at the node R is less than the voltage of the power supply V2, and the current flows from the power supply V2 through the diode D4 and the resistor R2 to the node R to charge the second terminal of the capacitor C1. Therefore, the resistor R2 can control the charging time of the second terminal of the capacitor C1, and the larger the resistor R2, the longer the charging time. In one embodiment, the resistor R1 is 820 Ω and the resistor R2 is 1.8 kΩ. In one embodiment, the capacitor C1 is 680 uF. In one embodiment, the power supply V2 can be any suitable value, such as 5V. The diodes D3 and D4 enable separate adjustment of the charging time and the discharge time. In one embodiment, the diodes D3 and D4 can be omitted, and the reference voltage circuit 103 only includes the power supply V2 and a resistor connected between the power supply V2 and the node R.

[0042] The comparison circuit 101 includes a comparator COM1. The positive input terminal of the comparator COM1 receives the voltage from node R via a diode D5. The negative input terminal of the comparator COM1 is used to receive a first threshold voltage, and the output terminal of the comparator COM1 is used to output an ON signal. The comparison circuit 101 further includes a resistor R3 and a resistor R4 connected in series between the power supply V1 and the ground. The negative input terminal of the comparator COM1 is connected to the node between the resistor R3 and the resistor R4. The voltage division of the resistor R3 and the resistor R4 is used to provide the first threshold voltage. The comparison circuit 101 further includes a resistor R5 connected between the power supply V1 and the output terminal of the comparator COM1, which is used to provide a pull-up voltage. In one embodiment, if the comparator COM1 itself belongs to a model that does not require a pull-up resistor, the resistor R5 can be omitted. The diode D5 is used to prevent interference and leakage current. In some embodiments, the diode D5 can also be omitted. In one embodiment, the resistor R3 is 10 kΩ, the resistor R4 is 6.1 kΩ, and the resistor R5 is 1 kΩ. The power supply V1 is also used to provide a power supply voltage for the comparator COM1, which can be, for example, 5V, 12V, 24V or any other suitable value.

[0043] The comparison circuit 102 includes a comparator COM2. The negative input terminal of the comparator COM2 receives the voltage from node R via a diode D6. The positive input terminal of the comparator COM2 is used to receive a second threshold voltage, and the output terminal of the comparator COM2 is used to output an OFF signal. The comparison circuit 102 further includes a resistor R7 and a resistor R6 connected in series between the power supply V1 and the ground. The positive input terminal of the comparator COM2 is connected to the node between the resistor R7 and the resistor R6. The voltage division of the resistor R7 and the resistor R6 is used to provide the second threshold voltage. The comparison circuit 102 further includes a resistor R8 connected between the power supply V1 and the output terminal of the comparator COM2, which is used to provide a pull-up voltage. In one embodiment, if the comparator COM2 itself belongs to a model that does not require a pull-up resistor, the resistor R8 can be omitted. The diode D6 is used to prevent interference and leakage current. In some embodiments, the diode D6 can also be omitted. In one embodiment, the resistor R7 is 18 kΩ, the resistor R6 is 2.1 kΩ, and the resistor R8 is 1 kΩ. The power supply V1 is also used to provide a power supply voltage for the comparator COM2.

[0044] Figure 3 The driving circuit therein further includes a diode D1 and a diode D2 connected in series across the power supply V1. The anode of the diode D1 is connected to the negative terminal (i.e., the ground) of the power supply V1, and the cathode is connected to the second terminal of the capacitor C1. The anode of the diode D2 is connected to the second terminal of the capacitor C1, and the cathode is connected to the positive terminal of the power supply V1. In one embodiment, the diodes D1 and D2 can be omitted.

[0045] In one embodiment, instead of a voltage dividing circuit, the first threshold voltage and the second threshold voltage can be directly provided by a power supply.

[0046] Figure 4 shows Figure 3 a schematic diagram of the ON signal output by the driving circuit in Figure 5 shows Figure 3 a schematic diagram of the OFF signal output by the driving circuit in Figure 4 and Figure 5 In the embodiments of

[0047] Combined with Figure 3 and Figure 4 When the control signal is at the rising edge, the voltage of node R is a rising edge pulse, whose maximum voltage is 24V and minimum voltage is the reference voltage of 5V, making the voltage at the positive input terminal of comparator COM1 greater than the first threshold voltage at the negative input terminal, thereby outputting an ON signal. In this embodiment, the ON signal is a 24V square wave pulse.

[0048] Combined with Figure 3 and Figure 5 When the control signal is at the falling edge, the voltage of node R is a falling edge pulse, whose minimum voltage is 0V and maximum voltage is the reference voltage of 5V, making the second threshold voltage at the positive input terminal of comparator COM2 greater than the voltage at the negative input terminal, thereby outputting an OFF signal. In this embodiment, the OFF signal is a 24V square wave pulse. Additionally, when powering on, since the voltage of node R is between 0 - 5V, an OFF signal will also be output. Therefore, during the PCBA board functional test or before leaving the factory, just powering on can keep the relay in the initial OFF state.

[0049] For a dual - coil magnetic latching relay, the ON signal in the driving circuit of the present invention can be directly output to the ON control terminal of the dual - coil magnetic latching relay, and the OFF signal can be output to the OFF control terminal of the dual - coil magnetic latching relay. When the control signal is at the rising edge, the driving circuit outputs an ON signal to drive the magnetic latching relay to turn on. When the control signal is at the falling edge, the driving circuit outputs an OFF signal to drive the magnetic latching relay to turn off.

[0050] For a single - coil magnetic latching relay, the driving circuit of the present invention further needs to include a full - bridge driving circuit. Figure 6The figure shows a schematic diagram of a full-bridge drive circuit for a single-coil magnetic latching relay according to an embodiment of the present invention. The full-bridge drive circuit includes a switching transistor Q1 and a switching transistor Q2 connected in series across a power supply V3, and a switching transistor Q3 and a switching transistor Q4 connected in series across the power supply V3. The first control terminal tr1 of the single-coil magnetic latching relay is connected to the node between the switching transistor Q1 and the switching transistor Q2, and the second control terminal tr2 of the single-coil magnetic latching relay is connected to the node between the switching transistor Q3 and the switching transistor Q4. The control terminals of the switching transistor Q1 and the switching transistor Q4 are used to receive an ON signal, and the control terminals of the switching transistor Q2 and the switching transistor Q3 are used to receive an OFF signal. When the control signal is at the rising edge, the drive circuit outputs an ON signal, the switching transistors Q1 and Q4 are turned on, the switching transistors Q2 and Q3 are turned off, and the current flows from the first control terminal tr1 of the single-coil magnetic latching relay to the second control terminal tr2, driving the magnetic latching relay to turn on. When the control signal is at the falling edge, the drive circuit outputs an OFF signal, the switching transistors Q2 and Q3 are turned on, the switching transistors Q1 and Q4 are turned off, and the current flows from the second control terminal tr2 of the single-coil magnetic latching relay to the first control terminal tr1, driving the magnetic latching relay to turn off.

[0051] In one embodiment, the switching transistors Q1-Q4 can be, for example, triodes, MOS transistors, IGBTs, switches, relays, etc. In one embodiment, the power supply V3 can be, for example, 5V, 12V, 24V or any other suitable value.

[0052] The drive circuit for the magnetic latching relay provided by the present invention outputs a turn-on signal when the control signal is at the rising edge, and outputs a turn-off signal when the control signal is at the falling edge. The drive circuit of the present invention only needs one control signal port (such as a control IO port) to control the turn-on and turn-off of the magnetic latching relay, and its control logic is the same as that of a common electromagnetic relay, so that the magnetic latching relay of the present invention can be compatible with a circuit using a common electromagnetic relay without changing the control board and the control logic.

[0053] Although the present invention has been described by way of preferred embodiments, the present invention is not limited to the embodiments described herein, and various changes and variations are included without departing from the scope of the present invention.

Claims

1. A driving circuit for a magnetic latching relay, comprising: A reference voltage circuit for providing a reference voltage; A capacitor including a first terminal for receiving a control signal and a second terminal for receiving the reference voltage; A first comparison circuit for receiving the voltage at the second terminal of the capacitor and comparing it with a first threshold voltage, and outputting a turn-on signal when the voltage at the second terminal of the capacitor is greater than the first threshold voltage; And A second comparison circuit for receiving the voltage at the second terminal of the capacitor and comparing it with a second threshold voltage, and outputting a turn-off signal when the voltage at the second terminal of the capacitor is less than the second threshold voltage.

2. The driving circuit for a magnetic latching relay according to claim 1, wherein, The reference voltage circuit includes a second power supply and a first resistor connected between the second power supply and the second terminal of the capacitor.

3. The driving circuit for a magnetic latching relay according to claim 2, wherein, The reference voltage circuit further includes: A third diode connected between the second power supply and the first resistor, with the cathode of the third diode connected to the positive terminal of the second power supply; A fourth diode and a second resistor connected in series between the second power supply and the second terminal of the capacitor, with the anode of the fourth diode connected to the positive terminal of the second power supply.

4. The driving circuit for a magnetic latching relay according to claim 1, wherein, The first comparison circuit includes: A first comparator including a positive input terminal for receiving the voltage at the second terminal of the capacitor, a negative input terminal for receiving the first threshold voltage, and an output terminal for outputting a turn-on signal.

5. The driving circuit for a magnetic latching relay according to claim 4, wherein, The first comparison circuit further includes a third resistor and a fourth resistor connected in series between a first power supply and ground, and the negative input terminal of the first comparator is connected to the node between the third resistor and the fourth resistor.

6. The driving circuit for a magnetic latching relay according to claim 1, wherein, The second comparison circuit includes: A second comparator including a positive input terminal for receiving the second threshold voltage, a negative input terminal for receiving the voltage at the second terminal of the capacitor, and an output terminal for outputting a turn-off signal.

7. The driving circuit for a magnetic latching relay according to claim 6, wherein, The second comparison circuit further includes a sixth resistor and a seventh resistor connected in series between a first power supply and ground, and the positive input terminal of the second comparator is connected to the node between the sixth resistor and the seventh resistor.

8. The driving circuit for a magnetic latching relay according to claim 1, wherein, The magnetic latching relay is a dual-coil magnetic latching relay, the turn-on signal is output to the turn-on control terminal of the dual-coil magnetic latching relay, and the turn-off signal is output to the turn-off control terminal of the dual-coil magnetic latching relay.

9. The driving circuit for a magnetic latching relay according to claim 1, wherein, The magnetic latching relay is a single-coil magnetic latching relay, and the drive circuit further includes a full-bridge drive circuit, which includes: a first switching tube and a second switching tube connected in series across a third power supply, and a third switching tube and a fourth switching tube connected in series across the third power supply; The first control terminal of the single-coil magnetic latching relay is connected to the node between the first switching tube and the second switching tube, and the second control terminal of the single-coil magnetic latching relay is connected to the node between the third switching tube and the fourth switching tube; the control terminals of the first switching tube and the fourth switching tube are for receiving the turn-on signal, and the control terminals of the second switching tube and the third switching tube are for receiving the turn-off signal.

10. The driving circuit for a magnetic latching relay according to any one of claims 1-9, wherein, The first threshold voltage is greater than the reference voltage and less than the high level of the control signal, and the second threshold voltage is less than the reference voltage and greater than the low level of the control signal.

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