Display device and driving method thereof

Abstract

A display device is provided that includes a first capacitor connected to a first node and a second node, and a second capacitor connected to the second node and first and second power control transistors. In addition, a driving method of a display device includes: a first period for connecting a second capacitor with an auxiliary voltage; and a fifth period for blocking the second capacitor from the auxiliary voltage and connecting the second capacitor to the high-potential power supply voltage.

Description

[0001] Cross - reference to related applications

[0002] This patent application claims the benefit of Korean Patent Application No. 10 - 2023 - 0191366, filed on December 26, 2023, which is incorporated herein by reference in its entirety as if fully set forth herein. Technical field

[0003] The present disclosure relates to a display device and a driving method thereof. Background art

[0004] As the information age progresses, the demand for display devices for displaying images has increased in various forms. Therefore, various types of display devices, such as liquid crystal display (LCD) devices, plasma display panel (PDP) devices, and organic light - emitting display (OLED) devices, have been used recently.

[0005] Among display devices, an organic light - emitting display device is self - emissive and has the advantages of better viewing angles and contrast ratios than those of liquid crystal display (LCD) devices. In addition, since the organic light - emitting display device does not require a separate backlight, it is advantageous that the organic light - emitting display device can be thin and light and has low power consumption. In addition, the organic light - emitting display device has the advantages that it can be driven at a low direct current voltage, has a fast response speed, and particularly has a low manufacturing cost.

[0006] Recently, it has been disclosed to drive an organic light - emitting display device by a pulse - width modulation (PWM) method to control brightness and improve low - gray - level Mura. In this case, a control signal for driving by the pulse - width modulation (PWM) method can be provided to a switching transistor provided in a driving circuit of a pixel.

[0007] When an organic light - emitting display device is driven by a pulse - width modulation (PWM) method, a copy Mura phenomenon may occur in a light - emitting region. Specifically, by driving by the pulse - width modulation (PWM) method, the light - emitting region can be turned off in a short time. For example, when the duty ratio is 92%, the light - emitting region can emit light during 92% of the period in a frame and can be periodically turned off several times during 8% of the period in a frame. In this case, the light - emitting region can be turned off sequentially from one side to the other side. Therefore, the driving current flowing in the light - emitting region can be sequentially reduced, and the high - potential power supply voltage can be increased.

[0008] In this case, in a region of the display panel that has entered the sampling period, as the high-potential power supply voltage increases, the gate-source voltage Vgs of the driving transistor may change. For example, when a capacitor is connected between the high-potential power supply voltage and the source node of the driving transistor, a coupling phenomenon may occur between the high-potential power supply voltage and the source node of the driving transistor. Therefore, the gate-source voltage Vgs of the driving transistor may change, and the luminance may change for each sub-pixel. As a result, the luminance of the display panel may be uneven. Summary of the Invention

[0009] In view of the above problems, the present disclosure has been made, and an object of the present disclosure is to provide a display device and a driving method thereof in which luminance variation is minimized.

[0010] In addition to the object of the present disclosure described above, additional objects and features of the present disclosure will be clearly understood by those skilled in the art from the following description of the present disclosure.

[0011] According to one aspect of the present disclosure, the above and other objects can be achieved by providing a display device including a plurality of pixels, each pixel of the plurality of pixels including a light-emitting element and a driving circuit for driving the light-emitting element, wherein the driving circuit includes: a driving transistor, a gate electrode of the driving transistor being connected to a first node, a first electrode being connected to a first emission control transistor, and a second electrode being connected to a second node; a first capacitor, a first terminal of the first capacitor being connected to the first node and a second terminal being connected to the second node; and a second capacitor, a first terminal of the second capacitor being connected to the second node and a second terminal being connected to a first power control transistor and a second power control transistor.

[0012] According to another aspect of the present disclosure, the above and other objects can be achieved by providing a driving method of a display device including a display panel provided with a plurality of pixels, wherein each pixel of the plurality of pixels includes: a first period for initializing a first capacitor and connecting a second capacitor to an auxiliary voltage; a second period for sensing a threshold voltage of a driving transistor; a third period for providing a data voltage to a gate electrode of the driving transistor; a fourth period for initializing an anode electrode of the light-emitting element; and a fifth period for blocking the second capacitor from the auxiliary voltage, connecting the second capacitor to a high-potential power supply voltage and allowing the light-emitting element to emit light. Brief Description of the Drawings

[0013] The above and other objects, features, and other advantages of the present disclosure will be more clearly understood from the following detailed description in conjunction with the accompanying drawings, in which:

[0014] Figure 1is a block diagram showing a display device according to an embodiment of the present disclosure;

[0015] Figure 2 is a circuit diagram showing a pixel according to an embodiment of the present disclosure;

[0016] Figure 3 is a diagram showing waveforms of signals applied to a pixel according to an embodiment of the present disclosure;

[0017] Figure 4 is a circuit diagram showing driving of a first period of a pixel according to an embodiment of the present disclosure;

[0018] Figure 5 is a circuit diagram showing driving of a second period of a pixel according to an embodiment of the present disclosure;

[0019] Figure 6 is a circuit diagram showing driving of a third period of a pixel according to an embodiment of the present disclosure;

[0020] Figure 7 is a circuit diagram showing driving of a fourth period of a pixel according to an embodiment of the present disclosure; and

[0021] Figure 8 is a circuit diagram showing driving of a fifth period of a pixel according to an embodiment of the present disclosure. DETAILED DESCRIPTION

[0022] Advantages and features of the present disclosure and methods for realizing them will be clarified by the following embodiments described with reference to the accompanying drawings. However, the present disclosure may be implemented in different forms and should not be construed as limited to the embodiments set forth herein. On the contrary, these embodiments are provided so that the present disclosure will be thorough and complete, and will fully convey the scope of the present disclosure to those skilled in the art. Furthermore, the present disclosure is defined only by the scope of the claims.

[0023] Shapes, dimensions, ratios, angles, and quantities disclosed in the drawings for describing embodiments of the present disclosure are merely examples, and thus the present disclosure is not limited to the details shown. Throughout the specification, the same reference numerals denote the same elements. In the following description, when a detailed description of related known functions or configurations is determined to unnecessarily obscure the gist of the present disclosure, the detailed description will be omitted. When using "comprising", "having", and "including" described in the present disclosure, another part may be added unless "only~" is used. Unless otherwise specified, terms in the singular form may include the plural form.

[0024] When interpreting elements, the elements are interpreted as including an error range even though not explicitly described.

[0025] When describing positional relationships, for example, when a positional relationship is described as "on", "above", "below", and "next to", one or more parts may be disposed between two other parts unless "just" or "directly" is used.

[0026] When describing temporal relationships, for example, when a temporal order is described as "after", "subsequently", "next", and "before", discontinuous cases may be included unless "just" or "directly" is used.

[0027] It should be understood that although terms such as "first" and "second" may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another. For example, without departing from the scope of the present disclosure, a first element may be referred to as a second element, and similarly, a second element may be referred to as a first element.

[0028] The features of various embodiments of the present disclosure may be partially or wholly coupled or combined with each other, and may operate differently from each other and be technically driven, as can be fully understood by those skilled in the art. The embodiments of the present disclosure may be executed independently of each other, or may be executed together in a mutually dependent relationship.

[0029] Hereinafter, preferred embodiments of the present disclosure will be described in detail with reference to the accompanying drawings.

[0030] Figure 1 is a block diagram showing a display device according to an embodiment of the present disclosure.

[0031] Referring to Figure 1 , a display device according to an embodiment may include a display panel 100, a gate driver 200, a data driver 300, and a timing controller 400.

[0032] The display panel 100 may be a flat display panel or may be a flexible display panel. The display panel 100 may be formed of glass, plastic, or a plastic film, but is not limited thereto.

[0033] The display panel 100 may include a pixel array in which a plurality of pixels P are arranged in a matrix. Each pixel among the plurality of pixels P may include a plurality of sub-pixels, and each sub-pixel includes a light-emitting element. Each pixel may include sub-pixels of three or four colors or two colors among a red sub-pixel that emits red light, a green sub-pixel that emits green light, a blue sub-pixel that emits blue light, and a white sub-pixel that emits white light.

[0034] Each pixel among the plurality of pixels P includes a light-emitting element and a driving circuit for driving the light-emitting element, and may be independently driven by the driving circuit.

[0035] Each pixel among the plurality of pixels P may be connected to a plurality of signal lines, and the plurality of signal lines include a gate line driven by a gate driver 200, a data line driven by a data driver 300, and a power line for providing a power supply voltage.

[0036] The gate driver 200 may individually drive the gate lines GL of the display panel 100 by receiving a plurality of gate control signals from the timing controller 400.

[0037] The data driver 300 may individually drive the data lines DL of the display panel 100 by receiving a plurality of data control signals from the timing controller 400.

[0038] The timing controller 400 may realign digital video data input from the outside and provide the realigned digital video data to the data driver 300. The timing controller 400 may control the operation timing of the gate driver 200 and the data driver 300 by using timing signals such as a vertical synchronization signal, a horizontal synchronization signal, and a data enable signal input from the outside.

[0039] Figure 2 is a circuit diagram showing a pixel P according to an embodiment of the present disclosure.

[0040] A pixel P may include a light emitting element LED and a driving circuit for driving the light emitting element LED. The driving circuit may include a plurality of thin film transistors DT and ST1 to ST8, and a first storage capacitor C1 and a second storage capacitor C2. The plurality of thin film transistors DT and ST1 to ST8 may include a driving transistor DT, a first switching transistor ST1 to a fourth switching transistor ST4, a first emission control transistor ST5 and a second emission control transistor ST6, and a first power control transistor ST7 and a second power control transistor ST8. In this case, each of the plurality of thin film transistors DT and ST1 to ST8 may be formed of an NMOS transistor.

[0041] The gate electrode of the driving transistor DT may be connected to a first node n1, its first electrode may be connected to the first emission control transistor ST5, and its second electrode may be connected to a second node n2. In addition, the driving transistor DT may be electrically connected to a high potential power supply voltage ELVDD and a low potential power supply voltage ELVSS. The driving transistor DT may control the magnitude of the driving current I flowing to the light emitting element LED.

[0042] The gate electrode of the first switching transistor ST1 can be connected to the first scan signal SC1, its first electrode can be connected to the initialization voltage V_init, and its second electrode can be connected to the second node n2. That is, the second electrode of the first switching transistor ST1 can be connected to the same node as the second electrode of the driving transistor DT. The first switching transistor ST1 can operate according to the first scan signal SC1. In addition, the first switching transistor ST1 can supply the initialization voltage V_init to the second node n2.

[0043] The gate electrode of the second switching transistor ST2 can be connected to the first scan signal SC1, its first electrode can be connected to the reset voltage V_reset, and its second electrode can be connected to the third node n3. The second switching transistor ST2 can operate according to the first scan signal SC1. That is, since the same signal is supplied to the second switching transistor ST2 and the first switching transistor ST1, these switching transistors can be turned on or off simultaneously. In addition, the second switching transistor ST2 can supply the reset voltage V_reset to the third node n3.

[0044] The gate electrode of the third switching transistor ST3 can be connected to the second scan signal SC2, its first electrode can be connected to the reference voltage V_ref, and its second electrode can be connected to the first node n1. That is, the second electrode of the third switching transistor ST3 can be connected to the same node as the gate electrode of the driving transistor DT. The third switching transistor ST3 can operate according to the second scan signal SC2. In addition, the third switching transistor ST3 can supply the reference voltage V_ref to the first node n1.

[0045] The gate electrode of the fourth switching transistor ST4 can be connected to the third scan signal SC3, its first electrode can be connected to the data voltage V_data, and its second electrode can be connected to the first node n1. That is, the second electrode of the fourth switching transistor ST4 can be connected to the same node as the gate electrode of the driving transistor DT. The fourth switching transistor ST4 can operate according to the third scan signal SC3. In addition, the fourth switching transistor ST4 can supply the data voltage V_data to the first node n1.

[0046] The gate electrode of the first emission control transistor ST5 can be connected to the first emission control signal EM1, its first electrode can be connected to the high potential power supply voltage ELVDD, and its second electrode can be connected to the first electrode of the driving transistor DT. The first emission control transistor ST5 can operate according to the first emission control signal EM1. In addition, the first emission control transistor ST5 can supply the high potential power supply voltage ELVDD to the driving transistor DT.

[0047] The first emission control signal EM1 can be driven by a pulse width modulation (PWM) method. Specifically, the pulse width modulation (PWM) method can be a modulation method for changing the pulse width according to the amplitude of a signal. For example, when the amplitude of the signal is large, the width of the pulse can be increased, and when the amplitude of the signal is small, the width of the pulse can be decreased. Since the first emission control signal EM1 is driven by the pulse width modulation (PWM) method, the first emission control transistor ST5 can be turned off in a short time. Therefore, the driving transistor DT can not receive the high potential power supply voltage ELVDD in a short time. As a result, the driving of the driving transistor DT can be controlled, whereby the brightness of the display device can be adjusted.

[0048] The gate electrode of the second emission control transistor ST6 can be connected to the second emission control signal EM2, its first electrode can be connected to the second node n2, and its second electrode can be connected to the third node n3. That is, the first electrode of the second emission control transistor ST6 can be connected to the first switching transistor ST1 and the driving transistor DT, and its second electrode can be connected to the second switching transistor ST2 and the light emitting element LED. The second emission control transistor ST6 can operate according to the second emission control signal EM2. In addition, the second emission control transistor ST6 can supply the driving current I applied from the driving transistor DT to the light emitting element LED.

[0049] The gate electrode of the first power control transistor ST7 can be connected to the first power control signal PC1, its first electrode can be connected to the fourth node n4, and its second electrode can be connected to the auxiliary voltage V_sub. The first power control transistor ST7 can operate according to the first power control signal PC1. Specifically, when the first power control signal PC1 in a high voltage state is supplied to the first power control transistor ST7, the auxiliary voltage V_sub connected to the second electrode of the first power control transistor ST7 can be supplied to the fourth node n4 connected to the first electrode of the first power control transistor ST7. In this case, since the fourth node n4 is connected to the terminal of the second capacitor C2, the auxiliary voltage V_sub can be supplied to the capacitor C2.

[0050] The gate electrode of the second power control transistor ST8 may be connected to the second power control signal PC2, its first electrode may be connected to the high potential power supply voltage ELVDD, and its second electrode may be connected to the fourth node n4. That is, the first electrode of the second power control transistor ST8 may be connected to the first emission control transistor ST5, and its second electrode may be connected to the first power control transistor ST7. The second power control transistor ST8 may operate according to the second power control signal PC2. Specifically, when the second power control signal PC2 in a high voltage state is provided to the second power control transistor ST8, the high potential power supply voltage ELVDD connected to the first electrode of the second power control transistor ST8 may be provided to the fourth node n4 connected to the second electrode of the second power control transistor ST8. In this case, since the fourth node n4 is connected to the terminal of the second capacitor C2, the high potential power supply voltage ELVDD may be provided to the second capacitor C2.

[0051] Meanwhile, the magnitude of the auxiliary voltage V_sub may be equal to the magnitude of the high potential power supply voltage ELVDD. When the first emission control signal EM1 is driven by a pulse width modulation (PWM) method, the drive current flowing into the drive transistor DT may be sequentially reduced, and the high potential power supply voltage ELVDD may be increased. In this case, in order to prevent the changed high potential power supply voltage ELVDD from being provided to the second capacitor C2, the connection between the second capacitor C2 and the high potential power supply voltage ELVDD may be blocked, and the second capacitor C2 and the auxiliary voltage V_sub may be connected to each other. In this case, in order to stably drive the second capacitor C2, the magnitude of the auxiliary voltage V_sub may be set to be equal to the magnitude of the high potential power supply voltage ELVDD.

[0052] The anode electrode of the light emitting element LED may be connected to the third node n3, and its cathode electrode may be connected to the low potential power supply voltage ELVSS. That is, the anode electrode of the light emitting element LED may be connected to the second switching transistor ST2 and the second emission control transistor ST6. The light emitting element LED may emit light according to the drive current I.

[0053] The first terminal of the first capacitor C1 may be connected to the first node n1, and its second terminal may be connected to the second node n2. That is, the first terminal of the first capacitor C1 may be connected to the gate electrode of the drive transistor DT, and its second terminal may be connected to the second electrode of the drive transistor DT. The first capacitor C1 may store the voltage between the gate and the second electrode of the drive transistor DT. In addition, the first capacitor C1 may be referred to as a storage capacitor.

[0054] The first terminal of the second capacitor C2 may be connected to the second node n2, and its second terminal may be connected to the fourth node n4. That is, the first terminal of the second capacitor C2 may be connected to the second electrode of the driving transistor DT, and its second terminal may be connected to the first power control transistor ST7 and the second power control transistor ST8. The second capacitor C2 may prevent a voltage change in the second node n2 (i.e., the second electrode of the driving transistor DT).

[0055] Figure 3 is a diagram showing waveforms of signals applied to pixels according to an embodiment of the present disclosure. A plurality of pixels P may be driven by dividing them into a first period t1 to a fifth period t5. The first period t1 to the fifth period t5 may be continuous without overlap. The driving process of the pixel P will be described in detail with reference to Figures 4 to 8 the driving process of the pixel P will be described in detail with reference to

[0056] Figure 4 is a circuit diagram showing the driving of the first period t1 of a pixel according to an embodiment of the present disclosure. The first period t1 may be an initial period.

[0057] In the first period t1, a first scan signal SC1 and a second scan signal SC2 in a high voltage state are applied so that the first switching transistor ST1 to the third switching transistor ST3 may be turned on. The initialization voltage V_init applied to the first switching transistor ST1 may be applied to the second node n2, and the reset voltage V_reset applied to the second switching transistor ST2 may be applied to the third node n3. In addition, the reference voltage V_ref applied to the third switching transistor ST3 may be applied to the first node n1.

[0058] Since the first terminal of the first capacitor C1 is connected to the first node n1 and the second terminal is connected to the second node n2, each of the first terminal and the second terminal of the first capacitor C1 may be initialized to the reference voltage V_ref and the initialization voltage V_init. Accordingly, the first capacitor C1 may be initialized to the voltage difference between the reference voltage V_ref and the initialization voltage V_init. In addition, since the voltage difference between the reference voltage V_ref and the initialization voltage V_init is lower than the threshold voltage Vth of the driving transistor DT, the driving transistor DT may not be turned on.

[0059] Since the anode electrode of the light emitting element LED is connected to the third node n3, the anode electrode of the light emitting element LED may be initialized to the reset voltage V_reset. In addition, since the reset voltage V_reset is lower than the low potential power supply voltage ELVSS, the light emitting element LED may not emit light.

[0060] In addition, a first power control signal PC1 in a high voltage state is applied such that a first power control transistor ST7 can be turned on. Since the first terminal of a second capacitor C2 is connected to a second node n2 and its second terminal is connected to a fourth node n4, each of the first and second terminals of the second capacitor C2 can be initialized to an initialization voltage V_init and an auxiliary voltage V_sub. Accordingly, the second capacitor C2 can be initialized to a voltage difference between the initialization voltage V_init and the auxiliary voltage V_sub.

[0061] Figure 5 is a circuit diagram showing driving of a second period t2 of a pixel according to an embodiment of the present disclosure. The second period t2 may be a sensing period.

[0062] In the second period t2, a second scan signal SC2 may be maintained in a high voltage state, and a first scan signal SC1 may change from a high voltage state to a low voltage state. Accordingly, a third switching transistor ST3 may be maintained in an on state, and a first switching transistor ST1 and a second switching transistor ST2 may change from an on state to an off state. In addition, a first emission control signal EM1 in a high voltage state is applied such that a first emission control transistor ST5 may be in an on state. In this case, the first emission control signal EM1 may be driven by a pulse width modulation (PWM) method.

[0063] Since the third switching transistor ST3 is in an on state, a reference voltage V_ref may be supplied to a gate electrode of a driving transistor DT through the third switching transistor ST3. In addition, since the first emission control transistor ST5 is in an on state, a high potential power supply voltage ELVDD may be supplied to a first electrode of the driving transistor DT through the first emission control transistor ST5.

[0064] Accordingly, since the voltage of the gate electrode of the driving transistor DT is maintained at the reference voltage V_ref and the voltage of its drain electrode becomes the high potential power supply voltage ELVDD, the driving transistor DT may operate as a source follower.

[0065] Through the source follower, the gate-source voltage Vgs of the driving transistor DT can be reduced until it reaches the threshold voltage Vth of the driving transistor DT. When the gate-source voltage Vgs of the driving transistor DT decreases to reach the threshold voltage Vth of the driving transistor DT, the driving transistor DT can be turned off. In addition, since the first capacitor C1 stores the voltage difference between the first terminal and the second terminal, the first capacitor C1 can store the threshold voltage Vth that is the gate-source voltage Vgs of the driving transistor DT. In addition, the voltage of the second node n2 can be (Vref - Vth), which is the voltage difference between the reference voltage V_ref and the threshold voltage Vth of the driving transistor DT.

[0066] Meanwhile, the first emission control signal EM1 is driven by a pulse width modulation (PWM) method, and the voltage of the gate line for providing the first emission control signal EM1 can be changed periodically. In this case, the light emitting regions can be turned off sequentially from one side to the other side. Therefore, the driving current flowing into the light emitting regions can be reduced sequentially, and the high potential power supply voltage ELVDD can be increased. In addition, the capacitor connected to the changed high potential power supply voltage ELVDD may not operate stably, or the voltage of a specific node may change.

[0067] For example, when there are no first power control transistor ST7 and second power control transistor ST8, the first terminal of the second capacitor C2 can be connected to the second node n2, and its second terminal can be directly connected to the high potential power supply voltage ELVDD. In this case, a coupling phenomenon occurs between the changed high potential power supply voltage ELVDD and the second node n2, whereby the voltage of the second node n2 can be changed. Therefore, the voltage of the second node n2 may change during the period for sensing the threshold voltage Vth, and the threshold voltage Vth sensed by the first capacitor C1 may be incorrect. As a result, a phenomenon of uneven copied brightness may occur, and the brightness may be uneven.

[0068] In the present disclosure, during the sensing period as the second period t2, the connection between the high potential power supply voltage ELVDD and the second capacitor C2 can be blocked by the first power control transistor ST7 and the second power control transistor ST8, whereby uneven brightness caused by the change of the high potential power supply voltage ELVDD can be avoided.

[0069] Specifically, during the second time period t2, the first power control signal PC1 may be in a high voltage state, and the second power control signal PC2 may be in a low voltage state. Therefore, the first power control transistor ST7 may be in an on state, and the second power control transistor ST8 may be in an off state. That is, the second capacitor C2 may be blocked from the high potential power supply voltage ELVDD and may receive the auxiliary voltage V_sub. Therefore, the occurrence of a coupling phenomenon caused by a change in the high potential power supply voltage ELVDD can be prevented, thereby avoiding the occurrence of a sensing error. As a result, the occurrence of a replicated brightness non-uniformity phenomenon can be prevented, and a change in brightness can be avoided.

[0070] In addition, the second capacitor C2 may be connected to the auxiliary voltage V_sub so that the second capacitor C2 can be prevented from affecting the sensing of the first capacitor C1 and the second capacitor C2 can be prevented from being in a floating state.

[0071] Figure 6 It is a circuit diagram showing the driving of a third time period t3 of a pixel according to an embodiment of the present disclosure. The third time period t3 may be a writing time period.

[0072] In the third time period t3, the first emission control signal EM1 and the second scan signal SC2 may change from a high voltage state to a low voltage state. Therefore, the first emission control transistor ST5 and the third switch transistor ST3 may change from an on state to an off state. In addition, the third scan signal SC3 may change from a low voltage state to a high voltage state. Therefore, the fourth switch transistor ST4 may change from an off state to an on state.

[0073] Since the fourth switch transistor ST4 is in an on state, the data voltage V_data may be provided to the first node n1 by the fourth switch transistor ST4. Since the gate electrode of the driving transistor DT is connected to the first node n1, the gate electrode of the driving transistor DT may change from the reference voltage V_ref to the data voltage V_data.

[0074] In this case, since the first capacitor C1 and the second capacitor C2 are connected in series electrically, a coupling phenomenon may occur. That is, when the voltage of the first node n1 changes from the reference voltage V_ref to the data voltage V_data, the voltage of the second node n2 may change due to the coupling phenomenon. That is, the voltage of the source electrode, which is the second electrode of the driving transistor DT, can be changed.

[0075] The voltage of the source electrode of the driving transistor DT can be changed according to the change amount of the voltage of the gate electrode of the driving transistor DT. Specifically, since the voltage of the gate electrode of the driving transistor DT changes from the reference voltage V_ref to the data voltage V_data, the change amount of the voltage of the first node n1 can be (V_data - V_ref). In this case, the voltage of the source electrode of the driving transistor DT can change from (Vref - Vth) to (Vref - Vth) + C’(Vdata - Vref), where C’ = (C1 / (C1 + C2 + C_LED)), and C_LED can be the capacitance of the light-emitting element LED.

[0076] That is, the second capacitor C2 can be formed to be connected in series with the first capacitor C1, so that the capacitance ratio of the first capacitor C1 can be relatively reduced, and thus the brightness of the light-emitting element LED, which is related to the data voltage V_data applied to the first node n1, can be increased.

[0077] Figure 7 is a circuit diagram showing the driving of the fourth period t4 of a pixel according to an embodiment of the present disclosure. The fourth period t4 can be an on-state bias stress (OBS) period.

[0078] In the fourth period t4, the third scan signal SC3 can change from a high voltage state to a low voltage state. Accordingly, the fourth switching transistor ST4 can change from an on state to an off state. In addition, the first scan signal SC1 can change from a low voltage state to a high voltage state. Accordingly, the first switching transistor ST1 and the second switching transistor ST2 can change from an off state to an on state.

[0079] Since the first switching transistor ST1 and the second switching transistor ST2 are in an on state, the initialization voltage V_init applied to the first switching transistor ST1 can be applied to the second node n2, and the reset voltage V_reset applied to the second switching transistor ST2 can be applied to the third node n3. Accordingly, the second node n2 can be initialized again to the initialization voltage V_init.

[0080] Figure 8 is a circuit diagram showing the driving of the fifth period t5 of a pixel according to an embodiment of the present disclosure. The fifth period t5 can be an emission period.

[0081] In the fifth period t5, the first power control signal PC1 and the first scan signal SC1 can change from a high voltage state to a low voltage state. Accordingly, the first power control transistor ST7 and the first switching transistors ST1 and ST2 can change from an on state to an off state. Further, the first emission control signal EM1, the second emission control signal EM2, and the second power control signal PC2 can change from a low voltage state to a high voltage state. Accordingly, the first emission control transistor ST5, the second emission control transistor ST6, and the second power control transistor ST8 can change from an off state to an on state.

[0082] Since the first to fourth switching transistors ST1 to ST4 are in an off state, the drive current I of the drive transistor DT can flow to the light-emitting element LED. Accordingly, the light-emitting element LED can emit light.

[0083] Further, since the first power control transistor ST7 is in an off state and the second power control transistor ST8 is in an on state, the second capacitor C2 can be connected between the high-potential power supply voltage ELVDD and the second node n2. Since the magnitude of the high-potential power supply voltage ELVDD is equal to the magnitude of the auxiliary voltage V_sub, the first capacitor C1 connected to the second capacitor C2 at the second node n2 can be stably discharged. Accordingly, the light-emitting element LED can stably emit light.

[0084] According to the present disclosure, the following advantageous effects can be obtained.

[0085] According to the present disclosure, the capacitor and the high-potential power supply voltage can be connected to or blocked from each other, whereby the change in the brightness of the display device can be minimized.

[0086] It will be apparent to those skilled in the art that the present disclosure described above is not limited to the above-described embodiments and the accompanying drawings, and various substitutions, modifications, and changes can be made to the present disclosure without departing from the spirit or scope of the present disclosure. Accordingly, the scope of the present disclosure is defined by the appended claims, and all changes or modifications derived from the meaning, scope, and equivalent concepts of the claims fall within the scope of the present disclosure.

Claims

1. A display device comprising a plurality of pixels, each of the plurality of pixels comprising a light emitting element and a driving circuit for driving the light emitting element, in, The driving circuit comprises: a driving transistor having a gate electrode connected to the first node, a first electrode connected to the first emission control transistor, and a second electrode connected to the second node; a first capacitor having a first terminal connected to the first node and a second terminal connected to the second node; and A second capacitor having a first terminal connected to the second node and a second terminal connected to the first power control transistor and the second power control transistor.

2. The display device according to claim 1, wherein: A gate electrode of the first power control transistor is connected to a first power control signal, a first electrode of the first power control transistor is connected to the second capacitor, and a second electrode of the first power control transistor is connected to an auxiliary power supply voltage, and A gate electrode of the second power control transistor is connected to a second power control signal, a first electrode of the second power control transistor is connected to a high potential power supply voltage, and a second electrode of the second power control transistor is connected to the second capacitor.

3. The display device according to claim 2, wherein: The magnitude of the auxiliary power supply voltage and the magnitude of the high potential power supply voltage are the same as each other.

4. The display device according to claim 2, wherein: A gate electrode of the first emission control transistor is connected to a first emission control signal, a first electrode of the first emission control transistor is connected to the high potential power supply voltage, and a second electrode of the first emission control transistor is connected to the driving transistor.

5. The display device according to claim 4, wherein: The first emission control signal is driven by a pulse width modulation (PWM) method.

6. The display device according to claim 1, wherein: The drive circuit also includes a second emission control transistor having a gate electrode connected to a second emission control signal, a first electrode connected to the second node, and a second electrode connected to an anode of the light emitting element.

7. The display device according to claim 6, wherein: The driving circuit comprises: a first switching transistor that applies an initialization voltage to the second node; and A second switching transistor applies a reset voltage to the anode of the light emitting element.

8. A method for driving a display device, the display device comprising a display panel having a plurality of pixels arranged thereon, in, Each pixel of the plurality of pixels comprises: A first period is used to initialize the first capacitor and connect the second capacitor to the auxiliary voltage; The second period is used to sense the threshold voltage of the driving transistor; A third period is used to provide a data voltage to the gate electrode of the driving transistor; A fourth period is used to initialize the anode of the light emitting element; and The fifth time period is used to block the second capacitor from the auxiliary voltage, connect the second capacitor to a high-potential power supply voltage and allow the light-emitting element to emit light.

9. The driving method according to claim 8, wherein: In the first period, a first power control transistor is turned on to provide the auxiliary voltage to the second capacitor, a first electrode of the first power control transistor is connected to the second capacitor, and a second electrode of the first power control transistor is connected to the auxiliary voltage.

10. The driving method according to claim 8, wherein: In the fifth period, the second power control transistor is turned on to supply the high potential power supply voltage to the second capacitor, a first electrode of the second power control transistor is connected to the high potential power supply voltage, and a second electrode of the second power control transistor is connected to the second capacitor.

11. The driving method according to claim 8, wherein: The magnitude of the auxiliary voltage is equal to the magnitude of the high potential power supply voltage.

12. The driving method according to claim 8, wherein: In the second period, the first emission control transistor is turned on, a first electrode of the first emission control transistor is connected to the high potential power supply voltage, and a second electrode of the first emission control transistor is connected to the first electrode of the drive transistor.

13. The driving method according to claim 12, wherein: During the second period, the first emission control transistor is driven by a pulse width modulation (PWM) method.

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