Display panel, display device and signal line repairing method

Abstract

The invention relates to a display panel, a display device and a signal line repairing method. The display panel comprises a substrate; the first power line layer and the second power line layer are located on the substrate; the first power line layer is located between the second power line layer and the substrate, and the first power line layer and the second power line layer are arranged in an insulated and overlapped mode. The display panel comprises a short-circuit failure area and a non-short-circuit failure area, and the short-circuit failure area is provided with a first isolation groove and / or a second isolation groove; the first isolation groove insulates the first power line layer in the short-circuit failure area and the first power line layer in the non-short-circuit failure area. And the second isolation groove insulates the second power line layer in the short-circuit failure area and the non-short-circuit failure area. According to the display panel, the situation that signals of the whole power line are abnormal due to local short circuit can be solved, and the reliability and yield of the display panel are improved.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a display panel, a display device, and a signal line repair method. Background Art

[0002] For active drive display technology, it is necessary to design power lines across the entire surface of the display panel. The voltage of the power line plays a decisive role in many performance factors such as the brightness, uniformity, and power consumption of the product.

[0003] However, the entire surface of the current display panel is covered with positive power signal lines PVDD and negative power signal lines PVEE, and the positive power signal lines PVDD and negative power signal lines PVEE have a large overlapping area. The positive power signal lines PVDD and negative power signal lines PVEE are usually metal films such as TiAlTi and MoAlMo, and the two layers of film are isolated by thin films such as silicon nitride, silicon oxide, and a planarization layer. However, during the preparation and transportation of the product, it is affected by foreign objects and external forces, and the insulating layer is easily broken, causing the positive power signal lines PVDD and negative power signal lines PVEE to deform and conduct, thereby causing a short circuit problem. Once a short circuit occurs in a certain area, the signals provided by the entire positive power signal line PVDD and the negative power signal line PVEE will become abnormal, leading to serious consequences such as the product not lighting up or burning. Summary of the invention

[0004] In order to solve the above technical problems, the present application provides a display panel, a display device and a signal line repair method.

[0005] In a first aspect, the present application provides a display panel, comprising:

[0006] substrate;

[0007] A first power line layer and a second power line layer are located on the substrate; the first power line layer is located between the second power line layer and the substrate, and the first power line layer and the second power line layer are insulated and overlapped; the display panel includes a short-circuit failure area and a non-short-circuit failure area, and the short-circuit failure area is provided with a first isolation groove and / or a second isolation groove;

[0008] The first isolation groove insulates the short circuit failure area from the first power line layer of the non-short circuit failure area; the second isolation groove insulates the short circuit failure area from the second power line layer of the non-short circuit failure area.

[0009] In a second aspect, the present application provides a display device, comprising the display panel described in the first aspect.

[0010] In a third aspect, the present application provides a method for repairing a signal line of a display panel, comprising:

[0011] Determine the short - circuit failure area of the display panel;

[0012] Remove a part of the first power supply line layer in the short - circuit failure area to form a first isolation groove; and / or, remove a part of the second power supply line layer in the short - circuit failure area to form a second isolation groove;

[0013] Wherein, the first power supply line layer is located between the second power supply line layer and the substrate, and the first power supply line layer and the second power supply line layer are insulated and overlapped; the first isolation groove insulates the first power supply line layers in the short - circuit failure area and the non - short - circuit failure area; the second isolation groove insulates the second power supply line layers in the short - circuit failure area and the non - short - circuit failure area.

[0014] The technical solution provided by the embodiments of the present application has the following advantages compared with the prior art:

[0015] In the present application, by providing a first isolation groove and / or a second isolation groove in the short - circuit failure area of the display panel, the first isolation groove is used to insulate the first power supply line layers in the short - circuit failure area and the non - short - circuit failure area; the second isolation groove is used to insulate the second power supply line layers in the short - circuit failure area and the non - short - circuit failure area. Therefore, the power supply line layers in the short - circuit failure area and the non - short - circuit failure area can be effectively insulated, avoiding the situation that the power supply line signals of the whole surface are abnormal due to local short - circuit, thus greatly reducing the risks such as the product not lighting up and burning out, and improving the reliability and the yield rate of the display panel. The display device applying the present application will also have higher stability and better display performance. Brief Description of the Drawings

[0016] The drawings here are incorporated into the specification and form a part of this specification, showing the embodiments consistent with the present application, and are used together with the specification to explain the principles of the present application.

[0017] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the following will briefly introduce the drawings required for use in the description of the embodiments or the prior art. Obviously, for those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.

[0018] Figure 1 It is a partial top view of a first power supply line layer provided by an embodiment of the present application;

[0019] Figure 2 It is a partial top view of a second power supply line layer provided by an embodiment of the present application;

[0020] Figure 3 It is a partial top view after the first power supply line layer and the second power supply line layer are laminated;

[0021] Figure 4Schematic diagram of short circuit caused by foreign matter;

[0022] Figure 5 Cross-sectional view of a display panel provided by an embodiment of the present application when a short circuit occurs between the first power supply line layer and the second power supply line layer;

[0023] Figure 6 Cross-sectional view of a repaired display panel provided by an embodiment of the present application;

[0024] Figure 7 Another cross-sectional view of a repaired display panel provided by an embodiment of the present application;

[0025] Figure 8 Another cross-sectional view of a repaired display panel provided by an embodiment of the present application;

[0026] Figure 9 Another cross-sectional view of a repaired display panel provided by an embodiment of the present application;

[0027] Figure 10 Another cross-sectional view of a repaired display panel provided by an embodiment of the present application;

[0028] Figure 11 Another cross-sectional view of a display panel provided by an embodiment of the present application;

[0029] Figure 12 Another cross-sectional view of a display panel provided by an embodiment of the present application;

[0030] Figure 13 Partial top view schematic diagram of a display panel provided by an embodiment of the present application;

[0031] Figure 14 Along Figure 13 Cross-sectional view in the AA' direction in;

[0032] Figure 15 Another partial top view schematic diagram of a display panel provided by an embodiment of the present application;

[0033] Figure 16 Along Figure 15 Cross-sectional view in the BB' direction in;

[0034] Figure 17 Schematic diagram of the positional relationship between the isolation groove and the light-emitting element setting area provided by an embodiment of the present application;

[0035] Figure 18 Another partial top view of the second power supply line layer provided by an embodiment of the present application;

[0036] Figure 19 Along Figure 18 Cross-sectional view in the CC' direction in;

[0037] Figure 20 Another partial top view of the second power supply line layer provided by the embodiment of the present application;

[0038] Figure 21 Another partial top view of the first power supply line layer provided by the embodiment of the present application;

[0039] Figure 22 A schematic structural diagram of a pixel circuit provided by the embodiment of the present application;

[0040] Figure 23 A schematic structural diagram of a display device provided by the embodiment of the present application;

[0041] Figure 24 A schematic flow chart of a method for repairing signal lines of a display panel provided by the embodiment of the present application. Detailed implementation manners

[0042] In order to more clearly understand the above objects, features and advantages of the present application, the solutions of the present application will be further described below. It should be noted that, without conflict, the embodiments of the present application and the features in the embodiments may be combined with each other.

[0043] Many specific details are set forth in the following description in order to provide a thorough understanding of the present application, but the present application may be implemented in other ways different from those described herein; obviously, the embodiments in the specification are only some embodiments of the present application, rather than all embodiments.

[0044] Figure 1 A partial top view of the first power supply line layer provided by the embodiment of the present application. Figure 2 A partial top view of the second power supply line layer provided by the embodiment of the present application. Figure 3 A partial top view after the first power supply line layer and the second power supply line layer are laminated. As Figures 1 - 3 shown, the first power supply line layer 20 and the second power supply line layer 30 are laid out over the entire surface, and the overlapping area of the first power supply line layer 20 and the second power supply line layer 30 is large. During the processes of preparation, handling, etc., affected by foreign objects, external forces, etc., the insulating film layer between the first power supply line layer 20 and the second power supply line layer 30 is very likely to be broken, causing the first power supply line layer 20 and the second power supply line layer 30 to be deformed and conduct, thus leading to a short-circuit problem. Figure 4 A schematic diagram of a short circuit caused by a foreign object, Figure 4 The area within the dashed box in is the short-circuit position. Since the first power supply line layer 20 and the second power supply line layer 30 need to provide a positive power supply signal and a negative power supply signal for the pixel circuit of the display panel, if a short circuit occurs in a certain area, the signals provided by the entire first power supply line layer and the second power supply line layer will be abnormal, resulting in serious consequences such as the product not lighting up or being burned out.

[0045] In view of the above problems, an embodiment of the present application provides a display panel. Figure 5 The following is a cross-sectional view of a display panel provided by an embodiment of the present application when a short circuit occurs between a first power line layer and a second power line layer. As Figure 5 shown, the display panel provided by the embodiment of the present application includes a substrate 10, a first power line layer 20 and a second power line layer 30 located on the substrate 10.

[0046] Among them, the first power line layer 20 is located between the second power line layer 30 and the substrate 10, and the first power line layer 20 and the second power line layer 30 are arranged in an insulating and overlapping manner. For example, an insulating layer 40 can be provided between the first power line layer 20 and the second power line layer 30 to achieve electrical insulation between the first power line layer 20 and the second power line layer 30. It should be noted that the embodiment of the present application does not limit the number and type of insulating layers between the first power line layer 20 and the second power line layer 30.

[0047] There may also be other film layers between the substrate 10 and the first power line layer 20, such as a metal layer, an insulating layer, etc. Figure 5 In the figure, it is simplified exemplarily, and it is not limited that there is only one film layer between the substrate 10 and the first power line layer 20. In actual applications, the number and type of film layers between the substrate 10 and the first power line layer 20 can be set according to the requirements of the display panel.

[0048] As Figure 5 shown, due to the influence of foreign objects, external forces, etc., the insulating film layer between the first power line layer 20 and the second power line layer 30 is broken, causing the first power line layer 20 and the second power line layer 30 to be deformed and conduct, and the first power line layer 20 and the second power line layer 30 form a short circuit at the Figure 5 dotted box position in the figure.

[0049] To avoid problems such as product non-lighting and burning caused by abnormal signal supply due to the short circuit between the first power line layer and the second power line layer, the embodiment of the present application sets a first isolation groove and / or a second isolation groove in the short-circuit failure area. The present application sets a first isolation groove and / or a second isolation groove in the short-circuit failure area. The first isolation groove can insulate the first power line layer in the short-circuit failure area and the non-short-circuit failure area; the second isolation groove can insulate the second power line layer in the short-circuit failure area and the non-short-circuit failure area.

[0050] It should be noted that the first isolation groove insulates the first power supply line layer in the short - circuit failure area and the non - short - circuit failure area, including: the first isolation groove removes the first power supply line layer at the short - circuit position between the first power supply line layer in the short - circuit failure area and the second power supply line layer; or, surrounding the short - circuit position of the first power supply line layer and the second power supply line layer, disconnects the first power supply line layer in the short - circuit failure area and the non - short - circuit failure area. The second isolation groove insulates the second power supply line layer in the short - circuit failure area and the non - short - circuit failure area, including: the second isolation groove removes the second power supply line layer at the short - circuit position between the first power supply line layer in the short - circuit failure area and the second power supply line layer; or, surrounding the short - circuit position of the first power supply line layer and the second power supply line layer, disconnects the second power supply line layer in the short - circuit failure area and the non - short - circuit failure area.

[0051] Figure 6 It is a cross - sectional view of a repaired display panel provided by an embodiment of the present application. Figure 7 It is another cross - sectional view of a repaired display panel provided by an embodiment of the present application. As Figure 6 shown, the display panel includes a short - circuit failure area S1 and a non - short - circuit failure area S2. Figure 6 Exemplarily, a first isolation groove 41 is provided in the short - circuit failure area S1 of the display panel. The first isolation groove 41 insulates the first power supply line layer 20 in the short - circuit failure area S1 and the non - short - circuit failure area S2. Since the first power supply line layer 20 is provided on the entire surface, if there is a short - circuit between the first power supply line layer 20 and the second power supply line layer 30, the signals on the first power supply line layer 20 and the second power supply line layer 30 will be abnormal. Therefore, the present application provides the first isolation groove 41 to insulate the first power supply line layer 20 in the short - circuit failure area S1 and the non - short - circuit failure area S2. After the first isolation groove 41 is provided, since the first power supply line layer 20 in the non - short - circuit failure area S2 is no longer connected to the first power supply line layer 20 in the short - circuit failure area S1, the abnormal signal received by the first power supply line layer 20 in the short - circuit failure area S1 due to the short - circuit is no longer transmitted to the first power supply line layer 20 in the non - short - circuit failure area S2. Therefore, the first power supply line layer 20 in the non - short - circuit failure area S2 can still ensure normal power signals. Figure 6 Exemplarily, by removing the first power supply line layer at the short - circuit position between the first power supply line layer 20 and the second power supply line layer 30 through the first isolation groove 41, the first power supply line layer 20 in the non - short - circuit failure area S2 can provide normal signals.

[0052] As Figure 7 shown, the display panel includes a short - circuit failure area S1 and a non - short - circuit failure area S2. Figure 7A second isolation groove 42 is provided in the short - circuit failure area S1. The second isolation groove 42 insulates the second power supply line layer 30 in the short - circuit failure area S1 from the non - short - circuit failure area S2. Since the second power supply line layer 30 is provided over the entire surface, if there is a short circuit between the first power supply line layer 20 and the second power supply line layer 30, the signals on the first power supply line layer 20 and the second power supply line layer 30 will be abnormal. Therefore, in this application, the second isolation groove 42 is provided to insulate the second power supply line layer 30 in the short - circuit failure area S1 from the non - short - circuit failure area S2. After the second isolation groove 42 is provided, since the second power supply line layer 30 in the non - short - circuit failure area S2 is no longer connected to the second power supply line layer 30 in the short - circuit failure area S1 ( Figure 7 Exemplarily, the second power supply line layer at the short - circuit position between the first power supply line layer 20 and the second power supply line layer 30 is removed through the second isolation groove 42), the abnormal signal received by the second power supply line layer 30 in the short - circuit failure area S1 due to the short circuit is no longer transmitted to the second power supply line layer 30 in the non - short - circuit failure area S2. Therefore, the second power supply line layer 30 in the non - short - circuit failure area S2 can still ensure normal power supply signals.

[0053] It should be noted that the short - circuit failure area refers to the area within which normal power supply signals cannot be provided for the display panel due to a short circuit between the first power supply line layer and the second power supply line layer, and the non - short - circuit failure area refers to the area that can provide normal power supply signals for the display panel.

[0054] In some embodiments, in a direction perpendicular to the plane of the display panel, the first isolation groove penetrates at least the first power supply line layer; in a direction perpendicular to the plane of the display panel, the second isolation groove penetrates at least the second power supply line layer.

[0055] In this application, to ensure that the first power supply line layers in the short - circuit failure area and the non - short - circuit failure area can be electrically disconnected, in a direction perpendicular to the plane of the display panel, the first isolation groove is provided to penetrate at least the first power supply line layer. By removing the first power supply line layer in a partial area of the short - circuit failure area through the first isolation groove, the first power supply line layers in the short - circuit failure area and the non - short - circuit failure area can be electrically disconnected, for example, as Figure 8 shown. To ensure that the second power supply line layers in the short - circuit failure area and the non - short - circuit failure area can be electrically disconnected, in a direction perpendicular to the plane of the display panel, the second isolation groove is provided to penetrate at least the second power supply line layer. By removing the second power supply line layer in a partial area of the short - circuit failure area through the second isolation groove, the second power supply line layers in the short - circuit failure area and the non - short - circuit failure area can be electrically disconnected, for example, as Figure 7 shown.

[0056] In some embodiments, in a direction perpendicular to the substrate, the first isolation groove extends to at least part of the insulating layer between the first power supply line layer and the second power supply line layer.

[0057] And / or, in a direction perpendicular to the substrate, the second isolation groove extends to an insulating layer between at least a part of the first power supply line layer and the second power supply line layer.

[0058] As Figure 9 shown, an insulating layer 40 is provided between the first power supply line layer and the second power supply line layer, thereby achieving electrical insulation between the first power supply line layer 20 and the second power supply line layer 30. In the process of forming the first isolation groove 41, in order to avoid failure to remove the thickness of the first power supply line layer 20 to be etched due to process errors or other reasons, a certain degree of over-etching can be performed when removing the first power supply line layer 20, that is, in a direction perpendicular to the substrate 10, the first isolation groove 41 extends to an insulating layer 40 between at least a part of the first power supply line layer 20 and the second power supply line layer 30, so that in a direction perpendicular to the substrate 10, the first power supply line layer 20 to be etched in the short-circuit failure area S1 can be completely removed, and further the first power supply line layers 20 in the short-circuit failure area S1 and the non-short-circuit failure area S2 can be disconnected from the electrical connection. Exemplarily, as Figure 9 shown, after etching the first power supply line layer 20, the insulating layer 40 with a thickness of A is further etched.

[0059] Correspondingly, if a second isolation groove 42 is provided in the short-circuit failure area, in order to avoid failure to remove the thickness of the second power supply line layer 30 to be etched due to process errors or other reasons, a certain degree of over-etching can be performed when removing the second power supply line layer 30, that is, in a direction perpendicular to the substrate 10, the second isolation groove 42 extends to an insulating layer 40 between at least a part of the first power supply line layer 20 and the second power supply line layer 30, so that in a direction perpendicular to the substrate 10, the second power supply line layer 30 to be etched in the short-circuit failure area S1 can be completely removed, and further the second power supply line layers 30 in the short-circuit failure area S1 and the non-short-circuit failure area S2 can be disconnected from the electrical connection. Exemplarily, as Figure 10 shown, after etching the second power supply line layer 30, the insulating layer 40 with a thickness of B is further etched.

[0060] In some embodiments, a first isolation groove is provided in the short-circuit failure area, and an insulating layer is provided between the first isolation groove and the second power supply line layer; or, a second isolation groove is provided in the short-circuit failure area, and an insulating layer is provided between the first isolation groove and the first power supply line layer.

[0061] As Figure 9As shown, when the first isolation groove 41 is provided in the short-circuit failure area S1 in the embodiment of the present application, the insulating layer 40 below the second power supply line layer 30 is not completely removed, that is, a part of the thickness of the insulating layer 40 is reserved between the first isolation groove 41 and the second power supply line layer 30. On the basis of insulating the first power supply line layer 20 in the short-circuit failure area S1 and the non-short-circuit failure area S2 through the first isolation groove 41, the insulating layer 40 with a part of the thickness can also be used to protect the second power supply line layer 30.

[0062] As Figure 10 shown, when the second isolation groove 42 is provided in the short-circuit failure area S1 in the embodiment of the present application, the insulating layer 40 above the first power supply line layer 20 is not completely removed, that is, a part of the thickness of the insulating layer 40 is reserved between the second isolation groove 42 and the first power supply line layer 20. On the basis of insulating the second power supply line layer 30 in the short-circuit failure area S1 and the non-short-circuit failure area S2 through the second isolation groove 42, the insulating layer 40 with a part of the thickness can also be used to protect the first power supply line layer 20.

[0063] In some embodiments, in the direction perpendicular to the substrate, the metal layer between the first power supply line layer and the substrate does not overlap with the first isolation groove and / or the second isolation groove.

[0064] In the direction perpendicular to the substrate, a plurality of film layers are provided between the first power supply line layer and the substrate, such as metal layers of transistors, capacitor metal layers, insulating layers between metal layers, and the like.

[0065] When preparing and forming the first isolation groove and / or the second isolation groove, if the metal layer between the first power supply line layer and the substrate overlaps with the isolation groove (including the first isolation groove and / or the second isolation groove), the metal layer between the first power supply line layer and the substrate may be damaged during the preparation process. Therefore, in the embodiment of the present application, the metal layer between the first power supply line layer and the substrate is set not to overlap with the first isolation groove and / or the second isolation groove.

[0066] Figure 11 This is a cross-sectional view of another display panel provided by the embodiment of the present application. As Figure 11 shown, the metal layer between the first power supply line layer 20 and the substrate 10 may include, for example, a metal layer M0, a metal layer M1, a metal layer M2, and a metal layer MC. Among them, the metal layer M0 may include, for example, a light-shielding layer to prevent light from causing a photo-degradation effect on the active layer poly of the transistor. The metal layer M1 may include, for example, the gate of the transistor, the metal layer MC may include the plate layer of the capacitor, and the metal layer M2 may include the source and drain electrodes of the transistor.

[0067] The embodiments of the present application do not limit the process for forming the first isolation groove and the second isolation groove. Taking laser etching as an example, if irradiated on the side of the second power line layer away from the substrate (for simplicity of description, the present application refers to it as irradiating from the front of the display panel, that is, in the direction of arrow X1 in the figure), if there is an overlap between the metal layer between the first power line layer 20 and the substrate 10 and the second isolation groove 42, then when preparing to form the second isolation groove 42, the heat in the laser etching may damage the metal (the metal layer between the first power line layer 20 and the substrate 10) that overlaps with the second isolation groove 42. Therefore, the embodiments of the present application are configured such that the metal layer between the first power line layer and the substrate does not overlap with the second isolation groove 42.

[0068] Figure 12 is a cross-sectional view of another display panel provided by an embodiment of the present application. As Figure 12 shown, the metal layer between the first power line layer 20 and the substrate 10 may include, for example, a metal layer M0, a metal layer M1, a metal layer M2, and a metal layer MC. Among them, the metal layer M0 may include, for example, a light-shielding layer to prevent light from causing a photo-degradation effect on the active layer poly of the transistor. The metal layer M1 may include, for example, the gate of the transistor, the metal layer MC may include the plate layer of the capacitor, and the metal layer M2 may include the source and drain electrodes of the transistor.

[0069] If irradiated on the side of the substrate away from the first power line layer (for simplicity of description, the present application refers to it as irradiating from the back of the display panel, that is, in the direction of arrow X2 in the figure), if there is an overlap between the metal layer between the first power line layer 20 and the substrate 10 and the first isolation groove 41, then when preparing to form the first isolation groove 41, after the laser penetrates the stacked metal and then etches the first power line layer 20 and the second power line layer 30, it is easier to damage the metal layer between the first power line layer 20 and the substrate 10. Therefore, the embodiments of the present application are configured such that the metal layer between the first power line layer and the substrate does not overlap with the first isolation groove 41.

[0070] In some embodiments, the second power line layer is bonded to the light-emitting element through a bonding layer.

[0071] For example, taking Figure 11 and Figure 12 as an example, the display panel further includes a light-emitting element 50, and the light-emitting element 50 includes an anode 51 and a cathode 52. The second power line layer can be used as a connection structure in the display panel to connect to the light-emitting element 50. The second power line layer 30 is bonded to the anode 51 and the cathode 52 of the light-emitting element 50 through a bonding layer 60. The second power line layer 30 is the metal layer closest to the light-emitting element except for the bonding layer in the display panel. Therefore, when preparing to form the first isolation groove 41 and / or the second isolation groove 42 by laser etching, it is more convenient to irradiate from the front of the display panel, avoiding the laser from penetrating other metal film layers during irradiation. Figure 11 andFigure 12 A portion of the second power supply line layer 30 bonded and connected to the anode 51 of the light-emitting element 50 is marked as 31, and a portion of the second power supply line layer 30 bonded and connected to the cathode 52 of the light-emitting element 50 is marked as 32.

[0072] In some embodiments, in a direction perpendicular to the plane of the display panel, the first isolation groove and the second isolation groove communicate with each other.

[0073] In the embodiments of the present application, the first isolation groove and the second isolation groove can also be set to communicate with each other, that is, the first isolation groove and the second isolation groove are set at the same time, and in a direction perpendicular to the plane of the display panel, the first isolation groove and the second isolation groove at least partially overlap. In the embodiments of the present application, to further ensure avoiding the problem of abnormal power signals caused by short circuits between the first power supply line layer and the second power supply line layer, the first isolation groove and the second isolation groove are set at the same time and the first isolation groove and the second isolation groove are communicated with each other, so as to insulate the first power supply line layer in the short-circuit failure area and the non-short-circuit failure area and insulate the second power supply line layer at the same position.

[0074] It should be noted that in the embodiments of the present application, the morphology, width, overlapping position, etc. of the first isolation groove and the second isolation groove are not limited.

[0075] In some embodiments, the first isolation groove and / or the second isolation groove are / is located at the short-circuit point of the short-circuit failure area.

[0076] In the embodiments of the present application, the display panel can be repaired at the short-circuit point of the short-circuit failure area. The short-circuit point of the short-circuit failure area refers to the position where the first power supply line layer and the second power supply line layer are short-circuited. The short-circuit point can be, for example Figure 5 the position shown by the dotted box. Figures 6 - 10 All are repaired at the short-circuit point of the short-circuit failure area. For example Figure 6 The first isolation groove 41 is located at the short-circuit point of the short-circuit failure area S1. For example Figure 7 The second isolation groove 42 is located at the short-circuit point of the short-circuit failure area S1. By directly repairing at the short-circuit point, the formed short-circuit failure area is small, and the area of bad points in the display panel can be reduced.

[0077] In some embodiments, the vertical projection of the short-circuit point on the substrate is located within the vertical projection of the first isolation groove on the substrate; and / or, the vertical projection of the short-circuit point on the substrate is located within the vertical projection of the second isolation groove on the substrate.

[0078] If the display panel is repaired through the first isolation groove at the short-circuit point, then in the embodiments of the present application, by setting the vertical projection of the short-circuit point on the substrate to be located within the vertical projection of the first isolation groove on the substrate, the first isolation groove can at least cover the short-circuit point, so as to completely insulate the first power supply line layer in the short-circuit failure area and the non-short-circuit failure area.

[0079] If the display panel is repaired through the second isolation groove at the short - circuit point, in the embodiments of the present application, the vertical projection of the short - circuit point on the substrate is located within the vertical projection of the second isolation groove on the substrate, so that the second isolation groove can at least cover the short - circuit point, thereby completely insulating the second power line layers in the short - circuit failure area and the non - short - circuit failure area.

[0080] In some embodiments, the area of the short - circuit point is less than or equal to the laser etching spot area of the first isolation groove and the second isolation groove.

[0081] If the first isolation groove and / or the second isolation groove are formed by laser etching, when the area of the short - circuit point is less than the laser etching spot area, the first isolation groove and / or the second isolation groove are formed at the position of the short - circuit point by laser etching. Since the area of the short - circuit point is less than the laser etching spot area, when using laser etching, the first isolation groove and / or the second isolation groove can be conveniently and directly formed at the position of the short - circuit point.

[0082] In some embodiments, the first isolation groove and / or the second isolation groove are arranged in a ring shape in the short - circuit failure area.

[0083] In the embodiments of the present application, the first isolation groove and / or the second isolation groove can also be arranged in a ring shape in the short - circuit failure area. For example, in the position where the first power line layer and the second power line layer are short - circuited, the damage is relatively deep, or the short - circuit area is relatively large. If laser etching is directly performed at the short - circuit position, due to the uneven thickness and blurred boundary of the short - circuited metal film layer at the short - circuit position, when continuously irradiating the short - circuit position with a laser spot, it may cause the metal at this position to be welded together, and due to the different thicknesses of the short - circuited metal at different positions, the short - circuited metal in some areas cannot be etched completely. Therefore, in order to avoid the above problems caused by laser irradiation and other repair operations at the short - circuit position, in the embodiments of the present application, by setting the first isolation groove and / or the second isolation groove in a ring shape in the short - circuit failure area, the first power line layer in the short - circuit failure area and the non - short - circuit failure area is insulated by using the structure of the first isolation groove in a ring shape, and the second power line layer in the short - circuit failure area and the non - short - circuit failure area is insulated by using the structure of the second isolation groove in a ring shape.

[0084] In some embodiments, the short - circuit failure area includes a short - circuit point, and the first isolation groove and / or the second isolation groove surround the short - circuit point.

[0085] In the embodiments of the present application, isolation repair is selected around the short - circuit point. The short - circuit point refers to the position where the first power line layer and the second power line layer are short - circuited. In the embodiments of the present application, the first isolation groove and / or the second isolation groove are arranged around the short - circuit point to form a short - circuit failure area.

[0086] Figure 13 This is a partial top - view schematic diagram of a display panel provided by the embodiments of the present application. Figure 14Is a sectional view along the Figure 13 in the AA' direction in Figure 13 . Combining Figure 13 and Figure 14 as shown, D1 is a short - circuit point. In the embodiment of the present application, an annular second isolation groove 42 is arranged around the short - circuit point D1. When the area and depth of the short - circuit point are large, it is possible that the first power supply line layer, the second power supply line layer and other metal layers of the display panel are also connected at the short - circuit point. If the short - circuit point is repaired, for example, by laser etching, due to the transmission of laser energy in the metal layer, it may cause the metal layers at the short - circuit point to melt together, resulting in further damage to the display panel. Therefore, the present application can isolate around the short - circuit point, set the second isolation groove, disconnect the second power supply line layer in the short - circuit failure area and the non - short - circuit failure area, instead of directly repairing the short - circuit point. The second power supply line layer around the short - circuit point is a metal layer with a normal thickness. Therefore, for example, when using laser etching, it is relatively easy to control the laser etching process and form the second isolation groove according to the set etching depth. It should be noted that the set second isolation groove only needs to form a closed - loop structure, and the shape is not limited.

[0087] Figure 15 Is another partial top - view schematic diagram of the display panel provided by the embodiment of the present application, Figure 16 Is a sectional view along the Figure 15 in the BB' direction in Figure 15 . Combining Figure 15 and Figure 16 as shown, D1 is a short - circuit point. In the embodiment of the present application, an annular first isolation groove 41 is arranged around the short - circuit point D1. The first isolation groove 41 surrounds the short - circuit positions of the first power supply line layer and the second power supply line layer, disconnecting the first power supply line layer in the short - circuit failure area and the non - short - circuit failure area. For example, if the short - circuit point is repaired by laser etching, due to the transmission of laser energy in the metal layer, it may cause the metal layers at the short - circuit point to melt together, resulting in further damage to the display panel. Therefore, the present application can isolate around the short - circuit point through the first isolation groove 41, disconnect the first power supply line layer in the short - circuit failure area and the non - short - circuit failure area, instead of directly repairing the short - circuit point. The first power supply line layer around the short - circuit point is a metal layer with a normal thickness. Therefore, for example, when using laser etching, it is relatively easy to control the laser etching process and form the first isolation groove according to the set etching depth. It should be noted that the set first isolation groove only needs to form a closed - loop structure, and the shape is not limited.

[0088] In some embodiments, the maximum width of the short - circuit point is greater than the width of the first isolation groove and / or the second isolation groove.

[0089] When forming the first isolation groove and / or the second isolation groove by laser etching, if the maximum width of the short-circuit point is greater than the width of the first isolation groove and / or the second isolation groove, that is, if the area of the short-circuit point in the display panel may be greater than the area of the laser etching spot, it indicates that the area of the short-circuit point is relatively large, and a single laser spot irradiation cannot repair all the short-circuit point positions. Multiple irradiations of the laser spot at the short-circuit position may cause the metals at each layer at this position to be welded together, resulting in damage to the display panel. In addition, if laser etching is performed at the short-circuit point, the thickness of the short-circuited metals at different positions in a relatively large short-circuit area is different, so it is difficult to control the process parameters of laser etching. The edge of the short-circuit point is irregular, and it is not easy to control the complete etching of the edge position by in-situ etching at the short-circuit point. In view of the above situation, a circular first isolation groove can be provided around the short-circuit point to insulate the first power supply line layer in the short-circuit failure area and the non-short-circuit failure area; and / or a circular second isolation groove can be provided around the short-circuit point to insulate the second power supply line layer in the short-circuit failure area and the non-short-circuit failure area.

[0090] In some embodiments, in the plane direction parallel to the substrate, the distance between the first isolation groove and the short-circuit point is greater than 30 μm; and / or the distance between the second isolation groove and the short-circuit point is greater than 30 μm.

[0091] Since the edge contour of the short-circuit point is irregular, in order to avoid etching the edge position of the short-circuit point when setting the first isolation groove and / or the second isolation groove around the short-circuit point, in the embodiments of the present application, the first isolation groove and / or the second isolation groove are set in an area within a certain distance range from the short-circuit point. In the embodiments of the present application, in the plane direction parallel to the substrate, the distance between the first isolation groove and the short-circuit point is greater than 30 μm; and / or the distance between the second isolation groove and the short-circuit point is greater than 30 μm, so as to avoid the situation that the first power supply line layer or the second power supply line layer in the short-circuit failure area and the non-short-circuit failure area is not completely disconnected due to the repair position being too close to the short-circuit point and causing etching of the edge position of the short-circuit point.

[0092] In some embodiments, in the plane direction parallel to the substrate, the ratio of the distance between the first isolation groove and / or the second isolation groove and the short-circuit point to the size of the light-emitting element setting area in the first direction is less than 1.

[0093] Wherein, the distance between the first isolation groove and / or the second isolation groove and the short-circuit point is parallel to the first direction.

[0094] The embodiments of the present application can be applied to Micro LED display panels, etc. Figure 17 FIG. is a schematic diagram of the positional relationship between the isolation groove provided by the embodiments of the present application and the light-emitting element setting area, as Figure 17 shown, E1 is the light-emitting element setting area. When the light-emitting element setting area E1 is for array-transferring light-emitting elements, it is the area where the light-emitting elements are bonded and set.Figure 17 Exemplarily, a first isolation groove 41 is provided, and the distance between the first isolation groove 41 and the short - circuit point D1 in the first direction is L1. Figure 17 In the figure, the first direction is the direction of the double - arrow. The ratio of the distance L1 between the first isolation groove 41 and the short - circuit point D1 to the size of the light - emitting element setting area E1 in the first direction is less than 1, indicating that the distance L1 between the first isolation groove 41 and the short - circuit point D1 in the first direction is less than the size of one light - emitting element in the first direction. Such a setting can avoid the problem that the area of the dark spots generated by repair is too large due to the excessive distance L1 between the first isolation groove 41 and the short - circuit point D1.

[0095] Figure 17 Exemplarily, the case where the ratio of the distance between the first isolation groove and the short - circuit point to the size of the light - emitting element setting area in the first direction is less than 1 is introduced. The situation where the ratio of the distance between the second isolation groove and the short - circuit point to the size of the light - emitting element setting area in the first direction is less than 1 is similar, and this application will not elaborate here.

[0096] In some embodiments, the ratio of the area of the short - circuit failure area to the area of the light - emitting element setting area is less than 3.

[0097] In the embodiments of this application, a short - circuit occurs between the first power - supply layer and the second power - supply layer, and a short - circuit failure area is generated by setting the first isolation groove and / or the second isolation groove. The short - circuit failure area is an area that cannot provide a normal power - supply signal for the display panel, so dark spots may be generated. Based on this, in the embodiments of this application, the ratio of the area of the short - circuit failure area to the area of the light - emitting element setting area is less than 3, that is, the area of the short - circuit failure area is less than the area of three light - emitting element setting areas, avoiding the large - area dark spots caused by the too - large area of the short - circuit failure area from affecting the display effect of the display panel.

[0098] In some embodiments, the distance between the first isolation groove and / or the second isolation groove and the nearest light - emitting element setting area is greater than 20 μm.

[0099] In the embodiments of this application, when setting the first isolation groove and / or the second isolation groove, the distance between the first isolation groove and / or the second isolation groove and the nearest light - emitting element setting area is greater than 20 μm.

[0100] If the display panel is repaired before transferring the light - emitting elements in the array, in the embodiments of this application, the distance between the first isolation groove and / or the second isolation groove and the nearest light - emitting element setting area is greater than 20 μm, avoiding damaging the circuit layer of the light - emitting element setting area due to the first isolation groove and / or the second isolation groove being too close to the light - emitting element setting area.

[0101] If the display panel is repaired after the array transfer of the light-emitting elements, in the embodiments of the present application, the distance between the first isolation groove and / or the second isolation groove and the nearest light-emitting element setting area is greater than 20 μm, which can also avoid damage to the already bonded light-emitting elements due to the too-close setting of the first isolation groove and / or the second isolation groove and the light-emitting element setting area.

[0102] In some embodiments, the second power supply line layer includes an electrically insulated first electrode portion and a second electrode portion; in the light-emitting element setting area, the first electrode portion is used for electrically connecting with the anode of the light-emitting element, and the second electrode portion is used for electrically connecting with the cathode of the light-emitting element;

[0103] In the direction perpendicular to the substrate, the second isolation groove does not overlap with the first electrode portion and / or the second electrode portion of the light-emitting element setting area.

[0104] Figure 18 This is a partial top view of another second power supply line layer provided by the embodiments of the present application. Figure 19 Along Figure 18 The cross-sectional view of CC'. As Figure 18 And Figure 19 As shown, the second power supply line layer 30 includes an electrically insulated first electrode portion 31 and a second electrode portion 32. Among them, in the light-emitting element setting area E1, the first electrode portion 31 is used for electrically connecting with the anode 51 of the light-emitting element 50, and the second electrode portion 32 is used for electrically connecting with the cathode 52 of the light-emitting element 50. The first electrode portion 31 and the second electrode portion 32 are mutually insulated in the second power supply line layer 30.

[0105] As Figure 19 Shown, the second power supply line layer 30 is located on the side of the pixel circuit 70 away from the substrate 10, and the second power supply line layer 30 includes a first electrode portion 31 and a second electrode portion 32. Among them, the first electrode portion 31 and the second electrode portion 32 are insulated. Although the light-emitting element 50 is electrically connected to both the first electrode portion 31 and the second electrode portion 32, the first electrode portion 31 and the second electrode portion 32 provide different electrical signals for the light-emitting element 50. Among them, the light-emitting element 50 realizes electrical connection with the pixel circuit 70 through the first electrode portion 31. The light-emitting element 50 includes an anode 51 and a cathode 52. The anode 51 can be bonded to the bonding layer 60 on the first electrode portion 31 by means of laser irradiation, etc., and the cathode 52 can be bonded to the bonding layer 60 on the second electrode portion 32 to ensure the driving of the light-emitting element 50, thereby realizing the display and light emission of the display panel.

[0106] As Figure 18As shown, the first electrode portion 31 and the second electrode portion 32 of the second power supply line layer 30 need to receive corresponding electrical signals, so they cannot be disconnected by isolation grooves (including the first isolation groove and / or the second isolation groove). Therefore, in the embodiment of the present application, to ensure that the light-emitting element can obtain corresponding electrical signals through the first electrode portion 31 and the second electrode portion 32, a second isolation groove 42 is provided in a direction perpendicular to the substrate 10 and does not overlap with the first electrode portion 31 and / or the second electrode portion 32 of the light-emitting element setting area E1.

[0107] Figure 18 Exemplarily, a redundant repair area E2 is also provided. If the light-emitting elements in the light-emitting element setting area E1 fail, the light-emitting elements in the light-emitting element setting area E1 can be removed by laser, and light-emitting elements can be reset in the redundant repair area E2. It should be noted that in other embodiments, the redundant repair area E2 may not be provided, and the embodiments of the present invention do not limit this.

[0108] Figure 18 This is a partial structure of the second power supply line layer provided by the embodiment of the present application. In other embodiments, the second power supply line layer may also have other layout forms, for example Figure 20 as shown. Figure 20 In the figure, the second power supply line layer 30 is located on the side of the pixel circuit 70 away from the substrate 10, and the second power supply line layer 30 includes a first electrode portion 31 and a second electrode portion 32. In a direction perpendicular to the substrate 10, the second isolation groove 42 does not overlap with the first electrode portion 31 and / or the second electrode portion 32 of the light-emitting element setting area E1. The embodiment of the present application does not limit the specific structural layout of the second power supply line layer. Figure 18 and Figure 20 These are only two specific implementation manners provided by the embodiment of the present application.

[0109] In some embodiments, the second power supply line layer includes an electrically insulated first electrode portion and a second electrode portion; in the light-emitting element setting area, the first electrode portion is used to be electrically connected to the anode of the light-emitting element, and the second electrode portion is used to be electrically connected to the cathode of the light-emitting element. In a direction perpendicular to the substrate, the first isolation groove overlaps with the first electrode and / or the second electrode portion of the light-emitting element setting area.

[0110] For the setting of the second power supply line layer, reference can be made to, for example Figure 18 the structure shown. To avoid setting the first isolation groove on the second power supply line layer to overlap with the first electrode portion and / or the second electrode portion of the light-emitting element setting area, resulting in the light-emitting element being unable to obtain corresponding electrical signals through the first electrode portion and the second electrode portion, in the embodiment of the present application, in a direction perpendicular to the substrate, the first isolation groove can be set to overlap with the first electrode portion and / or the second electrode portion of the light-emitting element setting area. For example Figure 21 as shown, the first power supply line layer 20 is provided with a first isolation groove 41, and the first isolation groove 41 can be andFigure 18 overlaps with the first electrode portion 31 and / or the second electrode portion 32 of the second power supply line layer 30 in [[ ]]. Since the first power supply line layer wirelessly prepares the first electrode portion and / or the second electrode portion, and an insulating layer is provided between the first power supply line layer and the second power supply line layer for insulation, when the first isolation groove is provided in the first power supply line layer, its setting position can overlap with the first electrode portion and / or the second electrode portion of the second power supply line layer.

[0111] In some embodiments, the first power supply line layer is provided with a plurality of first exhaust holes; the first isolation groove communicates with at least part of the first exhaust holes;

[0112] and / or, the second power supply line layer is provided with a plurality of second exhaust holes; the second isolation groove communicates with at least part of the second exhaust holes.

[0113] During the manufacturing process of the display panel, the display panel needs to go through multiple film-forming processes. During the preparation process of the organic layer, water vapor will be sealed. The first power supply line layer and the second power supply line layer will hinder the gas release process, making it more difficult for the gas to be released, resulting in the display panel being prone to bulging, which affects the manufacturing yield and use reliability of the display panel. Based on the above problems, in the embodiments of the present application, a plurality of first exhaust holes are provided in the first power supply line layer, and / or a plurality of second exhaust holes are provided in the second power supply line layer. As Figure 21 shown, the first power supply line layer 20 includes a plurality of first exhaust holes 21, as Figure 18 , Figure 20 shown, the second power supply line layer 30 includes a plurality of second exhaust holes 33.

[0114] When the first isolation groove is provided in the first power supply line layer 20, to save etching time, for example, as Figure 21 described, the first isolation groove 41 can be set to communicate with at least part of the first exhaust holes 21. Such a setting can form the first isolation groove 41 by etching only the first power supply line layer 20 between part of the first exhaust holes 21. Similarly, when the second isolation groove 42 is provided in the second power supply line layer 30, to save etching time, for example, as Figure 18 and Figure 20 described, the second isolation groove 42 can be set to communicate with at least part of the second exhaust holes 33. Such a setting can form the second isolation groove 42 by etching only the second power supply line layer 30 between part of the second exhaust holes 33.

[0115] In some embodiments, the display panel further includes a plurality of pixel circuits, and the pixel circuits include an amplitude modulation module and a pulse width modulation module; the first power supply line layer includes a first power supply line for providing a first power supply voltage to the amplitude modulation module.

[0116] To meet the requirements of a high-resolution display panel, such as a pixel circuit that combines Pulse Amplitude Modulation (PAM) and Pulse Width Modulation (PWM) for a Micro LED display panel, the driving current intensity and the duration of the driving current are controlled to control the light-emitting state of the light-emitting element.

[0117] Figure 22 The following is a schematic structural diagram of a pixel circuit provided by an embodiment of the present application, as Figure 22 shown. The pixel circuit 70 includes an amplitude modulation module 71 and a pulse width modulation module 72. The amplitude modulation module 71 and the pulse width modulation module 72 are connected, and the pixel circuit 70 generates a driving current under the control of the amplitude modulation module 71 and the pulse width modulation module 72. The amplitude modulation module 71 can be used to control the amplitude of the driving current, and the pulse width modulation module 72 can be used to adjust the pulse width of the voltage applied to the anode of the light-emitting element 50.

[0118] The amplitude modulation module 71 includes an amplitude driving sub-module 111 and an amplitude reset sub-module 112. The amplitude reset sub-module 112 is connected to the control end of the amplitude driving sub-module 111, and the amplitude reset sub-module 112 is used to transmit a first reset signal PAM_REF to the control end of the amplitude driving sub-module 111. The first reset signal PAM_REF can be used to reset the potential of the control end of the amplitude driving sub-module 111. The amplitude modulation module 71 includes an amplitude data writing sub-module 113, and the amplitude data writing sub-module 113 is used to transmit a first data signal PAM_DATA to the amplitude driving sub-module 111. Exemplarily, the amplitude data writing sub-module 113 is connected to the first end of the amplitude driving sub-module 111, and the first data signal PAM_DATA can be transmitted to the first end of the amplitude driving sub-module 111 through the amplitude data writing sub-module 113, and then transmitted to the control end of the amplitude driving sub-module 111. The amplitude modulation module 71 can control the amplitude of the driving current based on the voltage value of the first data signal PAM_DATA, and the pulse width modulation module 72 can adjust the pulse width of the voltage applied to the anode of the light-emitting element 50 based on the voltage value of the second data signal PWM_DATA. The amplitude modulation module 71 further includes an anode reset sub-module 114, and the anode reset sub-module 114 is connected to the anode of the light-emitting element 50. The anode reset sub-module 114 is used to transmit a third reset signal VREF to the anode of the light-emitting element 50.

[0119] The pulse width modulation module 72 includes a pulse width driving sub-module 121 and a pulse width resetting sub-module 122. The pulse width resetting sub-module 122 is connected to the control terminal of the pulse width driving sub-module 121. The pulse width resetting sub-module 122 is used to transmit a second reset signal PWM_REF to the control terminal of the pulse width driving sub-module 121. The second reset signal PWM_REF can be used to reset the potential of the control terminal of the pulse width driving sub-module 121. The pulse width modulation module 72 includes a pulse width data writing sub-module 123. The pulse width data writing sub-module 123 is used to transmit a second data signal PWM_DATA to the pulse width driving sub-module 121. Exemplarily, the pulse width data writing sub-module 123 is connected to the first end of the pulse width driving sub-module 121. The second data signal PWM_DATA can be transmitted to the first end of the pulse width driving sub-module 121 through the pulse width data writing sub-module 123, and then transmitted to the control terminal of the pulse width driving sub-module 121.

[0120] The control terminal of the amplitude resetting sub-module 112 is connected to the scan line PAM_S1. The control terminal of the amplitude data writing sub-module 113 is connected to the scan line PAM_S2. The control terminal of the pulse width resetting sub-module 122 is connected to the scan line PWM_S1. The control terminal of the pulse width data writing sub-module 123 is connected to the scan line PWM_S2.

[0121] Within one frame time, the scan lines PAM_S1, PAM_S2, PWM_S1, and PWM_S2 can sequentially provide conduction levels in a certain order.

[0122] The amplitude modulation module 71 may further include a first compensation sub-module 115. The first compensation sub-module 115 is connected between the control terminal and the second end of the amplitude driving sub-module 111. The first compensation sub-module 115 is used to compensate for the threshold voltage of the amplitude driving sub-module 111. The control terminal of the first compensation sub-module 115 can be connected to the scan line PAM_S2.

[0123] The amplitude modulation module 71 may further include a first light emitting control module 116. One of the first light emitting control modules 116 can be connected between the first power supply line PVDD1 and the first end of the amplitude driving sub-module 111. The other first light emitting control module 116 can be connected between the second end of the amplitude driving sub-module 111 and the light emitting element 50. The control terminal of the first light emitting control module 116 can be connected to the first light emitting control signal line PAM_EM.

[0124] The amplitude modulation module 71 may further include a first capacitor C1. The first end of the first capacitor C1 is connected to the first power supply line PVDD1. The second end of the first capacitor C1 is connected to the control terminal of the amplitude driving sub-module 111.

[0125] The pulse width modulation module 72 may further include a second compensation sub-module 125. The second compensation sub-module 125 is connected between the control end and the second end of the pulse width driving sub-module 121. The second compensation sub-module 125 is used to compensate the threshold voltage of the pulse width driving sub-module 121. The control end of the second compensation sub-module 125 may be connected to the scan line PWM_S2.

[0126] The pulse width modulation module 72 may further include a second light emission control module 126. One of the second light emission control modules 126 may be connected between the second power supply line PVDD2 and the first end of the pulse width driving sub-module 121, and the other second light emission control module 126 may be connected between the second end of the pulse width driving sub-module 121 and the amplitude modulation module 71.

[0127] The pulse width modulation module 72 may further include a second capacitor C2. The first end of the second capacitor C2 accesses the sweep signal SWEEP, and the second end of the second capacitor C2 is connected to the control end of the pulse width driving sub-module 121. The sweep signal SWEEP may be a ramp signal in the shape of a triangular wave whose voltage value changes linearly with time. The pulse width modulation module 72 controls the duty cycle of the driving current provided to the light-emitting element by the pixel circuit 70 during the light-emitting stage according to the sweep signal SWEEP, so as to control the brightness of the light-emitting element. That is, the larger the duty cycle, the higher the brightness of the light-emitting element perceived by the human eye, and the smaller the duty cycle, the lower the brightness of the light-emitting element perceived by the human eye.

[0128] Wherein, the first power supply line layer includes the above-mentioned first power supply line PVDD1, which is used to provide a first power supply voltage to the amplitude modulation module. Figure 22 Among them, PVEE is the third power supply line that provides a power supply signal to the cathode of the light-emitting element 50. The third power supply line PVEE is formed by the second power supply line layer.

[0129] In some embodiments, the power supply voltages of the first power supply line and the second power supply line can be set to be the same or different according to the requirements of the pixel circuit settings of the display panel. If the power supply voltages of the first power supply line and the second power supply line are the same, then the first power supply line PVDD1 and the second power supply line PVDD2 can both be formed by the first power supply line layer.

[0130] The embodiment of the present application also provides a display device, including the display panel described in any of the above embodiments. Please refer to Figure 23 , Figure 23 is a schematic structural diagram of a display device provided by an embodiment of the present application. Figure 23 The provided display device includes the display panel 100 provided in any one of the above embodiments of the present application. Figure 23The embodiments are described by taking a mobile phone as an example only for the display device. It can be understood that the display device provided in the embodiments of the present application can be other display devices with a display function, such as wearable products, computers, televisions, in-vehicle display devices, etc. The present application does not make specific limitations thereto. The display device provided in the embodiments of the present application has the beneficial effects of the display panel provided in the embodiments of the present application. For the specific description of the display panel, reference can be made to the above embodiments, and details are not described herein again.

[0131] The embodiments of the present application further provide a method for repairing signal lines of a display panel. Figure 24 As shown in Figure 24 the flowchart of a method for repairing signal lines of a display panel provided in the embodiments of the present application, the method for repairing signal lines of the display panel includes:

[0132] S110. Determine the short-circuit failure area of the display panel.

[0133] S120. Remove a part of the first power supply line layer in the short-circuit failure area to form a first isolation groove; and / or remove a part of the second power supply line layer in the short-circuit failure area to form a second isolation groove.

[0134] Wherein, the first power supply line layer is located between the second power supply line layer and the substrate, and the first power supply line layer and the second power supply line layer are insulated and overlapped; the first isolation groove insulates the first power supply line layers in the short-circuit failure area and the non-short-circuit failure area; the second isolation groove insulates the second power supply line layers in the short-circuit failure area and the non-short-circuit failure area.

[0135] Due to the influence of foreign objects, external forces, etc. during the processes of preparation, handling, etc., the insulating film layer between the first power line layer 20 and the second power line layer 30 is very likely to be damaged, causing the first power line layer 20 and the second power line layer 30 to be deformed and conduct electricity, thus triggering a short - circuit problem. Therefore, the embodiment of the present application provides a signal repair method for solving the short - circuit problem caused by the first power line layer 20 and the second power line layer 30. First, determine the short - circuit failure area of the display panel. The short - circuit failure area refers to the area within which the display panel cannot be provided with a normal power signal due to the short - circuit between the first power line layer and the second power line layer, and the non - short - circuit failure area refers to the area that can provide a normal power signal for the display panel. Then, remove a part of the first power line layer in the short - circuit failure area to form a first isolation groove; and / or, remove a part of the second power line layer in the short - circuit failure area to form a second isolation groove. The formed first isolation groove can insulate the first power line layers in the short - circuit failure area and the non - short - circuit failure area. Since the first power line layer in the non - short - circuit failure area is no longer connected to the first power line layer in the short - circuit failure area, the abnormal signal received by the first power line layer in the short - circuit failure area due to the short - circuit is no longer transmitted to the first power line layer in the non - short - circuit failure area. Therefore, the first power line layer in the non - short - circuit failure area can still ensure a normal power signal. The formed second isolation groove insulates the second power line layers in the short - circuit failure area and the non - short - circuit failure area. The second power line layer in the non - short - circuit failure area is no longer connected to the second power line layer in the short - circuit failure area, and the abnormal signal received by the second power line layer in the short - circuit failure area due to the short - circuit is no longer transmitted to the second power line layer in the non - short - circuit failure area. Therefore, the second power line layer in the non - short - circuit failure area can still ensure a normal power signal.

[0136] In some embodiments, determining the short - circuit failure area of the display panel includes:

[0137] Determine the short - circuit point of the display panel;

[0138] Take the position where the short - circuit point is located as the short - circuit failure area of the display panel.

[0139] Correspondingly, removing a part of the first power line layer in the short - circuit failure area to form a first isolation groove; and / or, removing a part of the second power line layer in the short - circuit failure area to form a second isolation groove includes: removing a part of the first power line layer at the position of the short - circuit point to form a first isolation groove; and / or, removing a part of the second power line layer at the position of the short - circuit point to form a second isolation groove.

[0140] The short - circuit point in the short - circuit failure area refers to the position where the first power supply layer and the second power supply layer are short - circuited. In the embodiments of the present application, the metal short - circuit can be accurately removed at the short - circuit point for repair. Specifically, the short - circuit point of the display panel is determined, and the position where the short - circuit point is located is used as the short - circuit failure area of the display panel. Then, a part of the first power supply layer at the short - circuit point position is removed to form a first isolation groove; and / or, a part of the second power supply layer at the short - circuit point position is removed to form a second isolation groove. The repair method at the short - circuit point in the present application forms a small short - circuit failure area and can reduce the bad - point area in the display panel.

[0141] In some embodiments, determining the short - circuit failure area of the display panel includes:

[0142] Determine the short - circuit point of the display panel;

[0143] Take the short - circuit point and the area within a preset distance around the short - circuit point as the short - circuit failure area of the display panel.

[0144] Correspondingly, removing a part of the first power supply layer in the short - circuit failure area to form a first isolation groove; and / or, removing a part of the second power supply layer in the short - circuit failure area to form a second isolation groove includes:

[0145] Remove a part of the first power supply layer around the short - circuit point to form a first isolation groove surrounding the short - circuit point; and / or, remove a part of the second power supply layer around the short - circuit point to form a second isolation groove surrounding the short - circuit point.

[0146] The present application can isolate around the short - circuit point, set the first isolation groove and / or the second isolation groove, instead of directly repairing the short - circuit point. By setting the annular first isolation groove and / or the second isolation groove in the short - circuit failure area, the first power supply layer of the short - circuit failure area and the non - short - circuit failure area is insulated by using the structure of the annular first isolation groove, and the second power supply layer of the short - circuit failure area and the non - short - circuit failure area is insulated by using the structure of the annular second isolation groove.

[0147] In some embodiments, determining the short - circuit point of the display panel includes:

[0148] Provide a test signal to the first power supply layer and the second power supply layer of the display panel;

[0149] Obtain the thermal imaging image of the display panel and determine the short - circuit point of the display panel based on the thermal imaging image.

[0150] Embodiments of the present application can determine the short - circuit point of the display panel through thermal imaging. Then, after accurately determining the short - circuit point, the positions for forming the first isolation groove and / or the second isolation groove can be precisely determined. Specifically, a test signal can be provided to the first power line layer and the second power line layer of the display panel. Since, after the test signal is applied, the short - circuit point position generates more heat compared to other non - short - circuit point positions, the short - circuit point of the display panel can be determined by obtaining the thermal imaging image of the display panel.

[0151] In some embodiments, removing a part of the first power line layer in the short - circuit failure area to form the first isolation groove; and / or removing a part of the second power line layer in the short - circuit failure area to form the second isolation groove includes:

[0152] Using any one of capacitive coupling, laser etching, chemical etching, ion beam etching, and mechanical scraping processes to remove a part of the first power line layer in the short - circuit failure area to form the first isolation groove; and / or removing a part of the second power line layer in the short - circuit failure area to form the second isolation groove.

[0153] Embodiments of the present application can use any one of capacitive coupling, laser etching, chemical etching, ion beam etching, and mechanical scraping processes to form the first isolation groove and / or the second isolation groove. In practical applications, a suitable process can be selected according to the specific structural requirements of the display panel, repair accuracy requirements, cost, and efficiency, etc.

[0154] In some embodiments, the second power line layer is bonded to the light - emitting element through a bonding layer;

[0155] Removing a part of the first power line layer in the short - circuit failure area to form the first isolation groove; and / or removing a part of the second power line layer in the short - circuit failure area to form the second isolation groove includes:

[0156] On the side of the second power line layer away from the substrate, using laser etching to remove a part of the first power line layer in the short - circuit failure area to form the first isolation groove; and / or removing a part of the second power line layer in the short - circuit failure area to form the second isolation groove.

[0157] In embodiments of the present application, the second power line layer is the metal layer closest to the light - emitting element in the display panel except for the bonding layer. Therefore, when preparing the first isolation groove and / or the second isolation groove by laser etching, laser irradiation can be performed on the side of the second power line layer away from the substrate to avoid laser penetration through other metal film layers during laser irradiation.

[0158] In some embodiments, removing a part of the first power line layer in the short - circuit failure area to form the first isolation groove includes: controlling the laser to focus on the first power line layer to be etched to remove a part of the first power line layer in the short - circuit failure area to form the first isolation groove;

[0159] And / or, removing a part of the second power supply line layer in the short-circuit failure area to form a second isolation groove includes: controlling the laser to focus on the second power supply line layer to be etched, removing a part of the second power supply line layer in the short-circuit failure area, and forming a second isolation groove.

[0160] When forming the first isolation groove and / or the second isolation groove through the laser etching process in the embodiments of the present application, the laser focusing position can be controlled, so that the film layer to be removed can be accurately etched during the laser etching process without damaging other film layers. In addition, the laser energy can be adjusted to ensure that the metal to be etched absorbs enough energy to be vaporized. For example, if it is necessary to remove a part of the first power supply line layer in the short-circuit failure area to form a first isolation groove, the laser can be controlled to focus on the first power supply line layer to be etched, so as to remove a part of the first power supply line layer in the short-circuit failure area and form a first isolation groove. For example, if it is necessary to remove a part of the second power supply line layer in the short-circuit failure area to form a second isolation groove, the laser can be controlled to focus on the second power supply line layer to be etched, so as to remove a part of the second power supply line layer in the short-circuit failure area and form a second isolation groove.

[0161] The embodiments of the present application can specifically adjust the parameters of the laser etching process according to the film layer to be etched and the etching depth, such as the focal length of the optical system, the laser energy, etc.

[0162] It should be noted that in this article, relational terms such as "first" and "second" are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the term "comprising", "including" or any other variant thereof is intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements not only includes those elements, but also includes other elements not expressly listed, or also includes elements inherent to such process, method, article or device. Without further limitation, an element defined by the statement "including a..." does not exclude the existence of additional identical elements in the process, method, article or device including the said element.

[0163] The above are only specific embodiments of the present application, enabling those skilled in the art to understand or implement the present application. Various modifications to these embodiments will be obvious to those skilled in the art, and the general principles defined herein can be implemented in other embodiments without departing from the spirit or scope of the present application. Therefore, the present application will not be limited to these embodiments described herein, but will conform to the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A display panel, characterized in that: include: substrate; A first power line layer and a second power line layer are located on the substrate; the first power line layer is located between the second power line layer and the substrate, and the first power line layer and the second power line layer are insulated and overlapped; the display panel includes a short-circuit failure area and a non-short-circuit failure area, and the short-circuit failure area is provided with a first isolation groove and / or a second isolation groove; The first isolation groove insulates the short circuit failure area from the first power line layer of the non-short circuit failure area; the second isolation groove insulates the short circuit failure area from the second power line layer of the non-short circuit failure area.

2. The display panel according to claim 1, characterized in that: In a direction perpendicular to the plane where the display panel is located, the first isolation groove at least penetrates the first power line layer; in a direction perpendicular to the plane where the display panel is located, the second isolation groove at least penetrates the second power line layer.

3. The display panel according to claim 1, characterized in that: In a direction perpendicular to the substrate, the first isolation groove extends to at least a portion of the insulating layer between the first power line layer and the second power line layer; And / or, in a direction perpendicular to the substrate, the second isolation trench extends to at least a portion of the insulating layer between the first power line layer and the second power line layer.

4. The display panel according to claim 1, characterized in that: The short-circuit failure area is provided with a first isolation groove, and an insulating layer is provided between the first isolation groove and the second power line layer; Alternatively, the short-circuit failure area is provided with a second isolation groove, and an insulating layer is provided between the first isolation groove and the first power line layer.

5. The display panel according to claim 1, characterized in that: In a direction perpendicular to the substrate, a metal layer between the first power line layer and the substrate does not overlap with the first isolation trench and / or the second isolation trench.

6. The display panel according to claim 1, characterized in that: The second power line layer is bonded to the light emitting element via a bonding layer.

7. The display panel according to claim 1, characterized in that: The first isolation groove is connected to the second isolation groove in a direction perpendicular to the plane where the display panel is located.

8. The display panel according to claim 1, characterized in that: The first isolation trench and / or the second isolation trench is located at a short-circuit point of the short-circuit failure region.

9. The display panel according to claim 8, characterized in that: The vertical projection of the short-circuit point on the substrate is located within the vertical projection of the first isolation trench on the substrate; And / or, a vertical projection of the short-circuit point on the substrate is located within a vertical projection of the second isolation trench on the substrate.

10. The display panel according to claim 8, characterized in that: The area of ​​the short-circuit point is smaller than or equal to the laser etching spot area of ​​the first isolation groove and the second isolation groove.

11. The display panel according to claim 1, characterized in that: The first isolation trench and / or the second isolation trench are / is arranged in a ring shape in the short-circuit failure area.

12. The display panel according to claim 11, characterized in that: The short-circuit failure area includes a short-circuit point, and the first isolation trench and / or the second isolation trench are arranged around the short-circuit point.

13. The display panel according to claim 12, characterized in that: The maximum width of the short-circuit point is greater than the width of the first isolation trench and / or the second isolation trench.

14. The display panel according to claim 12, characterized in that: In a direction parallel to a plane of the substrate, a distance between the first isolation trench and the short-circuit point is greater than 30 μm; and / or a distance between the second isolation trench and the short-circuit point is greater than 30 μm.

15. The display panel according to claim 12, characterized in that: In a direction parallel to the plane of the substrate, a ratio of a distance between the first isolation trench and / or the second isolation trench and the short-circuit point to a size of a light-emitting element arrangement region in the first direction is less than 1; The distance between the first isolation trench and / or the second isolation trench and the short-circuit point is parallel to the first direction.

16. The display panel according to claim 11, characterized in that: The ratio of the area of ​​the short-circuit failure zone to the area of ​​the light-emitting element setting zone is less than 3.

17. The display panel according to claim 1, characterized in that: The distance between the first isolation trench and / or the second isolation trench and the nearest light emitting element arrangement region is greater than 20 μm.

18. The display panel according to claim 11, characterized in that: The second power line layer includes an electrically insulated first electrode portion and a second electrode portion; in the light emitting element setting area, the first electrode portion is used to be electrically connected to the anode of the light emitting element, and the second electrode portion is used to be electrically connected to the cathode of the light emitting element; In a direction perpendicular to the substrate, the second isolation groove does not overlap with the first electrode portion and / or the second electrode portion of the light emitting element setting region.

19. The display panel according to claim 11, characterized in that: The second power line layer includes an electrically insulated first electrode portion and a second electrode portion; in the light emitting element setting area, the first electrode portion is used to be electrically connected to the anode of the light emitting element, and the second electrode portion is used to be electrically connected to the cathode of the light emitting element; In a direction perpendicular to the substrate, the first isolation groove overlaps with the first electrode portion and / or the second electrode portion of the light emitting element setting region.

20. The display panel according to claim 11, characterized in that: The first power line layer is provided with a plurality of first exhaust holes; the first isolation groove is connected to at least part of the first exhaust holes; And / or, the second power line layer is provided with a plurality of second exhaust holes; the second isolation groove is connected to at least part of the second exhaust holes.

21. The display panel according to claim 11, characterized in that: The display panel further includes a plurality of pixel circuits, and the pixel circuits include an amplitude modulation module and a pulse width modulation module; the first power line layer includes a first power line for providing a first power supply voltage to the amplitude modulation module.

22. A display device, characterized in that: A display panel comprising any one of claims 1-21.

23. A method for repairing a signal line of a display panel, characterized in that: include: Determine the short circuit failure area of ​​the display panel; Removing a portion of the first power line layer in the short circuit failure area to form a first isolation groove; and / or, removing part of the second power line layer in the short circuit failure area to form a second isolation groove; Among them, the first power line layer is located between the second power line layer and the substrate, and the first power line layer and the second power line layer are insulated and overlapped; the first isolation groove insulates the first power line layer of the short-circuit failure area and the non-short-circuit failure area; the second isolation groove insulates the second power line layer of the short-circuit failure area and the non-short-circuit failure area.

24. The method for repairing a signal line of a display panel according to claim 23, characterized in that: Determining the short circuit failure area of ​​the display panel includes: Determine the short-circuit point of the display panel; The location of the short-circuit point is used as a short-circuit failure area of ​​the display panel; The method of removing a portion of the first power line layer in the short circuit failure area to form a first isolation groove; and / or removing a portion of the second power line layer in the short circuit failure area to form a second isolation groove comprises: The first power line layer at the short-circuit point is removed to form a first isolation groove; and / or the second power line layer at the short-circuit point is removed to form a second isolation groove.

25. The method for repairing a signal line of a display panel according to claim 23, characterized in that: Determining the short circuit failure area of ​​the display panel includes: Determine the short-circuit point of the display panel; The short-circuit point and an area within a preset distance around the short-circuit point are used as a short-circuit failure area of ​​the display panel; The method of removing a portion of the first power line layer in the short circuit failure area to form a first isolation groove; and / or removing a portion of the second power line layer in the short circuit failure area to form a second isolation groove comprises: In the short-circuit failure area, a portion of the first power line layer outside the short-circuit point is removed to form a first isolation groove surrounding the short-circuit point; and / or, a portion of the second power line layer outside the short-circuit point is removed in the short-circuit failure area to form a second isolation groove surrounding the short-circuit point.

26. The signal line repairing method of a display panel according to claim 24 or 25, characterized in that: Determining the short-circuit point of the display panel includes: Providing a test signal to a first power line layer and a second power line layer of the display panel; A thermal imaging image of the display panel is acquired, and a short-circuit point of the display panel is determined based on the thermal imaging image.

27. The method for repairing a signal line of a display panel according to claim 23, characterized in that: removing part of the first power line layer in the short circuit failure area to form a first isolation groove; and / or removing part of the second power line layer in the short circuit failure area to form a second isolation trench comprises: Use any one of capacitive coupling, laser etching, chemical etching, ion beam etching, and mechanical scraping processes to remove part of the first power line layer in the short circuit failure area to form a first isolation groove; and / or remove part of the second power line layer in the short circuit failure area to form a second isolation groove.

28. The method for repairing a signal line of a display panel according to claim 27, characterized in that: The second power line layer is bonded to the light emitting element via a bonding layer; removing part of the first power line layer in the short circuit failure area to form a first isolation groove; and / or removing part of the second power line layer in the short circuit failure area to form a second isolation trench comprises: On a side of the second power line layer away from the substrate, laser etching is used to remove a portion of the first power line layer in the short circuit failure area to form a first isolation groove; And / or removing part of the second power line layer in the short circuit failure area to form a second isolation groove.

29. The method for repairing a signal line of a display panel according to claim 23, wherein: The removing part of the first power line layer in the short circuit failure area to form the first isolation groove comprises: controlling the laser to focus on the first power line layer to be etched to remove part of the first power line layer in the short circuit failure area to form the first isolation groove; And / or, removing part of the second power line layer in the short circuit failure area to form a second isolation groove includes: controlling the laser to focus on the second power line layer to be etched to remove part of the second power line layer in the short circuit failure area to form a second isolation groove.

Images