Testing semiconductor modules

Abstract

A method of testing a semiconductor module includes receiving test information, matching test program data and board data stored in a database with the test information, simulating loading of the semiconductor module based on a result of the matching, selecting at least one target slot from among slots of the board based on a result of the simulation, and testing the semiconductor module based on the selected at least one target slot. The semiconductor modules are picked up using a plurality of hands of the gripper to correspond to the number of at least one target slot, and the semiconductor modules are loaded to the at least one target slot of the plate.

Description

[0001] Cross - reference to related applications

[0002] This application claims the priority of Korean Patent Application No. 10 - 2024 - 0001554, filed with the Korean Intellectual Property Office on January 4, 2024, the entire contents of which are incorporated herein by reference. Technical field

[0003] The present disclosure relates to testing semiconductor modules. Background art

[0004] After manufacturing a semiconductor device, a test process is performed on the semiconductor device to determine whether the product is defective. As semiconductor technology becomes more advanced and semiconductor devices become more complex, the process of testing the product also becomes more complex. Therefore, the test environment varies depending on the board, test program, semiconductor module, etc. used in the test process. Summary of the invention

[0005] According to some embodiments of the present disclosure, there are provided a test method and a test device for automating the testing of semiconductor devices to reduce the required cost and time by automating the loading operation of semiconductor modules.

[0006] According to some embodiments, there is provided a method of testing a semiconductor module, the method including receiving test information, matching test program data and board data stored in a database with the test information, simulating the loading of the semiconductor module based on the matching result, selecting at least one target slot from the slots of the board based on the simulation result, picking up the semiconductor module using a plurality of hands of a gripper corresponding to the number of at least one target slot, and loading the semiconductor module into at least one selected target slot of the board.

[0007] According to some embodiments, there is provided a device for testing a semiconductor module, the device including at least one processor and a memory, the memory including a database in which test program data and board data are stored, wherein the at least one processor is configured to match received test information with the test program data and the board data, simulate the loading of the semiconductor module based on the matching result, select at least one target slot from the slots of the board based on the simulation result, control a gripper of the device based on the at least one target slot, pick up the semiconductor module using a plurality of hands of the gripper corresponding to the number of at least one target slot, and load the semiconductor module into at least one target slot of the board.

[0008] According to some embodiments, a method of loading a semiconductor module is provided. The method includes receiving type data of a target board on which the semiconductor module is to be loaded, matching the board data with the type data, where the board data includes position information of slots according to the structure of the board stored in a database, selecting at least one target slot among the slots of the target board based on the matching result, generating slot data including information about the at least one target slot, controlling a gripper including a plurality of hands based on the slot data, and loading the semiconductor module into at least one target slot of the target board through the gripper. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] Embodiments according to the present disclosure will be understood more clearly from the following detailed description in conjunction with the accompanying drawings. In the drawings:

[0010] Figure 1 is a block diagram schematically showing an example of a test device;

[0011] Figure 2 is a flowchart showing an example of a test method;

[0012] Figure 3 is a diagram showing an example of a matching process;

[0013] Figure 4 is a flowchart showing an example of a simulation operation;

[0014] Figure 5 is a diagram showing an example of a simulation operation;

[0015] Figure 6 is a flowchart showing an example of a method of selecting a target slot;

[0016] Figure 7A and Figure 7B is a diagram showing an example of selecting a target slot;

[0017] Figure 8 is a flowchart showing an example of a method of determining a target slot;

[0018] Figure 9 is a diagram showing an example of target slot determination;

[0019] Figure 10 shows a side view of an example of a gripper;

[0020] Figure 11A and Figure 11B is a front view of an example of the gripper; and

[0021] Figure 12 is a block diagram showing an example of a test system. DETAILED DESCRIPTION

[0022] In the following, examples will be described in detail with reference to the accompanying drawings.

[0023] Figure 1 is a block diagram schematically showing a test device according to some embodiments of the present disclosure.

[0024] Referring to Figure 1 , the test device 100 may include a processor 110 and a memory 120. The test device 100 may be a device that performs a test operation by loading a semiconductor module onto a board. For example, a test process may be performed to check whether a mass-produced module operates in an actual use environment, and the test device 100 may perform the test process by loading the mass-produced module onto a device (e.g., a board). Here, the module may be referred to as a semiconductor module or a memory module; it will be understood that the scope of the module as described herein is not limited to the memory module.

[0025] The board (e.g., a motherboard) on which the semiconductor module is to be loaded may be installed in the test device 100, and the test may be performed by loading the semiconductor module onto the board. For example, the semiconductor module may be tested while being loaded onto the board. In this case, the same type (or model, kind, etc.) of board is not always used, and other types of boards may be installed on the test device 100. In some embodiments, even when various types of boards are used, the test device 100 may facilitate loading the semiconductor module onto various types of boards, as described below.

[0026] The test device 100 may receive test information T_info from the outside (e.g., from an external device). The test information T_info may be information including specific test contents used when the test device 100 performs a test. For example, the test information T_info may include data on a test program to be performed by loading a semiconductor module onto the test device 100, data on a test program to be performed by loading a semiconductor module onto the test device 100, or data indicating a test program to be performed by loading a semiconductor module onto the test device 100. The test program may be implemented in various ways according to the purpose and content of the test. The conditions for loading the semiconductor module onto the board may vary depending on the test program. For example, the first test program may be designed to test to evaluate the timing characteristics of the semiconductor module, and the second test program may be designed to test to evaluate the speed performance of the semiconductor module. Various conditions (e.g., the number of semiconductor modules loaded in the slot, the position of the slot, etc.) for loading the semiconductor module in the slot of the board to perform the first test program may vary in different embodiments.

[0027] In addition, the test information T_info may include information about the board. The information about the board may be data about the type (or model or kind) of the board on which the semiconductor module is to be loaded. The configuration and structure of the board and the position and / or arrangement of the slots of the board may vary according to the type of the board. The test information T_info may include data about the type of the board to be installed on the test device 100 for testing among various board types.

[0028] The processor 110 may perform a matching operation based on the received test information T_info. The memory 120 may include a database 122. Data for various test programs may be stored in the database 122, and data about various board types may be stored in the database 122. In some embodiments, the processor 110 may match the received test information T_info with the test program data and the board data stored in the database 122 included in the memory 120. Through the matching operation, the processor 110 may determine the loading conditions based on the test program data corresponding to the test information T_info and the type of the board corresponding to the test information T_info, and may select a target slot among the slots of the board for loading the semiconductor module based on the result of the matching.

[0029] The processor 110 may test the semiconductor module loaded on the board by executing a series of processes (or programs) associated with the test operation. For example, the processor 110 may generate a test signal to test the semiconductor module loaded in the slot of the board, and may examine the output signal generated from the semiconductor module based on the test signal to determine the state and / or performance of the semiconductor module. The test signal may include any suitable signal used in the semiconductor module to be tested, and may include logical value information for testing logic, a test signal for obtaining power information of the memory, a test signal for obtaining information about the operating temperature of the semiconductor module, and / or a test signal for obtaining information about signal integrity (SI) and power integrity (PI). The test signal may be configured in various ways based on the test program (e.g., may have a configuration corresponding to the test program), and the processor 110 may select a target slot for loading the semiconductor module based on the loading conditions determined according to the matching of the test information T_info with the test program data stored in the database 122.

[0030] It will be understood that in some embodiments, the test device 100 includes other components for testing the semiconductor module.

[0031] Figure 2 is a flowchart showing a test method according to some embodiments. The test method may include a plurality of operations S110 to S160. The test method may be performed by a test device such as Figure 1 the test device 100.

[0032] In operation S110, the test device 100 receives test information T_info. The test information T_info may include information characterizing the board on which the semiconductor module is to be loaded, and may include test program data, which is information characterizing the program to be executed by the test device 100 to test the semiconductor module loaded on the board. The processor 110 of the test device 100 may perform a test operation based on the test program data to obtain a test result (e.g., information about the operating temperature of the semiconductor module, timing information, data processing speed information, and / or information about SI and / or PI). The conditions (loading conditions) for loading the semiconductor module onto the board may vary based on the test program data.

[0033] In operation S120, the processor 110 matches the received test information T_info with the test program data and board data stored in the database 122 included in the memory 120. For example, the processor 110 may use a matching operation to obtain information about the test program to be executed by the test device 100 and information about the board on which the semiconductor module is to be loaded from the database 122. The processor 110 may determine the loading conditions based on the matching result (information).

[0034] In operation S130, the processor 110 performs a loading simulation based on the loading conditions. In some embodiments, the simulation may be an operation of classifying or selecting slots of the board based on the loading conditions.

[0035] In operation S140, the processor 110 selects a target slot in which to load the semiconductor module based on the result of the simulation. In some embodiments, the semiconductor module may be loaded and tested only in one or more slots (e.g., a subset of the slots) of the board based on the loading conditions, and the processor 110 may select the target slot in which the semiconductor module is actually loaded from among the slots of the board.

[0036] In operation S150, the processor 110 picks up the semiconductor module by controlling the gripper of the test device 100 to load the semiconductor module into the selected target slot. In some embodiments, the processor 110 uses the gripper to pick up a plurality of semiconductor modules corresponding to the number of target slots selected by the processor 110 as a result of the simulation. The gripper may include a plurality of hands for picking up the semiconductor modules. The gripper may transfer the semiconductor modules picked up by the plurality of hands to the test device 100 to be loaded onto a board mounted on the test device 100. In some embodiments, each of the plurality of hands can be controlled individually, and the gripper can arrange the plurality of hands at a pitch that allows the picked-up semiconductor modules to be loaded into each target slot. For example, the interval between the plurality of hands can be varied, and the gripper can control the interval between the plurality of hands to correspond to the position of each target slot. In operation S150, the gripper can load the semiconductor modules held by the plurality of hands pitched to correspond to the positions of the target slots into each target slot.

[0037] Accordingly, Figure 2 the test device 100 and the test method can automate the process of loading the semiconductor module onto the board. The conditions for loading the semiconductor module and / or the position of the slot for loading the semiconductor module can vary depending on the test program and the type of the board, and the test device 100 can load the corresponding semiconductor module. Since the loading operation of the semiconductor module is not performed manually, the loading operation can be automated by the test device 100 and the test method. Accordingly, in some embodiments, compared with manual loading, the time and cost consumed for loading can be reduced, and the loading reliability and / or quality can be improved, for example, by reducing or preventing damage to the semiconductor module that may occur during manual operation.

[0038] In addition, in some embodiments, for example, based on the use of the database 122 storing program data and board data, the test device 100 and Figure 2 the test method can respond flexibly to various programs and board types. For example, although the loading conditions can vary depending on the test program and the position or arrangement of the slots can vary depending on the type of the board, the test device 100 and the test method can be adapted to those process variables.

[0039] Furthermore, in some embodiments, the test device 100 and the test method can combine the simultaneous loading operations of a plurality of semiconductor modules by a gripper with an adjustable pitch separation between the hands, thereby improving the operation efficiency.

[0040] Figure 3 is a diagram showing a matching process according to some embodiments.

[0041] Reference Figure 1 and Figure 3 , the test device 100 can receive test information T_info and perform a matching operation. The test information T_info can include information T_PGM about a test program to be executed by the test device 100 and information B_info about the board. The conditions for loading the semiconductor module onto the board can vary according to the test program, and the loading conditions for each program can be stored in the database 122. For example, the test program data stored in the database 122 can include a first loading condition PGM1_LC1 corresponding to a first test program, a second loading condition PGM2_LC2 corresponding to a second test program, and a third loading condition PGM3_LC3 corresponding to a third test program. For example, the first test program can be a program for testing the operating temperature of the semiconductor module to be loaded, and the loading condition can thus be the first loading condition PGM1_LC1. As another example, the second test program can be a program for testing the timing of the semiconductor module to be loaded, and the loading condition can thus be the second loading condition PGM2_LC2. The boards installed on the test device 100 can have various types, and the structure of the board, the position of the slots, and / or the arrangement of the slots can vary depending on the type of the board, and information about the type of the board (e.g., slot position information) can be stored in the database 122. For example, the board data stored in the database 122 can include data about a first board type, a second board type, and a third board type. In some embodiments, the database 122 stores information about at least one of the arrangement of the slots and the position of the slots corresponding to each board type (e.g., this information can be stored in the form of a unique number of the slots or coordinate information about the position of the slots). The conditions for loading the semiconductor module can vary according to the test program data and the board data, and the processor 110 can generate the conditions as a matching result and use the generated conditions to select a target slot.

[0042] Accordingly, the test device 100 can flexibly respond to various test environments by constructing or combining various test programs and various board types as a database, and can effectively automate the test process.

[0043] Figure 4 is a flowchart showing an analog operation according to some embodiments. Figure 5 is a diagram associated with the analog operation.

[0044] Reference Figure 2 , Figure 4 and Figure 5, the loading simulation operation S130 may include operations S131 and S132. The test device 100 may transfer at least one semiconductor module from a tray 200 loaded with a plurality of semiconductor modules to a board 300. The board 300 mounted on the test device 100 may include a plurality of slots 210_1 to 210_9, and the processor 110 may select a candidate slot as a target slot from among the plurality of slots 210_1 to 210_9 through simulation.

[0045] In operation S131, based on the matching result, the processor 110 may select candidate slots by masking unused slots from among the slots of the board 300. As an example, as a result of the matching, the odd-numbered slots may be the unused slots. In this case, the processor 110 may exclude the odd slots from the candidate slots by masking the odd slots in the simulation operation for target slot selection. As another example, as Figure 5 shown, in the matching result, the first slot 210_1, the third slot 210_3, the fifth slot 210_5, the seventh slot 210_7, and the eighth slot 210_8 may be determined as unused slots, and the processor 110 may mask the unused slots. Accordingly, the second slot 210_2, the fourth slot 210_4, the sixth slot 210_6, and the ninth slot 210_9 may be selected as candidate slots.

[0046] In operation S132, the processor 110 may classify regular slots from among the candidate slots. In some embodiments, when performing the loading operation, the processor 110 may determine the target slot based on the regular slots from among the candidate slots. For example, as Figure 5 shown, the regular slots (e.g., the slots having a regular arrangement among the candidate slots) among the candidate slots 210_2, 210_4, 210_6, and 210_9 may be the second slot 210_2, the fourth slot 210_4, and the sixth slot 210_6. In some embodiments, the processor 110 may determine the target slot among the regular slots 210_2, 210_4, and 210_6 based on the number of currently operable (i.e., pickable) semiconductor modules. For example, when there are two operable semiconductor modules, two of the regular slots 210_2, 210_4, and 210_6 may be determined as the target slots. Additionally, the ninth slot 210_9, which is a candidate slot not classified into the previous regular slots 210_2, 210_4, and 210_6, may be designated as the target slot in a subsequent loading operation.

[0047] A set of regular slots may be slots that are aligned with each other in the extending direction of the slots, for example, as described with respect to Figure 9 the above.

[0048] Figure 6 is a flowchart showing a method of selecting a target slot according to some implementations, and Figure 7A andFigure 7B is a diagram associated with the method.

[0049] Referring Figure 2 and Figure 6 , the target slot selection operation S140 may include operations S141 and S142. The board data stored in the database 122 may include area information for classifying slots according to the board type, and the processor 110 may determine the target slot based on the area information.

[0050] In operation S141, the processor 110 may classify the slots of the board 300 based on the area information. When selecting a target slot from among the candidate slots, the processor 110 may select a target slot for each area. As an example, as Figure 7A shown, the first area of the board 300 may include a plurality of first slots 210_1 to 210_8, the second area may include a plurality of second slots 211_1 to 211_4, and the third area may include a plurality of third slots 212_1 to 212_6. For example, as a result of the matching, the odd-numbered slots in the first area and the second area may be determined as unused slots, and the even-numbered slots may be selected as candidate slots. The processor 110 may classify the candidate slots according to the areas in the board 300.

[0051] In operation S142, the processor 110 may select the slots within the same area as the target slots for one round of loading. For example, the candidate slots 210_2, 210_4, 210_6, 210_8 in the first area and the candidate slots 211_2 and 211_4 in the second area are all regular slots, but when performing a loading operation, the processor 110 may select the target slots by dividing the regular slots according to the areas. For example, the candidate slot 210_8 and the candidate slot 211_2 are slots with a regular arrangement, but the processor 110 may determine these two candidate slots as the target slots for different rounds. For each round of loading, the target slots may be selected from within a single area.

[0052] For example, when the number of operable semiconductor modules is 3, the processor 110 may select the candidate slots 210_2, 210_4, and 210_6 as the target slots in the first round of loading operation, and may select only the candidate slot 210_8 as the target slot in the second round of loading operation. The candidate slot 211_2 may be selected as the target slot in a subsequent loading operation. Similarly, since the candidate slot 211_4 and the candidate slot 212_1 are slots belonging to different areas, the candidate slot 211_4 and the candidate slot 212_1 may be respectively selected as the target slots in different rounds. As a result of the matching, among the slots in the third area, the slot 212_1 and the slot 212_4 may be candidate slots, and these two slots may be determined as slots with a regular arrangement. Therefore, these two slots may be the target slots in the same round.

[0053] As another example, as a result of matching, candidate slots can appear in each region of the board 300, as Figure 7B shown. For example, when Figure 7B the test program in Figure 7A is different from the test program in Figure 7A the candidate slots of Figure 7B can be selected differently. As described above, the processor 110 can select a target slot from among the regular slots, and thus the candidate slot 210_2 can be selected as the target slot for the first round, and the candidate slots 210_5 and 210_7 can be selected as the target slots for the second round. However, the embodiments are not limited thereto, and the target slot can be selected in various ways. For example, the target slots in one round do not need to be regularly spaced relative to each other. For example, the candidate slots 210_2, 210_5, and 210_7 can be selected as the target slots in the same round. For example, as described below, the multiple hands of the gripper of the test device 100 can be individually controlled and spaced, and can be spaced to correspond to each of the candidate slots 210_2, 210_5, and 210_7.

[0054] As an example, although the candidate slot 210_7 and the candidate slot 211_1 are regular slots, since they are slots in different regions, the processor 110 can determine these two candidate slots as the target slots for different rounds. The processor 110 can select a target slot from among the regular slots in the second region, and thus the candidate slot 211_1 can be selected as the target slot for the third round, and the candidate slots 211_3 and 211_4 can be selected as the target slots for the fourth round. However, the embodiments are not limited thereto, and the target slot can be selected in various ways. Since the multiple hands of the gripper can be individually controlled and spaced, the candidate slots 211_1, 211_3, and 211_4 can be selected as the target slots in the same round.

[0055] In addition, among the slots in the third region, the slot 212_3 and the slot 212_6 can be candidate slots, and these two slots can be determined as regular slots. Therefore, the two slots can be the target slots in the same round.

[0056] Therefore, in some embodiments, the test device 100 can flexibly respond to various test environments, and can more effectively perform the loading operation by constructing information about regions as a database according to the type of the board and using this information in the loading operation.

[0057] Figure 8 and Figure 9 relate to a method for determining a target slot according to some embodiments.

[0058] Referring to Figure 8 andFigure 9 , Figure 4 The loading simulation operation S130 of Figure 4 may include operation S133, and Figure 6 The target slot selection operation S140 of Figure 6 may include operation S143. The board data stored in the database 122 may include information on the structure of the board 300 according to the board type (e.g., the positions of the slots), and the processor 110 may determine the target slot based on the positions of the slots included in the board 300.

[0059] In operation S133, the processor 110 may set the loading operation sequence based on the positions of the slots, and in operation S143, the processor 110 may determine the target slot according to the operation sequence.

[0060] For example, as Figure 9 shown, the slots 210_1 to 210_8 are included in the same first region, but may be selected as target slots in different rounds. As an example, the relative positions between the slots may vary according to the type and / or structure of the board 300. For example, the candidate slots 210_2, 210_4, 210_6, and 210_8 in the first region are regular slots with regularity (e.g., regular slots aligned with each other in the second direction y), but the slots 210_6 to 210_8 may be spaced apart from the slots 210_1 to 210_5 by a predetermined distance in the second direction y, e.g., an offset from the slots 210_1 to 210_5 in the second direction y. Therefore, the processor 110 may perform loading operations on the slots 210_6 to 210_8 and the slots 210_1 to 210_5 in different rounds, e.g., determining the candidate slots 210_2 and 210_4 as the target slots for the first round and the candidate slots 210_6 and 210_8 as the target slots for the second round.

[0061] In addition, the slots 211_1 to 211_4 are included in the same second region, but may be selected as target slots in different rounds. For example, the candidate slots 211_2 and 211_4 in the second region are regular slots, but the slot 211_4 may have a structure with a predetermined distance that is farther apart than the distance between two adjacent slots among the slots 211_1 to 211_3 in the first direction x. Therefore, the processor 110 may perform loading operations on the slot 211_4 and the slots 211_1 to 211_3 in different rounds, e.g., determining the candidate slots 211_1 to 211_3 as the target slots for the third round and the candidate slot 211_4 as the target slot for the fourth round. Since the slots 212_1 to 212_6 are included in the same third region and do not have a structure in which the slots 212_1 to 212_6 are spaced apart from each other, the processor 110 may select the regular candidate slots 212_1, 212_3, and 212_5 as the target slots in the same round.

[0062] Accordingly, the test apparatus 100 can flexibly respond to various test environments and more effectively perform a loading operation by constructing information about the structure as a database according to the type of the board and using the information in the loading operation.

[0063] Figure 10 is a side view of a gripper according to some embodiments.

[0064] Referring to Figure 10 , the gripper 150 of the test apparatus 100 may include a frame 151, a ball screw 152, and a plurality of hands 153_1 to 153_4. The frame 151 of the gripper 150 may be connected to the plurality of hands 153_1 to 153_4 and may be connected to, for example, a rail or a robotic arm to move the gripper 150. In some embodiments, the ball screw 152 may space the plurality of hands 153_1 to 153_4 apart. For example, the processor 110 may control the ball screw 152 to simultaneously space apart the plurality of hands 153_1 to 153_4 such that the hand holding the semiconductor module among the plurality of hands 153_1 to 153_4 is moved to correspond to the position of the target slot. In some embodiments, the plurality of hands 153_1 to 153_4 of the gripper 150 may be connected in an X-frame format. For example, the gripper 150 may simultaneously space apart the plurality of hands 153_1 to 153_4 connected in an X-frame format by the ball screw 152. Additionally, in some embodiments, the gripper 150 may be raised or lowered by a robotic arm to pick up, load, or unload a semiconductor module. For example, the robotic arm may move the gripper 150 in a third direction z to pick up the semiconductor module loaded on a tray by the hand of the gripper 150, or load the transferred semiconductor module into the target slot (e.g., the gripper may be lowered in the third direction z). Alternatively or additionally, the robotic arm may move the gripper 150 in the third direction z to transfer the semiconductor module picked up by the hand of the gripper 150, or move the gripper 150 in the third direction z after loading the semiconductor module into the target slot (e.g., the gripper may be raised in the third direction z).

[0065] In some embodiments, the plurality of hands 153_1 to 153_4 may each include holders 154_1 to 154_4 for holding a semiconductor module. The holders 154_1 to 154_4 may be formed in pairs and may be spaced apart from each other to respectively hold a semiconductor module, as with respect to Figure 11A - Figure 11BAs described above, the gripper 150 can space apart each of the plurality of hands 153_1 to 153_4 to load the picked semiconductor module into the target slot or unload the semiconductor module from the target slot via the ball screw 152. Subsequently, the holders 154_1 to 154_4 of the plurality of hands 153_1 to 153_4 can be spaced apart from each other by the gripper 150 to hold the semiconductor module. For example, the gripper 150 can move the plurality of hands 153_1 to 153_4 connected to the ball screw 152 in the first direction x to correspond to the target slots respectively, and the distance of movement in the first direction x can be achieved in various ways.

[0066] In some embodiments, as referred to above Figure 9 the processor 110 can transfer the semiconductor module by spacing apart the plurality of hands 153_1 to 153_4 of the gripper 150 to correspond to the positions of the slots. For example, as described above, the processor 110 can Figure 9 the candidate slots 210_2 and 210_4 be determined as the target slots for the first round, and thus the gripper 150 can pick up two semiconductor modules to be transferred in the first round loading operation in the tray 200. For example, the gripper 150 can pick up the first semiconductor module 161 and the second semiconductor module 162 through the first hand 153_1 and the second hand 153_2 respectively. The first hand 153_1 can space apart the first holder 154_1 to hold the first semiconductor module 161, and the second hand 153_2 can space apart the second holder 154_2 to hold the second semiconductor module 162. The gripper 150 can align the first hand 153_1 with the first semiconductor module 161 to pick up the first semiconductor module 161, and can align the second hand 153_2 with the second semiconductor module 162 to pick up the second semiconductor module 162. The gripper 150 can transfer the picked semiconductor modules to the board 300. In this case, the processor 110 can use the ball screw 152 to space apart the first hand pin 153_1 and the second hand pin 153_2 to correspond to the positions of the candidate slots 210_2 and 210_4 determined as the target slots respectively. Thereafter, the processor 110 can lower the gripper 150 through the robotic arm, and the first semiconductor module 161 and the second semiconductor module 162 can be respectively installed in the target slots.

[0067] Therefore, the test device 100 can provide an automated process that flexibly responds to various types of boards and various slot structures by loading semiconductor modules via a gripper capable of adjusting the spacing distance between hands.

[0068] Figure 11A and 11B is a front view of a gripper according to some embodiments.

[0069] Reference Figure 10 、 Figure 11A and Figure 11B , the first hand 153_1 of the gripper 150 can be connected to the frame 151 and can include a pair of first bodies 155_1 and a pair of first holders 154_1. As described above, the plurality of hands 153_1 to 153_4 can be connected to the frame 151 in an X-frame format, and a ball screw 152 can be used to space the intervals between two adjacent hands among the plurality of hands 153_1 to 153_4. Hereinafter, for ease of description, the first hand 153_1 will be described. The following description can be applied to all of the plurality of hands 153_1 to 153_4, and it will be understood that the gripper within the scope of the present disclosure can include other numbers of hands.

[0070] The first hand 153_1 of the gripper 150 can be moved in the third direction z by a robotic arm to pick up a semiconductor module or load a semiconductor module onto a slot or unload a semiconductor module from a slot. In some embodiments, as Figure 11A shown, the first bodies 155_1 of the first hand 153_1 can be paired with each other and spaced apart in the second direction y to hold the third semiconductor module 163. For example, the gripper 150 can space the first bodies 155_1 apart from each other in the second direction y to correspond to the first width L1 of the third semiconductor module 163 in the second direction y. The first holders 154_1 can be respectively connected to the first bodies 155_1, and after the first bodies 155_1 are spaced apart from each other to correspond to the first width L1 of the third semiconductor module 163, the first holders 154_1 can hold the third semiconductor module 163. In some other embodiments, as Figure 11BAs shown, the first bodies 155_1 of the first hands 153_1 can be paired with each other and spaced apart in the second direction y to hold the fourth semiconductor module 164. For example, the gripper 150 can space the first bodies 155_1 apart from each other in the second direction y to correspond to the second width L2 of the fourth semiconductor module 164 in the second direction y. As an example, the third semiconductor module 163 can be a memory installed on a server, a desktop computer, etc., and the fourth semiconductor module 164 can be a memory installed on a notebook, etc. The second width L2 of the fourth semiconductor module 164 can be smaller than the first width L1 of the third semiconductor module 163, and thus the width at which the gripper 150 spaces the first bodies 155_1 apart from each other to hold the fourth semiconductor module 164 can be smaller than the case of holding the third semiconductor module 163. For example, the width at which the first bodies 155_1 are spaced apart in the second direction y can be adjusted to flexibly correspond to the widths of various semiconductor modules. For example, the width of the semiconductor module in the second direction y can be implemented in various ways according to the type of the semiconductor module, the width at which the first bodies 155_1 are spaced apart can be adjusted in various ways accordingly, and the gripper 150 can hold semiconductor modules of various lengths by spacing the first bodies 155_1 apart in the second direction y. In some embodiments, as described above, information about the semiconductor module can also be stored in a database (e.g., database 122), and the processor 110 can control the gripper 150 by receiving information about the semiconductor module to be loaded on the board from the database.

[0071] Therefore, in some embodiments, the test device 100 can not only respond to various structures of the board by controlling the spacing of each hand, but also respond to semiconductor modules of various lengths by controlling the width of the body that connects to the spacing of the holder holding the semiconductor module.

[0072] Figure 12 is a block diagram showing a test system according to some embodiments.

[0073] Reference Figure 1 and Figure 12 As shown in, the test system 1000 can include a central processing unit (CPU) 1100 as an example of a processor, a working memory (or memory) 1200, an input / output (I / O) interface 1300, a storage device 1400, and a system bus 1500. Here, the test system 1000 can be provided as a dedicated device for testing a test device, but can also be a system for installing a memory module into a device.

[0074] The CPU 1100 can execute software (application programs, operating systems, device drivers, etc.) to be executed in the test system 1000. The CPU 1100 can correspond to Figure 1Processor 110. For example, CPU 1100 may execute an operating system (OS) loaded on working memory 1200. CPU 1100 may execute various application programs or modules to be driven based on the OS. For example, CPU 1100 may drive a simulation module 1210 that executes a simulation operation loaded in working memory 1200, and the simulation module 1210 may be a module for selecting a slot for loading a semiconductor module to automate the loading operation of the semiconductor module.

[0075] The OS or application programs may be loaded on working memory 1200. All operations of test system 1000 may be supported by the OS. Similarly, application programs for test automation (such as simulation module 1210) may be loaded into working memory 1200. Working memory 1200 may be a volatile memory (such as static random access memory (SRAM) or dynamic random access memory (DRAM)) or a non-volatile memory (such as phase change random access memory (PRAM), magnetic RAM (MRAM), resistive RAM (ReRAM), ferroelectric RAM (FRAM), or flash memory).

[0076] I / O interface 1300 may control user input and output from user interface devices. For example, I / O interface 1300 may be provided with an output device such as a monitor to display the progress of the test operation and test results of test system 1000.

[0077] Storage device 1400 may be provided as a storage medium for test system 1000. Storage device 1400 may store application programs, the OS, images, and various types of data. Storage device 1400 may correspond to Figure 1 memory 120. In some embodiments, storage device 1400 includes a database, and data regarding various test programs and data regarding board types may be stored in the database. CPU 1100 may determine the conditions for loading the semiconductor module by matching the test information received from the outside with the information stored in the database. In this way, test system 1000 may flexibly respond to various test environments, and may effectively automate the test process by constructing various data as a database.

[0078] Storage device 1400 may be provided as a memory card (such as a multimedia card (MMC), embedded MMC (eMMC), secure digital (SD) card, micro SD card, etc.) or a hard disk drive (HDD). Storage device 1400 may include a NAND type flash memory with a large storage capacity. Alternatively, storage device 1400 may include next-generation non-volatile memory (such as PRAM, MRAM, ReRAM, FRAM, etc.) or flash memory.

[0079] The system bus 1500 can be provided as an interconnector for providing a network inside the test system 1000. The CPU 1100, the working memory 1200, the I / O interface 1300, and the storage device 1400 can be electrically connected via the system bus 1500 and can exchange data with each other. However, the configuration of the system bus 1500 is not limited to the above description and can further include any components for efficient management.

[0080] Although this disclosure contains many specific implementation details, these should not be construed as limitations on the scope of the claimed subject matter. Certain features described in the context of separate embodiments in this disclosure can also be implemented in combination in a single embodiment. Conversely, the various features described in the context of a single embodiment can also be implemented separately or in any suitable sub-combination in multiple embodiments. In addition, although the features may be described above as acting in certain combinations, in some cases one or more features from a combination can be deleted from the combination, and the combination can be directed to a sub-combination or a variation of the sub-combination.

[0081] Although various examples have been shown and described, it will be understood that various changes in form and detail can be made therein without departing from the spirit and scope of this disclosure.

Claims

1. A method of operating a test device for testing a semiconductor module, the method comprising: Receiving test information; Matching test program data and board data stored in a database with the test information; Selecting at least one target slot from among the slots of the board based on the result of the matching; Picking up at least one semiconductor module using a plurality of hands of a gripper of the test device, wherein the number of the at least one semiconductor module matches the number of the at least one target slot; And Loading the at least one semiconductor module into the at least one target slot of the board using the gripper.

2. The method according to claim 1, wherein, Selecting the at least one target slot includes: Selecting candidate slots by distinguishing unused slots among the slots of the board; and Classifying regular slots from among the candidate slots.

3. The method according to claim 2, wherein, Selecting the at least one target slot includes: Selecting the at least one target slot from among the regular slots based on the number of operable semiconductor modules.

4. The method according to claim 2, wherein, Selecting the at least one target slot includes selecting the at least one target slot from among the regular slots based on area information included in the board data.

5. The method according to claim 2, wherein, Selecting the at least one target slot includes: Setting an operation sequence based on the positions of the slots of the board, and Selecting the at least one target slot from among the regular slots according to the operation sequence.

6. The method according to claim 1, wherein, Picking up the at least one semiconductor module includes spacing the plurality of hands to correspond to the at least one target slot.

7. The method according to claim 6, wherein, Each of the plurality of hands is individually controlled to space the plurality of hands.

8. The method according to claim 1, wherein: The database further includes module information characterizing the at least one semiconductor module, and Picking up the at least one semiconductor module includes controlling the holders of the plurality of hands to be spaced based on the length of the at least one semiconductor module indicated by the module information to hold the width of the at least one semiconductor module.

9. The method according to claim 1, wherein The test program data includes information indicating loading conditions based on a test program corresponding to a test purpose, and the board data includes position information of slots based on the type of the board.

10. The method according to claim 1, wherein The test information includes information indicating a test program corresponding to a test purpose and information indicating the type of the board.

11. A device for semiconductor module testing, the device comprising: A gripper; At least one processor; And A memory including a database storing test program data and board data, wherein the at least one processor is configured to: Match received test information with the test program data and the board data; Select at least one target slot from among the slots of the board based on the result of the matching; Control the gripper based on the at least one target slot; Pick up at least one semiconductor module using a plurality of hands of the gripper, wherein the number of the at least one semiconductor module matches the number of the at least one target slot; and Load the at least one semiconductor module into the at least one target slot of the board.

12. The apparatus according to claim 11, wherein, The at least one processor is configured to: Select candidate slots by distinguishing unused slots among the slots of the board; and Classify regular slots from among the candidate slots.

13. The device according to claim 12, wherein, The at least one processor is configured to select the at least one target slot from among the regular slots based on region information included in the board data.

14. The apparatus according to claim 12, wherein, The at least one processor is configured to: set an operation sequence based on the positions of the regular slots; and select the at least one target slot from among the regular slots based on the operation sequence.

15. The apparatus according to claim 11, wherein, The gripper is configured to space the plurality of hands to correspond to the at least one target slot.

16. The apparatus according to claim 11, wherein: the database further includes module information characterizing the at least one semiconductor module, and the gripper is configured to control the holders of the plurality of hands to be spaced apart to hold the width of the at least one semiconductor module according to the length of the at least one semiconductor module indicated by the module information.

17. A method of operating a test apparatus for loading a semiconductor module, the method comprising: receiving type data characterizing a target board on which the semiconductor module is to be loaded; matching board data with the type data, wherein the board data includes position information of slots of the target board, and wherein the board data is stored in a database; selecting at least one target slot from among the slots of the target board based on the result of the matching; generating slot data characterizing the at least one target slot; controlling a gripper of the test apparatus based on the slot data, the gripper including a plurality of hands; and loading the semiconductor module into a first slot of the at least one target slot using the gripper.

18. The method according to claim 17, wherein, Selecting the at least one target slot includes selecting the at least one target slot from among the slots of the target board based on region information included in the board data.

19. The method according to claim 17, wherein, Each of the plurality of hands is controlled individually, and wherein controlling the gripper includes spacing the plurality of hands to correspond to the at least one target slot.

20. The method according to claim 17, wherein, The database further includes module information characterizing the semiconductor module, and wherein the method further includes controlling the holders of the plurality of hands to be spaced apart to hold the width of the semiconductor module according to the length of the semiconductor module indicated by the module information.

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