Display device and electronic device including the same

Abstract

A display device and an electronic device including the same are provided. A display device includes a substrate including a display area and a peripheral area outside the display area. A common voltage supply line is positioned in the peripheral area. The protective conductive layer directly contacts the common voltage supply line. The common electrode extends from the display area to the peripheral area and directly contacts the protective conductive layer. An end portion of the common electrode adjacent to an edge of the substrate is closer to the edge of the substrate than an end portion of the protective conductive layer adjacent to the edge of the substrate.

Description

[0001] Cross - reference to related applications

[0002] This application claims priority to Korean Patent Application No. 10 - 2023 - 0197606, filed with the Korean Intellectual Property Office on December 29, 2023, the disclosure of which is incorporated herein by reference in its entirety. Technical field

[0003] One or more embodiments relate to a display device and an electronic device including the display device, and more particularly, to a display device and an electronic device that can prevent or reduce defects occurring during a manufacturing process. Background art

[0004] Generally, a display device includes a plurality of display devices positioned in a display area. Each of the plurality of display devices may include a pixel electrode and a counter electrode. The counter electrode may be integrally formed in the plurality of display devices. The integrally formed counter electrode may be referred to as a common electrode.

[0005] Conventional display devices and electronic devices including the display devices may have defects such as dielectric breakdown in some insulating layers that occur during a manufacturing process. Summary of the invention

[0006] One or more embodiments include a display device and an electronic device including the display device that can prevent or reduce defects occurring during a manufacturing process. However, the embodiments of the present disclosure are examples and do not limit the scope of the present disclosure.

[0007] Additional aspects will be set forth in part in the following description, will be apparent in part from the description, or may be learned by practice of the presented embodiments.

[0008] According to an embodiment of the present disclosure, a display device includes a substrate including a display area and a peripheral area outside the display area. A common voltage supply line is positioned in the peripheral area. A protective conductive layer directly contacts the common voltage supply line. A common electrode extends from the display area to the peripheral area and directly contacts the protective conductive layer. An end of the common electrode adjacent to an edge of the substrate is closer to the edge of the substrate than an end of the protective conductive layer adjacent to the edge of the substrate.

[0009] In an embodiment, the protective conductive layer may directly contact a top surface of the common voltage supply line.

[0010] In an embodiment, the display device may further include a first insulating layer covering the common voltage supply line. The first insulating layer includes a first opening exposing a part of the top surface of the common voltage supply line. The protective conductive layer is disposed on the first insulating layer and directly contacts the common voltage supply line through the first opening.

[0011] In an embodiment, the common electrode may directly contact the top surface of the protective conductive layer.

[0012] In an embodiment, the end portion of the protective conductive layer may be disposed on the top surface of the first insulating layer.

[0013] In an embodiment, the display device may further include a second insulating layer covering the protective conductive layer. The second insulating layer includes a second opening exposing a part of the top surface of the protective conductive layer. The common electrode is disposed on the second insulating layer and directly contacts the protective conductive layer through the second opening.

[0014] In an embodiment, the end portion of the common electrode may be disposed on the top surface of the second insulating layer.

[0015] In an embodiment, the end portion of the common electrode may be closer to the edge of the substrate than the end portion adjacent to the edge of the substrate of the part of the top surface of the common voltage supply line exposed through the first opening.

[0016] In an embodiment, the display device may further include a protective insulating layer disposed between the common voltage supply line and the first insulating layer. The protective insulating layer includes an additional opening exposing a part of the top surface of the common voltage supply line. When observed in a direction perpendicular to the substrate, the end portion of the common electrode coincides with the end portion of the part of the top surface of the common voltage supply line exposed through the additional opening.

[0017] In an embodiment, the area of the additional opening in the plan view may be larger than the area of the first opening in the plan view.

[0018] In an embodiment, when observed in a direction perpendicular to the substrate, the first opening may be located inside the additional opening.

[0019] In an embodiment, the display device may further include a pixel electrode positioned in the display area, wherein the protective conductive layer and the pixel electrode include the same material as each other.

[0020] In an embodiment, each of the protective conductive layer and the pixel electrode may include a transparent conductive layer.

[0021] In an embodiment, the pixel electrode and the protective conductive layer may be disposed in the same layer.

[0022] In an embodiment, the distance between the end portion of the common electrode and the end portion of the protective conductive layer may be in the range of about 300 μm to about 1000 μm.

[0023] In an embodiment, the display device may further include a dam positioned in the peripheral area and surrounding the display area. The inorganic encapsulation layer is disposed on the common electrode and extends outward from the common electrode to the dam.

[0024] According to an embodiment of the present disclosure, a display device includes a substrate including a display area and a peripheral area outside the display area. A common voltage supply line is positioned in the peripheral area. A protective conductive layer directly contacts the common voltage supply line. A common electrode extends from the display area to the peripheral area and directly contacts the protective conductive layer. When observed in a direction perpendicular to the substrate, an area of a portion of the common electrode overlapping with the common voltage supply line is larger than an area of a portion of the protective conductive layer overlapping with the common voltage supply line.

[0025] In an embodiment, an end portion of the common voltage supply line adjacent to an edge of the substrate may be closer to the edge of the substrate than an end portion of the protective conductive layer adjacent to the edge of the substrate.

[0026] In an embodiment, the protective conductive layer may directly contact a top surface of the common voltage supply line.

[0027] In an embodiment, the display device may further include a first insulating layer covering the common voltage supply line and including a first opening exposing a portion of the top surface of the common voltage supply line. The protective conductive layer is disposed on the first insulating layer and directly contacts the common voltage supply line through the first opening.

[0028] In an embodiment, the common electrode may directly contact a top surface of the protective conductive layer.

[0029] In an embodiment, an end portion of the protective conductive layer adjacent to an edge of the substrate may be disposed on a top surface of the first insulating layer.

[0030] In an embodiment, the display device may further include a second insulating layer covering the protective conductive layer. The second insulating layer includes a second opening exposing a portion of the top surface of the protective conductive layer. The common electrode is disposed on the second insulating layer and directly contacts the protective conductive layer through the second opening.

[0031] In an embodiment, an end portion of the common electrode adjacent to an edge of the substrate may be disposed on a top surface of the second insulating layer.

[0032] According to an embodiment of the present disclosure, a display device includes a substrate including a display area and a peripheral area outside the display area. A common voltage supply line is positioned in the peripheral area. A first insulating layer covers the common voltage supply line. The first insulating layer includes a first opening exposing a part of the top surface of the common voltage supply line. A protective conductive layer covers the whole of the part of the top surface of the common voltage supply line exposed by the first opening. A second insulating layer covers the protective conductive layer. The second insulating layer includes a second opening exposing a part of the top surface of the protective conductive layer. A common electrode extends from the display area to the peripheral area and covers the whole of the part of the top surface of the protective conductive layer exposed by the second opening. The protective conductive layer electrically connects the common voltage supply line to the common electrode. An end of the common electrode adjacent to an edge of the substrate is closer to the edge of the substrate than an end of the protective conductive layer adjacent to the edge of the substrate.

[0033] In an embodiment, a distance between an end of the common electrode and an end of the protective conductive layer is in a range of about 300 μm to about 1000 μm.

[0034] In an embodiment, the end of the protective conductive layer is directly disposed on an upper surface of the first insulating layer. The end of the common electrode is directly disposed on an upper surface of the second insulating layer.

[0035] According to an embodiment of the present disclosure, an electronic device includes one of the above display devices.

[0036] In an embodiment, the electronic device may be at least one of a smart phone, a mobile phone, a smart watch, a navigation device, a gaming device, a television (TV), an in-vehicle unit, a notebook computer, a laptop computer, a tablet computer, a personal media player (PMP), and a personal digital assistant (PDA).

[0037] Other aspects, features, and advantages of the present disclosure will become more apparent through the detailed description, claims, and drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0038] Through the following description with reference to the accompanying drawings, the above and other aspects, features, and advantages of certain embodiments of the present disclosure will become more apparent, in which:

[0039] Figure 1 is a plan view schematically showing a part of a display device according to an embodiment of the present disclosure;

[0040] Figure 2 is schematically showing according to an embodiment of the present disclosure Figure 1 sectional view of part A;

[0041] Figure 3 is schematically showing in the manufacturing according to an embodiment of the present disclosure Figure 1A cross-sectional view of the state during the process of the display device; and

[0042] Figure 4 is a cross-sectional view schematically showing a part of a display device according to an embodiment of the present disclosure. Detailed Description of the Embodiment

[0043] Reference will now be made in detail to non-limiting embodiments shown in the accompanying drawings by way of examples, in which the same reference numerals always refer to the same elements throughout. In this regard, the present embodiments may have different forms and should not be construed as limited to the descriptions set forth herein. Therefore, the embodiments are described below only by referring to the respective drawings to explain aspects of the present disclosure. As used herein, the term "and / or" includes any and all combinations of one or more of the related listed items. Throughout the present disclosure, the expression "at least one of a, b, and c" indicates only a, only b, only c, both a and b, both a and c, both b and c, all of a, b, and c, or variants thereof.

[0044] Since the present disclosure allows various changes and many embodiments, some embodiments will be shown in the accompanying drawings and described in the detailed description. The effects and features of the present disclosure and the methods for achieving them will become clear by referring to the embodiments described in detail with reference to the accompanying drawings. However, the present disclosure is not limited to the described embodiments and can be implemented in various forms.

[0045] Hereinafter, embodiments will be described in detail with reference to the accompanying drawings, in which the same or corresponding elements are always denoted by the same reference numerals, and the repeated description thereof is omitted.

[0046] It should be understood that when a component (such as a layer, film, region, or plate) is referred to as being "on" another component, the component may be directly on the other component, or there may be an intervening component therebetween. When a component (such as a layer, film, region, or plate) is referred to as being "directly" on another component, there may be no intervening component therebetween. In addition, for convenience of explanation, the dimensions of the components in the drawings may be exaggerated or reduced. For example, since the dimensions and thicknesses of the components in the drawings may be arbitrarily shown for convenience of explanation, the embodiments of the present disclosure are not necessarily limited thereto.

[0047] In the following examples, the x-axis, y-axis, and z-axis are not necessarily limited to the three axes of a rectangular coordinate system and can be interpreted in a broader sense. For example, the x-axis, y-axis, and z-axis may be perpendicular to each other, or may represent different directions that intersect each other and are not perpendicular to each other. In the embodiments of the present disclosure, the x-axis direction may include the +x direction indicated by the arrow and the -x direction opposite thereto, the y-axis direction may include the +y direction indicated by the arrow and the -y direction opposite thereto, and the z-axis direction may include the +z direction indicated by the arrow and the -z direction opposite thereto.

[0048] Although terms such as "first", "second", etc. may be used to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another.

[0049] It should also be understood that the term "comprises" or "comprising" as used herein specifies the presence of the described feature or component, but does not exclude the presence or addition of one or more other features or components.

[0050] "A and / or B" is used herein to select only A, only select B, or select both A and B. "At least one of A and B" is used to select only A, only select B, or select both A and B.

[0051] It should be understood that when a layer, region, or component is referred to as "connected", the layer, region, or component can be directly connected or can be indirectly connected in the case of having an intermediate layer, region, or component therebetween. For example, when a layer, region, or component is referred to as "electrically connected", the layer, region, or component can be directly electrically connected, or can be indirectly electrically connected in the case of having an intermediate layer, region, or component therebetween.

[0052] Figure 1 is a plan view schematically showing a part of a display device according to an embodiment of the present disclosure. The display device according to the embodiment includes a display panel 10. The display device can be any electronic device including the display panel 10 or the display device. For example, in an embodiment, the display device can be any one of various electronic devices such as a smart phone, a mobile phone, a smart watch, a navigation device, a game device, a notebook computer, a tablet computer, a laptop computer, a personal media player (PMP), a personal digital assistant (PDA), an in-vehicle unit, or a television (TV). However, the embodiments of the present disclosure are not necessarily limited thereto, and the display device can be various other small, medium, or large electronic devices.

[0053] In an embodiment, the display panel 10 includes a display area DA and a peripheral area PA outside the display area DA (e.g., in the x-axis direction and / or the y-axis direction). The display area DA is a part of the display panel 10 where an image is displayed. A plurality of pixels can be located in the display area DA. In an embodiment, when observed in a direction substantially perpendicular to the display panel 10 (e.g., in the z-axis direction), the display area DA can (e.g., in a plane defined by the x-axis direction and the y-axis direction) have any one of various shapes such as a circular shape, an oval shape, a polygonal shape, and a specific graphic shape. In the Figure 1 embodiment shown as

[0054] The peripheral area PA can be located outside the display area DA. In an embodiment, the width of a part of the peripheral area PA (e.g., in the x-axis direction) can be smaller than the width of the display area DA (e.g., in the x-axis direction). With this structure, at least a part of the peripheral area PA can be easily bent when necessary.

[0055] The display panel 10 includes a substrate 101 (see Figure 2 ). In an embodiment, the substrate 101 can include a display area DA and a peripheral area PA. However, the embodiments of the present disclosure are not necessarily limited to this. For convenience, it will be assumed below that the substrate 101 includes a display area DA and a peripheral area PA for description.

[0056] In an embodiment, a plurality of data lines DL can be located in the display area DA to pass through the display area DA. Similarly, a plurality of power lines PL can be located in the display area DA to pass through the display area DA. Although for convenience, in Figure 1 the data lines DL are marked by solid lines and the power lines PL are marked by dashed lines, in some embodiments, the data lines DL and the power lines PL can be formed synchronously in the same layer using the same material.

[0057] In addition, in some embodiments, the display panel 10 can include a main region MR, a bending region BR outside the main region MR, and a sub-region SR positioned opposite to the main region MR across the bending region BR. In the bending region BR, the display panel 10 can be bent such that at least a part of the sub-region SR overlaps with the main region MR when viewed in the z-axis direction. However, the embodiments of the present disclosure are not necessarily limited to bendable display devices, and in some embodiments, the display panel 10 can also be applied to non-bendable display devices. The sub-region SR can be a non-display area. As the display panel 10 bends in the bending region BR, when viewed from the front surface (e.g., in the -z direction), the non-display area can be invisible, or even if it is visible, the visible area can be reduced.

[0058] A driving chip 20 can be located in the sub-region SR of the display panel 10. In an embodiment, the driving chip 20 can include an integrated circuit for driving the display panel 10. In an embodiment, the integrated circuit can be but is not necessarily limited to a data driving integrated circuit that generates data signals.

[0059] The driving chip 20 can be mounted in the sub-region SR of the display panel 10. Although the driving chip 20 is mounted on the same surface as the display surface of the display area DA, as described above, as the display panel 10 bends in the bending region BR, the driving chip 20 can be disposed on the back surface of the main region MR.

[0060] In an embodiment, a printed circuit board 30 or the like may be attached to an end of a sub-region SR of the display panel 10. In an embodiment, the printed circuit board 30 or the like may be electrically connected to the driving chip 20 through a plurality of pads disposed along one edge of the substrate.

[0061] Hereinafter, although the organic light-emitting display device is described as a display device according to an embodiment, the display device of the embodiment of the present disclosure is not necessarily limited thereto. For example, in some embodiments of the present disclosure, the display device may be an inorganic light-emitting display device or an inorganic electroluminescent (EL) display device, or a quantum dot light-emitting display device. For example, an emission layer of a display device included in the display device may include an organic material or an inorganic material. In addition, the display device may include an emission layer and a quantum dot layer positioned in a path of light emitted from the emission layer.

[0062] As described above, the display panel 10 includes a substrate 101. Various elements included in the display panel 10 may be disposed on the substrate 101. In an embodiment, the substrate 101 may include glass, metal, or a polymer resin. In the embodiment where the display panel 10 is bendable in the bending region BR as described above, the substrate 101 needs to be flexible or bendable. In the present embodiment, the substrate 101 may include a polymer resin such as polyethersulfone, polyacrylate, polyetherimide, polyethylene naphthalate, polyethylene terephthalate, polyphenylene sulfide, polyarylate, polyimide, polycarbonate, or cellulose acetate propionate.

[0063] A plurality of pixels are positioned in the display area DA. Each of the plurality of pixels refers to a sub-pixel and may include a display device such as an organic light-emitting diode (OLED). In an embodiment, for example, each pixel may emit red light, green light, blue light, or white light. However, the embodiments of the present disclosure are not necessarily limited thereto, and the pixels may emit light of various different colors.

[0064] Each pixel may be electrically connected to an external circuit positioned in the peripheral area PA. For example, in an embodiment, a scan driving circuit, an emission control driving circuit, pads, power lines, and a common voltage supply line 220 (see Figure 2 ) may be positioned in the peripheral area PA. The scan driving circuit may provide a scan signal to the pixels through scan lines. The emission control driving circuit may provide an emission control signal to the pixels through emission control lines. In an embodiment, the pads positioned in the peripheral area PA of the substrate 101 may be exposed without being covered by an insulating layer and may be electrically connected to the printed circuit board 30. Terminals of the printed circuit board 30 may be electrically connected to the pads of the display panel 10.

[0065] In an embodiment, the printed circuit board 30 transmits signals or power of the controller to the display panel 10. For example, a control signal generated by the controller may be transmitted to the driving circuit through the printed circuit board 30. In addition, the controller may transmit a first power voltage to the power line and may transmit a second power voltage to the common voltage supply line 220. The first power voltage (e.g., ELVDD or driving voltage) may be transmitted to each pixel through the power line PL connected to the power line, and the second power voltage (e.g., ELVSS or common voltage) may be transmitted to the common electrode 213 of the pixel through the common voltage supply line 220 (see Figure 2 ). In an embodiment, the common voltage supply line 220 may have an annular shape with an open side on which the driving chip 20 or the like is positioned to partially surround the display area DA. For example, in an embodiment, the common voltage supply line 220 may have a shape extending along the first edge E1, the third edge E3, and the second edge E2 of the display panel 10 and partially surrounding the display area DA. The protective conductive layer 116 described below may also have such a shape.

[0066] The controller may generate a data signal, and the generated data signal may be transmitted to the pixel through the driving chip 20 and the data line DL.

[0067] For reference, the term "line" may refer to "wiring". This applies to the following embodiments and their modifications.

[0068] Figure 2 is a cross-sectional view schematically showing part A of Figure 1 according to an embodiment of the present disclosure. As described above, the display panel 10 may include a curved region BR and a sub-region SR outside the main region MR. The display panel 10 may include a first edge E1 and a second edge E2 as two edges extending away from the curved region BR and the sub-region SR (e.g., in the +y direction), and may include a third edge E3 positioned in a direction opposite to the curved region BR across the display area DA (e.g., the +y direction) and extending in a direction connecting the first edge E1 to the second edge E2 (e.g., the +x direction). Part A may be a part positioned near the third edge E3 and including the display area DA and the peripheral area PA.

[0069] A buffer layer 102 may be provided on the substrate 101 (e.g., directly provided thereon in the +z direction). The buffer layer 102 may planarize the top surface of the substrate 101 and may prevent impurities such as oxygen or moisture from passing through the substrate 101 from the outside. In an embodiment, the buffer layer 102 may include an inorganic insulating material such as silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, aluminum nitride, titanium oxide, titanium nitride, tantalum oxide, hafnium oxide, or zirconium oxide, or an organic insulating material such as polyimide, polyester, or acrylic. The buffer layer 102 may have a single-layer structure or a multi-layer structure. The buffer layer 102 may be located not only in the display area DA but also in the peripheral area PA. In an embodiment, the buffer layer 102 may be integrally formed in the display area DA and the peripheral area PA.

[0070] In an embodiment, thin film transistors 200a and an organic light emitting element 200b electrically connected to the thin film transistors 200a may be located in the display area DA.

[0071] In an embodiment, the thin film transistor 200a may include an active layer 203, a gate electrode 205, a source electrode 207, and a drain electrode 208. Hereinafter, it will be described assuming that the thin film transistor 200a is a top-gate transistor in which the active layer 203, the gate electrode 205, the source electrode 207, and the drain electrode 208 are sequentially formed. However, the embodiments of the present disclosure are not necessarily limited thereto, and the display device may include any one of various types of thin film transistors 200a such as a bottom-gate transistor.

[0072] The active layer 203 may be provided on the buffer layer 102 (e.g., directly provided thereon in the +z direction). In an embodiment, the active layer 203 may include a semiconductor material, for example, amorphous silicon or polycrystalline silicon. However, the embodiments of the present disclosure are not necessarily limited thereto, and the active layer 203 may include various materials. For example, the active layer 203 may include an organic semiconductor material, or may include an oxide semiconductor material. In an embodiment, for example, the oxide semiconductor material may be an oxide of a metal element such as zinc (Zn), indium (In), gallium (Ga), tin (Sn), cadmium (Cd), and germanium (Ge) selected from Group 12, Group 13, and Group 14 and combinations thereof.

[0073] The gate insulating film 104 may cover the active layer 203. In an embodiment, the gate insulating film 104 may include an inorganic insulating material such as silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, aluminum nitride, titanium oxide, titanium nitride, tantalum oxide, hafnium oxide, or zirconium oxide. The gate insulating film 104 may have a single-layer structure or a multi-layer structure. The gate insulating film 104 may insulate the active layer 203 from the gate electrode 205. The gate insulating film 104 may extend not only to the display area DA but also to at least a part of the peripheral area PA.

[0074] The gate electrode 205 may be disposed on the gate insulating film 104 (e.g., directly disposed thereon in the +z direction). In an embodiment, the gate electrode 205 may be electrically connected to a gate line that applies an on / off signal to the gate of the thin film transistor 200a. For example, when viewed in the z-axis direction (e.g., in a plan view), the gate electrode 205 is a part of the gate line that overlaps with the active layer 203.

[0075] The gate electrode 205 may include a metallic material. In an embodiment, considering the adhesiveness to adjacent layers, the surface flatness of the stacked layers, and the processability, the gate electrode 205 may include, for example, aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), lithium (Li), calcium (Ca), molybdenum (Mo), titanium (Ti), tungsten (W), or copper (Cu). However, the embodiments of the present disclosure are not necessarily limited thereto. The gate electrode 205 may have a single-layer structure or a multi-layer structure. For example, in an embodiment, the gate electrode 205 may have a three-layer structure, such as a structure including a molybdenum layer, an aluminum layer, and a molybdenum layer.

[0076] The interlayer insulating film 106 may cover the gate electrode 205. The source electrode 207 and / or the drain electrode 208 may be disposed on the interlayer insulating film 106 (e.g., directly disposed thereon in the +z direction). For example, the interlayer insulating film 106 may electrically insulate the source electrode 207 and the drain electrode 208 from the gate electrode 205. In an embodiment, the interlayer insulating film 106 may include an inorganic insulating material, such as silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, aluminum nitride, titanium oxide, titanium nitride, tantalum oxide, hafnium oxide, or zirconium oxide. The interlayer insulating film 106 may have a single-layer structure or a multi-layer structure. The interlayer insulating film 106 may extend not only to the display area DA but also to at least a part of the peripheral area PA.

[0077] The source electrode 207 and / or the drain electrode 208 may be disposed on the interlayer insulating film 106 (e.g., directly disposed thereon in the +z direction). In an embodiment, the source electrode 207 and / or the drain electrode 208 may include aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), lithium (Li), calcium (Ca), molybdenum (Mo), titanium (Ti), tungsten (W), or copper (Cu). The source electrode 207 and / or the drain electrode 208 may have a single-layer structure or a multi-layer structure. For example, in an embodiment, the source electrode 207 and / or the drain electrode 208 may have a three-layer structure, such as a structure including a titanium layer, an aluminum layer, and a titanium layer.

[0078] Although in Figure 2In the embodiment shown, the thin film transistor 200a includes both a source electrode 207 and a drain electrode 208, but the embodiments of the present disclosure are not necessarily limited thereto. For example, in an embodiment, a pixel circuit for controlling the operation of one organic light emitting element 200b may include a plurality of thin film transistors. In an embodiment, an active layer 203 included in a first thin film transistor, which is one of the plurality of thin film transistors, may be integrally formed with an active layer 203 included in a second thin film transistor, which is another one of the plurality of thin film transistors. In the present embodiment, the first thin film transistor may not include a drain electrode, and the second thin film transistor may not include a source electrode. For example, a drain region of the active layer 203 included in the first thin film transistor and a source region of the active layer 203 included in the second thin film transistor may be connected to each other or integrally formed.

[0079] The source electrode 207 and / or the drain electrode 208 may be part of a signal line or part of a connection electrode. For example, in an embodiment, the source electrode 207 and / or the drain electrode 208 may be part of a data line DL, or may be part of a connection electrode disposed between the data line DL and the active layer 203 to electrically connect the data line DL to the active layer 203. In the present embodiment, when viewed in the z-axis direction (e.g., in a plan view), the source electrode 207 and / or the drain electrode 208 may be a part of the signal line or the connection electrode that overlaps with the active layer 203. In an embodiment, the source electrode 207 and / or the drain electrode 208 may directly contact the active layer 203 through a contact hole formed in the interlayer insulating film 106.

[0080] The planarization layer 109 may cover the thin film transistor 200a. In an embodiment, although there are thin film transistors 200a and the like located below the planarization layer 109, the planarization layer 109 may have a substantially flat top surface. In an embodiment, the planarization layer 109 may include an organic insulating material. For example, in an embodiment, the planarization layer 109 may include benzocyclobutene (BCB), polyimide, hexamethyldisiloxane (HMDSO), polymethyl methacrylate (PMMA), polystyrene, a polymer derivative having a phenolic group, an acrylic polymer, an imide-based polymer, an aryl ether-based polymer, an amide-based polymer, a fluorinated polymer, a parylene polymer, a vinyl alcohol-based polymer, or a blend thereof.

[0081] At least one insulating layer including an inorganic insulating material may be disposed between the thin film transistor 200a and the planarization layer 109. A connection electrode or a signal line may be disposed between the insulating layer and the planarization layer 109. In an embodiment in which a plurality of insulating layers including an inorganic insulating material are disposed between the thin film transistor 200a and the planarization layer 109, a connection electrode or a signal line may also be disposed between the plurality of insulating layers.

[0082] The organic light-emitting element 200b may be disposed on the planarization layer 109 (e.g., directly thereon in the +z direction). The organic light-emitting element 200b may include a pixel electrode 210, an intermediate layer 212 including an emission layer, and a counter electrode 213.

[0083] The pixel electrode 210 may be a (semi) transmissive electrode or a reflective electrode. For example, in an embodiment, the pixel electrode 210 may include a reflective layer containing silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), or a compound thereof, and a transparent conductive layer disposed on the reflective layer. The transparent conductive layer may include at least one selected from the group consisting of indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO or ZnO2), indium oxide (In2O3), indium gallium oxide (IGO), and aluminum zinc oxide (AZO). For example, in an embodiment, the pixel electrode 210 may have a three-layer structure including ITO / Ag / ITO.

[0084] The pixel defining film 119 may be disposed on the planarization layer 109 (e.g., directly thereon). For example, in an embodiment, the pixel defining film 119 may cover the lateral edges of the pixel electrode 210. The pixel defining film 119 may have an opening defined to expose the central portion of the pixel electrode 210. The pixel defining film 119 may increase the distance between the edge of the pixel electrode 210 and the counter electrode 213 above the pixel electrode 210 to prevent arcing or the like at the edge of the pixel electrode 210.

[0085] In an embodiment, the pixel defining film 119 may be formed of at least one organic insulating material selected from the group consisting of polyimide, polyamide, acrylic resin, benzocyclobutene, and phenolic resin by using spin coating or the like.

[0086] At least a part of the intermediate layer 212 of the organic light-emitting element 200b may be positioned in the opening defined in the pixel defining film 119. The emission region of the organic light-emitting element 200b may be defined by the opening and may overlap with the opening (e.g., in the z-axis direction).

[0087] The intermediate layer 212 may include an emission layer. In an embodiment, the emission layer may include an organic material containing a fluorescent or phosphorescent material that emits red light, green light, blue light, or white light. The emission layer may be formed of a low molecular weight organic material or a high molecular weight organic material, and functional layers such as a hole transport layer (HTL), a hole injection layer (HIL), an electron transport layer (ETL), and an electron injection layer (EIL) may be selectively positioned below and above the emission layer.

[0088] The emission layer may be patterned to correspond to each of the pixel electrodes 210. However, embodiments of the present disclosure are not necessarily limited thereto, and various modifications may be made to the intermediate layer 212. For example, in some embodiments, layers other than the emission layer included in the intermediate layer 212 may be integrally formed over a plurality of pixel electrodes 210.

[0089] The counter electrode 213 may be a transmissive electrode or a reflective electrode. For example, in an embodiment, the counter electrode 213 may be a transparent or translucent electrode and may include Li, Ca, Al, Ag, Mg, or a compound thereof (e.g., LiF). Additionally, the counter electrode 213 may further include a transparent conductive oxide (TCO) film disposed on a metal thin film, such as ITO, IZO, ZnO, or In2O3. The counter electrode 213 may be integrally formed over the entire display area DA and may be disposed on the intermediate layer 212 and the pixel defining film 119. For example, the counter electrode 213 in a plurality of organic light emitting elements 200b may be one electrode. In this regard, the counter electrode 213 may be referred to as a common electrode.

[0090] The organic light emitting element 200b may be electrically connected to the thin film transistor 200a. Although in Figure 2 the embodiment shown in Figure 2 the pixel electrode 210 directly contacts the drain electrode 208 of the thin film transistor 200a, embodiments of the present disclosure are not necessarily limited thereto, and various modifications may be made. For example, in an embodiment, a connection electrode may be disposed between the pixel electrode 210 and the drain electrode 208 of the thin film transistor 200a for electrical connection therebetween.

[0091] In an embodiment, the common voltage supply line 220 may be positioned in the peripheral area PA outside the display area DA. The common voltage supply line 220 may be electrically connected to the common electrode 213 to apply a second power supply voltage (e.g., ELVSS or a common voltage) to the common electrode 213. In Figure 2In this case, like the source electrode 207 and / or the drain electrode 208 of the thin film transistor 200a, the common voltage supply line 220 is provided on the interlayer insulating film 106 (e.g., directly provided thereon in the +z direction). In the present embodiment, the common voltage supply line 220 may be formed synchronously with the source electrode 207 and / or the drain electrode 208 of the thin film transistor 200a from the same material. However, the embodiments of the present disclosure are not necessarily limited thereto. For example, in the embodiment, like the gate electrode 205 of the thin film transistor 200a, the common voltage supply line 220 may be provided on the gate insulating film 104 (e.g., directly provided thereon in the +z direction). In the present embodiment, the common voltage supply line 220 may be formed synchronously with the gate electrode 205 of the thin film transistor 200a from the same material. For the convenience of explanation, hereinafter, it will be assumed that the common voltage supply line 220 is provided on the interlayer insulating film 106 like the source electrode 207 and / or the drain electrode 208 of the thin film transistor 200a (e.g., directly provided thereon in the +z direction) for description.

[0092] In Figure 2 this case, the common voltage supply line 220 is only provided under the planarization layer 109. However, the embodiments of the present disclosure are not necessarily limited thereto. For example, different from Figure 2 this case, in the embodiment, the common voltage supply line 220 may also extend toward the edge of the substrate 101 (in the +y direction) to be positioned under at least one of the dams 121, 122, 123, and 124.

[0093] Since the common voltage supply line 220 is electrically connected to the common electrode 213 as described above, the protective conductive layer 116 may be placed (e.g., in the z-axis direction) between the common voltage supply line 220 and the common electrode 213. For example, the protective conductive layer 116 may directly contact both the common voltage supply line 220 and the common electrode 213. For example, the common electrode 213 may extend from the display area DA to the peripheral area PA to directly contact the protective conductive layer 116, so that the common electrode 213 is electrically connected to the common voltage supply line 220.

[0094] As Figure 2 shown in this case, in the embodiment, like the pixel electrode 210, the protective conductive layer 116 may be provided on the planarization layer 109 (e.g., directly provided thereon). In the present embodiment, the protective conductive layer 116 and the pixel electrode 210 may be formed synchronously using the same material, and thus, the protective conductive layer 116 and the pixel electrode 210 may have the same layer structure.

[0095] During the process of manufacturing a display device, the process of forming various elements may be performed after forming the common voltage supply line 220 and before forming the common electrode 213. In an embodiment where there is no protective conductive layer 116, then during this process, the top surface of the common voltage supply line 220 may be damaged or oxidized. If the top surface of the common voltage supply line 220 is damaged or oxidized, an appropriate second power supply voltage (e.g., ELVSS or common voltage) may not be applied to the common electrode 213 through the common voltage supply line 220. Therefore, by providing the protective conductive layer 116 on the common voltage supply line 220 such that the protective conductive layer 116 directly contacts the top surface of the common voltage supply line 220, damage or oxidation of the top surface of the common voltage supply line 220 can be prevented or reduced.

[0096] As described above, in an embodiment, the pixel electrode 210 may include a transparent conductive layer containing a conductive oxide such as indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO or ZnO2), indium oxide (In2O3), indium gallium oxide (IGO), or aluminum zinc oxide (AZO). Therefore, the protective conductive layer 116 may also include a transparent conductive layer containing a conductive oxide. Thus, damage or oxidation of the top surface of the protective conductive layer 116 during the process after forming the protective conductive layer 116 can be prevented or reduced.

[0097] As Figure 2 shown, the planarization layer 109 may partially cover the common voltage supply line 220 and may have a first opening OP1 defined to expose a part of the top surface of the common voltage supply line 220. For convenience, the planarization layer 109 may be referred to as the first insulating layer, and the first insulating layer may include the first opening OP1. As described above, in an embodiment, at least one insulating layer including an inorganic insulating material may be disposed between the thin film transistor 200a and the planarization layer 109. In this embodiment, the at least one insulating layer and the planarization layer 109 may be collectively referred to as the first insulating layer, and the first insulating layer may include the first opening OP1. The protective conductive layer 116 may be disposed on the first insulating layer and may directly contact the top surface of the common voltage supply line 220 through the first opening OP1. For example, the protective conductive layer 116 may be directly disposed on the first insulating layer and may directly contact and cover a part of the top surface of the common voltage supply line 220 exposed through the first opening OP1.

[0098] For reference, although Figure 2 is schematically shown Figure 1A cross-sectional view of part A, and thus, a part of the planarization layer 109 covering a part of the common voltage supply line 220 (e.g., in the -y direction) toward the display area DA and a part of the planarization layer 109 covering a part of the common voltage supply line 220 (in the +y direction) toward the edge of the substrate 101 (e.g., the third edge E3) are spaced apart from each other, but the part of the planarization layer 109 covering the part of the common voltage supply line 220 (e.g., in the -y direction) toward the display area DA and the part of the planarization layer 109 covering the part of the common voltage supply line 220 (e.g., in the +y direction) toward the edge of the substrate 101 can be integrally formed. For example, in a plan view, the first opening OP1 can surround most of the display area DA, but may not completely surround the perimeter of the display area DA.

[0099] Since the top surface of the common voltage supply line 220 is directly contacted by the protective conductive layer 116 as described above, damage or oxidation of the top surface of the common voltage supply line 220 can be effectively prevented or reduced. In an embodiment, the protective conductive layer 116 can cover the entire part of the common voltage supply line 220 exposed through the first opening OP1 of the first insulating layer. Thus, the end of the protective conductive layer 116 (in the +y direction) toward the edge of the substrate 101 can be disposed on the top surface of the first insulating layer such that the protective conductive layer 116 reliably covers the part of the common voltage supply line 220 exposed through the first opening OP1 of the first insulating layer.

[0100] As Figure 2 shown, the pixel defining film 119 can partially cover the protective conductive layer 116 and can have a second opening OP2 defined to expose a part of the top surface of the protective conductive layer 116. For convenience, the pixel defining film 119 can be referred to as the second insulating layer, and the second insulating layer can include the second opening OP2. The common electrode 213 can be disposed on the second insulating layer (e.g., directly thereon in the +z direction) and can directly contact the top surface of the protective conductive layer 116 through the second opening OP2. For example, the common electrode 213 can be disposed on the second insulating layer (e.g., directly thereon in the +z direction) and can directly contact and cover the whole part of the top surface of the protective conductive layer 116 exposed through the second opening OP2.

[0101] The width of the second opening OP2 (e.g., the length in the y-axis direction) can be greater than the width of the first opening OP1 (e.g., the length in the y-axis direction). For example, in as Figure 2In the cross-sectional view shown, the width of the second opening OP2 may be greater than the width of the first opening OP1. When viewed in a direction perpendicular to the substrate 101 (e.g., in the z-axis direction), i.e., in a plan view, the area of the second opening OP2 may be greater than the area of the first opening OP1. Further, in the plan view, the first opening OP1 may overlap with the second opening OP2. For example, in the plan view, the first opening OP1 may be located inside the second opening OP2.

[0102] For reference, although Figure 2 is a cross-sectional view schematically showing Figure 1 a part A, and thus, a part of the pixel defining film 119 covering a part of the protective conductive layer 116 facing the display area DA (e.g., in the -y direction) and a part of the pixel defining film 119 covering a part of the protective conductive layer 116 facing the edge of the substrate 101 (e.g., in the +y direction) are spaced apart from each other, the part of the pixel defining film 119 covering the part of the protective conductive layer 116 facing the display area DA (e.g., in the -y direction) and the part of the pixel defining film 119 covering the part of the protective conductive layer 116 facing the edge of the substrate 101 (e.g., in the +y direction) may be integrally formed. For example, in the plan view, the second opening OP2 may surround most of the display area DA, but may not completely surround the perimeter of the display area DA.

[0103] Sufficient contact area should be provided between the protective conductive layer 116 and the common electrode 213 to sufficiently transmit an electrical signal from the common voltage supply line 220 to the common electrode 213. In an embodiment, the common electrode 213 may cover the entire portion of the protective conductive layer 116 exposed through the second opening OP2 of the second insulating layer. Accordingly, an end portion of the common electrode 213 facing the edge of the substrate 101 (such as the third edge E3) (in the +y direction) may be disposed on the top surface of the second insulating layer so that the common electrode 213 reliably covers the entire portion of the protective conductive layer 116 exposed through the second opening OP2 of the second insulating layer.

[0104] As Figure 2 shown, an end portion of the common electrode 213 facing the edge of the substrate 101 (e.g., adjacent to the edge) (in the +y direction) may be closer to the edge of the substrate 101 (e.g., the third edge E3) than an end portion of the protective conductive layer 116 facing the edge of the substrate 101 (e.g., the third edge E3) (in the +y direction) (e.g., adjacent to the edge). This arrangement prevents or reduces defects from occurring during the manufacturing process, which will be referred to Figure 3The orientations of the end portions of the common electrode 213 and the end portions of the protective conductive layer 116 are described with respect to the third edge E3 (e.g., in the +y direction). However, embodiments of the present disclosure are not necessarily limited thereto, and in some embodiments, the end portions of the common electrode 213 and the end portions of the protective conductive layer 116 may be similarly arranged with respect to other edges of the substrate 101, such as the first edge E1 in the -x direction, the second edge E2 in the +x direction, etc.).

[0105] Figure 3 is a cross-sectional view schematically showing a state during the process of manufacturing Figure 1 a display device according to an embodiment of the present disclosure. Specifically, Figure 3 is a cross-sectional view schematically showing a process of forming the common electrode 213 after forming the intermediate layer 212 on the pixel electrode 210. As Figure 3 shown, in order to form the common electrode 213, a mask MSK is provided on the pixel defining film 119. The mask MSK has an opening MSK_OP corresponding to a portion where the common electrode 213 is to be formed. In an embodiment, as Figure 2 shown, the common electrode 213 can be formed by setting a material for forming the common electrode 213 on the intermediate layer 212, the protective conductive layer 116, and the pixel defining film 119 through the opening MSK_OP of the mask MSK by using a method such as sputtering or deposition. In an embodiment, the mask MSK may include a conductive material. For example, in an embodiment, the mask MSK may include an invar alloy which is an alloy of iron.

[0106] In the manufacturing process, due to friction or the like, charges may accumulate on the common voltage supply line 220 formed before the common electrode 213 is formed. Since the protective conductive layer 116 is in direct contact with the common voltage supply line 220, the potential of the protective conductive layer 116 is the same as that of the common voltage supply line 220. Therefore, if a mask MSK including a conductive material is provided to form the common electrode 213, and if the distance between the portion of the mask MSK other than the opening MSK_OP and the protective conductive layer 116 is relatively short, the portion of the pixel defining film 119 disposed between the portion of the mask MSK other than the opening MSK_OP and the protective conductive layer 116 may be damaged due to the potential difference between the portion of the mask MSK other than the opening MSK_OP and the protective conductive layer 116. For example, since the pixel defining film 119 is an insulating layer that can be a dielectric, dielectric breakdown or the like may occur in the portion of the pixel defining film 119 between the portion of the mask MSK other than the opening MSK_OP and the protective conductive layer 116 due to the potential difference between the portion of the mask MSK other than the opening MSK_OP and the protective conductive layer 116. For example, a portion of the pixel defining film 119 may turn to ashes (e.g., burn) due to dielectric breakdown. Therefore, defects may occur in the subsequently formed common electrode 213, or impurities from the outside may move into the display area DA through this portion, resulting in defects in the pixels.

[0107] To prevent these problems, when manufacturing the display device according to the present embodiment, a sufficient distance is provided between the portion of the mask MSK other than the opening MSK_OP and the protective conductive layer 116 (e.g., in the y-axis direction). In Figure 3 , the distance between the portion of the mask MSK other than the opening MSK_OP and the protective conductive layer 116 is increased by providing a distance "d" between the portion of the mask MSK other than the opening MSK_OP and the end portion of the protective conductive layer 116 (e.g., in the +y direction in the plan view) facing the edge of the substrate 101. Therefore, dielectric breakdown or the like in the portion of the pixel defining film 119 between the portion of the mask MSK other than the opening MSK_OP and the protective conductive layer 116 due to the potential difference between the portion of the mask MSK other than the opening MSK_OP and the protective conductive layer 116 can be effectively prevented or reduced.

[0108] In the embodiment, the common electrode 213 is formed in a shape corresponding to the opening MSK_OP of the mask MSK. Therefore, in the display device manufactured by the above process, as Figure 2As shown, the end of the common electrode 213 (e.g., in the +y direction) facing the edge of the substrate 101 (e.g., the third edge E3) (e.g., adjacent to the edge) is closer to the edge of the substrate 101 than the end of the protective conductive layer 116 (e.g., in the +y direction) facing the edge of the substrate 101 (e.g., the third edge E3) (e.g., adjacent to the edge).

[0109] In a comparative embodiment where the end of the common electrode 213 (e.g., in the +y direction) facing the edge of the substrate 101 and the end of the protective conductive layer 116 (e.g., in the +y direction) facing the edge of the substrate 101 coincide with each other, or the end of the protective conductive layer 116 (e.g., in the +y direction) facing the edge of the substrate 101 is closer to the edge of the substrate 101 than the end of the common electrode 213 (e.g., in the +y direction) facing the edge of the substrate 101, then during the manufacturing process, the distance between the portion of the mask MSK other than the opening MSK_OP and the protective conductive layer 116 may be too narrow. Therefore, in this comparative embodiment, due to the potential difference between the portion of the mask MSK other than the opening MSK_OP and the protective conductive layer 116, dielectric breakdown or the like is very likely to occur in the portion of the pixel defining film 119 disposed between the portion of the mask MSK other than the opening MSK_OP and the protective conductive layer 116, and the defect rate in the manufactured display device may increase rapidly. However, the display device according to the embodiment of the present disclosure can effectively prevent or reduce such defects.

[0110] In Figure 2In the plan view, the distance “d” between the end of the common electrode 213 (e.g., in the +y direction) facing the edge of the substrate 101 (e.g., adjacent to the edge) and the end of the protective conductive layer 116 (e.g., in the +y direction) facing the edge of the substrate 101 (e.g., adjacent to the edge) can be in the range of about 300 μm to about 1000 μm. If the distance “d” is less than about 300 μm, then during the manufacturing process, the distance between the portion of the mask MSK other than the opening MSK_OP and the protective conductive layer 116 may be too short, and thus, the possibility of dielectric breakdown in the portion of the pixel defining film 119 between the portion of the mask MSK other than the opening MSK_OP and the protective conductive layer 116 can increase rapidly. If the distance “d” is greater than about 1000 μm, the area of the first opening OP1 can be reduced to ensure the distance “d”. If the area of the first opening OP1 is reduced, this can reduce the contact area between the protective conductive layer 116 and the common voltage supply line 220, the resistance can increase, and defects such as the potential of the common electrode 213 being lower than the potential of the common voltage supply line 220 may occur. Therefore, in an embodiment, the distance “d” between the end of the common electrode 213 (e.g., in the +y direction) facing the edge of the substrate 101 and the end of the protective conductive layer 116 (e.g., in the +y direction) facing the edge of the substrate 101 is in the range of about 300 μm to about 1000 μm.

[0111] As described above, the planarization layer 109, which can be referred to as the first insulating layer, can cover the common voltage supply line 220 and can include a first opening OP1 through which a part of the top surface of the common voltage supply line 220 is exposed. In an embodiment where the protective conductive layer 116 covers the entire portion of the common voltage supply line 220 exposed through the first opening OP1 of the planarization layer 109, the end of the protective conductive layer 116 (e.g., in the +y direction) facing the edge of the substrate 101 can be disposed on the top surface of the planarization layer 109. Therefore, when considering a part of the top surface of the common voltage supply line 220 exposed through the first opening OP1 of the planarization layer 109, the end of the common electrode 213 (e.g., in the +y direction) facing the edge of the substrate 101 (e.g., adjacent to the edge) can be closer to the edge of the substrate 101 (e.g., the third edge E3) than the end of the part of the top surface of the common voltage supply line 220 (e.g., in the +y direction) facing the edge of the substrate 101 (e.g., the third edge E3) (e.g., adjacent to the edge). Therefore, the end of the common electrode 213 (e.g., in the +y direction) facing the edge of the substrate 101 is closer to the edge of the substrate 101 than the inner surface of the first opening OP1 of the planarization layer 109, which can be referred to as the first insulating layer, that is positioned (e.g., in the +y direction) facing the edge of the substrate 101.

[0112] As shown in Figure 2 , the thin film encapsulation layer 300 may cover the organic light emitting element 200b. In an embodiment, the thin film encapsulation layer 300 may include at least one inorganic encapsulation layer and at least one organic encapsulation layer. For example, in an embodiment, the thin film encapsulation layer 300 may include a first inorganic encapsulation layer 310, a second inorganic encapsulation layer 330, and an organic encapsulation layer 320 disposed (e.g., in the z-axis direction) between the first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330.

[0113] In an embodiment, each of the first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330 may include at least one inorganic insulating material, such as silicon oxide (SiO2), silicon nitride (SiN x ), silicon oxynitride (SiO x N y ), aluminum oxide (Al2O3), titanium oxide (TiO2), tantalum oxide (Ta2O5), hafnium oxide (HfO2), or zinc oxide (ZnO x ), and may be formed by using chemical vapor deposition (CVD) or the like. Zinc oxide (ZnO x ) may be ZnO and / or ZnO2. The organic encapsulation layer 320 may include a polymer-based material. Examples of the polymer-based material may include silicone-based resins, acrylic resins (e.g., polymethyl methacrylate or polyacrylic acid), epoxy resins, polyimides, and polyethylene. However, embodiments of the present disclosure are not necessarily limited thereto.

[0114] Each of the first inorganic encapsulation layer 310, the organic encapsulation layer 320, and the second inorganic encapsulation layer 330 may be integrally formed to cover the display area DA.

[0115] The dams 121, 122, 123, and 124 may be positioned in the peripheral area PA and may define a portion where the material for forming the organic encapsulation layer 320 of the thin film encapsulation layer 300 is positioned when the organic encapsulation layer 320 of the thin film encapsulation layer 300 is formed. The dams 121, 122, 123, and 124 may have a shape surrounding the display area DA in a plan view (e.g., in the x-axis direction and / or the y-axis direction). The dams 121, 122, 123, and 124 may be spaced apart from each other in a plan view (e.g., in the x-axis direction and / or the y-axis direction).

[0116] The dams 121, 122, 123, and 124 may have various layer structures. For example, the dam 121 may have a single layer structure, and each of the dams 122, 123, and 124 may have a multi-layer structure. In Figure 2Among them, each of dams 122, 123, and 124 has a two-layer structure. The lower layers 122a of dam 122, 123a of dam 123, and 124a of dam 124, and dam 121 may include, for example, the same material as that of the planarization layer 109 and the same layer structure as that of the planarization layer 109. In an embodiment, during the process of manufacturing the display device, the lower layers 122a of dam 122, 123a of dam 123, 124a of dam 124, dam 121, and the planarization layer 109 are formed synchronously by using the same material. Similarly, the upper layers 122b of dam 122, 123b of dam 123, and 124b of dam 124 may include the same material as that of the pixel defining film 119 and may have the same layer structure as that of the pixel defining film 119. In an embodiment, during the process of manufacturing the display device, the upper layers 122b of dam 122, 123b of dam 123, 124b of dam 124, and the pixel defining film 119 are formed synchronously by using the same material.

[0117] The first inorganic encapsulation layer 310 of the thin film encapsulation layer 300 may cover the display area DA and may extend outward to the peripheral area PA to cover at least a part of dam 124, which is the outermost dam. The organic encapsulation layer 320 of the thin film encapsulation layer 300 may cover the display area DA and may extend to the peripheral area PA. However, the area of the organic encapsulation layer 320 may be defined by dam 122. The second inorganic encapsulation layer 330 of the thin film encapsulation layer 300 may cover the display area DA and may extend to the peripheral area PA to directly contact the first inorganic encapsulation layer 310 outside the organic encapsulation layer 320. In Figure 2 which, the second inorganic encapsulation layer 330 extends to at least a part of dam 124, which is the outermost dam.

[0118] For reference, as Figure 3 shown in which, in addition to the opening MSK_OP, the mask MSK may also have a support portion MSK_SP. The support portion MSK_SP may be a portion provided on the outer side of the mask MSK and protruding downward (e.g., in the -z direction). In an embodiment, when the mask MSK for forming the common electrode 213 is disposed on the substrate 101, the support portion MSK_SP of the mask MSK may directly contact the top surface of any one of dams 122, 123, and 124 to keep the distance between the mask MSK and the substrate 101 (e.g., in the z-axis direction) substantially constant.

[0119] The above-described display device can be described as follows. When observed in a direction perpendicular to the substrate 101 (e.g., in the z-axis direction), the area of the portion of the common electrode 213 that overlaps with the common voltage supply line 220 can be larger than the area of the portion of the protection conductive layer 116 that overlaps with the common voltage supply line 220. This is because the end portion of the common electrode 213 (e.g., in the +y direction) toward the edge of the substrate 101 is closer to the edge of the substrate 101 than the end portion of the protection conductive layer 116 (e.g., in the +y direction) toward the edge of the substrate 101. For reference, the end portion of the common voltage supply line 220 (in the +y direction) toward the edge of the substrate 101 can be closer to the edge of the substrate 101 than the end portion of the protection conductive layer 116 (e.g., in the +y direction) toward the edge of the substrate 101. Therefore, by ensuring a sufficient area of the common voltage supply line 220, the resistance of the common voltage supply line 220 can be reduced.

[0120] Figure 4 is a cross-sectional view schematically showing a part of a display device according to an embodiment of the present disclosure. As Figure 4 shown, the display device according to the embodiment may further include a protection insulating layer 107 (e.g., in the z-axis direction) disposed between the thin film transistor 200a and the planarization layer 109 (e.g., directly disposed therebetween). The protection insulating layer 107 can protect the thin film transistor 200a formed below the protection insulating layer 107 during the process of manufacturing the display device, and can protect the thin film transistor 200a by preventing impurities (such as exhaust gas generated from elements including organic materials located above the completed display device) from moving to the thin film transistor 200a located below the protection insulating layer 107.

[0121] As Figure 4 shown, the protection insulating layer 107 can have an additional opening AOP. The additional opening AOP can expose a part of the top surface of the common voltage supply line 220. For example, a part of the top surface of the common voltage supply line 220 can be exposed through the additional opening AOP of the protection insulating layer 107. The exposed portion of the common voltage supply line 220 can also be exposed through the first opening OP1 of the planarization layer 109 on the protection insulating layer 107, and the protection conductive layer 116 can directly contact the exposed portion of the top surface of the common voltage supply line 220 exposed through the first opening OP1 of the planarization layer 109.

[0122] When observed in a direction perpendicular to the substrate 101 (e.g., in the z-axis direction), and when considering a part of the top surface of the common voltage supply line 220 exposed through the additional opening AOP, an end of the common electrode 213 (e.g., in the +y direction) facing the edge of the substrate 101 may coincide with an end of a part of the top surface of the common voltage supply line 220 (e.g., in the +y direction) facing the edge of the substrate 101. Therefore, an end of the common electrode 213 (in the +y direction) facing the edge of the substrate 101 (e.g., adjacent to the edge) may coincide with an inner surface of the additional opening AOP of the protective insulating layer 107 that faces the edge of the substrate 101 (e.g., adjacent to the edge) (in the +y direction).

[0123] As Figure 4 shown, the area of the additional opening AOP of the protective insulating layer 107 in a plan view (e.g., in a plane defined by the x-axis direction and the y-axis direction) may be larger than the area of the first opening OP1 of the planarization layer 109 in this plan view. In addition, when observed in a direction perpendicular to the substrate 101 (e.g., in the z-axis direction), the first opening OP1 of the planarization layer 109 may be positioned within the additional opening AOP of the protective insulating layer 107. Therefore, the area of the top surface of the common voltage supply line 220 exposed through the first opening OP1 of the planarization layer 109 can be sufficiently ensured.

[0124] As Figure 4 shown, the common voltage supply line 220 may be electrically connected to the first transmission line 103 and / or the second transmission line 105 positioned adjacent to the edge of the substrate 101. The first transmission line 103 may be disposed (e.g., in the z-axis direction) between the substrate 101 and the buffer layer 102. The second transmission line 105 may be disposed (e.g., in the z-axis direction) between the gate insulating film 104 and the interlayer insulating film 106. In an embodiment, the second transmission line 105 and the gate electrode 205 may be formed synchronously using the same material. Therefore, the second transmission line 105 and the gate electrode 205 may have the same layer structure. In an embodiment, the common voltage supply line 220 may be electrically connected to the second transmission line 105 through a contact hole formed in the interlayer insulating film 106, and may be electrically connected to the first transmission line 103 through contact holes formed in the buffer layer 102, the gate insulating film 104, and the interlayer insulating film 106.

[0125] The first transmission line 103 and / or the second transmission line 105 may have a shape extending along the edge of the substrate 101 in the peripheral region PA. In an embodiment, the first transmission line 103 and / or the second transmission line 105 may send a common voltage to the common voltage supply line 220.

[0126] According to the embodiments described above, a display device and an electronic device including the display device that can prevent or reduce defects from occurring during a manufacturing process can be provided. However, the scope of the embodiments of the present disclosure is not limited by this effect.

[0127] It should be understood that the embodiments described herein should be considered only in a descriptive sense and not for purposes of limitation. The description of features or aspects within each embodiment should generally be considered as available for other similar features or aspects in the embodiments. Although one or more embodiments have been described with reference to the figures, those of ordinary skill in the art will understand that various changes in form and detail can be made without departing from the spirit and scope of the present disclosure.

Claims

1. A display device, comprising: a substrate, the substrate including a display area and a peripheral area outside the display area; a common voltage supply line, the common voltage supply line being positioned in the peripheral area; a protective conductive layer, the protective conductive layer being in direct contact with the common voltage supply line; and a common electrode, the common electrode extending from the display area to the peripheral area and being in direct contact with the protective conductive layer, wherein an end portion of the common electrode adjacent to an edge of the substrate is closer to the edge of the substrate than an end portion of the protective conductive layer adjacent to the edge of the substrate.

2. The display device according to claim 1, wherein The protective conductive layer is in direct contact with a top surface of the common voltage supply line.

3. The display device according to claim 2, further comprising: a first insulating layer, the first insulating layer covering the common voltage supply line, the first insulating layer including a first opening exposing a part of the top surface of the common voltage supply line, wherein the protective conductive layer is disposed on the first insulating layer and is in direct contact with the common voltage supply line through the first opening.

4. The display device according to claim 3, wherein, The common electrode is in direct contact with a top surface of the protective conductive layer.

5. The display device according to claim 3, wherein, The end portion of the protective conductive layer is disposed on a top surface of the first insulating layer.

6. The display device according to claim 5, further comprising: a second insulating layer, the second insulating layer covering the protective conductive layer, the second insulating layer including a second opening exposing a part of the top surface of the protective conductive layer, wherein the common electrode is disposed on the second insulating layer and is in direct contact with the protective conductive layer through the second opening.

7. The display device according to claim 6, wherein, The end portion of the common electrode is disposed on a top surface of the second insulating layer.

8. The display device according to claim 3 or 4, wherein the end portion of the common electrode is closer to the edge of the substrate than an end portion of the part of the top surface of the common voltage supply line exposed through the first opening adjacent to the edge of the substrate.

9. The display device according to claim 3 or 4, further comprising: a protective insulating layer, the protective insulating layer being disposed between the common voltage supply line and the first insulating layer, the protective insulating layer including an additional opening exposing a part of the top surface of the common voltage supply line, wherein when observed in a direction perpendicular to the substrate, the end portion of the common electrode coincides with an end portion of the part of the top surface of the common voltage supply line exposed through the additional opening.

10. The display device according to claim 9, wherein, The area of the additional opening in a plan view is larger than the area of the first opening in the plan view.

11. The display device according to claim 9, wherein, When observed in the direction perpendicular to the substrate, the first opening is located inside the additional opening.

12. The display device according to claim 1, further comprising: a pixel electrode, the pixel electrode being positioned in the display area, wherein the protective conductive layer and the pixel electrode include the same material as each other.

13. The display device according to claim 12, wherein, Each of the protective conductive layer and the pixel electrode includes a transparent conductive layer.

14. The display device according to claim 12 or 13, wherein, The pixel electrode and the protective conductive layer are disposed in the same layer as each other.

15. The display device according to claim 1, wherein, The distance between the end of the common electrode and the end of the protective conductive layer is in the range of 300 μm to 1000 μm.

16. The display device according to claim 1, further comprising: a dam, the dam being positioned in the peripheral region and surrounding the display region; and an inorganic encapsulation layer, the inorganic encapsulation layer being disposed on the common electrode and extending outward from the common electrode to the dam.

17. A display device, comprising: a substrate, the substrate including a display region and a peripheral region outside the display region; a common voltage supply line, the common voltage supply line being positioned in the peripheral region; a protective conductive layer, the protective conductive layer being in direct contact with the common voltage supply line; and a common electrode, the common electrode extending from the display region to the peripheral region and being in direct contact with the protective conductive layer, wherein, when observed in a direction perpendicular to the substrate, the area of the portion of the common electrode overlapping with the common voltage supply line is larger than the area of the portion of the protective conductive layer overlapping with the common voltage supply line.

18. The display device according to claim 17, wherein, The end of the common voltage supply line adjacent to the edge of the substrate is closer to the edge of the substrate than the end of the protective conductive layer adjacent to the edge of the substrate.

19. The display device according to claim 17, wherein, The protective conductive layer is in direct contact with the top surface of the common voltage supply line.

20. The display device according to claim 19, further comprising: a first insulating layer, the first insulating layer covering the common voltage supply line, the first insulating layer including a first opening exposing a part of the top surface of the common voltage supply line, wherein the protective conductive layer is disposed on the first insulating layer and is in direct contact with the common voltage supply line through the first opening.

21. The display device according to claim 20, wherein, The common electrode is in direct contact with the top surface of the protective conductive layer.

22. The display device according to claim 20, wherein, The end of the protective conductive layer adjacent to the edge of the substrate is disposed on the top surface of the first insulating layer.

23. The display device according to claim 22, further comprising: a second insulating layer, the second insulating layer covering the protective conductive layer, the second insulating layer including a second opening exposing a part of the top surface of the protective conductive layer, wherein the common electrode is disposed on the second insulating layer and is in direct contact with the protective conductive layer through the second opening.

24. The display device according to claim 23, wherein, The end of the common electrode adjacent to the edge of the substrate is disposed on the top surface of the second insulating layer.

25. A display device, comprising: a substrate, the substrate including a display region and a peripheral region outside the display region; a common voltage supply line, the common voltage supply line being positioned in the peripheral region; a first insulating layer, the first insulating layer covering the common voltage supply line, the first insulating layer including a first opening exposing a part of the top surface of the common voltage supply line; a protective conductive layer, the protective conductive layer covering the whole of the part of the top surface of the common voltage supply line exposed by the first opening; A second insulating layer that covers the protective conductive layer, the second insulating layer including a second opening that exposes a part of the top surface of the protective conductive layer; and a common electrode that extends from the display area to the peripheral area and covers the entirety of the part of the top surface of the protective conductive layer exposed by the second opening, wherein the protective conductive layer electrically connects the common voltage supply line to the common electrode, and wherein an end portion of the common electrode adjacent to the edge of the substrate is closer to the edge of the substrate than an end portion of the protective conductive layer adjacent to the edge of the substrate.

26. The display device according to claim 25, wherein, The distance between the end portion of the common electrode and the end portion of the protective conductive layer is in the range of 300 μm to 1000 μm.

27. The display device according to claim 25 or 26, wherein the end portion of the protective conductive layer is directly disposed on the upper surface of the first insulating layer; and the end portion of the common electrode is directly disposed on the upper surface of the second insulating layer.

28. An electronic device including the display device according to any one of claims 1 to 7, 12, 13, and 15 to 26.

29. The electronic device according to claim 28, wherein, The electronic device is at least one of a smart phone, a mobile phone, a smart watch, a navigation device, a game device, a television, an in-vehicle unit, a notebook computer, a laptop computer, a tablet computer, a personal media player, and a personal digital assistant.

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