Power grid operation data processing method, system and device based on heterogeneous calculation and medium

Abstract

The invention discloses a heterogeneous calculation-based power grid operation data processing method, system and device and a medium, and the method comprises the steps: collecting power grid operation data in real time through a power grid monitoring terminal, and carrying out the preprocessing of the power grid operation data, and obtaining a first calculation task; constructing a heterogeneous computing resource pool configured with a fault-tolerant processing mechanism, and classifying the computing tasks to obtain a second computing task; mapping the second calculation task to a heterogeneous calculation resource pool for processing, and adjusting the distribution condition of the calculation task through a dynamic load balancing algorithm to obtain an output result; and encrypting the output result through the secure communication interface to obtain encrypted data, and transmitting the encrypted data to the protection control terminal through the multi-protocol compatible interface. The power grid operation data processing method based on heterogeneous calculation is optimized, the real-time performance and safety of the system are effectively improved, and the method can be widely applied to the technical field of power grid data processing.

Description

Technical Field

[0001] The present invention relates to the technical field of power grid data processing, and in particular, to a method, system, device and medium for processing power grid operation data based on heterogeneous computing. Background Art

[0002] The current power grid security protection system faces the following technical bottlenecks:

[0003] Contradiction between real-time performance and computational accuracy: Traditional protection systems rely on a single computing unit (CPU), and it is difficult to simultaneously meet the requirements of real-time fault response (requiring microsecond-level processing) and high-precision transient analysis (requiring complex numerical calculations). For example, using centralized CPU processing leads to queuing delays for critical tasks and affects the operation timeliness of circuit breakers. Low resource utilization efficiency: Power grid data has multi-modal characteristics (such as real-time status signals, historical batch data), but existing systems do not dynamically allocate computing resources according to data types, resulting in insufficient utilization of dedicated hardware such as GPUs / FPGAs. Communication security risks: The interfaces of protection systems mostly adopt fixed encryption strategies with a long key update period, making them vulnerable to replay attacks or data tampering. Insufficient fault tolerance ability: When a hardware failure occurs in a heterogeneous computing unit (such as an FPGA), traditional systems lack a task migration mechanism, which may lead to misoperation or refusal to operate of protection. Summary of the Invention

[0004] An object of the present invention is to solve at least to some extent one of the technical problems existing in the prior art.

[0005] To this end, an object of an embodiment of the present invention is to provide a method for processing power grid operation data based on heterogeneous computing. By constructing a heterogeneous computing resource pool configured with a fault tolerance processing mechanism and combining a dynamic load balancing algorithm to optimize the scheduling of computing tasks, and encrypting and transmitting the computing results through a secure communication interface and a multi-protocol interface, it ensures the stable and efficient operation of the power grid protection and control system under complex working conditions.

[0006] Another object of an embodiment of the present invention is to provide a system for processing power grid operation data based on heterogeneous computing.

[0007] To achieve the above technical object, the technical solutions adopted in the embodiments of the present invention include:

[0008] In a first aspect, an embodiment of the present invention provides a method for processing power grid operation data based on heterogeneous computing, including:

[0009] Real-time collecting power grid operation data through a power grid monitoring terminal, and preprocessing the power grid operation data to obtain a first computing task;

[0010] Build a heterogeneous computing resource pool configured with a fault tolerance mechanism, and classify the computing tasks to obtain the second computing task;

[0011] Map the second computing task to the heterogeneous computing resource pool for processing, and adjust the allocation of the computing tasks through a dynamic load balancing algorithm to obtain an output result;

[0012] Encrypt the output result through a secure communication interface to obtain encrypted data, and transmit the encrypted data to the protection control terminal through a multi-protocol compatible interface.

[0013] Further, the grid operation data includes voltage data, current data, frequency information, and circuit breaker status signals. The preprocessing of the grid operation data includes:

[0014] Perform wavelet denoising processing on the voltage data and the current data;

[0015] Calculate the voltage sag eigenvalue according to the voltage data,

[0016] Calculate the harmonic distortion rate according to the voltage data and the current data;

[0017] Generate a lightweight preprocessing data packet according to the voltage sag eigenvalue, the harmonic distortion rate, and the grid operation data;

[0018] Submit the lightweight preprocessing data packet as the computing task to the heterogeneous computing resource pool through a time-sensitive network.

[0019] Further, the heterogeneous computing resource pool includes a CPU unit, a GPU unit, and an FPGA unit. The computing tasks include real-time tasks, high-precision computing tasks, and parallel batch processing tasks. Building the heterogeneous computing resource pool configured with a fault tolerance mechanism includes:

[0020] Build the heterogeneous computing resource pool based on the CPU unit, the GPU unit, and the FPGA unit;

[0021] Perform fault detection on the FPGA unit. When it is detected that the FPGA unit fails, switch the current processing task of the FPGA unit to the redundant thread of the GPU unit for execution;

[0022] Perform cross-validation on the result of the computing task processed by the GPU unit to obtain a verification error value. When the verification error value exceeds the error threshold, recalculate the computing task through the GPU unit.

[0023] Further, mapping the second computing task to the heterogeneous computing resource pool for processing includes:

[0024] Mapping the real-time task to the FPGA unit for processing;

[0025] Mapping the high-precision computing task to the GPU unit for processing;

[0026] Mapping the parallel batch processing task to the CPU unit for processing.

[0027] Further, adjusting the allocation of the computing tasks through a dynamic load balancing algorithm includes:

[0028] Monitoring the load data and task queue lengths of the CPU unit, the GPU unit, and the FPGA unit. When the load data exceeds the load threshold, migrating the computing task to a low-load unit according to the task priority;

[0029] Allocating the real-time task processed by the FPGA unit through a preemptive scheduling strategy;

[0030] When the high-precision computing task is a power grid transient stability analysis task, adjusting the computing granularity of the GPU unit according to the voltage fluctuation amplitude;

[0031] When the parallel batch processing task is a fault mode matching task, optimizing the computing of the CPU unit through an association rule library based on a knowledge graph.

[0032] Further, encrypting the output result through a secure communication interface includes:

[0033] Performing symmetric encryption on the output result through the national secret SM4 algorithm to obtain a symmetric encryption result and a symmetric key;

[0034] Generating a dynamic key through a physically unclonable function according to the physical characteristics of the FPGA unit, and encrypting the symmetric key according to the dynamic key;

[0035] Generating a check code through a cyclic redundancy check mechanism, and encapsulating the check code, the symmetric encryption result, and the symmetric key as the encrypted data.

[0036] Further, transmitting the encrypted data to the protection control terminal through a multi-protocol compatible interface includes:

[0037] Converting the encrypted data into a format adapted to the target transmission protocol through a multi-protocol compatible interface, where the target transmission protocol includes the IEC 61850 protocol, the Modbus TCP protocol, and a private protocol;

[0038] Establish a data transmission path under the target transmission protocol through a virtual channel isolation mechanism, and transmit the encrypted data to the protection control terminal through the data transmission path.

[0039] In a second aspect, an embodiment of the present invention provides a power grid operation data processing system based on heterogeneous computing, including:

[0040] A data acquisition module, configured to collect power grid operation data in real time through a power grid monitoring terminal, and preprocess the power grid operation data to obtain a first computing task;

[0041] A computing resource pool construction module, configured to construct a heterogeneous computing resource pool configured with a fault tolerance processing mechanism, and classify the computing tasks to obtain a second computing task;

[0042] A task scheduling module, configured to map the second computing task to the heterogeneous computing resource pool for processing, and adjust the allocation of the computing tasks through a dynamic load balancing algorithm to obtain an output result;

[0043] A secure transmission module, configured to encrypt the output result through a secure communication interface to obtain encrypted data, and transmit the encrypted data to the protection control terminal through a multi-protocol compatible interface.

[0044] In a third aspect, an embodiment of the present invention provides a device, including:

[0045] At least one processor;

[0046] At least one memory, configured to store at least one program;

[0047] When the at least one program is executed by the at least one processor, the at least one processor implements a power grid operation data processing method based on heterogeneous computing as described above.

[0048] In a fourth aspect, an embodiment of the present invention further provides a computer-readable storage medium, in which a program executable by a processor is stored, and the program executable by the processor is used to execute a power grid operation data processing method based on heterogeneous computing as described above when executed by the processor.

[0049] The advantages and beneficial effects of the present invention will be partially given in the following description, partially will become obvious from the following description, or will be understood through the practice of the present invention:

[0050] In the embodiments of the present invention, by constructing a heterogeneous computing resource pool configured with a fault tolerance processing mechanism and combining a dynamic load balancing algorithm to optimize the scheduling of computing tasks, the efficient collection and processing of power grid operation data are realized, and efficient task scheduling and operation can be carried out for real-time tasks, high-precision tasks and parallel batch processing tasks, improving the real-time performance of power grid fault response and the utilization rate of computing resources; through a secure communication interface and multi-protocol interfaces, the calculation results are encrypted and transmitted, ensuring the secure and stable transmission of the calculation results and ensuring the stable operation of the power grid protection and control system under complex working conditions. BRIEF DESCRIPTION OF THE DRAWINGS

[0051] Figure 1 It is a schematic step diagram of a method for processing power grid operation data based on heterogeneous computing provided by an embodiment of the present invention;

[0052] Figure 2 It is a schematic diagram of a system for processing power grid operation data based on heterogeneous computing provided by an embodiment of the present invention;

[0053] Figure 3 It is a schematic structural diagram of a device provided by an embodiment of the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0054] The embodiments of the present invention will be described in detail below. The examples of the embodiments are shown in the drawings, where the same or similar reference numerals denote the same or similar elements or elements with the same or similar functions from beginning to end. The embodiments described below with reference to the drawings are exemplary and are only used to explain the present invention and should not be construed as a limitation of the present invention. For the step numbers in the following embodiments, they are only set for the convenience of explanation and illustration, and no limitation is imposed on the order between the steps. The execution order of each step in the embodiments can be adaptively adjusted according to the understanding of those skilled in the art.

[0055] In the description of the present invention, the meaning of "a plurality" is two or more. If the first and second are described, it is only for the purpose of distinguishing technical features and should not be construed as indicating or implying relative importance or implicitly indicating the quantity of the indicated technical features or implicitly indicating the sequence of the indicated technical features. In addition, unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those skilled in the art of the present technology.

[0056] The English abbreviations used in the present invention include:

[0057] FPGA: Field Programmable Gate Array, Field Programmable Gate Array;

[0058] GPU: Graphics Processing Unit, Graphics Processing Unit;

[0059] CPU: Central Processing Unit, the central processing unit.

[0060] Figure 1 It is a schematic diagram of the steps of a power grid operation data processing method based on heterogeneous computing provided by an embodiment of the present invention. Referring to Figure 1 , an embodiment of the present invention provides a power grid operation data processing method based on heterogeneous computing, including:

[0061] S101. Real-time collect power grid operation data through a power grid monitoring terminal, and preprocess the power grid operation data to obtain a first calculation task;

[0062] Specifically, the power grid monitoring terminal is a data acquisition device deployed in power grid nodes (such as substations, distribution grids, transmission lines), responsible for obtaining the operation status of the power grid in real time. It can perform necessary preprocessing on the data collected through its equipped edge computing module to reduce the computing burden of subsequent processors and improve the reliability of data sources. The power grid operation data includes data such as voltage, current, frequency, and breaker status signals, which can reflect information such as the load situation, stability situation, and fault isolation situation of the power grid. The preprocessing mainly includes noise reduction and key feature extraction of the collected data.

[0063] In some alternative embodiments, the power grid operation data includes voltage data, current data, frequency information, and breaker status signals. Preprocessing the power grid operation data includes:

[0064] A1. Perform wavelet noise reduction processing on voltage data and current data;

[0065] A2. Calculate the voltage sag characteristic value according to the voltage data,

[0066] A3. Calculate the harmonic distortion rate according to the voltage data and current data;

[0067] A4. Generate a lightweight preprocessing data packet according to the voltage sag characteristic value, harmonic distortion rate, and power grid operation data;

[0068] A5. Submit the lightweight preprocessing data packet as a calculation task to the heterogeneous computing resource pool through a time-sensitive network.

[0069] Specifically, wavelet denoising is a commonly used signal processing method that can remove high-frequency noise while retaining the main features of the signal, reducing data errors. Voltage sag refers to a significant voltage drop within a short period, which may be caused by short circuits, sudden load increases, or line faults. When the voltage drop exceeds the threshold and lasts for a certain period, a voltage sag can be determined. Based on the voltage data, characteristic values such as the sag amplitude, duration, and occurrence frequency can be extracted. The harmonic distortion rate is used to measure whether the harmonic components of the power grid signal exceed the standard. It can be obtained by extracting the harmonic components of the voltage or current signal through Fourier transform and calculating the ratio of the harmonics to the fundamental wave, and is used for power quality. Due to the large data volume of power grid operation data, a lightweight data compression strategy that only retains key characteristic values can reduce communication overhead and improve the utilization rate of computing resources. Time-Sensitive Networking (TSN) is a high-real-time network protocol used in industrial control and power systems, which can ensure the efficient transmission of data packets and the real-time response ability of the system in a complex power grid environment.

[0070] S102. Construct a heterogeneous computing resource pool configured with a fault tolerance mechanism, and classify the computing tasks to obtain the second computing tasks.

[0071] In some alternative embodiments, the heterogeneous computing resource pool includes a CPU unit, a GPU unit, and an FPGA unit. The computing tasks include real-time tasks, high-precision computing tasks, and parallel batch processing tasks. Constructing a heterogeneous computing resource pool configured with a fault tolerance mechanism includes:

[0072] B1. Construct a heterogeneous computing resource pool based on the CPU unit, the GPU unit, and the FPGA unit.

[0073] B2. Detect faults in the FPGA unit. When a fault is detected in the FPGA unit, switch the current processing task of the FPGA unit to the redundant thread of the GPU unit for execution.

[0074] B3. Cross-validate the results of the computing tasks processed by the GPU unit to obtain a validation error value. When the validation error value exceeds the error threshold, recalculate the computing tasks through the GPU unit.

[0075] Specifically, in the heterogeneous computing resource pool, there are CPU units, GPU units, and FPGA units. Among them, the CPU is used to process logical control tasks and is suitable for parallel batch processing tasks, such as tasks that require analyzing a large amount of historical data, like power grid historical data analysis and fault mode matching. The GPU has powerful parallel computing capabilities and is suitable for high-precision computing tasks, such as power grid transient stability analysis, which requires a large number of floating-point operations and high computing precision. The FPGA has hardware-level parallel computing capabilities and is suitable for real-time tasks, such as fault detection and emergency circuit breaker operations, which need to complete calculations within milliseconds or even nanoseconds. By integrating CPU, GPU, and FPGA computing units into a flexibly schedulable computing resource pool, the utilization rate of computing resources can be optimized. Self-check mechanisms such as CRC check and hardware error detection can be used to determine whether the FPGA is working properly. When the FPGA fails, the tasks originally assigned to the FPGA cannot be executed normally, and the task needs to be migrated to the GPU for calculation, and the redundant computing threads of the GPU are allocated to continue executing the original task. In high-precision computing tasks, the calculation results of the GPU may be affected by unstable factors such as data errors. Through cross-validation, the same calculation can be executed in parallel on different GPU threads or cores, and whether the results are consistent can be compared to detect whether the GPU calculation results are credible and ensure the accuracy of the final calculation results.

[0076] S103. Map the second computing task to the heterogeneous computing resource pool for processing, and adjust the allocation of computing tasks through a dynamic load balancing algorithm to obtain the output result.

[0077] In some alternative embodiments, mapping the second computing task to the heterogeneous computing resource pool for processing includes:

[0078] C1. Map real-time tasks to the FPGA unit for processing;

[0079] C2. Map high-precision computing tasks to the GPU unit for processing;

[0080] C3. Map parallel batch processing tasks to the CPU unit for processing.

[0081] In some alternative embodiments, adjusting the allocation of computing tasks through a dynamic load balancing algorithm includes:

[0082] D1. Monitor the load data and task queue lengths of the CPU unit, GPU unit, and FPGA unit. When the load data exceeds the load threshold, migrate the computing task to the low-load unit according to the task priority;

[0083] D2. Allocate real-time tasks processed by the FPGA unit through a preemptive scheduling strategy.

[0084] D3. When the high-precision computing task is a power grid transient stability analysis task, adjust the computing granularity of the GPU unit according to the voltage fluctuation amplitude;

[0085] D4. When the parallel batch processing task is a fault mode matching task, optimize the computing of the CPU unit through the association rule base based on the knowledge graph.

[0086] Specifically, by monitoring the load data and task queue lengths of the CPU, GPU, and FPGA, it can be ensured that the computing units will not be overloaded. When the load of a certain computing unit exceeds the threshold, tasks will be migrated to the computing unit with a lower load according to the task priority, thereby improving the resource utilization rate of the system; preemptive scheduling means that when a high-priority real-time task arrives, the current low-priority task can be immediately terminated to ensure the priority execution of real-time tasks. Through the preemptive scheduling strategy, the FPGA can ensure that when a real-time task such as an emergency circuit breaker operation task arrives, low-priority tasks such as monitoring can be temporarily suspended to ensure the efficient response of the system to real-time tasks; when performing a power grid transient stability analysis task, it is necessary to adjust the computing granularity of the GPU according to the voltage fluctuation amplitude. Specifically, when the voltage fluctuation is large, fine grid division is adopted to improve the computing accuracy and ensure the analysis accuracy. When the voltage fluctuation is small, coarse-grained computing is adopted to reduce the GPU computing burden and improve the computing efficiency; the fault mode matching task is a large-scale data computing task. By analyzing the power grid fault mode through the association rule base based on the knowledge graph, the matching calculation of irrelevant data can be reduced, the ineffective computing amount of the CPU can be reduced, and the CPU resources can be ensured to be used for the most critical data analysis to improve the computing speed.

[0087] S104. Encrypt the output result through the secure communication interface to obtain encrypted data, and transmit the encrypted data to the protection control terminal through the multi-protocol compatible interface.

[0088] In some alternative embodiments, encrypting the output result through the secure communication interface includes:

[0089] E1. Symmetrically encrypt the output result through the national secret SM4 algorithm to obtain the symmetric encryption result and the symmetric key;

[0090] E2. According to the physical characteristics of the FPGA unit, generate a dynamic key through the physically unclonable function, and encrypt the symmetric key according to the dynamic key;

[0091] E3. Generate a check code through the cyclic redundancy check mechanism, and encapsulate the check code, the symmetric encryption result, and the symmetric key into encrypted data.

[0092] Specifically, SM4 (National Commercial Cryptography Algorithm 4) is a symmetric encryption algorithm certified by the China National Cryptography Administration. It uses the same key for both encryption and decryption, has a fast encryption speed, and high security, making it suitable for large-scale industrial data transmission. The physically unclonable function generates a unique and unpredictable dynamic key using the physical characteristics of the FPGA. By using this key to perform secondary encryption on the SM4 symmetric key, the data security can be further enhanced. The cyclic redundancy check calculates the checksum of the data, and combines the checksum, the encrypted calculation result, and the encrypted symmetric key into the encrypted data, which can be used to detect whether the data is tampered with or in error during transmission.

[0093] In some alternative embodiments, the encrypted data is transmitted to the protection control terminal through a multi-protocol compatible interface, including:

[0094] F1. Convert the encrypted data into a format adapted to the target transmission protocol through the multi-protocol compatible interface, where the target transmission protocol includes the IEC 61850 protocol, the Modbus TCP protocol, and the private protocol;

[0095] F2. Establish a data transmission path under the target transmission protocol through the virtual channel isolation mechanism, and transmit the encrypted data to the protection control terminal through the data transmission path.

[0096] Specifically, since different industrial devices may use different data transmission protocols, the calculation result must be converted into an adapted format so that various terminal devices can correctly receive and parse the data. In this embodiment, the supported transmission protocols include the IEC 61850 protocol widely used in smart grids, the Modbus TCP protocol widely applied in industrial automation devices, and the private protocol customized within the enterprise. The encapsulated encrypted data is converted into a format supported by the target protocol through the multi-protocol compatible interface to ensure that the device can correctly identify the data. Virtual channel isolation is a data security isolation technology that ensures that the data transmission process is not interfered with or attacked from the outside by deploying independent data channels under the current target transmission protocol at the interface layer.

[0097] The chip design method of the present invention will be described below with a specific embodiment.

[0098] In this embodiment, taking the real-time processing of lightning strike faults in HVDC transmission lines as the target application scenario, when a ±800 kV UHVDC transmission line is struck by lightning, resulting in a sudden voltage drop and harmonic distortion, the system needs to complete fault location and trigger the circuit breaker action within an extremely short time. For this purpose, the optical-electronic current transformers in the converter station perform high-frequency sampling on the instantaneous values of voltage, current, and the status of the circuit breaker, and the edge computing module denoises and extracts features from the data to refine key features such as the voltage drop rate and harmonic distortion rate, and generates lightweight data packets to reduce the data transmission pressure. Subsequently, the heterogeneous computing resource pool allocates these computing tasks. Among them, the FPGA unit is used for real-time fault judgment, calculating the confidence level of the lightning strike fault and performing preliminary location, the GPU unit runs the electromagnetic transient simulation model to verify the fault type and calculate the optimal disposal plan, and the CPU cluster performs matching analysis based on historical lightning strike fault data to predict the possible diffusion path of the fault and provide a protection plan. In terms of secure communication and control, after the calculation results are encrypted, they are sent to the converter station circuit breaker through the IEC 61850 protocol to ensure the security of instruction transmission. It can be recognized that the grid security and controllable protection system based on the heterogeneous computing architecture provided in this embodiment can respond quickly in the application scenario of HVDC transmission system fault processing, with high real-time performance, accuracy, and security, and is an effective protection measure for dealing with grid emergencies.

[0099] The chip design method of the present invention will be described below in combination with another specific embodiment.

[0100] In this embodiment, taking the collaborative analysis of the transient stability of the regional power grid as the target application scenario, when the frequency of a certain regional power grid fluctuates (49.2Hz - 50.8Hz) due to the large-scale disconnection of new energy, and it is necessary to quickly evaluate the transient stability and adjust the protection, this embodiment can collect the data of the Phasor Measurement Unit (PMU) of multiple power grid nodes through the Wide Area Measurement System (WAMS), and classify the calculation tasks to obtain the second calculation task. Among them, the FPGA is responsible for real-time calculation of the frequency deviation, the GPU conducts high-precision analysis of the transient stability region, and the CPU is used for batch evaluation of the historical low-frequency load shedding strategy. The computing resource pool adopts a dynamic load balancing strategy. When the computing load of the GPU is relatively high, some matrix operations can be migrated to the CPU for acceleration, and it also has a fault tolerance ability. When the FPGA fails, the CPU can take over part of the real-time calculation tasks to maintain the operation of the system. In terms of data transmission and collaborative control, the system encrypts and converts the calculation results through a secure communication interface and a multi-protocol interface, so that the stability margin index calculated by the GPU can be adapted to the wind farm control system, and the historical strategy comparison results generated by the CPU can be pushed to the dispatching center to ensure the secure and stable transmission of the dispatching strategy. In addition, to optimize the computing efficiency, the computing granularity of the GPU can be dynamically adjusted according to the amplitude of the frequency fluctuation, and the CPU quickly associates events through a fault knowledge graph to reduce the amount of invalid calculations and improve the computing speed. It can be recognized that this embodiment can be effectively applied to the application scenario of power grid transient stability analysis and has the ability to flexibly respond to emergencies.

[0101] It can be recognized that in the embodiment of the present invention, by constructing a heterogeneous computing resource pool configured with a fault tolerance processing mechanism and combining a dynamic load balancing algorithm to optimize the scheduling of calculation tasks, the efficient acquisition and processing of power grid operation data are realized, and efficient task scheduling and operation can be carried out for real-time tasks, high-precision tasks, and parallel batch processing tasks, improving the real-time performance of power grid fault response and the utilization rate of computing resources; through the secure communication interface and multi-protocol interface, the calculation results are encrypted and transmitted, ensuring the secure and stable transmission of the calculation results and ensuring the stable operation of the power grid protection and control system under complex working conditions.

[0102] Referring to Figure 2 , the embodiment of the present invention provides a power grid operation data processing system based on heterogeneous computing, including:

[0103] A data acquisition module, which is used to collect power grid operation data in real time through a power grid monitoring terminal and preprocess the power grid operation data to obtain a first calculation task;

[0104] A computing resource pool construction module, configured to construct a heterogeneous computing resource pool with a fault tolerance processing mechanism, and classify computing tasks to obtain second computing tasks;

[0105] A task scheduling module, configured to map the second computing tasks to the heterogeneous computing resource pool for processing, and adjust the allocation of the computing tasks through a dynamic load balancing algorithm to obtain an output result;

[0106] A secure transmission module, configured to encrypt the output result through a secure communication interface to obtain encrypted data, and transmit the encrypted data to a protection control terminal through a multi-protocol compatible interface.

[0107] The content in the above method embodiments is applicable to the present system embodiment. The functions specifically implemented by the present system embodiment are the same as those of the above method embodiments, and the beneficial effects achieved are also the same as those of the above method embodiments.

[0108] Referring to Figure 3 , an embodiment of the present invention provides a device, including:

[0109] At least one processor;

[0110] At least one memory, configured to store at least one program;

[0111] When the above at least one program is executed by the above at least one processor, the above at least one processor implements the above method for processing power grid operation data based on heterogeneous computing.

[0112] An embodiment of the present invention further provides a computer-readable storage medium, in which a program executable by a processor is stored. The program executable by the processor is used to execute the above method for processing power grid operation data based on heterogeneous computing when executed by the processor.

[0113] A computer-readable storage medium according to an embodiment of the present invention can execute a method for processing power grid operation data based on heterogeneous computing provided by an embodiment of the present invention, can execute any combination of implementation steps of the method embodiment, and has the corresponding functions and beneficial effects of the method.

[0114] An embodiment of the present invention also discloses a computer program product or a computer program. The computer program product or the computer program includes computer instructions, and the computer instructions are stored in a computer-readable storage medium. A processor of the device can read the computer instructions from the computer-readable storage medium, and the processor executes the computer instructions, so that the device executes Figure 1 The chip design method based on a multi-core heterogeneous architecture shown.

[0115] In some alternative embodiments, the functions / operations recited in the block diagrams may not occur in the order presented in the operational illustrations. For example, depending on the functions / operations involved, two blocks shown in succession may actually be executed substantially simultaneously or the blocks may sometimes be executed in the reverse order. Further, the embodiments presented and described in the flowcharts of the present invention are provided by way of example in order to provide a more thorough understanding of the technology. The disclosed methods are not limited to the operations and logical flows presented herein. Alternative embodiments are contemplated in which the order of various operations is altered and in which sub-operations described as part of a larger operation are performed independently.

[0116] Moreover, although the present invention has been described in the context of functional modules, it should be understood that, unless otherwise stated to the contrary, one or more of the above-described functions and / or features may be integrated in a single physical device and / or software module, or one or more functions and / or features may be implemented in separate physical devices or software modules. It should also be understood that a detailed discussion of the actual implementation of each module is not necessary for an understanding of the present invention. Rather, given the attributes, functions and internal relationships of the various functional modules in the devices disclosed herein, the actual implementation of the modules will be understood within the ordinary skill of an engineer. Thus, those skilled in the art will be able to implement the present invention as set forth in the claims without undue experimentation. It should also be understood that the particular concepts disclosed are illustrative only and are not intended to limit the scope of the present invention, the scope of which is determined by the full scope of the appended claims and their equivalents.

[0117] If the above functions are implemented in the form of software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on such understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art or a part of the technical solution, can be embodied in the form of a software product. The computer software product is stored in a storage medium and includes several instructions for causing a device (which may be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the methods in the various embodiments of the present invention. The foregoing storage medium includes: various media that can store program codes, such as a USB flash drive, a portable hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disc.

[0118] The logic and / or steps represented in the flowchart or otherwise described herein, for example, can be considered as a definable sequence list of executable instructions for implementing logical functions, and can be specifically implemented in any computer-readable medium for use by an instruction execution system, apparatus, or device (such as a computer-based system, a system including a processor, or other systems that can fetch and execute instructions from the instruction execution system, apparatus, or device), or used in conjunction with these instruction execution systems, apparatus, or devices. For the purposes of this specification, a "computer-readable medium" can be any device that can contain, store, communicate, propagate, or transport a program for use by or in conjunction with an instruction execution system, apparatus, or device.

[0119] More specific examples (a non-exhaustive list) of computer-readable media include the following: an electrical connection part (electronic device) having one or more wirings, a portable computer disk cartridge (magnetic device), a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber device, and a portable compact disc read-only memory (CDROM). Additionally, the computer-readable medium can even be paper or other suitable media on which the above program can be printed, because the above program can be obtained electronically, for example, by optically scanning the paper or other media, followed by editing, interpretation, or, if necessary, other suitable processing, and then storing it in a computer memory.

[0120] It should be understood that various parts of the present invention can be implemented by hardware, software, firmware, or a combination thereof. In the above-described embodiments, multiple steps or methods can be implemented by software or firmware stored in a memory and executed by a suitable instruction execution system. For example, if implemented by hardware, as in another embodiment, any one or a combination of the following techniques well known in the art can be used: discrete logic circuits having logic gate circuits for implementing logical functions on data signals, application-specific integrated circuits having suitable combinational logic gate circuits, programmable gate arrays (PGAs), field-programmable gate arrays (FPGAs), and the like.

[0121] In the above description of this specification, the descriptions referring to the terms "one embodiment / example", "another embodiment / example", or "certain embodiments / examples", etc. mean that the specific features, structures, materials, or characteristics described in connection with the embodiments or examples are included in at least one embodiment or example of the present invention. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described can be combined in a suitable manner in any one or more embodiments or examples.

[0122] Although embodiments of the present invention have been shown and described, those of ordinary skill in the art can understand that various changes, modifications, substitutions, and variations can be made to these embodiments without departing from the principles and spirit of the present invention. The scope of the present invention is defined by the claims and their equivalents.

[0123] The above has specifically described the preferred embodiments of the present invention, but the present invention is not limited to the above embodiments. Those skilled in the art can also make various equivalent deformations or substitutions without departing from the spirit of the present invention, and these equivalent deformations or substitutions are all included within the scope defined by the claims of this application.

Claims

1. A method for processing power grid operation data based on heterogeneous computing, characterized in that Including: Real-time collect power grid operation data through a power grid monitoring terminal, and preprocess the power grid operation data to obtain a first calculation task; Construct a heterogeneous computing resource pool configured with a fault tolerance processing mechanism, and classify the calculation tasks to obtain a second calculation task; Map the second calculation task to the heterogeneous computing resource pool for processing, and adjust the allocation of the calculation tasks through a dynamic load balancing algorithm to obtain an output result; Encrypt the output result through a secure communication interface to obtain encrypted data, and transmit the encrypted data to a protection control terminal through a multi-protocol compatible interface.

2. The method for processing power grid operation data based on heterogeneous computing according to claim 1, wherein The power grid operation data includes voltage data, current data, frequency information, and breaker status signals. The preprocessing of the power grid operation data includes: Perform wavelet denoising processing on the voltage data and the current data; Calculate the voltage sag eigenvalue according to the voltage data; Calculate the harmonic distortion rate according to the voltage data and the current data; Generate a lightweight preprocessing data packet according to the voltage sag eigenvalue, the harmonic distortion rate, and the power grid operation data; Submit the lightweight preprocessing data packet as the calculation task to the heterogeneous computing resource pool through a time-sensitive network.

3. A method for processing power grid operation data based on heterogeneous computing according to claim 1, characterized in that, The heterogeneous computing resource pool includes a CPU unit, a GPU unit, and an FPGA unit. The calculation tasks include real-time tasks, high-precision calculation tasks, and parallel batch processing tasks. The construction of the heterogeneous computing resource pool configured with a fault tolerance processing mechanism includes: Construct the heterogeneous computing resource pool based on the CPU unit, the GPU unit, and the FPGA unit; Detect faults in the FPGA unit. When a fault is detected in the FPGA unit, switch the current processing task of the FPGA unit to a redundant thread of the GPU unit for execution; Cross-verify the results of the calculation tasks processed by the GPU unit to obtain a verification error value. When the verification error value exceeds the error threshold, recalculate the calculation tasks through the GPU unit.

4. A method for processing power grid operation data based on heterogeneous computing according to claim 3, characterized in that The mapping of the second calculation task to the heterogeneous computing resource pool for processing includes: Map the real-time task to the FPGA unit for processing; Map the high-precision calculation task to the GPU unit for processing; Map the parallel batch processing task to the CPU unit for processing.

5. A method for processing power grid operation data based on heterogeneous computing according to claim 3, characterized in that The adjustment of the allocation of the calculation tasks through a dynamic load balancing algorithm includes: Monitor the load data and task queue lengths of the CPU unit, the GPU unit, and the FPGA unit. When the load data exceeds the load threshold, migrate the calculation tasks to the low-load unit according to the task priority; Allocate the real-time tasks processed by the FPGA unit through a preemptive scheduling strategy; When the high-precision calculation task is a power grid transient stability analysis task, adjust the calculation granularity of the GPU unit according to the voltage fluctuation amplitude. When the parallel batch task is a fault mode matching task, the calculation of the CPU unit is optimized through an association rule library based on a knowledge graph.

6. A method for processing power grid operation data based on heterogeneous computing according to claim 3, characterized in that, The encryption of the output result through the secure communication interface includes: Performing symmetric encryption on the output result through the national secret SM4 algorithm to obtain a symmetric encryption result and a symmetric key; Generating a dynamic key through a physical unclonable function according to the physical characteristics of the FPGA unit, and encrypting the symmetric key according to the dynamic key; Generating a check code through a cyclic redundancy check mechanism, and encapsulating the check code, the symmetric encryption result, and the symmetric key into the encrypted data.

7. A method for processing power grid operation data based on heterogeneous computing according to claim 3, characterized in that, The transmission of the encrypted data to the protection control terminal through the multi-protocol compatible interface includes: Converting the encrypted data into a format adapted to the target transmission protocol through the multi-protocol compatible interface, where the target transmission protocol includes the IEC 61850 protocol, the Modbus TCP protocol, and a private protocol; Establishing a data transmission path under the target transmission protocol through a virtual channel isolation mechanism, and transmitting the encrypted data to the protection control terminal through the data transmission path.

8. A power grid operation data processing system based on heterogeneous computing, characterized in that Including: A data acquisition module, configured to collect power grid operation data in real time through a power grid monitoring terminal, and preprocess the power grid operation data to obtain a first calculation task; A computing resource pool construction module, configured to construct a heterogeneous computing resource pool configured with a fault tolerance processing mechanism, and classify the calculation tasks to obtain a second calculation task; A task scheduling module, configured to map the second calculation task to the heterogeneous computing resource pool for processing, and adjust the distribution of the calculation tasks through a dynamic load balancing algorithm to obtain an output result; A secure transmission module, configured to encrypt the output result through a secure communication interface to obtain encrypted data, and transmit the encrypted data to the protection control terminal through a multi-protocol compatible interface.

9. A device, characterized in that, Including: At least one processor; At least one memory, configured to store at least one program; When the at least one program is executed by the at least one processor, the at least one processor implements a method for processing power grid operation data based on heterogeneous computing as described in any one of claims 1-7.

10. A computer-readable storage medium storing a program executable by a processor, characterized in that, The program executable by the processor, when executed by the processor, is used to execute a method for processing power grid operation data based on heterogeneous computing as described in any one of claims 1-7.

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