Display panel and display device

Abstract

The invention provides a display panel and a display device. In one specific implementation mode, the display panel comprises a display area and an opening area which are arranged on a substrate, and the display area comprises a first metal layer, a second metal layer and a second planarization layer which are arranged on the substrate in a stacked mode; a protective layer disposed on the second planarization layer; the pixel defining layer is arranged on the protective layer, the first metal layer comprises a plurality of first signal lines arranged in the first direction, the second metal layer comprises a plurality of second signal lines arranged in the second direction, and the second signal lines located on the edge of the hole opening area comprise bending areas partially surrounding the hole opening area. The protection layer comprises a first protection area and a second protection area, and the orthographic projection of the second protection area on the substrate surrounds the opening area and covers at least one circle of bending area starting from the opening area. According to the embodiment, the second protection region protects the second planarization layer above the bending region from being eroded by a subsequent process, and poor bright lines are avoided.

Description

Technical Field

[0001] The present disclosure relates to the field of display technologies. More specifically, it relates to a display panel and a display device. Background Art

[0002] In an organic light-emitting diode (OLED) display panel, holes are often formed in the active area (HIAA) on the screen to accommodate devices such as cameras and sensors. However, currently, there are defective display bright lines or bright spots that penetrate the holes near the hole area. Summary of the Invention

[0003] An object of the present disclosure is to provide a display panel and a display device to solve at least one of the problems existing in the prior art.

[0004] To achieve the above object, the present disclosure adopts the following technical solutions:

[0005] In a first aspect of the present disclosure, a display panel is provided, including:

[0006] A substrate;

[0007] A display area and a hole area disposed on the substrate, the display area surrounding the hole area,

[0008] The display area includes:

[0009] A first metal layer, a first planarization layer, a second metal layer, and a second planarization layer stacked on the substrate;

[0010] A protective layer disposed on the second planarization layer; and

[0011] A pixel defining layer disposed on the protective layer, the pixel defining layer defining pixel openings,

[0012] The first metal layer includes a plurality of first signal lines arranged along a first direction, the second metal layer includes a plurality of second signal lines arranged along a second direction intersecting the first direction, and a plurality of second signal lines located at the edge of the hole area include an extension area and a bending area disposed between the extension areas, and the bending area partially surrounds the hole area.

[0013] The protective layer includes a first protection area and a second protection area. The positive projection of the first protection area on the substrate surrounds the pixel opening, and the positive projection of the second protection area on the substrate surrounds the hole area and covers at least one turn of the bending area starting from the hole area.

[0014] Optionally, the display area includes a first display area and a display fan-out area. The display fan-out area is disposed between the first display area and the hole area, and the display fan-out area surrounds the hole area.

[0015] The orthographic projection of the display fan-out area on the substrate covers the bending area of the second signal line, and the second protection area covers the part of the second planarization layer located in the display fan-out area.

[0016] Optionally, the display area includes a first display area and a display fan-out area. The display fan-out area is disposed between the first display area and the opening area, and the display fan-out area surrounds the opening area.

[0017] The second protection area is located in the display fan-out area. The orthographic projection of the second protection area on the substrate is a plurality of rings surrounding the opening area.

[0018] The second protection area covers multiple turns of bending areas starting from the opening area, and the orthographic projection of each of the multiple turns of bending areas on the substrate falls within the ring.

[0019] Optionally, the orthographic projection of the second protection area on the substrate surrounds the opening area and covers at least three turns of bending areas starting from the opening area.

[0020] Optionally, the second protection area extends from the surface of the second planarization layer to the opening area.

[0021] Optionally, the display area includes a first display area and a display fan-out area. The display fan-out area is disposed between the first display area and the opening area, and the display fan-out area surrounds the opening area.

[0022] The second planarization layer includes at least one groove surrounding the opening area, and the grooves are arranged in one-to-one correspondence with the openings of the second protection area.

[0023] The edge of the orthographic projection of the second protection area on the substrate extends into the orthographic projection of the groove on the substrate.

[0024] Optionally, the display area further includes: a first electrode layer, the first electrode layer covers the display fan-out area and at least partially covers the first display area, and the first electrode layer is disconnected at the edges of the protection layer and the groove.

[0025] Optionally, the protection layer is disposed on the surface of the second planarization layer away from the substrate.

[0026] Optionally, the display area further includes: a third planarization layer disposed between the second planarization layer and the protection layer.

[0027] The protection layer covers at least the end area of the second planarization layer exposed from the third planarization layer.

[0028] Optionally, the first planarization layer includes a first opening surrounding the opening area, and the second planarization layer includes a second opening surrounding the opening area.

[0029] The orthographic projection of the first opening on the substrate falls within the orthographic projection of the second opening on the substrate.

[0030] The second aspect of the present disclosure provides a display device, including the display panel as described above.

[0031] The beneficial effects of the present disclosure are as follows:

[0032] In view of the existing problems, the present disclosure provides a display panel and a display device. By using a protective layer to provide a second protection area, and the orthographic projection of the second protection area on the substrate surrounds the opening area and covers at least one turn of the bending area starting from the opening area, the second planarization layer above the bending area of the second signal line is protected from being eroded by subsequent processes, thereby avoiding the contact between the second signal line and the electrode and preventing the occurrence of bright line defects. At the same time, no additional process flow is added, and it can be compatible with existing processes and designs, having broad application prospects. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] The following further describes in detail the specific embodiments of the present disclosure with reference to the drawings.

[0034] Figure 1 A partial physical diagram of a display panel in the related art is shown;

[0035] Figure 2 A schematic cross-sectional view of a display panel in the related art is shown;

[0036] Figure 3 A cross-sectional view of an actual defective film layer in a display panel in the related art is shown;

[0037] Figure 4 A top view of the display panel provided by an embodiment of the present disclosure is shown;

[0038] Figure 5 A partial top view near the opening area of the display panel provided by an embodiment of the present disclosure is shown;

[0039] Figure 6 A cross-sectional view near the opening area of the display panel of the embodiment of the present disclosure is shown;

[0040] Figure 7 A cross-sectional view near the opening area of the display panel of another embodiment of the present disclosure is shown;

[0041] Figure 8 A cross-sectional view near the opening area of the display panel of another embodiment of the present disclosure is shown;

[0042] Figure 9 A cross-sectional view near the opening area of the display panel of another embodiment of the present disclosure is shown;

[0043] Figure 10 A partial enlarged cross-sectional view of the display panel of another embodiment of the present disclosure is shown;

[0044] Figure 11Partial enlarged cross-sectional view of a display panel showing another embodiment of the present disclosure;

[0045] Figure 12 Cross-sectional view near the opening area of the display panel showing another embodiment of the present disclosure. Detailed implementation manners

[0046] As used in the present disclosure, "on", "formed on", and "disposed on" may mean that one layer is directly formed or disposed on another layer, or may mean that one layer is indirectly formed or disposed on another layer, that is, there are other layers between the two layers.

[0047] It should be noted that although terms such as "first", "second", etc. may be used herein to describe various components, members, elements, regions, layers, and / or parts, these components, members, elements, regions, layers, and / or parts should not be limited by these terms. Instead, these terms are used to distinguish one component, member, element, region, layer, and / or part from another. Thus, for example, the first component, first member, first element, first region, first layer, and / or first part discussed below may be referred to as the second component, second member, second element, second region, second layer, and / or second part without departing from the teachings of the present disclosure.

[0048] In the present disclosure, unless otherwise specified, the term "co-layer setting" means that two layers, components, members, elements, or parts can be formed by the same preparation process (such as a patterning process, etc.), and generally, these two layers, components, members, elements, or parts are formed of the same material. For example, the co-layer setting of two or more functional layers means that these co-layered functional layers can be formed using the same material layer and the same preparation process, thereby simplifying the preparation process of the display substrate.

[0049] In the present disclosure, unless otherwise specified, the expression "patterning process" generally includes steps such as coating of photoresist, exposure, development, etching, and stripping of photoresist. The expression "one patterning process" means a process of forming a patterned layer, component, member, etc. using one mask.

[0050] The inventors found that in current OLED display panels using HIAA or the so-called AA-Hole structure, there are defective display bright lines or bright spots passing through the openings near the opening area, which are also known as "X bright line defects" as Figure 1 shown.

[0051] The inventors further analyzed and compared the design and physical diagrams and found that, referring to Figure 2The cross-sectional view of the partial opening area and the display area adjacent to the opening area is shown. A display area and an opening area are formed on the substrate. The opening area reserves positions for devices such as cameras and sensors (not shown in the figure). In the display area, a metal layer 1, a planarization layer 1, a metal layer 2, and a planarization layer 2 are stacked. Multiple signal lines 1 are provided in the metal layer 1, and multiple signal lines 2 are provided in the metal layer 2. The planarization layer 1 covers the signal lines 1, and the planarization layer 2 is located above and covers the signal lines 2. One of the functions of the planarization layer 1 and the planarization layer 2 is to isolate and protect the signal lines 1 and the signal lines 2. However, in order to enable the subsequent prepared optical glue layer to smoothly level to the opening area and protect the water vapor isolation structure in the opening area, generally there are regulations on the film thickness of the planarization layer 2. For example, it is generally between 1.5 μm and 2 μm, and the edge of the planarization layer 2 will not be completely flush with the edge of the planarization layer 1, but there will be a stepped retreat area.

[0052] On this basis, since the planarization layer 2 is located in the upper film layer, after the planarization layer 2, multiple patterning processes such as the pixel definition layer, PVX2 (passivation layer), and the upper isolation pillar (PS) are required. These processes will all cause thickness loss of the planarization layer 2, especially in the relatively thin edge part around the opening area, and the loss of the planarization layer 2 is more serious, eventually resulting in local abnormal thinning or even complete disappearance, so that the signal lines 2 below cannot be effectively covered. Once the signal lines 2 are exposed, after the evaporation of the light-emitting layer and the cathode, without the protection of the planarization layer 2, the exposed signal lines 2 will cause an electrical connection short circuit with the cathode. Figure 3 The actual defective film layer diagram is shown. In the figure, PLN1 represents the planarization layer 1, SD1 represents the metal layer 1, PLN2 represents the planarization layer 2, SD2 represents the metal layer 2, Gate1, Gate2, and Gate3 represent the gate layers. Figure 3 It can be seen that the PLN2 in the defective part is missing (see the arrow indication position of PLN2 in the figure).

[0053] Usually, the signal line 2 is a data signal line for providing data to a column or a row of light-emitting units. After a short circuit occurs, the cathode will pull down the signal line 2, resulting in a bright point defect in a column or a row of light-emitting units related to the signal line 2. Since the wiring is dense at the edge of the opening area, when the loss of the planarization layer 2 causes multiple signal lines 2 to be exposed, multiple rows or columns of bright point defects will occur, resulting in obvious bright points or bright lines visible to the naked eye in the display panel, which is called "X bright line".

[0054] In view of this, an embodiment of the present disclosure provides a display panel, including:

[0055] A substrate;

[0056] A display area and an opening area provided on the substrate, the display area surrounding the opening area.

[0057] The display area includes:

[0058] a first metal layer, a first planarization layer, a second metal layer, and a second planarization layer that are stacked on a substrate;

[0059] a protective layer disposed on the second planarization layer; and

[0060] a pixel defining layer disposed on the protective layer, the pixel defining layer defining a pixel opening,

[0061] The first metal layer includes a plurality of first signal lines arranged in a first direction, the second metal layer includes a plurality of second signal lines arranged in the first direction, and a plurality of second signal lines located at the edge of the opening region include an extension region and a bent region disposed between the extension regions, and the bent region partially surrounds the opening region.

[0062] The protective layer includes a first protection region and a second protection region. A positive projection of the first protection region on the substrate surrounds the pixel opening, and a positive projection of the second protection region on the substrate surrounds the opening region and covers at least one turn of the bent region starting from the opening region.

[0063] In this embodiment, by using the protective layer to provide the second protection region, and the positive projection of the second protection region on the substrate surrounds the opening region and covers at least one turn of the bent region starting from the opening region, the second planarization layer above the bent region of the second signal line is protected from being eroded by subsequent processes, thereby avoiding contact between the second signal line and the electrode, and the bright line defect can be avoided without adding additional process flows.

[0064] In a specific example, referring to Figures 4 to 6 as shown, the display panel includes a substrate 100 and a display area AA and an opening area KK disposed on the substrate 100, and the display area AA surrounds the opening area KK.

[0065] The display area AA is provided with light-emitting devices for display. For example, the light-emitting devices are organic light-emitting diodes (OLEDs). The light-emitting layers (not shown) and the first electrode layer 107 of a plurality of OLEDs in all or part of the light-emitting devices are generally formed as a whole surface in the display area AA by evaporation. The first electrode layer 107 can generally be a cathode. The material of the cathode can include metals or their alloys such as magnesium (Mg), calcium (Ca), lithium (Li), or aluminum (Al), or metal oxides such as indium zinc oxide (IZO) and zinc tin oxide (ZTO).

[0066] The display area AA includes: a first metal layer 101, a first planarization layer 102, a second metal layer 103, and a second planarization layer 104 that are stacked on the substrate 100; a protective layer disposed on the second planarization layer 104; and a pixel defining layer (not shown) disposed on the protective layer. The pixel defining layer defines pixel openings, and it can be understood that the pixel openings are used to define the layout and size of the light-emitting devices. The material of the protective layer can be an inorganic material such as silicon nitride (SiNx) or silicon oxide (SiOx), and the protective layer is usually also referred to as the "passivation layer PVX2". Each of the first planarization layer 102 and the second planarization layer 104 can be made of one of organic polymer materials such as polymethyl methacrylate (PMMA), polystyrene (PS), and photosensitive polyimide (PSPI).

[0067] Exemplarily, the first metal layer 101 is a three-layer metal composite structure formed by stacking a first sub-layer 1011, a second sub-layer 1012, and a third sub-layer 1013. For example, the material of the first sub-layer 1011 can be molybdenum (Mo), the material of the second sub-layer 1012 can be aluminum (Al), and the material of the third sub-layer 1013 can be molybdenum (Mo). For example, the material of the first sub-layer 1011 can be a molybdenum-niobium alloy (MoNb), the material of the second sub-layer 1012 can be copper (Cu), and the material of the third sub-layer 1013 can be a molybdenum-titanium alloy (MoTi). Of course, the present disclosure is not limited thereto, and the first metal layer 101 can also be a single-layer structure, a double-layer structure, or a multi-layer structure. The first metal layer is usually also referred to as the "first source-drain metal layer (SD1 Metal)".

[0068] Similarly, in this example, the second metal layer 103 is a three-layer metal composite structure, including a first sub-layer 1031, a second sub-layer 1032, and a third sub-layer 1033. The materials of the first sub-layer 1031, the second sub-layer 1031, and the third sub-layer 1032 can be molybdenum (Mo), aluminum (Al), and molybdenum (Mo), respectively, or can be a molybdenum-niobium alloy (MoNb), copper (Cu), and a molybdenum-titanium alloy (MoTi), respectively, or other film layer combinations. Of course, the second metal layer 103 can also be a single-layer structure, a double-layer structure, or a multi-layer structure. The second metal layer is usually also referred to as the "second source-drain metal layer (SD2 Metal)".

[0069] Refer to Figure 5 and Figure 6As shown, between the substrate 100 and the first metal layer 101, the display panel may further include a buffer layer 108, a gate layer 109, a gate insulating layer 110, and a dielectric layer 111 that are sequentially stacked on the substrate 100. Among them, the buffer layer 108 may be made of an inorganic insulating material such as silicon oxide, silicon nitride, or silicon oxynitride. The material of the gate layer 109 may be a multi-layer metal structure, and the film stack combination may be selected from one of molybdenum / aluminum / molybdenum (Mo / Al / Mo), molybdenum / copper (Mo / Cu), molybdenum-niobium alloy / copper (MoNb / Cu), molybdenum-niobium alloy / copper / molybdenum-titanium alloy (MoNb / Cu / MoTi) or its stack. The material of the gate insulating layer 110 may be other inorganic insulating materials such as silicon oxide, silicon nitride, or silicon oxynitride, and the gate insulating layer 203 may be a single-layer or multi-layer structure.

[0070] It should be noted that although one gate film layer is shown in the figure, those skilled in the art should understand that the present disclosure is not intended to be limited. According to the specific product requirements, the display panel may include multiple gate layers separated by multiple gate insulating layers. For example, if three gate layers are included, these film layers are usually referred to as Gate1, Gate2, and Gate3. Additionally, although not shown, the display panel may further include an active layer, which is used to form a thin-film transistor for driving a light-emitting device. Depending on whether the thin-film transistor is a bottom-gate or top-gate type, the position between the active layer and the gate layer will be different, which will not be elaborated here.

[0071] Optionally, referring to Figure 6 As shown, the first planarization layer 102 includes a first opening surrounding the opening region KK, and the second planarization layer 104 includes a second opening surrounding the opening region KK. The orthographic projection of the first opening on the substrate 100 falls within the orthographic projection of the second opening on the substrate.

[0072] Through this setting, the edge of the second planarization layer 102 close to the opening region KK and the edge of the first planarization layer 102 close to the opening region KK form a step that moves inward into the display region AA, facilitating the subsequent leveling of the optical adhesive into the opening region KK to protect the isolation structure within the opening region KK.

[0073] Optionally, referring to Figure 6 As shown, the opening region KK includes a plurality of inner isolation posts 201 and / or one or more isolation dams 202 provided on the substrate 100.

[0074] The isolation post 201 may be a plurality of metal rings surrounding Figure 5 the opening shown in ( Figure 5In the region represented by CC, the isolation posts 201 can be arranged in the second metal layer 103, so as to be arranged on the same layer as the second signal lines. The isolation posts 201 can be used to isolate moisture and form a support. The isolation dam 202 can be an isolation structure formed by multiple non-metals. For example, it can be formed by superimposing a film layer arranged on the same layer as the first planarization layer 102, a film layer arranged on the same layer as the second planarization layer 104, and / or a film layer arranged on the same layer as the pixel defining layer, etc. The specific structure is not limited. The isolation dam 202 can be used to block the intrusion of water and oxygen into the display area AA.

[0075] Combined with Figures 4 to 6 As shown, the display area includes a first display area AA1 and a display fan-out area AA-F. The display fan-out area AA-F is arranged between the first display area AA1 and the opening area KK, and the display fan-out area AA-F surrounds the opening area KK. It can be seen that the display fan-out area AA-F is the edge area in the display area AA that surrounds the opening area KK. In this area, it is usually only used to arrange various signal traces without arranging display devices.

[0076] Among them, the first metal layer 101 includes a plurality of first signal lines arranged along the first direction X, and the second metal layer 103 includes a plurality of second signal lines arranged along the first direction X. The gate layer 109 includes a plurality of third signal lines arranged along the second direction Y. The first signal lines and the second signal lines are usually data signal lines, and the third signal lines are gate signal lines.

[0077] For the convenience of illustration, Figure 5 only two second signal lines Data2-1 and Data2-2, and two third signal lines Gate1 and Gate2 are shown in the figure. In the display fan-out area AA-F, in order to avoid the opening in this area, each signal line is subjected to a wiring process. When there is no need to distinguish, the second signal lines are collectively referred to as "second signal lines Data2".

[0078] Specifically, as Figure 5 shown, the second signal line Data2 includes an extension area and a bending area arranged between the extension areas. The bending area partially surrounds the opening area KK. It can be seen from the figure that the extension area refers to the part extending along the second direction Y intersecting with the first direction. From Figure 5 it can be seen that the opening area KK can be circular or elliptical. The bending direction of the bending area of the second signal line Data2 can be arranged in an arc shape to bend in two opposite directions. One group with the same bending direction forms multiple turns, that is, it constitutes Figure 6 the cross-sectional view structure shown in the figure.

[0079] In addition, although Figure 5The first signal line is not shown. Its arrangement is similar to that of the second signal line and will also include an extension area along the second direction Y and a bent area connecting the extension areas. The bent areas are arranged in two opposite groups according to the shape of the opening area KK, and each group of first signal lines is arranged in multiple turns.

[0080] In this example, the display panel has a double-SD film layer design, that is, there is no other SD metal layer for wiring above the second metal layer 103. Therefore, the protective layer is directly disposed on the surface of the second planarization layer 104 away from the substrate 100.

[0081] In particular, referring to Figure 6 As shown, the protective layer includes a first protection area and a second protection area 106-1. The orthographic projection of the first protection area on the substrate 100 surrounds the pixel opening to block the anode and the cathode and prevent leakage between the anode and the cathode. The orthographic projection of the second protection area 106-1 on the substrate 100 surrounds the opening area KK and covers at least one turn of the bent area starting from the opening area KK.

[0082] In this example, the orthographic projection of the display fan-out area AA-F on the substrate 100 covers the bent area of the second signal line 104, and the second protection area 106-1 covers the portion of the second planarization layer 104 located in the display fan-out area AA-F. Figure 5 The pattern of the second protection area 106-1 is shown as an annular shadow surrounding the opening area KK.

[0083] In the process manufacturing, for the double-SD product, after the second planarization layer 104 and before forming the first electrode layer 107 as the cathode, it also includes forming the protective layer by patterning; forming the anode by patterning after the protective layer; forming the pixel defining layer by patterning; forming the isolation pillar PS by patterning, etc.

[0084] With this setting, by using the protective layer disposed on the existing surface of the second planarization layer away from the substrate 100 to set the second protection area 106-1, the second protection area 106-1 forms a film layer protection for the portion of the second planarization layer 104 in the display fan-out area AA-F, so as to form good protection for the second planarization layer 104 at the edge of the opening area KK in subsequent multiple patterning steps, ensuring that there is no film layer loss or missing (Loss) due to subsequent processes, thereby avoiding the misconnection between the second signal line Data under the second planarization layer 104 and the first cathode 107, and avoiding the defects of bright lines or bright spots.

[0085] In addition, the setting of the second protection area makes use of the existing film layer, does not add an extra Mask process, has a minimal change to the overall film layer, can be fully compatible with the existing process and design, and has low cost and simple implementation.

[0086] In some other alternative embodiments, referring to Figure 7 as shown, the difference in the structure of the display panel of this embodiment compared with the above embodiment is that the second protection area extends from the surface of the second planarization layer to the opening area KK.

[0087] With this setting, the second protection area can be used to protect the edge area of the first planarization layer 102 close to the opening area KK from being affected by subsequent etching. In addition, since the film layer farthest from the substrate 100 in the opening area KK should be an inorganic layer, and the material of the protection layer is usually also an inorganic layer, by extending the second protection area to the opening area KK, the two inorganic material layers can be made to contact each other, and a stable connection structure can be formed between them, thus forming a good and stable protection structure.

[0088] Considering that the subsequent etching film layer loss usually occurs only in the edge area of the second planarization layer close to the opening area, the scope of the second protection area is not limited to covering the entire display fan-out area of the second planarization layer.

[0089] In some other alternative embodiments, the difference from the Figure 6 display panel shown is that the orthographic projection of the second protection area on the substrate surrounds the opening area and covers at least three turns of the bending area starting from the opening area.

[0090] Specifically referring to Figure 8 as shown, the protection layer includes a second protection area 106-2. The orthographic projection of the second protection area 106-2 on the substrate 100 surrounds the opening area KK and covers three turns of the bending area starting from the opening area KK.

[0091] The inventor found through multiple experimental analyses that since the edge area of the second planarization layer 104 close to the opening area KK is relatively thin and more prone to film layer loss, for the current display product wiring width and tightness, the film layer loss of the second planarization layer 104 caused by subsequent patterning processes usually only affects at most three turns of the second signal lines starting from the opening area KK, that is, generally at most three turns of the second signal lines will show exposure defects. When the second protection area 106-2 is set to cover at least three turns of the second signal lines, a good protection effect can be ensured for the second planarization layer 104, avoiding the exposure of the second signal lines below it and thus preventing short-circuit defects with the first electrode layer 107.

[0092] It should be noted that in combination with the Figure 5 schematic diagram shown, those skilled in the art should understand that the three turns of the second signal lines refer to the ring formed by three second signal lines in the direction from the opening area to the display area AA. For a circular or elliptical opening area, two sets of bending areas bending in two directions are relatively distributed, and the annular second protection area 106-2 should cover two sets of second signal lines, and each set of second signal lines includes three turns of bending areas surrounding each other.

[0093] In some other alternative embodiments, referring to Figure 9 As shown, the second protection area 106-3 is located in the display fan-out area AA-F. The orthographic projection of the second protection area 106-3 on the substrate 100 is a plurality of rings surrounding the opening area KK. The second protection area 106-3 covers multiple turns of the bent area starting from the opening area KK, and the orthographic projection of each turn of the bent area on the substrate 100 falls within the ring.

[0094] With this setting, the pattern of the second protection area 106-3 is correspondingly set with the position where the second signal line Data2 covered by the second planarization layer 104 is located, and the area of the second planarization layer 104 involving the bent area part of the second signal line Data2 that we are concerned about is protected, so as to directly avoid the second signal line Data2 being exposed due to the loss of the film layer of the second planarization layer 104 and avoid the problem of bright line defects.

[0095] Optionally, the orthographic projection of the second protection area 106-3 on the substrate 100 surrounds the opening area KK and covers at least three turns of the bent area starting from the opening area KK.

[0096] When the second protection area 106-3 is set to cover at least three turns of the second signal line, a good protection effect on the second planarization layer 104 can be ensured, and the second signal line below it can be prevented from being exposed and short-circuited with the first electrode layer 107.

[0097] It is worth mentioning that since the material of the second planarization layer 104 is usually an organic material and the material of the protection layer is usually an inorganic material, when patterning the material of the protection layer to form the pattern of the second protection area, due to different etching selectivity ratios, grooves will be formed on the second planarization layer 104 below the second protection area during the patterning process. An eaves-shaped undercut structure is formed between the groove and the second protection area above it, and this structure can further ensure the natural disconnection of the cathode material evaporated above by using its structural characteristics.

[0098] Referring to Figure 10 and Figure 11 As shown, the second planarization layer 104 includes at least one groove surrounding the opening area KK, and the groove is correspondingly set with the opening CK of the second protection area 106-3. The edge of the orthographic projection of the second protection area 106-3 on the substrate 100 extends into the orthographic projection of the groove on the substrate 100.

[0099] It is worth mentioning that for the structure of the second protection area 106-3 in Figure 9 the opening CK includes both the disconnection part between adjacent ring patterns of the second protection area 106-3 (i.e., Figure 11the structure in), also includes the annular pattern edge furthest from the hole region KK (i.e., Figure 10 the structure in).

[0100] When patterning the material layer of the protective layer, the recessed depth of the groove formed on the second planarization layer 104 extends into the second protection region 106-3, resulting in the positive projection of the second protection region 106-3 on the substrate 100 extending into the positive projection of the groove on the substrate 100. From the cross-section, the second protection region 106-3 protrudes outwards relative to the sidewall of the groove as an "eaves". When the first electrode layer 107 is subsequently formed by an evaporation process, the first electrode layer 107 is naturally cut off by the "eaves".

[0101] That is, the display area AA further includes: a first electrode layer 107, the first electrode layer 107 covering the display fan-out area AA-F and at least partially covering the first display area AA1, and the first electrode layer 107 is disconnected at the edge of the protective layer and the groove.

[0102] It can be seen that in the display fan-out area AA-F or the pattern of the second protection area outside the display fan-out area AA-F, a natural open circuit of the first electrode layer 107 is formed, which can provide double protection for the underlying second signal line to ensure that no bright line defect occurs.

[0103] It should also be noted that the undercut structure is not limited to Figure 9 the structure of the embodiment of, for Figure 8 the incompletely covered second protection area pattern shown in, similarly, a similar Figure 10 half-eaves can be formed by using the patterned edge of the second protection area, and an open circuit protection effect of the first electrode layer 107 can also be formed, which will not be elaborated herein.

[0104] In some other alternative embodiments, referring to Figure 12 shown, the display panel is a 3SD structure. At this time, the display area AA further includes: a third planarization layer 112 disposed between the second planarization layer 104 and the protective layer, and the protective layer at least covers the end region of the second planarization layer 104 exposed from the third planarization layer 112. It can be understood that this end region is the end region of the second planarization layer 104 close to the opening region KK.

[0105] As Figure 12 shown, although the display panel includes a third metal layer, the signal lines arranged in the third metal layer do not appear in the display fan-out area AA-F. Therefore, in Figure 12 the cross-sectional view of, only the third planarization layer 112 can be shown. In other words, only when the display panel includes a third metal layer will the third planarization layer 112 appear.

[0106] With this setting, for a display product with a 3SD structure, it is also possible to use the protective layer provided above the third planarization layer 112 to set up a second protection area, and protect the film layer of the exposed second planarization layer 104 through the second protection area, thereby avoiding the short circuit between the second signal line exposed below and the first electrode layer 107, and avoiding the occurrence of bright line defects.

[0107] It should also be noted that although in Figure 8 、 Figure 9 and Figure 12 's embodiments, the second protection area extending from the surface of the second planarization layer to the opening area KK is not shown. However, it is not intended to be limiting. Based on the second protection area pattern in Figure 8 、 Figure 9 and Figure 12 , the coverage of the second protective layer can also extend from the surface of the second planarization layer to the opening area KK, so that the two inorganic material layers are in contact with each other to form a stable connection structure, thereby forming a good and stable protection structure, which will not be elaborated herein.

[0108] Another embodiment of the present disclosure provides a display device, including the above display panel. Among them, the display device can be any product or component with a display function and provided with an opening area, such as a mobile phone, a tablet computer, a television, a monitor, a notebook computer, a digital photo frame, a navigator, etc. This embodiment does not make any limitations in this regard. By loading the above display panel, the display device can solve the problem of bright line defects in the display at a relatively low process cost and improve the user experience.

[0109] Since the display panel included in the display device provided by the embodiments of the present disclosure is the same as the display panels provided by the above several embodiments, the previous implementation manners are also applicable to the usage method provided by this embodiment, and will not be described in detail in this embodiment.

[0110] Obviously, the above embodiments of the present disclosure are merely examples for clearly illustrating the present disclosure, rather than limitations on the implementation manners of the present disclosure. For those of ordinary skill in the art, other different forms of changes or variations can be made based on the above description. It is impossible to list all the implementation manners here. Any obvious changes or variations derived from the technical solutions of the present disclosure still fall within the protection scope of the present disclosure.

Claims

1. A display panel, characterized in that, Comprising: A substrate; A display area and an opening area disposed on the substrate, the display area surrounding the opening area, The display area includes: A first metal layer, a first planarization layer, a second metal layer, and a second planarization layer stacked on the substrate; A protective layer disposed on the second planarization layer; and A pixel defining layer disposed on the protective layer, the pixel defining layer defining pixel openings, The first metal layer includes a plurality of first signal lines arranged in a first direction, the second metal layer includes a plurality of second signal lines arranged in the first direction, and a plurality of the second signal lines located at the edge of the opening area include extension areas and bending areas disposed between the extension areas, the bending areas partially surrounding the opening area, The protective layer includes a first protection area and a second protection area, a positive projection of the first protection area on the substrate surrounds the pixel opening, and a positive projection of the second protection area on the substrate surrounds the opening area and covers at least one turn of the bending area starting from the opening area.

2. The display panel according to claim 1, wherein The display area includes a first display area and a display fan-out area, the display fan-out area is disposed between the first display area and the opening area, the display fan-out area surrounds the opening area, A positive projection of the display fan-out area on the substrate covers the bending area of the second signal line, The second protection area covers a portion of the second planarization layer located in the display fan-out area.

3. The display panel according to claim 1, wherein The display area includes a first display area and a display fan-out area, the display fan-out area is disposed between the first display area and the opening area, the display fan-out area surrounds the opening area, The second protection area is located in the display fan-out area, and a positive projection of the second protection area on the substrate is a plurality of rings surrounding the opening area, The second protection area covers multiple turns of bending areas starting from the opening area, and a positive projection of each of the multiple turns of bending areas on the substrate falls within the ring.

4. The display panel according to claim 1 or 3, characterized in that, A positive projection of the second protection area on the substrate surrounds the opening area and covers at least three turns of the bending area starting from the opening area.

5. The display panel according to claim 1, characterized in that, The second protection area extends from the surface of the second planarization layer to the opening area.

6. The display panel according to claim 4, characterized in that, The display area includes a first display area and a display fan-out area, the display fan-out area is disposed between the first display area and the opening area, the display fan-out area surrounds the opening area, The second planarization layer includes at least one groove surrounding the opening area, and the grooves are arranged in one-to-one correspondence with the openings of the second protection areas, An edge of a positive projection of the second protection area on the substrate extends into a positive projection of the groove on the substrate.

7. The display panel according to claim 6, wherein The display area further includes: a first electrode layer, the first electrode layer covers the display fan-out area and at least partially covers the first display area, and the first electrode layer is disconnected at the edges of the protective layer and the groove.

8. The display panel according to claim 1, characterized in that, The protective layer is disposed on a surface of the second planarization layer away from the substrate.

9. The display panel according to claim 1, wherein The display area further includes: a third planarization layer disposed between the second planarization layer and the protective layer, The protective layer at least covers an end region of the second planarization layer exposed from the third planarization layer.

10. The display panel according to claim 1, characterized in that, The first planarization layer includes a first opening surrounding the opening region, and the second planarization layer includes a second opening surrounding the opening region. A positive projection of the first opening on the substrate falls within a positive projection of the second opening on the substrate.

11. A display device, characterized in that, A display panel includes any one of claims 1-10.

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