Method of manufacturing display device

Abstract

A method of manufacturing a display device is provided. The method comprises the following steps: arranging a thin film transistor in a light emitting area of a substrate; providing a first organic material layer covering the thin film transistor, and patterning the first organic material layer to provide a first insulating layer; providing a pixel electrode electrically connected to the thin film transistor; and providing a second organic material layer covering the first insulating layer and the pixel electrode, and patterning the second organic material layer to provide a second insulating layer defining a light emitting region, in which the first insulating layer includes: a first region corresponding to the light emitting region; and a second region disposed outside the light emitting region, the second region having a thickness smaller than a thickness of the first region, within the light emitting region, the second insulating layer covering an edge of the pixel electrode and covering an outer lateral surface of the first region of the first insulating layer, and a height of the second insulating layer decreases in a direction from the first region to the second region.

Description

[0001] This application is a divisional application of the invention patent application with the application date of November 26, 2019, the application number of 201911172786.4, and the title of "Display Device". Technical Field

[0002] One or more embodiments relate to a display device and a method of manufacturing the display device. Background Art

[0003] Generally, a display device has a structure in which various layers are stacked therein. For example, an organic light-emitting display device includes organic light-emitting elements, and the organic light-emitting elements include pixel electrodes, counter electrodes, and an intermediate layer including an organic emission layer. In addition, a circuit unit for driving the organic light-emitting elements also has a structure in which a plurality of wirings (or a plurality of wiring layers) are stacked therein, and an insulating layer for preventing electrical short circuits between the plurality of wiring layers may be located between the plurality of wiring layers. The insulating layer may include an inorganic material or an organic material or may be formed of an inorganic material or an organic material. Summary of the Invention

[0004] One or more embodiments include a display device and a method of manufacturing the display device, in which outgassing from an insulating layer including an organic material or formed of an organic material can be minimized.

[0005] Additional features will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the presented embodiments.

[0006] According to one or more embodiments, a display device includes: a substrate including a display area in which a plurality of light-emitting areas are provided to be spaced apart from each other; a light-emitting element located on the substrate and in the light-emitting area; a thin-film transistor electrically connected to the light-emitting element; a first insulating layer located between the light-emitting element and the thin-film transistor; and a second insulating layer defining the light-emitting area, the first insulating layer being located between the thin-film transistor and the second insulating layer. The first insulating layer includes a first area corresponding to the light-emitting area and a second area provided outside the light-emitting area, the first area of the first insulating layer has a first thickness, and the second area of the first insulating layer has a second thickness smaller than the first thickness. In the same light-emitting area, the second insulating layer covers a lateral surface of the first area of the first insulating layer, and a height of the second insulating layer decreases along a direction from the first area to the second area.

[0007] The first areas of the first insulating layer may be provided as a plurality corresponding to the plurality of light-emitting areas provided to be spaced apart from each other, and the second area of the first insulating layer may connect one of the first areas of the first insulating layer to an adjacent one of the first areas of the first insulating layer.

[0008] The light-emitting element may include a pixel electrode disposed corresponding to a first region of the first insulating layer, and the second insulating layer may cover an edge of the pixel electrode.

[0009] An upper surface of the first region of the first insulating layer may be flat.

[0010] The second insulating layer may expose an upper surface of the second region of the first insulating layer to the outside of the second insulating layer.

[0011] An end portion of the second insulating layer may expose an upper surface of the second region of the first insulating layer to the outside of the second insulating layer, and the end portion of the second insulating layer may have a concave curved surface.

[0012] The light-emitting element may include a common electrode that is in direct contact with an upper surface of the second region exposed to the outside of the second insulating layer.

[0013] The second insulating layer may extend from the first region to define an extension portion on the second region, and an upper surface of the extension portion farthest from the substrate may be closer to the substrate than an upper surface of the first region farthest from the substrate.

[0014] Both the first insulating layer and the second insulating layer may include an organic material.

[0015] The second insulating layer may have a black color.

[0016] The display device may further include a packaging layer located on the light-emitting element and including a first inorganic packaging layer, an organic packaging layer, and a second inorganic packaging layer.

[0017] According to one or more embodiments, a method of manufacturing a display device includes the steps of: disposing a thin-film transistor in a light-emitting region of a substrate; disposing a first organic material layer covering the thin-film transistor and patterning the first organic material layer to dispose a first insulating layer; disposing a pixel electrode electrically connected to the thin-film transistor; and disposing a second organic material layer covering the first insulating layer and the pixel electrode and patterning the second organic material layer to dispose a second insulating layer defining the light-emitting region. The first insulating layer includes: a first region corresponding to the light-emitting region; and a second region disposed outside the light-emitting region, the second region having a thickness smaller than that of the first region. Within the light-emitting region, the second insulating layer covers an edge of the pixel electrode and an outer lateral surface of the first region of the first insulating layer, and a height of the second insulating layer decreases along a direction from the first region to the second region.

[0018] The step of disposing the second insulating layer may expose the pixel electrode. The method may further include the steps of: disposing an intermediate layer including an organic emission layer on the pixel electrode exposed to the outside of the second insulating layer; and disposing a common electrode on the intermediate layer.

[0019] The step of providing the second insulating layer may also expose the upper surface of the second region to the outside of the second insulating layer, and the step of providing the common electrode may provide the common electrode to be in direct contact with the upper surface of the second region exposed to the outside of the second insulating layer.

[0020] The step of providing the second insulating layer may provide an end portion of the second insulating layer that is located in the second region of the first insulating layer and has a concave curved surface.

[0021] The step of providing the second insulating layer may provide an extension portion of the second insulating layer that covers the second region of the first insulating layer, and the upper surface of the extension portion farthest from the substrate may be closer to the substrate than the upper surface of the first region of the first insulating layer farthest from the substrate.

[0022] The upper surface of the first region of the first insulating layer may be flat, and the step of providing the pixel electrode may provide the pixel electrode on the flat upper surface of the first region of the first insulating layer.

[0023] The step of patterning the first organic material layer may use a first halftone mask and may simultaneously provide the first region and the second region of the first insulating layer.

[0024] The step of patterning the second organic material layer may use a second halftone mask and may remove a portion of the second organic material layer corresponding to the second region of the first insulating layer.

[0025] The method may further include: providing a first inorganic encapsulation layer, an organic encapsulation layer, and a second inorganic encapsulation layer on the common electrode.

[0026] In addition to the foregoing details, other features and advantages will be apparent from the drawings, the claims, and the detailed description. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] These and / or other features will become apparent and more readily appreciated from the following description of embodiments in conjunction with the drawings, in which: Figure 1A and Figure 1B are a schematic top plan view and an enlarged top plan view of an embodiment of a display device, respectively; Figure 2 is an equivalent circuit diagram of an embodiment of a pixel of a display device; Figure 3 is an enlarged cross-sectional view taken along line I-I' of Figure 1B ; Figures 4 to 6 is a view showing Figure 1A and Figure 1B an enlarged cross-sectional view of an embodiment of elements of a display device; and Figures 7 to 9It is a magnified cross-sectional view showing the structure of a display device in an embodiment of a method of manufacturing Figure 1A and Figure 1B the display device. DETAILED DESCRIPTION

[0028] Reference will now be made in detail to the embodiments, examples of which are illustrated in the accompanying drawings, wherein like reference numerals always refer to like elements. In this regard, the present embodiments may have different forms and should not be construed as limited to the description set forth herein. Accordingly, the embodiments will be described only by referring to the drawings in the following to explain the features of the present description.

[0029] As used herein, the term "and / or" includes any combination and all combinations of one or more of the associated listed items. Expressions such as "at least one of..." when located after a series of elements modify the entire list of elements and not individual elements in the list.

[0030] Since the present disclosure may have various modifications and many embodiments, embodiments are illustrated in the drawings and will be described in detail. The effects, features, and methods for achieving the effects and features will be described together with the embodiments described in detail below and the drawings. However, the embodiments may have different forms and should not be construed as limited to the description set forth herein.

[0031] Although terms such as "first", "second", etc. may be used to describe various components, such components are not necessarily limited by the above terms. The above terms are only used to distinguish one component from another.

[0032] Unless a singular form used in the context has a clearly different meaning, singular forms include plural forms. As used herein, unless the content clearly indicates otherwise, the singular forms "a", "an", "the", and "at least one" are intended to include the plural forms.

[0033] In this specification, it will be understood that terms such as "comprising" or "having" are intended to indicate the presence of the features or components disclosed in the specification, and are not intended to exclude the possibility of adding one or more other features or components.

[0034] It will be understood that when a layer, region, or component is referred to as being related to another element such as "on" another layer, region, or component, the layer, region, or component may be directly or indirectly on the other layer, region, or component. That is, for example, there may be an intermediate layer, intermediate region, or intermediate component. In contrast, when a layer, region, or component is referred to as being related to another element such as "directly on" another layer, region, or component, there is no intermediate layer, intermediate region, or intermediate component.

[0035] For ease of explanation, the dimensions of components in the drawings may be exaggerated. In other words, since the dimensions and thicknesses of components in the drawings are arbitrarily shown for ease of explanation, the following embodiments are not limited thereto.

[0036] When certain embodiments can be implemented differently, the specific process order may be executed differently from the described order. For example, two consecutively described processes may be executed substantially simultaneously or in an order opposite to the described order.

[0037] In addition, relative terms such as "lower" or "bottom" and "upper" or "top" may be used herein to describe the relationship of one element to another as shown in the figures. It will be understood that relative terms are intended to include different orientations of the device in addition to the orientation depicted in the figures. For example, if the device in a figure is flipped, an element described as on the "lower" side of other elements will subsequently be positioned on the "upper" side of the said other elements. Thus, depending on the specific orientation of the figure, the exemplary term "lower" may include both the "upper" and "lower" orientations. Similarly, if the device in a figure is flipped, an element described as "beneath" or "under" other elements will subsequently be positioned "above" the said other elements. Thus, the exemplary terms "beneath" or "under" may include both the upper and lower orientations.

[0038] As used herein, "about" or "approximately" includes the stated value and means within an acceptable deviation of the specific value as determined by one of ordinary skill in the art in view of the measurement being discussed and the error associated with the measurement of a particular quantity (i.e., the limitations of the measurement system). For example, "about" can mean within one or more standard deviations, or within ±30%, ±20%, ±10%, or ±5% of the stated value.

[0039] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs. It will also be understood that terms (such as those defined in a general dictionary) should be interpreted as having a meaning consistent with their meaning in the relevant art and the context of this disclosure, and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.

[0040] Exemplary embodiments are described herein with reference to cross-sectional views that are schematic illustrations of idealized embodiments. Accordingly, variations in the shapes of the illustrations are to be expected for example due to manufacturing techniques and / or tolerances. Thus, the embodiments described herein should not be construed as limited to the specific shapes of regions as illustrated herein, but will include deviations in shapes due to, for example, manufacturing. For example, regions shown or described as flat will generally have rough and / or non-linear characteristics. Additionally, sharp corners shown may be rounded. Thus, the regions shown in the figures are schematic in nature, and their shapes are not intended to show the exact shape of the regions nor to limit the scope of the claims presented.

[0041] The embodiments will be described in more detail below with reference to the accompanying drawings. Regardless of the figure numbers, the same or corresponding components are denoted by the same reference numerals.

[0042] In an insulating layer including or formed of an organic material, gases generated in the organic material may be partially retained within the stacked layers during the manufacturing process of the display device rather than being completely exhausted. Accordingly, outgassing may occur from the insulating layer including or formed of an organic material during use of the display device. In addition, when the display device is used outdoors for a relatively long period of time, the insulating layer including or formed of an organic material may be decomposed by sunlight and gases may be generated during the decomposition process. When gases are generated due to the decomposition of the insulating layer including or formed of an organic material, the gases may deteriorate the organic emission layer within the organic light-emitting element, which causes defects such as pixel shrinkage, thereby deteriorating the reliability of the display device.

[0043] Figure 1A and Figure 1B are a schematic top plan view and an enlarged top plan view, respectively, of an embodiment of the display device 10. Figure 2 is an equivalent circuit diagram of an embodiment of a pixel P included in the display device 10. Figure 1B is Figure 1A an enlarged view of region A of

[0044] Referring to Figure 1A 、 Figure 1B and Figure 2 , the display device 10 includes a display area DA for displaying an image and a peripheral area PA adjacent to the display area DA and not displaying an image. The display device 10 includes a substrate 100. It is also understood that the substrate 100 includes a display area DA and a peripheral area PA that generally correspond to the display area DA and the peripheral area PA described above for the display device 10. Figure 1A The substrate 100 in may generally represent a conventional display substrate of the display device 10 or may represent a base substrate on which various layers are stacked within the conventional display substrate.

[0045] The light-emitting region EA can be disposed in the display region DA. More than one light-emitting region EA can be spaced apart from each other along the first direction X and along the second direction Y intersecting the first direction X. More than one light-emitting region EA can have equal planar dimensions or different planar dimensions from each other. In addition, more than one light-emitting region EA can be disposed along lines parallel to each other in the first direction X and / or the second direction Y, or can be arranged in a staggered manner relative to each other or in various other arrangements.

[0046] At least one light-emitting element is disposed in each light-emitting region EA to emit light of red, blue, green, or white. More than one light-emitting region EA can be divided by the second insulating layer 120 along the first direction X and / or along the second direction Y. Accordingly, in the display device 10, one of the light-emitting regions EA can be or can define a pixel P of the display device 10. The pixel P described herein can also represent a sub-pixel within a conventional pixel of the display device 10. Figure 2 An example of an equivalent circuit diagram of the pixel P is shown. Referring to Figure 2 , the pixel P can include a pixel circuit PC connected to a scan line SL as a signal line and a data line DL as a signal line, and a light-emitting element connected to the pixel circuit PC. The light-emitting element can include, for example, an organic light-emitting diode OLED.

[0047] The pixel circuit PC can include a driving thin-film transistor Td, a switching thin-film transistor Ts, and a storage capacitor Cst. The switching thin-film transistor Ts is connected to the scan line SL and the data line DL, and can transmit a data signal input via the data line DL to the driving thin-film transistor Td according to a scan signal input via the scan line SL. The storage capacitor Cst is connected to the switching thin-film transistor Ts and the driving power line PL, and can store a voltage corresponding to the difference between the voltage received from the switching thin-film transistor Ts and the driving voltage ELVDD supplied to the driving power line PL.

[0048] The driving thin-film transistor Td is connected to the driving power line PL and the storage capacitor Cst, and can control a driving current flowing from the driving power line PL to the organic light-emitting diode OLED according to the voltage value stored in the storage capacitor Cst. The organic light-emitting diode OLED can emit light of a certain brightness via the driving current. The organic light-emitting diode OLED can emit light of, for example, red, green, blue, or white.

[0049] Although referring to Figure 2A pixel P including two thin film transistors and one storage capacitor is described, but the present disclosure is not limited thereto. According to another embodiment, various other modifications can be made. For example, the pixel circuit PC of the pixel P can include three or more thin film transistors and two or more storage capacitors.

[0050] Returning to Figure 1A and Figure 1B , the peripheral area PA can surround the display area DA. The peripheral area PA is an area of the display device 10 and / or the substrate 100 where one or more pixels P are not provided. The peripheral area PA corresponds to a non-display area of the display device 10 and / or the substrate 100 where no image is provided. The peripheral area PA can include a pad (or "landing pad") area, where various electronic devices and / or printed circuit boards are electrically attached. At the pad area, electrical signals will be applied to one or more light-emitting elements respectively provided in the light-emitting area EA via a plurality of signal wirings. In an embodiment, the electrical signals can be provided from outside the display device 10 to the peripheral area PA through the pad area, signal wirings, etc.

[0051] Figure 3 is an enlarged cross-sectional view taken along line I-I' of Figure 1B . Figures 4 to 6 is an enlarged cross-sectional view showing an embodiment of the elements of the display device 10 of Figure 1A and Figure 1B . Hereinafter, although Figures 4 to 6 respectively show cross-sections corresponding to the cross-section of the display device 10 shown in Figure 3 , for ease of description, mainly the first insulating layer 111 and the second insulating layer 120 among the elements shown in Figure 3 are shown and other elements are omitted. The thickness of the display device 10, the substrate 100, and / or their respective elements extends along a third direction intersecting each of the first direction X and the second direction Y. In Figure 3 , the vertical direction can represent the third direction, and the horizontal direction can represent the first direction X and / or the second direction Y.

[0052] Referring to Figure 3 , a thin film transistor 130, a light-emitting element 200 electrically connected to the thin film transistor 130, and a first insulating layer 111 located between the thin film transistor 130 and the light-emitting element 200 and having a thickness that varies according to the position along the substrate 100 can be provided on the substrate 100 as a base substrate. The light-emitting element 200 can include, for example, an organic light-emitting diode OLED, and the thin film transistor 130 can correspond to the driving thin film transistor Td of the pixel circuit PC described with reference to Figure 2 . In addition, Figure 3 the storage capacitor 140 shown inFigure 2 corresponds to the described storage capacitor Cst. Although Figure 3 the switching thin film transistor Ts ( Figure 2 ) is not shown in Figure 2 ), the switching thin film transistor Ts (

[0053] The substrate 100 may include a glass material containing SiO2 as a main component. However, the substrate 100 is not limited thereto and may also include a transparent plastic material or be formed of a transparent plastic material. The substrate 100 may include a plastic material as an insulating organic material or be formed of a plastic material as an insulating organic material. For example, in an embodiment, the insulating organic material may be selected from polyethersulfone ("PES"), polyacrylate ("PAR"), polyetherimide ("PEI"), polyethylene naphthalate ("PEN"), polyethylene terephthalate ("PET"), polyphenylene sulfide ("PPS"), polyarylate, polyimide, polycarbonate ("PC"), triacetyl cellulose ("TAC"), and cellulose acetate propionate ("CAP").

[0054] In a bottom emission type display device in which an image is realized toward the substrate 100 (for example, visible on one side of the substrate 100), the substrate 100 includes a transparent material or is formed of a transparent material. However, in a top emission type display device in which an image is realized in a direction away from the substrate 100, the substrate 100 may not include a transparent material or be formed of a transparent material.

[0055] For example, in a top emission type display device, the substrate 100 may include a metal material or be formed of a metal material. When the substrate 100 includes a metal material or is formed using a metal material, the substrate 100 may include at least one material selected from carbon, iron, chromium, manganese, nickel, titanium, molybdenum, and stainless steel ("SUS"), but is not limited thereto.

[0056] The buffer layer 101 may be provided or formed on the substrate 100. The buffer layer 101 may reduce or effectively prevent foreign substances or moisture penetrating through the substrate 100 from reaching other layers stacked on the substrate 100. The buffer layer 101 may include an inorganic material such as silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, aluminum nitride, titanium oxide, or titanium nitride, or an organic material such as polyimide, polyester, or acrylic, or have a structure in which a plurality of the described materials are stacked therein. The buffer layer 101 may be provided or formed on each of the display area DA and the peripheral area PA.

[0057] The thin film transistor 130 may include an active layer 134, a gate electrode 136, and a gate insulating layer 103 provided between the active layer 134 and the gate electrode 136.

[0058] The active layer 134 may include a semiconductor material such as amorphous silicon or polycrystalline silicon. However, embodiments are not limited thereto, and the active layer 134 may include various materials. According to an embodiment, the active layer 134 may include an organic semiconductor material or the like. According to another embodiment, the active layer 134 may include an oxide semiconductor material. For example, in an embodiment, the active layer 134 may include an oxide of a Group 12, Group 13, or Group 14 metal element such as zinc (Zn), indium (In), gallium (Ga), tin (Sn), cadmium (Cd), and germanium (Ge), and a material selected from combinations of the metal elements.

[0059] The active layer 134 may include or define a channel region 131 that overlaps with the gate electrode 136, and source regions 132 and drain regions 133 that are respectively disposed on opposite sides of the channel region 131 and doped with impurities having a higher concentration than the impurities doped in the channel region 131. The impurities may include N-type impurities or P-type impurities.

[0060] The gate electrode 136 may be connected to a signal line such as a gate line or a scan line, through which a conduction / non-conduction signal is applied to the thin film transistor 130. The gate electrode 136 may include a metal material with relatively low resistance or be formed of a metal material with relatively low resistance. For example, the gate electrode 136 may include one or more materials selected from aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), lithium (Li), calcium (Ca), molybdenum (Mo), titanium (Ti), tungsten (W), and copper (Cu), and may have a single-layer structure or a multi-layer structure.

[0061] The gate insulating layer 103 between the active layer 134 and the gate electrode 136 may reduce or effectively prevent an electrical short circuit between the active layer 134 and the gate electrode 136. The gate insulating layer 103 may include an inorganic insulating layer such as silicon oxynitride (SiON), silicon oxide (SiO x ), and / or silicon nitride (SiN x ), and the inorganic insulating layer may be a single-layer structure or a multi-layer structure.

[0062] The first interlayer insulating layer 105 may be disposed on the gate electrode 136. The first interlayer insulating layer 105 is a layer having a specific dielectric constant, and may include a single-layer structure or a multi-layer structure in which each layer contains an inorganic material or is formed of an inorganic material. For example, in an embodiment, the inorganic material may be a metal oxide or a metal nitride. Specifically, the inorganic material may include silicon oxide (SiO2), silicon nitride (SiN x ), silicon oxynitride (SiON), aluminum oxide (Al2O3), titanium oxide (TiO2), tantalum oxide (Ta2O5), or hafnium oxide (HfO2), etc.

[0063] The bottom electrode 144 and the top electrode 146 of the storage capacitor 140 can be stacked on top of each other, and the first interlayer insulating layer 105 is located between the bottom electrode 144 and the top electrode 146. For example, in an embodiment, the bottom electrode 144 of the storage capacitor 140 can be the gate electrode 136 of the thin film transistor 130. Thus, the storage capacitor 140 can be stacked with the thin film transistor 130. However, the embodiment is not limited thereto. According to another embodiment, the storage capacitor 140 can be not stacked with the thin film transistor 130, and the bottom electrode 144 can be a separate element independent of the gate electrode 136 of the thin film transistor 130.

[0064] The storage capacitor 140 can be covered by the second interlayer insulating layer 107. The second interlayer insulating layer 107 can include an inorganic material in a single-layer structure or a multi-layer structure or be formed of an inorganic material in a single-layer structure or a multi-layer structure. For example, in an embodiment, the inorganic material can be a metal oxide or a metal nitride. Specifically, the inorganic material can include silicon oxide (SiO2), silicon nitride (SiN x ), silicon oxynitride (SiON), aluminum oxide (Al2O3), titanium oxide (TiO2), tantalum oxide (Ta2O5), hafnium oxide (HfO2), etc.

[0065] The data line DL, the source electrode (not shown) of the thin film transistor 130, the drain electrode 138, etc. can be provided on the second interlayer insulating layer 107. The source electrode and the drain electrode 138 of the thin film transistor 130 can be respectively connected to the source region 132 and the drain region 133 of the active layer 134. In addition, one of the source electrode and the drain electrode 138 of the thin film transistor 130 can be electrically connected to the pixel electrode 210 of the light-emitting element 200 as described later. The source electrode can be a part of the data line DL, but is not limited thereto.

[0066] For example, the source electrode and the drain electrode 138 can include one or more materials selected from aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), lithium (Li), calcium (Ca), molybdenum (Mo), titanium (Ti), tungsten (W), and copper (Cu), and can be provided or formed in a single-layer structure or a multi-layer structure. For example, in an embodiment, the source electrode and the drain electrode 138 can have a three-layer stacked structure including titanium (Ti), aluminum (Al), and titanium (Ti).

[0067] The pixel circuit PC can further include the switching thin film transistor Ts as described above ( Figure 2 ). Here, the active layer 134 of the thin film transistor 130 and the switching thin film transistor Ts ( Figure 2The active layer of ( ) may include materials different from each other. For example, in an embodiment, the active layer 134 of the thin film transistor 130 and the switching thin film transistor Ts ( Figure 2 One of the active layers of ) may include an oxide semiconductor, and the other may include polysilicon.

[0068] The first insulating layer 111 is disposed on the thin film transistor 130. For example, the first insulating layer 111 may include an organic insulating material. Examples of the organic insulating material may include imide polymers, general polymers such as polymethyl methacrylate ("PMMA") and polystyrene ("PS"), polymer derivatives having phenolic groups, acrylic polymers, aryl ether polymers, amide polymers, fluoropolymers, parylene polymers, vinyl alcohol polymers, and mixtures thereof. According to an embodiment, the first insulating layer 111 may include polyimide.

[0069] The first insulating layer 111 may be disposed or formed over the display area DA and over the peripheral area PA. As Figure 4 shown, the first insulating layer 111 may include, at least in the display area DA, more than one first region A1 spaced apart from each other and more than one second region A2 each having a thickness different from the thickness of each of the first regions A1. The second regions A2 may be located between two adjacent ones of the first regions A1 and may have a shape or structure connecting two of the first regions A1 to each other.

[0070] The first thickness T1 of the first insulating layer 111 in each first region A1 may be greater than the second thickness T2 of the first insulating layer 111 in the second region A2. When the lateral surface or side surface of the first insulating layer 111 in the first region A1 is tapered, the first region A1 is defined along the substrate 100 as a planar region between points where the thickness of the first insulating layer 111 increases from the second thickness T2. The first thickness T1 of the first insulating layer 111 may be the maximum in the first region A1. When the first insulating layer 111 extends from the display area DA to the peripheral area PA, the thickness of the first insulating layer 111 in the peripheral area PA may be equal to the second thickness T2.

[0071] More than one first region A1 is provided to correspond to more than one light-emitting region EA respectively. That is to say, at least one light-emitting element 200 can be provided in each first region A1. The first insulating layer 111 has a first thickness T1 corresponding to the thin-film transistor 130. Since the first insulating layer 111 with the first thickness T1 covers the elements of the thin-film transistor 130, the height difference or step structure caused by the elements such as the thin-film transistor 130 can be removed. Therefore, the first insulating layer 111 at the first region A1 can have a flat upper surface 111a. Thus, the defects caused in the light-emitting element 200 provided corresponding to the first region A1 of the first insulating layer 111 due to the unevenness of the elements of the thin-film transistor 130 at the lower part of the stacked structure on the substrate 100 can be reduced or effectively prevented. For example, in an embodiment, the first thickness T1 of the first insulating layer 111 at its first region A1 can be about 1 micrometer (μm) to about 1.5 micrometers (μm).

[0072] The first insulating layer 111 at the second region A2 of the first insulating layer 111 can cover wirings such as data lines DL and other elements provided on the substrate 100 at the second region A2, and can protect such elements. The second thickness T2 of the second region A2 can be about 2000 angstroms (Å) to about 3000 Å to reduce or effectively prevent an electrical short circuit between the wiring on the second interlayer insulating layer 107 and under the first insulating layer 111 and the common electrode 230 located above the first insulating layer 111, so as to minimize the total volume of the first insulating layer 111 in the display device 10.

[0073] The light-emitting element 200 including the pixel electrode 210, the common electrode 230, and the intermediate layer 220 located between the pixel electrode 210 and the common electrode 230 and containing an emission layer can be provided on the first insulating layer 111 at the first region A1 of the first insulating layer 111. For example, in an embodiment, the light-emitting element 200 can include an organic light-emitting diode OLED ( Figure 2 ).

[0074] The pixel electrode 210 is disposed corresponding to the first region A1 and can be electrically connected to the thin film transistor 130. For example, the pixel electrode 210 can be a reflective electrode. For example, in an embodiment, the pixel electrode 210 can include a reflective layer containing Ag, Mg, Al, Pt, Pd, Au, Ni, Nd, Ir, Cr, or a composite thereof, or formed of Ag, Mg, Al, Pt, Pd, Au, Ni, Nd, Ir, Cr, or a composite thereof, and a transparent electrode layer or a semi-transparent electrode layer located on the reflective layer. The transparent electrode layer or the semi-transparent electrode layer can include at least one selected from indium tin oxide (“ITO”), indium zinc oxide (“IZO”), zinc oxide (“ZnO”), indium oxide (“In2O3”), indium gallium oxide (“IGO”), and aluminum zinc oxide (“AZO”).

[0075] Contrary to the pixel electrode 210 being a reflective electrode, the common electrode 230 can be a transparent electrode or a semi-transparent electrode and can include a metal thin film having a relatively small work function, i.e., Li, Ca, LiF / Ca, LiF / Al, Al, Ag, Mg, and their composites. In addition, an auxiliary electrode layer or a bus electrode can also be provided or formed on the metal thin film and has a material such as ITO, IZO, ZnO, In2O3, etc. for forming a transparent electrode. Therefore, the light emitted from the organic emission layer included in the intermediate layer 220 can pass through the common electrode 230. That is, the light emitted from the organic emission layer can be directly emitted to the common electrode 230, or can be reflected by the pixel electrode 210 including the reflective electrode toward the common electrode 230.

[0076] However, the display device 10 according to the present embodiment is not limited to the front emission type (i.e., the top emission type), and can also be a bottom emission type in which the light emitted from the organic emission layer is emitted toward the substrate 100. In this case, the pixel electrode 210 can include a transparent electrode or a semi-transparent electrode, and the common electrode 230 can include a reflective electrode. In addition, the display device 10 according to the embodiment can also be a dual emission type in which light is emitted in two directions, one toward the front side of the display device 10 at the light emitting element 200 side and the other toward the back side at the substrate 100 side.

[0077] The second insulating layer 120 is disposed on the pixel electrode 210. The second insulating layer 120 may include at least one organic insulating material selected from among polyimide, polyamide, acrylic resin, benzocyclobutene, and phenolic resin, or may be formed of at least one organic insulating material selected from among polyimide, polyamide, acrylic resin, benzocyclobutene, and phenolic resin. The second insulating layer 120 may be formed by using a method such as spin coating. The second insulating layer 120 may define an opening, and a central portion of the pixel electrode 210 is exposed at the opening. The opening defined by the second insulating layer 120 may define a light-emitting region EA. In addition, by covering the outer edge of the pixel electrode 210, the second insulating layer 120 may increase the distance between the outer edge of the pixel electrode 210 and the common electrode 230 ( Figure 3 ) in the thickness direction, thereby reducing or effectively preventing an arc or the like therebetween.

[0078] As Figure 4 shown, the second insulating layer 120 covers the outer lateral surface or the outer side surface of the first insulating layer 111 at its first region A1. The second insulating layer 120 may extend from the outer lateral surface or the outer side surface of the first insulating layer 111 along the substrate 100 at one of the light-emitting regions EA and terminate at a certain distance from the outer lateral surface or the outer side surface of the first insulating layer 111. The second insulating layer 120 extends along the substrate 100 from one of the light-emitting regions EA toward another one of the light-emitting regions EA. That is, the second insulating layer 120 may not exist between two adjacent ones of the light-emitting regions EA. Therefore, the second insulating layer 120 may have a barrier shape surrounding one light-emitting region EA. Specifically, the height of the second insulating layer 120 in the thickness direction may decrease from the first region A1 of the first insulating layer 111 to the second region A2 of the first insulating layer 111. For example, in an embodiment, the second insulating layer 120 does not exist at the central portion of the second region A2 of the first insulating layer 111, and thus, the upper surface of the first insulating layer 111 at its second region A2 may be exposed to the outside of the second insulating layer 120. As a result, the second region A2 of the first insulating layer 111 may be in direct contact with the common electrode 230 as described later.

[0079] As described above, both the first insulating layer 111 and the second insulating layer 120 include an organic insulating material. When a part of the second insulating layer 120 does not exist in the second region A2 where the first insulating layer 111 has the second thickness T2, the amount of the organic material between two adjacent light-emitting regions EA in the light-emitting region EA can be minimized. As a result, the total volume of the organic material in the display device 10 is reduced, and thus, outgassing of the organic material can be minimized, thereby reducing and / or effectively preventing defects such as pixel shrinkage of the display device 10 due to outgassing. In addition, even when the display device 10 is exposed to sunlight for a relatively long period of time, the amount of the organic material decomposed by sunlight can be reduced, and thus, the reliability of the display device 10 can be improved.

[0080] The second insulating layer 120 may be black and may reduce light incident on other layers stacked on the substrate 100. For example, in an embodiment, the second insulating layer 120 may include carbon black or the like. When the second insulating layer 120 is black, due to the light absorption of the second insulating layer 120, the organic material in the display device 10 can be reduced or effectively prevented from being decomposed by sunlight. In addition, by using the second insulating layer 120 having a barrier shape, color mixing or light leakage can be reduced or effectively prevented.

[0081] Return reference Figure 3 , an intermediate layer 220 is disposed in an opening of the second insulating layer 120 exposing the pixel electrode 210. The intermediate layer 220 may include a relatively low molecular weight material or a polymeric material. When the intermediate layer 220 includes a relatively low molecular weight material, the intermediate layer 220 may include a hole injection layer ("HIL"), a hole transport layer ("HTL"), an emission layer ("EML"), an electron transport layer ("ETL"), an electron injection layer ("EIL"), etc. having a single-layer structure or a composite stacked structure. When the intermediate layer 220 includes a relatively low molecular weight material, the intermediate layer 220 may include copper phthalocyanine (CuPc), N,N'-bis(naphthalen-1-yl)-N,N'-diphenyl-benzidine (NPB), tris(8-hydroxyquinoline) aluminum (Alq3), or various other organic materials. The above layers may be formed using a vacuum deposition method.

[0082] When the intermediate layer 220 includes a polymeric material, the intermediate layer 220 may have a structure including a hole transport layer ("HTL") and an emission layer ("EML"). The HTL may include PEDOT, and the EML may include a polymeric material such as a poly(phenylene vinylene) material or a polyfluorene material. The structure of the intermediate layer 220 is not limited to the above structure and may be of various structures. For example, in an embodiment, at least one of the layers included in the intermediate layer 220 may be integrally formed over more than one pixel electrode 210 such that it is common to more than one light-emitting region EA. Alternatively, the intermediate layer 220 may include layers patterned to correspond discretely to each pixel electrode 210.

[0083] In addition, the common electrode 230 may be disposed over the display area DA and may be disposed to cover the display area DA. That is, the common electrode 230 may be integrally formed with respect to more than one light-emitting element 200 such that it is common to more than one light-emitting region EA.

[0084] As Figure 4 shown, the second insulating layer 120 having a barrier shape may cover the outer lateral surface of the first insulating layer 111 at its first region A1, thereby alleviating the height difference that may be formed outside the first region A1. Accordingly, damage (such as cracks) to the common electrode 230 due to the height difference can be reduced or effectively prevented. For example, in an embodiment, when the second insulating layer 120 is disposed only on the first insulating layer 111 in the first region A1 of the first insulating layer 111 and terminates at the first region A1 of the first insulating layer 111 without extending to the second region A2 of the first insulating layer 111, it may be difficult to form the outer lateral surface of the first insulating layer 111 at the first region A1 to be flush with the outer lateral surface of the second insulating layer 120. As a result, a steep step difference may be generated between the outer lateral surface of the first insulating layer 111 at the first region A1 and the outer lateral surface of the second insulating layer 120. In addition, since the first insulating layer 111 has a second thickness T2 in the second region A2, it may be difficult to planarize the uneven portion under the first insulating layer 111. Accordingly, due to the elements disposed under the first insulating layer 111, a steep step difference may be generated at the boundary between the outer lateral surface of the first insulating layer 111 at its first region A1 and the first insulating layer 111 at the second region A2 to define a lower uneven structure. However, when the second insulating layer 120 covers the outer lateral surface of the first insulating layer 111 at its first region A1 and extends to a portion of the first insulating layer 111 at its second region A2, the height difference that may be generated outside the first region A1 of the first insulating layer 111 can be alleviated. Accordingly, damage to the common electrode 230 due to the height difference can be reduced or effectively prevented.

[0085] Although the outer lateral surface of the second insulating layer 120 is shown in Figure 4 a cross-section as having a certain inclination angle, the present disclosure is not limited thereto. For example, in an embodiment, as shown in Figure 5 , the outer lateral surface of the second insulating layer 120 may have a smooth curved surface. Specifically, the second insulating layer 120 disposed at the second region A2 of the first insulating layer 111 and terminating to expose the outer end portion 120e of the first insulating layer 111 at the second region A2 of the first insulating layer 111 may have a concave shape, thereby preventing the common electrode 230 disposed above the second insulating layer 120 from having a sharp bent shape at the point where the outer end portion 120e of the second insulating layer 120 intersects the first insulating layer 111 at the second region A2 of the first insulating layer 111.

[0086] In addition, as shown in Figure 6 , the second insulating layer 120 may further include an extension portion 121 disposed on the first insulating layer 111 at the second region A2 of the first insulating layer 111. When the second insulating layer 120 includes the extension portion 121, the single second insulating layer 120 that divides two adjacent light-emitting regions EA in the light-emitting region EA is connected to each other via the extension portion 121. That is, the first insulating layer 111 is not exposed by the second insulating layer 120 at the second region A2 of the first insulating layer 111. Therefore, the second insulating layer 120 may have a planar shape generally similar to the planar shape of the first insulating layer 111. The extension portion 121 may protect the first insulating layer 111 in the second region A2 and the wiring directly below the first insulating layer 111 in the second region A2. The extension portion 121 may have a thickness equal to or similar to the thickness of the first insulating layer 111 in the second region A2 to minimize the total volume of the organic material in the display device 10. Therefore, the upper surface of the extension portion 121 that is farthest from the substrate 100 may still be closer to the substrate 100 than the upper surface of the first insulating layer 111 that is farthest from the substrate 100 in the first region A1.

[0087] Returning to Figure 3 , a packaging layer 500 for protecting the light-emitting element 200 from moisture or oxygen penetrating from the outside of the packaging layer 500 may be disposed on the common electrode 230. The packaging layer 500 may have a planar shape extending to the display region DA where the light-emitting element 200 is disposed and even extending to the peripheral region PA located outside the display region DA. The packaging layer 500 may have a multi-layer structure. For example, in an embodiment, as shown in Figure 3 , the packaging layer 500 may include a first inorganic packaging layer 510, an organic packaging layer 520, and a second inorganic packaging layer 530.

[0088] The first inorganic encapsulation layer 510 covers the common electrode 230 and may include silicon oxide, silicon nitride, and / or silicon oxynitride, etc. Since the first inorganic encapsulation layer 510 is disposed or formed according to the underlying profile or structure thereunder, the upper surface of the first inorganic encapsulation layer 510 may not be flat as shown in Figure 3 Here, as described above, the second insulating layer 120 having a barrier shape may cover the outer lateral surface of the first insulating layer 111 in the first region A1 to relieve the height difference that may occur outside the first region A1, thus reducing or effectively preventing damage to the first inorganic encapsulation layer 510 due to the height difference.

[0089] The organic encapsulation layer 520 covers the first inorganic encapsulation layer 510 and has a sufficient thickness to planarize the layer thereunder. Accordingly, the uppermost surface of the organic encapsulation layer 520 farthest from the substrate 100 may be substantially flat over the entire display area DA. The organic encapsulation layer 520 may include at least one material selected from polyethylene terephthalate, polyethylene naphthalate, polycarbonate, polyimide, polyethylene sulfonate, polyoxymethylene, polyarylate, and hexamethyldisiloxane.

[0090] The second inorganic encapsulation layer 530 may cover the organic encapsulation layer 520 and may include silicon oxide, silicon nitride, and / or silicon oxynitride, etc. The second inorganic encapsulation layer 530 may extend farther than the outer edge of the organic encapsulation layer 520 so that a part of the second inorganic encapsulation layer 530 is disposed outside the organic encapsulation layer 520 to contact the first inorganic encapsulation layer 510, thereby reducing or effectively preventing the organic encapsulation layer 520 from being exposed to the outside of the encapsulation layer 500.

[0091] Since the encapsulation layer 500 includes the first inorganic encapsulation layer 510, the organic encapsulation layer 520, and the second inorganic encapsulation layer 530, even when cracks are generated in the encapsulation layer 500, by using the multi-layer structure as described above, the cracks will not connect between the first inorganic encapsulation layer 510 and the organic encapsulation layer 520 or between the organic encapsulation layer 520 and the second inorganic encapsulation layer 530. Accordingly, the paths through which water, oxygen, etc. penetrate from the outside of the encapsulation layer 500 into the display area DA can be minimized or effectively prevented.

[0092] Figures 7 to 9 is an enlarged cross-sectional view showing the structure of the display device 10 in an embodiment of the method of manufacturing Figure 1A and Figure 1B the display device 10.

[0093] Refer to Figures 7 to 9, a method of manufacturing a display device 10 includes: disposing or forming a thin film transistor 130 on a substrate 100; disposing or forming a first organic material layer 112 covering the thin film transistor 130 and patterning the first organic material layer 112 to form a first insulating layer 111 including a first region A1 and a second region A2; disposing or forming a pixel electrode 210 on the first insulating layer 111 in the first region A1; and disposing or forming a second organic material layer 122 on the pixel electrode 210 and patterning the second organic material layer 122 to form a second insulating layer 120.

[0094] During disposing or forming the thin film transistor 130 on the substrate 100, a storage capacitor 140 etc. are also disposed or formed, and a data line DL and source and drain electrodes 138 of the thin film transistor 130 are disposed or formed on a second interlayer insulating layer 107 covering the storage capacitor 140. The first organic material layer 112 may be disposed or formed on the second interlayer insulating layer 107 to cover the data line DL and the source and drain electrodes 138 of the thin film transistor 130.

[0095] The first insulating layer 111 may be disposed or formed by a photolithography process of exposing the first organic material layer 112 using a first halftone mask 600 and then developing and removing the exposed portion of the first organic material layer 112.

[0096] Referring Figure 7 , the first halftone mask 600 may include a light-transmitting portion 610 and a semi-transmitting portion 620. The light-transmitting portion 610 is a region through which light is transmitted at about 100%, and is disposed or formed to correspond to the first region A1 of the first insulating layer 111. The semi-transmitting portion 620 is a region through which light is partially transmitted, and may be disposed or formed to correspond to the second region A2 of the first insulating layer 111. The light transmittance of the semi-transmitting portion 620 may be adjusted according to the thickness of the first insulating layer 111 in the second region A2. For example, in an embodiment, as the thickness of the first insulating layer 111 for the second region A2 decreases, the amount of light transmitted through the semi-transmitting portion 620 may decrease.

[0097] As described above, when the first organic material layer 112 is developed after being exposed using the first halftone mask 600, the first region A1 and the second region A2 of the first insulating layer 111 may have different thicknesses from each other based on the exposure amount via the first halftone mask 600. Patterning the first organic material layer 112 using the first halftone mask 600 may simultaneously set the first region A1 and the second region A2 of the first insulating layer 111.

[0098] Referring Figure 8, after the first insulating layer 111 is provided or formed, the pixel electrode 210 is provided or formed on the first insulating layer 111 in the first region A1. The pixel electrode 210 may be electrically connected to the drain electrode 138 through a contact hole or at the contact hole, and the contact hole is provided or formed in the first insulating layer 111 at the first region A1.

[0099] Referring to Figure 8 , the second organic material layer 122 is provided or formed on the pixel electrode 210, and then the second organic material layer 122 is patterned by using the second halftone mask 700 to form the second insulating layer 120. For example, in an embodiment, the second halftone mask 700 may include a light-transmitting portion 710 and a light-blocking portion 720. Therefore, the second insulating layer 120 has a barrier shape and may be provided or formed discontinuously or discretely between two adjacent ones in the light-emitting region EA.

[0100] When the second insulating layer 120 has the shape as described with reference to Figure 5 , the second halftone mask 700 may further include a semi-transmissive portion located between the light-transmitting portion 710 and the light-blocking portion 720. The semi-transmissive portion may be configured to have a light-blocking rate that gradually increases from the light-transmitting portion 710 toward the light-blocking portion 720 in the direction along the substrate 100, rather than a generally uniform light transmittance.

[0101] In addition, when the second insulating layer 120 is provided or formed to include the extension portion 121 ( Figure 6 ) as described with reference to Figure 6 , the second halftone mask 700 may include a semi-transmissive portion corresponding to the region that is farthest from the light-emitting region EA and where the extension portion 121 is provided, rather than the light-blocking portion 720 ( Figure 8 the leftmost and rightmost in

[0102] ) that is farthest from the light-emitting region EA.

[0103] Referring to Figure 9 , the second insulating layer 120 is provided or formed to have an opening exposing the central portion of the pixel electrode 210. The intermediate layer 220 is provided or formed in the opening of the second insulating layer 120, and the common electrode 230 may be provided or formed on the intermediate layer 220, thereby providing or forming the light-emitting element 200. In addition, the first inorganic encapsulation layer 510, the organic encapsulation layer 520, and the second inorganic encapsulation layer 530 may be sequentially provided or formed on the common electrode 230 to manufacture the display device 10.

[0104] According to one or more embodiments of the present disclosure, the total volume of the organic material in the display device can be minimized. Accordingly, outgassing of the organic material can be minimized, and even when the display device is exposed to sunlight for a relatively long period of time, decomposition of the organic material due to sunlight can be minimized or effectively prevented, and thus, the reliability of the display device is improved. However, the scope of the present disclosure is not limited by the above effects.

[0105] It should be understood that the embodiments described herein should be considered in a descriptive sense only and not for purposes of limitation. The description of features within each embodiment should generally be considered available for other similar features in other embodiments.

[0106] Although one or more embodiments have been described with reference to the figures, those of ordinary skill in the art will understand that various changes in form and detail may be made therein without departing from the spirit and scope as defined by the claims.

Claims

1. A method of manufacturing a display device, the method comprising the steps of: Providing a thin film transistor in a light-emitting region of a substrate; Providing a first organic material layer covering the thin film transistor and patterning the first organic material layer to provide a first insulating layer; Providing a pixel electrode electrically connected to the thin film transistor; And Providing a second organic material layer covering the first insulating layer and the pixel electrode and patterning the second organic material layer to provide a second insulating layer defining the light-emitting region, Wherein, The first insulating layer includes: a first region corresponding to the light-emitting region; and a second region provided outside the light-emitting region, the second region having a thickness smaller than that of the first region, Within the light-emitting region, the second insulating layer covers an edge of the pixel electrode and an outer lateral surface of the first region of the first insulating layer, and A height of the second insulating layer decreases along a direction from the first region to the second region.

2. The method according to claim 1, wherein, The step of providing the second insulating layer exposes the pixel electrode outside the second insulating layer, and The method further includes: Providing an intermediate layer including an organic light-emitting layer on the pixel electrode exposed outside the second insulating layer; and Providing a common electrode on the intermediate layer.

3. The method according to claim 2, wherein, The step of providing the second insulating layer further exposes an upper surface of the second region of the first insulating layer outside the second insulating layer, and The step of providing the common electrode makes the common electrode directly contact the upper surface of the second region of the first insulating layer exposed outside the second insulating layer.

4. The method according to claim 3, wherein, The step of providing the second insulating layer makes the second insulating layer provided with an end portion in the second region of the first insulating layer and having a concave curved surface.

5. The method according to claim 1, wherein, The step of providing the second insulating layer makes the second insulating layer provided with an extension covering the second region of the first insulating layer, and An upper surface of the extension farthest from the substrate is closer to the substrate than an upper surface of the first region of the first insulating layer farthest from the substrate.

6. The method according to claim 1, wherein, An upper surface of the first region of the first insulating layer is flat, and The step of providing the pixel electrode makes the pixel electrode provided on the flat upper surface of the first region of the first insulating layer.

7. The method according to claim 1, wherein, The step of patterning the first organic material layer includes using a first halftone mask and simultaneously providing the first region and the second region of the first insulating layer.

8. The method according to claim 1, wherein The step of patterning the second organic material layer includes: Using a second halftone mask; and Removing a portion of the second organic material layer corresponding to the second region of the first insulating layer.

9. The method according to claim 2, the method further including providing a first inorganic encapsulation layer, an organic encapsulation layer, and a second inorganic encapsulation layer on the common electrode.

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