A signal acquisition circuit and electronic device
By controlling the configuration module to apply high or low levels at the acquisition points, the problem of needing to set up separate circuits in the prior art is solved, realizing the convenience and flexibility of signal acquisition, and possessing high reliability and wide voltage adaptability.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- BEIJING FENGZHI RUILIAN TECH CO LTD
- Filing Date
- 2025-04-24
- Publication Date
- 2026-05-22
AI Technical Summary
In the existing technology, when it is necessary to simultaneously acquire signals that are active high and active low within the same system, separate circuits need to be set up, which reduces the convenience of signal acquisition.
A signal acquisition circuit is provided, including a control module, a configuration module, and an acquisition module. The control module outputs a first or second control signal to control the configuration module to apply a high or low level at the acquisition point. The circuit is configured using the output pins of an existing control chip to achieve switching between high and low levels.
There is no need to set up separate circuits for high-level and low-level valid acquisition, which improves the convenience and flexibility of signal acquisition, reduces hardware modification costs, supports multi-channel signal acquisition, and has high reliability and wide voltage adaptability.
Smart Images
Figure CN120335366B_ABST
Abstract
Description
Technical Field
[0001] This application relates to the technical field of electronic circuits, and in particular to a signal acquisition circuit and electronic device. Background Technology
[0002] In signal acquisition scenarios, there are two different signal acquisition requirements for digital signals: active high level and active low level. Generally speaking, acquisition circuits with different structures are required for active high level and active low level acquisition.
[0003] In practical control systems, the same system may simultaneously require the acquisition of both high-level and low-level active signals. For example, in an industrial automated production line, some sensors may output high-level detection signals to indicate the presence of an object, while others may output low-level signals to indicate the on / off state of equipment. Therefore, in practice, when faced with the need to simultaneously acquire both high-level and low-level active signals, it is often necessary to set up separate circuits and configure corresponding circuit boards for these two signal acquisition requirements, which reduces the convenience of signal acquisition.
[0004] Therefore, improving the convenience of signal acquisition is an urgent problem to be solved. Summary of the Invention
[0005] Therefore, it is necessary to provide a signal acquisition circuit and electronic device that can improve the convenience of signal acquisition in order to address the above-mentioned technical problems.
[0006] In a first aspect, this application provides a signal acquisition circuit, which includes a control module, an acquisition module, and a configuration module, wherein:
[0007] The input terminal of the configuration module is connected to the output terminal of the control module, the output terminal of the configuration module is connected to the acquisition point, the input terminal of the acquisition module is connected to the acquisition point, and the output terminal of the acquisition module is connected to the input terminal of the control module; wherein, the signal source to be acquired is connected to the acquisition point;
[0008] The control module is used to output a first control signal or a second control signal to the configuration module;
[0009] The configuration module is configured to output a high level to the acquisition point when it receives the first control signal, or to output a low level to the acquisition point when it receives the second control signal.
[0010] The acquisition module is used to acquire the voltage at the acquisition point to obtain a detection signal, and send the detection signal to the control module;
[0011] The control module is used to process the detection signal based on a preset triggering strategy.
[0012] In one embodiment, the first control signal is a high-level signal and the second control signal is a low-level signal.
[0013] In one embodiment, the configuration module includes a first transistor and a second transistor, wherein:
[0014] The first transistor is an NPN transistor, and the second transistor is a PNP transistor;
[0015] The base of the first transistor is connected to the output terminal of the control module, the collector of the first transistor is connected to the base of the second transistor, and the emitter of the first transistor is grounded.
[0016] The emitter of the second transistor is connected to the power supply, the collector of the second transistor is connected to the acquisition point, and a pull-up resistor is connected in series between the emitter and the base of the second transistor.
[0017] In one embodiment, a first protection resistor is connected in series between the collector of the first transistor and the base of the second transistor.
[0018] In one embodiment, the configuration module further includes a first diode and a second protection resistor, wherein:
[0019] The anode of the first diode is connected to the collector of the second transistor, the cathode of the first diode is connected to the first end of the second protection resistor, and the second end of the second protection resistor is connected to the acquisition point.
[0020] In one embodiment, the acquisition module includes a first voltage divider resistor and a second voltage divider resistor, wherein:
[0021] The first end of the first voltage divider resistor is connected to the acquisition point, the second end of the first voltage divider resistor is connected to the first end of the second voltage divider resistor, and the second end of the second voltage divider resistor is grounded.
[0022] The second end of the first voltage divider resistor is also connected to the input end of the control module.
[0023] In one embodiment, the configuration module includes a relay and a third transistor, wherein:
[0024] The first end of the relay coil is connected to the power supply, and the second end is connected to the collector of the third transistor.
[0025] The base of the third transistor is connected to the output terminal of the control module, and the emitter of the third transistor is grounded.
[0026] The first end of the normally open contact of the relay is connected to the power supply, and the second end is connected to the data acquisition point.
[0027] In one embodiment, the configuration module includes an N-channel first MOSFET and a P-channel second MOSFET, wherein:
[0028] The gate of the first MOS transistor is connected to the output terminal of the control module, and the source of the first MOS transistor is grounded.
[0029] The drain of the first MOS transistor is connected to the gate of the second MOS transistor, the source of the second MOS transistor is connected to the power supply, and the drain of the second MOS transistor is connected to the acquisition point.
[0030] In one embodiment, the acquisition module further includes an electrostatic protection diode, a first filter capacitor, and a second filter capacitor, wherein:
[0031] The cathode of the electrostatic protection diode is connected to the first end of the first voltage divider resistor, and the anode of the electrostatic protection diode is grounded.
[0032] The first terminal of the first filter capacitor is connected to the first terminal of the first voltage divider resistor, and the second terminal of the first filter capacitor is grounded.
[0033] The first terminal of the second filter capacitor is connected to the second terminal of the first voltage divider resistor, and the second terminal of the second filter capacitor is grounded.
[0034] In one embodiment, when the control module outputs the first control signal, the control module processes the detection signal based on a first triggering strategy;
[0035] When the control module outputs the second control signal, the control module processes the detection signal based on the second triggering strategy.
[0036] Secondly, this application also provides an electronic device, which includes the signal acquisition circuit described in any one of the first aspects above.
[0037] In the aforementioned signal acquisition circuit and electronic equipment, the control module is an essential module for processing the detection signal. Simultaneously, the control module can directly output a first control signal to control the configuration module to output a continuous high level applied to the acquisition point, or output a second control signal to control the configuration module to output a continuous low level applied to the acquisition point. Therefore, there is no need to configure an additional control chip for the configuration module; instead, the output pins of the existing control chip (control module) can be used for configuration, thus achieving effective utilization of the control module. In other words, in the solution of this application, it is no longer necessary to set up corresponding acquisition circuits for high-level and low-level valid acquisition scenarios. Instead, a configuration circuit controlled by the control module can achieve the application of a continuous high or low level at the acquisition point. The control module can be program-controlled to output the first or second control signal, thereby improving the convenience of configuration for different signal acquisition needs. Attached Figure Description
[0038] To more clearly illustrate the technical solutions in the embodiments or related technologies of this application, the accompanying drawings used in the description of the embodiments or related technologies will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0039] Figure 1 This is a schematic diagram showing the connection relationship of each module of the acquisition circuit in one embodiment;
[0040] Figure 2 This is a schematic diagram of the structure A of the configuration module in one embodiment;
[0041] Figure 3 This is a schematic diagram of the configuration module structure B in another embodiment;
[0042] Figure 4 This is a schematic diagram of the structure C of the configuration module in another embodiment;
[0043] Figure 5 This is a structural diagram of the configuration module in another embodiment;
[0044] Figure 6 This is a schematic diagram of the structure of an electronic device in one embodiment. Detailed Implementation
[0045] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.
[0046] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.
[0047] It is understood that the terms "first," "second," etc., used herein may be used to describe various elements, but these elements are not limited by these terms. These terms are only used to distinguish one element from another. For example, without departing from the scope of this application, a first resistor may be referred to as a second resistor, and similarly, a second resistor may be referred to as a first resistor. Both the first resistor and the second resistor are resistors, but they are not the same resistor.
[0048] It is understood that the term "connection" in the following embodiments should be understood as "electrical connection," "communication connection," etc., if the connected circuits, modules, units, etc., have electrical signal or data transmission with each other.
[0049] It is understandable that "at least one" refers to one or more, and "multiple" refers to two or more. "At least a part of an element" refers to part or all of an element.
[0050] When used herein, the singular forms of “a,” “an,” and “ / the” may also include the plural forms unless the context clearly indicates otherwise. It should also be understood that the terms “comprising / including” or “having,” etc., specify the presence of the stated features, wholes, steps, operations, components, parts, or combinations thereof, but do not preclude the possibility of the presence or addition of one or more other features, wholes, steps, operations, components, parts, or combinations thereof. Meanwhile, the term “and / or” as used in this specification includes any and all combinations of the associated listed items.
[0051] In one exemplary embodiment, such as Figure 1 As shown, a signal acquisition circuit is provided. This circuit may specifically include a control module, at least one acquisition module, and a configuration module corresponding to each acquisition module, wherein:
[0052] The input terminal of the configuration module is connected to the output terminal of the control module, the output terminal of the configuration module is connected to the acquisition point, the input terminal of the acquisition module is connected to the acquisition point, and the output terminal of the acquisition module is connected to the input terminal of the control module; wherein, the signal source to be acquired is connected to the acquisition point;
[0053] The control module is used to output a first control signal or a second control signal to the configuration module;
[0054] The configuration module is used to output a high level to the acquisition point when a first control signal is received, or to output a low level to the acquisition point when a second control signal is received;
[0055] The acquisition module is used to acquire the voltage at the acquisition point to obtain the detection signal, and then send the detection signal to the control module;
[0056] The control module is used to process the detection signal based on a preset triggering strategy.
[0057] In the embodiments of this application, the acquisition point can be a virtual location, such as any location on the connection line between the signal source to be acquired and the input terminal of the acquisition module; the acquisition point can also be a physical point, that is, the signal source to be acquired is connected to the acquisition point, and the input terminal of the acquisition module is also connected to the acquisition point.
[0058] Specifically, in signal acquisition scenarios triggered by a low-level signal: when the signal is not triggered, the detection signal acquired by the acquisition module from the acquisition point should default to a high level. Thus, when the signal source to be acquired does not output a low level to the acquisition point, the superimposed level state of the acquisition point is high. The detection signal acquired by the acquisition module from the acquisition point and fed back to the control module always defaults to the high level provided by the configuration module, and the control module will not generate corresponding action commands for the high-level detection signal. However, when the signal source to be acquired outputs a low level to the acquisition point, the superimposed level state of the acquisition point is low. The detection signal acquired by the acquisition module from the acquisition point and fed back to the control module is low. In this case, the control module will generate corresponding action commands for the low-level detection signal based on the triggering strategy, meaning that the low-level signal output by the signal source to be acquired is effectively detected.
[0059] In signal acquisition scenarios triggered by a high-level signal: When the signal is not triggered, the detection signal acquired by the acquisition module from the acquisition point should default to a low level. Thus, when the signal source does not output a high level to the acquisition point, the superimposed level at the acquisition point is low. The detection signal acquired by the acquisition module from the acquisition point and fed back to the control module always defaults to the low level provided by the configuration module, and the control module will not generate corresponding action commands for the low-level detection signal. However, when the signal source outputs a high level to the acquisition point, the superimposed level at the acquisition point is high, and the detection signal acquired by the acquisition module from the acquisition point and fed back to the control module is high. In this case, the control module will generate corresponding action commands for the high-level detection signal based on the triggering strategy, meaning the high-level signal output by the signal source is effectively detected.
[0060] In the aforementioned acquisition circuit, the control module is an essential module for processing detection signals. Simultaneously, the control module can directly output a first control signal to control the configuration module to output a continuous high level applied to the acquisition point, or output a second control signal to control the configuration module to output a continuous low level applied to the acquisition point. Therefore, there is no need to configure an additional control chip for the configuration module; instead, the output pins of the existing control chip (control module) can be used for configuration, thus achieving effective utilization of the control module. In other words, in the solution of this application, it is no longer necessary to set up corresponding acquisition circuits for high-level and low-level valid acquisition scenarios. Instead, a configuration circuit controlled by the control module can achieve the application of a continuous high or low level at the acquisition point. The control module can output the first or second control signal under program control, thereby improving the convenience of configuration for different signal acquisition needs.
[0061] The first control signal at the output of the control module is a high-level signal, and the second control signal is a low-level signal. Furthermore, the structure of each module is described in detail below. The configuration module has three circuit structures: Structure A, Structure B, and Structure C. The configuration modules of each structure are described below.
[0062] In one embodiment, reference Figure 2 The diagram below shows the circuit schematic of the configuration module for structure A. The configuration module includes a first transistor Q1 and a second transistor Q2, where: the first transistor Q1 is an NPN transistor, and the second transistor Q2 is a PNP transistor. Specifically, the base of the first transistor Q1 is connected to the output terminal of the control module, the collector of the first transistor Q1 is connected to the base of the second transistor Q2, and the emitter of the first transistor Q1 is grounded. The emitter of the second transistor Q2 is connected to the power supply UB, the collector of the second transistor Q2 is connected to the acquisition point, and a pull-up resistor R8 is connected in series between the emitter and base of the second transistor Q2.
[0063] When the control module outputs the first control signal to the configuration module, the configuration module needs to output a high-level signal to the acquisition point. At this time, the implementation principle of the configuration module of structure A is as follows: the control module outputs a high-level first control signal to the base of the first transistor Q1. The high-level input to the base of the first transistor Q1 makes the path from the collector to the emitter of the first transistor Q1 conduct. Since the emitter of the first transistor Q1 is grounded, the collector of the first transistor Q1 is at a low level after the first transistor Q1 is turned on. A pull-up resistor R8 is connected in series between the emitter and base of the second transistor Q2. The pull-up resistor R8 pulls the base potential of the second transistor Q2 up to a high level. Since the collector of the first transistor Q1 is connected to the base of the second transistor Q2, the low level of the collector of the first transistor Q1 can pull the base of the second transistor Q2 down to a low level. The base of the second transistor Q2 is applied a low level, thus making the path from the emitter to the collector of the second transistor Q2 conduct. Since the collector of the second transistor Q2 is connected to the sampling point, when the second transistor Q2 is conducting, a high-level voltage is applied to the sampling point.
[0064] When the control module outputs the second control signal to the configuration module, the configuration module needs to output a low-level signal to the acquisition point. The configuration module operates as follows: the control module outputs a low-level second control signal to the base of the first transistor Q1. When the base of the first transistor Q1 is at a low level, the path from the collector to the emitter of Q1 is not conductive. A pull-up resistor R8 is connected in series between the emitter and base of the second transistor Q2. The pull-up resistor R8 pulls the base potential of the second transistor Q2 to a high level. When the base of the second transistor Q2 is at a high level, the path from the emitter to the collector of Q2 is not conductive. In other words, a low-level voltage is applied to the collector of the second transistor Q2 at the acquisition point.
[0065] In one embodiment, reference Figure 2 A first protective resistor R10 is connected in series between the collector of the first transistor Q1 and the base of the second transistor Q2. When the first transistor Q1 is turned on, the current flows from the external voltage UB to the pull-up resistor R8, then from the pull-up resistor R8 to the collector of the first transistor Q1, and finally from the collector to the emitter of the first transistor Q1 connected to ground. To limit excessive current in this circuit, which could damage the components, the first protective resistor R10 is connected between the collector of the first transistor Q1 and the base of the second transistor Q2.
[0066] In other words, on the one hand, the first protection resistor R10 can limit the current input to the collector of the first transistor Q1; on the other hand, when the collector and emitter of the first transistor Q1 are conducting, the first protection resistor R10 can divide the voltage with the pull-up resistor R8, thereby reducing the voltage of the pull-up resistor R8 acting on the base of the second transistor Q2, making it easier for the base of the second transistor Q2 to be pulled low by the collector of the first transistor Q1.
[0067] Furthermore, referring to Figure 2 A resistor R11 is connected in series between the base of the first transistor Q1 and the output terminal of the control module. Resistor R11 limits the current input to the first transistor Q1, protecting the component. Furthermore, a pull-down resistor R13 and a first capacitor C6 are connected in series between the base and emitter of the first transistor Q1. When the control module does not output the first control signal, the base of the first transistor Q1 needs to maintain a stable low level. However, if the base of the first transistor Q1 experiences a momentary high voltage due to charge accumulation, it may cause the first transistor Q1 to mis-turn on. The pull-down resistor R13 provides a default low level to the base of the first transistor Q1; moreover, the pull-down resistor R13 dissipates the charge accumulated at the base of the first transistor Q1, thus maintaining a stable low level at the base.
[0068] Furthermore, the pull-down resistor R13 can be connected in parallel with the first capacitor C6 to form an RC filter circuit. When the control module outputs a high-level first control signal to the base of the first transistor Q1, the pull-down resistor R13 and the first capacitor C6 can filter the input first control signal, so that the high level of the first control signal remains stable.
[0069] Furthermore, a second capacitor C3 is connected in series between the base and emitter of the second transistor Q2. The second capacitor C3 can also form an RC filter circuit with the pull-up resistor R8, thereby filtering the voltage input from the external UB to the emitter of the second transistor Q2, thus stabilizing the voltage.
[0070] In one embodiment, reference Figure 2 The configuration module includes a first diode D1 and a second protection resistor R14, wherein: the anode of the first diode D1 is connected to the collector of the second transistor Q2, the cathode of the first diode D1 is connected to the first end of the second protection resistor R14, and the second end of the second protection resistor R14 is connected to the acquisition point.
[0071] Specifically, since the voltage applied at the acquisition point also includes the voltage output by the signal source to be acquired, and the collector of the second transistor Q2 is connected to the acquisition point, when the emitter of the second transistor Q2 is conducting to the collector, the first diode D1 has a unidirectional conduction characteristic, thereby preventing current from flowing back from the acquisition point to the collector of the second transistor Q2; that is, the first diode D1 is a parasitic diode, which can prevent current from flowing back into the second transistor Q2; furthermore, when the emitter of the second transistor Q2 is conducting to the collector, the second protection resistor R14 can perform voltage division to limit the current between the emitter and collector of the second transistor Q2, thereby protecting the safety of the second transistor Q2.
[0072] In one embodiment, reference Figure 3 Here is the circuit schematic of the configuration module for structure B; the configuration module includes a relay SW and a third transistor Q3, wherein: the first terminal of the coil of relay SW (as shown in the diagram) Figure 3 Pin 1 of SW (shown in the diagram) is connected to the power supply (5V), and the second terminal (as shown in the diagram) is connected to the power supply (5V). Figure 3 Pin 2 of SW (shown in the diagram) is connected to the collector of the third transistor Q3; the base of the third transistor Q3 is connected to the output of the control module, and the emitter of the third transistor Q3 is grounded; the first terminal of the normally open contact of the relay SW (as shown in the diagram) is connected to the collector of the third transistor Q3; the base of the third transistor Q3 is connected to the output of the control module, and the emitter of the third transistor Q3 is grounded; Figure 3 The 4th pin of SW shown in the diagram is connected to the power supply, and the second terminal (as shown in the diagram) is connected to the power supply. Figure 3 The 5th pin of the SW shown in the diagram is connected to the acquisition point.
[0073] Furthermore, referring to Figure 3 A first resistor R1 is connected in series between the base of the third transistor Q3 and the output terminal of the control module. A second resistor R2 is connected in series between the base and emitter of the third transistor Q3, and a capacitor C1 is connected in parallel across the two ends of the second resistor R2. The second resistor R2 and the capacitor C1 can filter the first control signal input to the base of the third transistor Q3. At the same time, the second resistor R2 can also act as a pull-down resistor to provide a default low level for the base of the third transistor Q3, thereby reducing the probability of the third transistor Q3 being falsely turned on.
[0074] The principle of the configuration module of structure B is as follows: the control module outputs a low-level second control signal to the base of the third transistor Q3; since the base of the third transistor Q3 is at a low level, there is no conduction between the collector and emitter of the third transistor Q3; thus, the path of the coil of relay SW is not connected, and the coil of relay SW is not energized; therefore, the normally open contact of relay SW remains open, that is, the voltage of the power supply UB cannot be output to the acquisition point through the normally open contact of relay SW; in other words, when the control module outputs a low-level second control signal to the configuration module, the configuration module applies a low level at the acquisition point.
[0075] When the control module outputs a high-level first control signal to the third transistor Q3, since the base of the third transistor Q3 is at a high level, the collector and emitter of the third transistor Q3 are connected, which means the circuit containing the coil of the relay SW is connected, and the coil of the relay SW is energized. Therefore, the normally open contact of the relay SW becomes closed, so that the voltage output by the power supply UB can be applied to the acquisition point through the closed normally open contact. In other words, when the control module outputs a high-level first control signal to the configuration module, the configuration module applies a high level at the acquisition point.
[0076] Furthermore, referring to Figure 3 A third diode D3 and a third resistor R3 are connected in series between the second terminal of the normally open contact of the relay SW and the acquisition point. The third diode D3 is a parasitic diode, which can prevent current backflow. Furthermore, the third resistor R3 can prevent the power supply from being directly connected to the acquisition point, and the third resistor R3 can limit the current acting on the acquisition point.
[0077] In one embodiment, reference Figure 4 Here is the circuit schematic of the configuration module of structure C; the configuration module includes an N-channel first MOSFET Q4 and a P-channel second MOSFET Q5, wherein: the gate of the first MOSFET Q4 is connected to the output terminal of the control module, and the source of the first MOSFET Q4 is grounded; the drain of the first MOSFET Q4 is connected to the gate of the second MOSFET Q5, the source of the second MOSFET Q5 is connected to the power supply, and the drain of the second MOSFET Q5 is connected to the acquisition point.
[0078] Furthermore, a fourth resistor R4 is connected in series between the output terminal of the control module and the gate of the first MOSFET Q4. The fourth resistor R4 can limit the current acting on the gate of the first MOSFET Q4, thus protecting the component. Furthermore, a fifth resistor R5 is connected in series between the gate and source of the first MOSFET Q4, and a seventh capacitor C7 is connected in parallel across the fifth resistor R5. The fifth resistor R5 and the seventh capacitor C7 can filter the signal input to the gate of the first MOSFET Q4, thereby stabilizing the input first or second control signal.
[0079] Furthermore, a sixth resistor R6 is connected in series between the drain of the first MOSFET Q4 and the gate of the second MOSFET Q5; a seventh resistor R7 is connected in series between the gate and source of the second MOSFET Q5, and an eighth capacitor C8 is connected in parallel across the seventh resistor R7. The seventh resistor R7 and the eighth capacitor C8 filter the voltage input from the power supply UB to the source of the second MOSFET Q5, ensuring a stable input voltage. Simultaneously, the condition for conduction between the source and drain of the second MOSFET Q5 is a low-level voltage input to its gate; therefore, the seventh resistor R7 also acts as a pull-up resistor, keeping the gate of the second MOSFET Q5 at a default low level, thereby reducing the probability of mis-conduction between the source and gate of the second MOSFET Q5.
[0080] The sixth resistor R6 and the seventh resistor R7 can divide the voltage of the power supply, thereby limiting the current acting on the gate of the second MOSFET Q5 and the drain of the first MOSFET 4, thus protecting the components.
[0081] Furthermore, a fourth diode D4 and a fifteenth resistor R15 are connected in series between the drain of the second MOSFET Q5 and the acquisition point. The fourth diode D4 is a parasitic diode that can prevent current backflow. Furthermore, the fifteenth resistor R15 can prevent the power supply from being directly connected to the acquisition point. The fifteenth resistor R15 can limit the current acting on the acquisition point, thereby protecting the downstream components and preventing the power supply from being directly grounded, reducing the risk of short circuit.
[0082] The principle of the C-structure configuration module is as follows: The control module inputs a high-level first control signal to the gate of the first MOSFET Q4, thereby making the source and drain of the first MOSFET Q4 conduct. Therefore, the loop from the power supply to the drain of the first MOSFET Q4 and then to the source of the first MOSFET Q4 is completed, thus keeping the drain of the first MOSFET Q4 grounded and at a low level. The low level at the drain of the first MOSFET Q4 acts on the gate of the second MOSFET Q5, thereby making the path from the source to the drain of the second MOSFET Q5 conduct. Thus, the voltage from the power supply can pass through the source and drain of the second MOSFET Q5 and then act on the acquisition point, applying a high level at the acquisition point. In other words, when the control module outputs a high-level first control signal to the configuration module, the configuration module applies a high level at the acquisition point.
[0083] The control module inputs a low-level second control signal to the gate of the first MOSFET Q4, thus preventing conduction between the source and drain of Q4. The drain of Q4 remains at a high level supplied by the power supply. This high level at the drain of Q4 acts on the gate of the second MOSFET Q5, preventing conduction from the source to the drain of Q5. Consequently, the power supply voltage cannot reach the acquisition point through the source and drain of Q5, resulting in a low level applied at the acquisition point. In other words, when the control module outputs a low-level second control signal to the configuration module, the configuration module applies a low level at the acquisition point.
[0084] In one embodiment, reference Figure 5 The acquisition module includes a first voltage divider resistor R9 and a second voltage divider resistor R12, wherein: the first end of the first voltage divider resistor R9 is connected to the acquisition point, the second end of the first voltage divider resistor R9 is connected to the first end of the second voltage divider resistor R12, and the second end of the second voltage divider resistor R12 is grounded; the second end of the first voltage divider resistor R9 is also connected to the input terminal of the control module.
[0085] Specifically, the detection signal collected from the acquisition point is input to the input terminal of the control module after passing through the first voltage divider resistor R9; the first voltage divider resistor R9 and the second voltage divider resistor R12 can divide the voltage collected from the acquisition point, thereby limiting the magnitude of the current input to the control module from the first voltage divider resistor R9.
[0086] Furthermore, referring to Figure 5 The acquisition module also includes an electrostatic discharge (ESD) protection diode D2, a first filter capacitor C4, and a second filter capacitor C5, wherein: the cathode of the ESD protection diode D2 is connected to the first end of the first voltage divider resistor, and the anode of the ESD protection diode D2 is grounded; the first end of the first filter capacitor C4 is connected to the first end of the first voltage divider resistor, and the second end of the first filter capacitor C4 is grounded; the first end of the second filter capacitor C5 is connected to the second end of the first voltage divider resistor, and the second end of the second filter capacitor C5 is grounded.
[0087] Specifically, when a transient overvoltage such as electrostatic discharge occurs in the acquisition module, the electrostatic protection diode D2 will respond quickly, its impedance will drop instantaneously, clamping the overvoltage to a safe level and rapidly discharging the electrostatic charge to ground, thereby protecting the downstream electronic components from damage. The first filter capacitor C4 and the second filter capacitor C5 can filter the voltage across the first voltage divider resistor R9, thereby ensuring that the detection signal input to the control module remains stable and reducing the instability of the detection signal caused by interference.
[0088] Furthermore, when the control module outputs the first control signal, the control module processes the detection signal based on the first triggering strategy; when the control module outputs the second control signal, the control module processes the detection signal based on the second triggering strategy.
[0089] Specifically, when the control module outputs the first control signal, it is in a low-level active acquisition scenario. At this time, the configuration module outputs a high level to the acquisition point. When the signal source to be acquired outputs a low level to the acquisition point, the voltage state superimposed at the acquisition point is low. At this time, the acquisition module sends the low-level detection signal acquired from the acquisition point to the control module. The control module processes the detection signal based on the first triggering strategy and generates corresponding action commands according to the first triggering strategy.
[0090] When the control module outputs the second control signal, it is in a high-level valid acquisition scenario. At this time, the configuration module outputs a low level to the acquisition point. When the signal source to be acquired outputs a high level to the acquisition point, the voltage state superimposed at the acquisition point is high. At this time, the acquisition module sends the high-level detection signal acquired from the acquisition point to the control module. The control module processes the detection signal based on the second triggering strategy and generates corresponding action commands according to the second triggering strategy.
[0091] Furthermore, the voltage states of each module in the signal acquisition circuit provided in this application are shown in Table (1):
[0092] Table (1)
[0093] DI_Config DI_Conn DI_Mcu Scene L / Z L / Z L High-level active acquisition L / Z 9V~28V H High-level active acquisition H 9V~28V / Z H Active low acquisition H L L Active low acquisition
[0094] Wherein, DI_Config is the control signal (first control signal or second control signal) output from the control module to the configuration module; DI_Conn is the superimposed voltage of the acquisition point; DI_Mcu is the detection signal acquired by the acquisition module and output to the control module. H represents high level; L represents low level; Z represents high impedance state.
[0095] Furthermore, the signal acquisition circuit described above is not limited to single-channel acquisition; it can perform multi-channel acquisition simultaneously. For example, a configuration module and an acquisition module can be configured into an acquisition unit, and each acquisition unit can acquire signals for a single acquisition point. The control module can be connected to multiple acquisition units simultaneously, thereby enabling the control module to receive and process multiple signals.
[0096] Furthermore, each configuration module can adopt the same structure, for example, they can all adopt structure A, or they can all adopt structure B or structure C; of course, each configuration module can also adopt structure A, structure B and structure C at the same time, and this application embodiment does not make specific limitations on this.
[0097] Furthermore, the signal acquisition circuit provided in the application has at least the following advantages:
[0098] 1. The control module can use a microcontroller. The microcontroller can connect to the configuration module (the collector of the first transistor Q1) via GPIO ports, outputting high or low logic level signals through the GPIO ports to switch between high-level and low-level active acquisition circuits. No complex modifications to the hardware circuitry are required; switching between high-level and low-level active acquisition circuit states can be easily achieved simply by writing the microcontroller (control module) program. The entire operation is simple and convenient, significantly reducing the cost of hardware modifications and improving the system's flexibility and applicability. Furthermore, multiple configuration circuits (A structure, B structure, and C structure) and acquisition circuits can be freely combined, supporting simultaneous acquisition of multiple channels of both high-level and low-level active signals.
[0099] 2. The acquisition circuit has high reliability and high stability, meeting the international standard ISO 16750-2 and the national standard GB / T28046.2-2019.
[0100] 3. It has excellent voltage adaptability. The circuit is perfectly compatible with 12V and 24V systems, and supports a wide range of voltage input from 9V to 32V. It can operate stably in both normal power supply environments and complex working conditions with voltage fluctuations, ensuring the high reliability and wide applicability of the equipment.
[0101] In one exemplary embodiment, an electronic device is also provided, including any of the signal acquisition circuits described in the above-described signal acquisition circuit embodiments. The electronic device may be, but is not limited to, various personal computers, laptops, smartphones, tablets, IoT devices, portable wearable devices, and servers. IoT devices may include smart speakers, smart TVs, smart air conditioners, smart in-vehicle devices, etc.; portable wearable devices may include smartwatches, smart bracelets, head-mounted devices, etc.
[0102] In one exemplary embodiment, an electronic device is provided, the internal structure of which can be as follows: Figure 6As shown, this electronic device includes a processor, memory, input / output interfaces, a communication interface, a display unit, and an input device. The processor, memory, and input / output interfaces are connected via a system bus, and the communication interface, display unit, and input device are also connected to the system bus via the input / output interfaces. The processor (control module) provides computing and control capabilities. The memory includes non-volatile storage media and internal memory. The non-volatile storage media stores the operating system and computer programs. The internal memory provides an environment for the operation of the operating system and computer programs stored in the non-volatile storage media. The input / output interfaces are used for exchanging information between the processor and external devices. The communication interface is used for wired or wireless communication with external terminals; wireless communication can be achieved through Wi-Fi, mobile cellular networks, NFC (Near Field Communication), or other technologies. The display unit is used to create a visually visible image and can be a display screen, a projection device, or a virtual reality imaging device. The display screen can be an LCD screen or an e-ink screen. The input device of the electronic device can be a touch layer covering the display screen, or buttons, trackballs, or touchpads set on the casing of the electronic device, or external keyboards, touchpads, or mice, etc.
[0103] Those skilled in the art will understand that Figure 6 The structure shown is merely a block diagram of a portion of the structure related to the present application and does not constitute a limitation on the electronic device to which the present application is applied. The specific electronic device may include more or fewer components than shown in the figure, or combine certain components, or have different component arrangements.
[0104] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.
[0105] The above embodiments are merely illustrative of several implementation methods of this application, and their descriptions are relatively specific and detailed. However, they should not be construed as limiting the scope of this application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this application should be determined by the appended claims.
Claims
1. A signal acquisition circuit, characterized in that, The signal acquisition circuit includes a control module, an acquisition module, and a configuration module, wherein: The input terminal of the configuration module is connected to the output terminal of the control module, the output terminal of the configuration module is connected to the acquisition point, the input terminal of the acquisition module is connected to the acquisition point, and the output terminal of the acquisition module is connected to the input terminal of the control module; wherein, the signal source to be acquired is connected to the acquisition point; The control module is used to output a first control signal or a second control signal to the configuration module; the first control signal is a high-level signal, and the second control signal is a low-level signal. The configuration module is configured to output a high level to the acquisition point when it receives the first control signal, or to output a low level to the acquisition point when it receives the second control signal. The acquisition module is used to acquire the voltage at the acquisition point to obtain a detection signal, and send the detection signal to the control module; The control module is configured to process the detection signal based on a first triggering strategy when the control module outputs the first control signal; When the control module outputs the second control signal, the control module processes the detection signal based on the second triggering strategy; The acquisition module includes a first voltage divider resistor, a second voltage divider resistor, an electrostatic discharge (ESD) diode, a first filter capacitor, and a second filter capacitor. Specifically: the first end of the first voltage divider resistor is connected to the acquisition point; the second end of the first voltage divider resistor is connected to the first end of the second voltage divider resistor; and the second end of the second voltage divider resistor is grounded. The second end of the first voltage divider resistor is also connected to the input terminal of the control module. The cathode of the ESD diode is connected to the first end of the first voltage divider resistor, and the anode of the ESD diode is grounded. The first end of the first filter capacitor is connected to the first end of the first voltage divider resistor, and the second end of the first filter capacitor is grounded. The first end of the second filter capacitor is connected to the second end of the first voltage divider resistor, and the second end of the second filter capacitor is grounded.
2. The circuit according to claim 1, characterized in that, The configuration module includes a first transistor and a second transistor, wherein: The first transistor is an NPN transistor, and the second transistor is a PNP transistor; The base of the first transistor is connected to the output terminal of the control module, the collector of the first transistor is connected to the base of the second transistor, and the emitter of the first transistor is grounded. The emitter of the second transistor is connected to the power supply, the collector of the second transistor is connected to the acquisition point, and a pull-up resistor is connected in series between the emitter and the base of the second transistor.
3. The circuit according to claim 2, characterized in that, A first protective resistor is connected in series between the collector of the first transistor and the base of the second transistor.
4. The circuit according to claim 2, characterized in that, The configuration module further includes a first diode and a second protection resistor, wherein: The anode of the first diode is connected to the collector of the second transistor, the cathode of the first diode is connected to the first end of the second protection resistor, and the second end of the second protection resistor is connected to the acquisition point.
5. The circuit according to claim 2, characterized in that, The configuration module includes a relay and a third transistor, wherein: The first end of the relay coil is connected to the power supply, and the second end is connected to the collector of the third transistor. The base of the third transistor is connected to the output terminal of the control module, and the emitter of the third transistor is grounded. The first end of the normally open contact of the relay is connected to the power supply, and the second end is connected to the data acquisition point.
6. The circuit according to claim 2, characterized in that, The configuration module includes an N-channel first MOSFET and a P-channel second MOSFET, wherein: The gate of the first MOS transistor is connected to the output terminal of the control module, and the source of the first MOS transistor is grounded. The drain of the first MOS transistor is connected to the gate of the second MOS transistor, the source of the second MOS transistor is connected to the power supply, and the drain of the second MOS transistor is connected to the acquisition point.
7. An electronic device, characterized in that, The electronic device includes a signal acquisition circuit as described in any one of claims 1-6.