Display device

Abstract

The display device includes: a partition wall structure defining a first accommodation space, a second accommodation space, and a third accommodation space; a color conversion layer including a first color conversion layer disposed in the first accommodation space and a second color conversion layer disposed in the second accommodation space; a scattering layer disposed in the third accommodation space and having a thickness smaller than each of a thickness of the first color conversion layer and a thickness of the second color conversion layer; a cap layer covering the partition wall structure, the color conversion layer, and the scattering layer; and a color filter layer disposed on the cap layer and including a first color filter layer, a second color filter layer, and a third color filter layer. A first light blocking stack including a first color filter layer and a third color filter layer is disposed on the partition wall structure adjacent to the first accommodation space and the third accommodation space. A second light blocking stack including a second color filter layer and a third color filter layer is disposed on the partition wall structure adjacent to the second accommodation space.

Description

[0001] Cross-reference to related applications

[0002] This application claims the priority and benefit of Korean Patent Application No. 10-2024-0007777, filed with the Korean Intellectual Property Office on January 18, 2024, the entire content of which is incorporated herein by reference. Technical field

[0003] Various embodiments relate to a display device. Background art

[0004] A display device may include various components that display an image. Among the various components included in the display device, any one component (e.g., a first component) may be disposed on another component (e.g., a second component). In this case, if the upper surface of the first component is not satisfactorily planarized, the reliability of the second component disposed on the first component may be reduced.

[0005] It should be understood that this background art section is partly intended to provide a useful background for understanding the technology. However, this background art section may also include ideas, concepts, or understandings that were not known or understood by a person skilled in the relevant art before the effective filing date of the corresponding application of the subject matter disclosed herein. Summary of the invention

[0006] Various embodiments relate to a display device having improved reliability.

[0007] Embodiments may include a display device including: a partition wall structure defining a first accommodation space, a second accommodation space, and a third accommodation space, an upper surface of a display element layer being exposed through the first accommodation space, the second accommodation space, and the third accommodation space; a color conversion layer including a first color conversion layer disposed in the first accommodation space and a second color conversion layer disposed in the second accommodation space; a scattering layer disposed in the third accommodation space, the scattering layer having a thickness smaller than each of the thickness of the first color conversion layer and the thickness of the second color conversion layer; a cover layer covering the partition wall structure, the color conversion layer, and the scattering layer; and a color filter layer disposed on the cover layer, the color filter layer including a first color filter layer overlapping the first accommodation space, a second color filter layer overlapping the second accommodation space, and a third color filter layer overlapping the third accommodation space. A first light blocking stack formed by stacking the first color filter layer and the third color filter layer may be disposed on a partition wall structure adjacent to the first accommodation space and the third accommodation space. A second light blocking stack formed by stacking the second color filter layer and the third color filter layer may be disposed on a partition wall structure adjacent to the second accommodation space.

[0008] In an embodiment, the first light blocking stack may not overlap with the second color filter layer.

[0009] In an embodiment, the second light-blocking stack may not overlap with the first color filter layer.

[0010] In an embodiment, a step may be defined between an upper surface of the scattering layer and an upper surface of a partition wall structure adjacent to the third accommodation space.

[0011] In an embodiment, the step may be about 20% or more and about 60% or less of the thickness of the partition wall structure.

[0012] In an embodiment, the display device may further include an outer coating covering the color filter layer.

[0013] In an embodiment, in a region overlapping with the third accommodation space, a groove recessed in a direction toward the display element layer may be defined in the outer coating.

[0014] In an embodiment, the depth of the groove may be less than about 0.5 micrometers.

[0015] In an embodiment, the thickness of the first color conversion layer and the thickness of the second color conversion layer may each be about 85% or more of the thickness of the partition wall structure.

[0016] In an embodiment, the cover layer may include a material having a refractive index of about 1.3 or less.

[0017] In an embodiment, the first color conversion layer may include first color conversion particles. The second color conversion layer may include second color conversion particles. The scattering layer may include scattering particles.

[0018] In an embodiment, the display element layer may include a first light-emitting element overlapping with the first accommodation space, a second light-emitting element overlapping with the second accommodation space, and a third light-emitting element overlapping with the third accommodation space.

[0019] An embodiment can provide a display device, the display device including: a partition wall structure defining a first accommodation space, a second accommodation space, and a third accommodation space, an upper surface of a display element layer being exposed through the first accommodation space, the second accommodation space, and the third accommodation space; a color conversion layer including a first color conversion layer disposed in the first accommodation space and a second color conversion layer disposed in the second accommodation space; a scattering layer disposed in the third accommodation space, the scattering layer having a thickness smaller than each of a thickness of the first color conversion layer and a thickness of the second color conversion layer; a cover layer covering the partition wall structure, the color conversion layer, and the scattering layer; and a color filter layer disposed on the cover layer, the color filter layer including a first color filter layer overlapping the first accommodation space, a second color filter layer overlapping the second accommodation space, and a third color filter layer overlapping the third accommodation space. A first light-blocking stack formed by stacking the first color filter layer, the second color filter layer, and the third color filter layer may be disposed on a partition wall structure adjacent to the first accommodation space and the second accommodation space. A second light-blocking stack formed by stacking the first color filter layer and the third color filter layer may be disposed on a partition wall structure adjacent to the third accommodation space.

[0020] In an embodiment, the second light-blocking stack may not overlap with the second color filter layer.

[0021] In an embodiment, a step may be defined between an upper surface of the scattering layer and an upper surface of a partition wall structure adjacent to the third accommodation space.

[0022] In an embodiment, the step may be about 20% or more and about 60% or less of a thickness of the partition wall structure.

[0023] In an embodiment, the display device may further include an outer coating covering the color filter layer.

[0024] In an embodiment, in a region overlapping the third accommodation space, a groove recessed in a direction toward the display element layer may be defined in the outer coating.

[0025] In an embodiment, a depth of the groove may be less than about 0.5 micrometers.

[0026] In an embodiment, a thickness of the first color conversion layer and a thickness of the second color conversion layer may each be about 85% or more of a thickness of the partition wall structure.

[0027] In an embodiment, the cover layer may include a material having a refractive index of about 1.3 or less.

[0028] In an embodiment, in a cross-sectional view, in a region overlapping a partition wall structure disposed between the first accommodation space and the third accommodation space, a surface area of a region where the second light-blocking stack is disposed may be larger than a surface area of a region where the first light-blocking stack is disposed.

[0029] In an embodiment, in a cross-sectional view, in a region overlapping a partition wall structure provided between a second accommodation space and a third accommodation space, a surface area of a region provided with a second light-blocking laminate may be larger than a surface area of a region provided with a first light-blocking laminate. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] The above and other aspects and features of the present disclosure will become clearer by describing embodiments of the present disclosure in detail with reference to the accompanying drawings.

[0031] Figure 1 is a block diagram for describing a display device according to an embodiment.

[0032] Figure 2 is for describing any one of the sub-pixels included in Figure 1 the display device.

[0033] Figure 3 is for describing a display panel provided to constitute Figure 1 the display device.

[0034] Figure 4 is for describing Figure 3 the display panel.

[0035] Figure 5 is for describing any one of the pixels included in Figure 3 the display panel.

[0036] Figures 6 to 8 is for describing any one of the pixels included in Figure 5 the pixel.

[0037] Figure 9 is a cross-sectional view taken along Figure 5 line X1-X1'.

[0038] Figure 10 is for describing any one of the pixels included in Figure 9 the pixel.

[0039] Figure 11 is for describing any one of the pixels included in Figure 9 the pixel.

[0040] Figure 12 is for describing any one of the pixels included in Figure 3 the display panel.

[0041] Figures 13 to 15 is a schematic plan view for describing a color filter layer in pixels included in Figure 12 .

[0042] Figure 16 is a schematic cross-sectional view taken along line X2-X2' of Figure 12 . DETAILED DESCRIPTION

[0043] Hereinafter, embodiments will be described in detail with reference to the accompanying drawings. In the following description, parts necessary for understanding the present disclosure will be described, and explanations of other parts may be omitted. Therefore, the present disclosure is not limited to the embodiments set forth herein, but may be embodied in other ways. On the contrary, these embodiments are provided so that the present disclosure will be thorough and complete, and will fully convey the technical spirit of the present disclosure to those skilled in the art.

[0044] It should be understood that when an element is referred to as being "coupled" or "connected" to another element, it can be directly coupled or connected to the other element, or indirectly coupled or connected to the other element with intervening elements therebetween.

[0045] In the drawings, for ease of description and clarity, the sizes, thicknesses, ratios, and dimensions of elements may be exaggerated. The same reference numerals always denote the same elements.

[0046] As used herein, the singular forms "a", "an", and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.

[0047] In the specification and claims, the term "and / or" is intended to include any combination of the terms "and" and "or" for purposes of its meaning and interpretation. For example, "A and / or B" can be understood to mean "A, B, or A and B". The terms "and" and "or" can be used in a conjunctive or disjunctive sense and can be understood to be equivalent to "and / or".

[0048] In the specification and claims, the phrase "at least one of..." is intended to include the meaning of "at least one selected from the group consisting of..." for purposes of its meaning and interpretation. For example, "at least one of A and B" can be understood to mean "A, B, or A and B".

[0049] The term "overlap" or "overlapping" means that a first object can be above or below or on one side of a second object, and conversely, the second object can be above or below or on one side of the first object. Additionally, the term "overlap" can include layer, stack, face or face toward, extend throughout, cover or partially cover, or any other suitable term as will be appreciated and understood by those of ordinary skill in the art.

[0050] The terms "face" and "facing" mean that a first element can be directly or indirectly opposite a second element. In cases where a third element is interposed between the first element and the second element, the first element and the second element can be understood as being indirectly opposite each other, although still facing each other.

[0051] When an element is described as "not overlapping another element" or "not overlapping with another element", this can include the elements being spaced apart from each other, offset from each other, or arranged side by side with each other or any other suitable terms as would be appreciated and understood by one of ordinary skill in the art.

[0052] As used in this specification, the terms "comprise", "comprising", "include" and / or "including", "have", "having", "possess" and / or "with" and their variants specify the presence of the stated features, integers, steps, operations, elements, components and / or groups thereof, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or groups thereof.

[0053] The terms used herein are for the purpose of describing particular embodiments only and are not intended to be limiting.

[0054] Although the terms "first", "second", etc. may be used herein to describe various types of elements, these elements should not be limited by these terms. These terms are used to distinguish one element from another. Thus, without departing from the teachings of the present disclosure, the first element discussed below may be referred to as the second element.

[0055] Taking into account the measurements discussed and the errors associated with the measurement of a particular quantity (i.e., the limitations of the measurement system), as used herein, "about" or "approximately" includes the stated value and means within an acceptable deviation of a particular value as determined by one of ordinary skill in the art. For example, "about" may mean within one or more standard deviations of the stated value, or within ±30%, ±20%, ±10%, ±5% of the stated value.

[0056] Unless otherwise defined or implied herein, all terms used herein (including technical and scientific terms) have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure pertains. It should also be understood that terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the relevant art and should not be interpreted as idealized or overly formal meanings unless expressly so defined herein.

[0057] For descriptive purposes, spatially relative terms such as "below", "beneath", "under", "lower", "above", "upper", "on top", "higher", "side" (e.g., as in "sidewall") may be used herein and thereby to describe the relationship of one element or feature to another (other) element or feature as shown in the figures. In addition to the orientation depicted in the figures, the spatially relative terms are intended to encompass different orientations of the device in use, operation, and / or manufacture. For example, if the device in the figures is inverted, an element described as "below" or "beneath" other elements or features will be oriented "above" the other elements or features. Thus, the term "below" can encompass both above and below orientations. In addition, the device may be oriented in other ways (e.g., rotated 90 degrees or in other orientations), and as such, the spatially relative descriptors used herein should be interpreted accordingly.

[0058] Various embodiments will be described with reference to the figures showing idealized embodiments. As such, variations in the shape of the illustrations due to, for example, manufacturing techniques and / or tolerances are to be expected. Accordingly, the embodiments disclosed herein should not be construed as limited to the particular shapes shown in the regions, but include deviations in shapes resulting from, for example, manufacturing. As such, the shapes shown in the figures may not show the actual shape of the regions of the device, and as such, are not intended to be limiting.

[0059] Figure 1 is a block diagram for describing a display device according to an embodiment.

[0060] Reference Figure 1 , the display device DD may include a display panel DP, a gate driver 120, a data driver 130, a voltage generator 140, and a controller 150.

[0061] The display panel DP may include sub-pixels SP. The sub-pixels SP may be connected to the gate driver 120 through the first gate line GL1 to the m-th gate line GLm. The sub-pixels SP may be connected to the data driver 130 through the first data line DL1 to the n-th data line DLn.

[0062] The sub-pixels SP may generate light of two or more colors. For example, each of the sub-pixels SP may generate light of a color such as red, green, blue, cyan, magenta, or yellow.

[0063] Two or more of the sub-pixels SP among the sub-pixels SP may form a pixel PXL. For example, the pixel PXL may include three sub-pixels SP, as Figure 1 shown. The pixel PXL may emit light of various colors and various brightnesses according to the combination of light emitted from the sub-pixels SP included in the pixel PXL.

[0064] The gate driver 120 may be connected to the sub-pixels SP arranged in the row direction through the first gate line GL1 to the m-th gate line GLm. The gate driver 120 may output gate signals to the first gate line GL1 to the m-th gate line GLm in response to a gate control signal GCS. In an embodiment, within the spirit and scope of the present disclosure, the gate control signal GCS may include a start signal indicating the start of each frame, a horizontal synchronization signal, and the like.

[0065] The gate driver 120 may be disposed on a first side of the display panel DP. However, the embodiment is not limited to the above example. For example, the gate driver 120 may be divided into two or more drivers physically and / or logically distinct from each other. The drivers may be disposed on a first side of the display panel DP and a second side of the display panel DP opposite to the first side. Thus, the gate driver 120 may be disposed around the display panel DP in various forms according to the embodiment.

[0066] The data driver 130 may be connected to the sub-pixels SP arranged in the column direction through the first data line DL1 to the n-th data line DLn. The data driver 130 may receive image data DATA and a data control signal DCS from the controller 150. The data driver 130 may operate in response to the data control signal DCS. In an embodiment, within the spirit and scope of the present disclosure, the data control signal DCS may include a source start signal, a source shift clock signal, a source output enable signal, and the like.

[0067] The data driver 130 may receive a voltage from the voltage generator 140. The data driver 130 may apply data signals having gray-scale voltages corresponding to the image data DATA to the first data line DL1 to the n-th data line DLn using the received voltage. In the case where gate signals are applied to each of the first gate line GL1 to the m-th gate line GLm, data signals corresponding to the image data DATA may be applied to the data lines DL1 to DLn. Accordingly, the sub-pixels SP may generate light corresponding to the data signals, and the display panel DP may display an image.

[0068] In an embodiment, the gate driver 120 and the data driver 130 may include complementary metal oxide semiconductor (CMOS) circuit elements.

[0069] The voltage generator 140 may operate in response to a voltage control signal VCS provided from the controller 150. The voltage generator 140 may generate a voltage and supply the generated voltage to components of the display device DD, such as the gate driver 120, the data driver 130, and the controller 150. The voltage generator 140 may receive an input voltage from an external device of the display device DD and generate a voltage by regulating the received voltage.

[0070] The voltage generator 140 may generate a first power supply voltage and a second power supply voltage. The generated first power supply voltage and second power supply voltage may be provided to the sub-pixels SP through the power line PL. In an embodiment, at least one of the first power supply voltage and the second power supply voltage may be provided from an external device of the display device DD.

[0071] The voltage generator 140 may provide various voltages and / or signals. For example, the voltage generator 140 may provide one or more initialization voltages to be applied to the sub-pixels SP. For example, during a sensing operation for sensing the electrical characteristics of the transistors and / or light-emitting elements of the sub-pixels SP, a selectable reference voltage may be applied to each of the first data lines DL1 to the nth data lines DLn. The voltage generator 140 may generate a reference voltage and transmit the reference voltage to the data driver 130. For example, during a display operation for displaying an image on the display panel DP, a common pixel control signal may be applied to the sub-pixels SP, and the voltage generator 140 may generate a pixel control signal. In an embodiment, the voltage generator 140 may provide the pixel control signal to the sub-pixels SP through the pixel control line PXCL. Although the Figure 1 case where the pixel control line PXCL is connected between the voltage generator 140 and the display panel DP is shown, the embodiment is not limited thereto. For example, the pixel control line PXCL may be connected between the gate driver 120 and the display panel DP. In this case, the pixel control signal may be transmitted from the gate driver 120 to the sub-pixels SP through the pixel control line PXCL.

[0072] The controller 150 may control the overall operation of the display device DD. The controller 150 may receive input image data IMG and a corresponding control signal CTRL from an external device. The controller 150 may provide a gate control signal GCS, a data control signal DCS, and a voltage control signal VCS in response to the control signal CTRL.

[0073] The controller 150 may convert the input image data IMG to be suitable for the display device DD or the display panel DP, and output image data DATA. In an embodiment, the controller 150 may arrange the input image data IMG to be suitable for the row-based sub-pixels SP, and output image data DATA.

[0074] Two or more components of the data driver 130, the voltage generator 140, and the controller 150 may be mounted on a single integrated circuit. As Figure 1As shown, the data driver 130, the voltage generator 140, and the controller 150 may be included in the driver integrated circuit DIC. In this case, the data driver 130, the voltage generator 140, and the controller 150 may be components that are functionally separated from each other in a single driver integrated circuit DIC. In other embodiments, at least one of the data driver 130, the voltage generator 140, and the controller 150 may be provided as a component separated from the driver integrated circuit DIC.

[0075] Figure 2 is a block diagram for describing any one of the sub-pixels included in Figure 1 the display device. In Figure 2 , a sub-pixel SPij provided in the Figure 1 i-th row (where i is an integer equal to or greater than 1 and equal to or less than m) and the j-th column (where j is an integer equal to or greater than 1 and equal to or less than n) among the sub-pixels SP is shown.

[0076] Referring to Figure 2 , the sub-pixel SPij may include a sub-pixel circuit SPC and a light-emitting element LD.

[0077] The light-emitting element LD is connected between the first power supply voltage node VDDN and the second power supply voltage node VSSN. The first power supply voltage node VDDN may be connected to Figure 1 one of the power supply lines PL of Figure 1 to receive the first power supply voltage. The second power supply voltage node VSSN may be connected to

[0078] the other of the power supply lines PL of

[0079] to receive the second power supply voltage. The first power supply voltage may have a voltage level higher than that of the second power supply voltage. Figure 1 the i-th gate line GLi among the first gate line GL1 to the m-th gate line GLm of Figure 1both the first data line DL1 to the nth data line DLn, and the jth data line DLj among them. In response to a gate signal received through the ith gate line GLi, the sub-pixel circuit SPC may control the light-emitting element LD to emit light based on the data signal received through the jth data line DLj. In an embodiment, the sub-pixel circuit SPC may also be connected to Figure 1 the pixel control line PXCL. In this case, the sub-pixel circuit SPC may also control the light-emitting element LD in response to a pixel control signal received through the pixel control line PXCL.

[0080] For the above operations, the sub-pixel circuit SPC may include circuit elements such as transistors and one or more capacitors.

[0081] The transistors of the sub-pixel circuit SPC may include P-type transistors and / or N-type transistors. In an embodiment, the transistors of the sub-pixel circuit SPC may include metal-oxide-semiconductor field-effect transistors (MOSFETs). In an embodiment, within the spirit and scope of the present disclosure, the transistors of the sub-pixel circuit SPC may include amorphous silicon semiconductors, single-crystalline silicon semiconductors, polycrystalline silicon semiconductors, oxide semiconductors, etc.

[0082] Figure 3 is a schematic plan view for describing a display panel of a display device provided to constitute Figure 1 the display panel.

[0083] Referring to Figure 3 , the display panel DP may include a display area DA and a non-display area NDA. The display panel DP may display an image through the display area DA. The non-display area NDA may be provided around the display area DA.

[0084] The display panel DP includes sub-pixels SP provided in the display area DA. The sub-pixels SP may be arranged in a first direction DR1 and a second direction DR2 intersecting the first direction DR1. For example, the sub-pixels SP may be arranged in a matrix form in the first direction DR1 and the second direction DR2. In another example, the sub-pixels SP may be arranged in a zigzag pattern in the first direction DR1 and the second direction DR2. The arrangement of the sub-pixels SP may vary according to the embodiment. The first direction DR1 may refer to the row direction, and the second direction DR2 may refer to the column direction.

[0085] Two or more of the sub-pixels SP may form a pixel PXL. Although Figure 3It is shown that the pixel PXL includes three sub-pixels SP1, SP2, and SP3, but the implementation is not limited thereto. For example, the pixel PXL may include two sub-pixels SP. Hereinafter, for ease of explanation, it is assumed that the pixel PXL includes a first sub-pixel SP1, a second sub-pixel SP2, and a third sub-pixel SP3.

[0086] Each of the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3 may emit light of one of various colors such as red, green, blue, cyan, magenta, and yellow. Hereinafter, for clear and concise description, it is assumed that the first sub-pixel SP1 emits red light, the second sub-pixel SP2 emits green light, and the third sub-pixel SP3 emits blue light.

[0087] Each of the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3 may include at least one light-emitting element ( Figure 2 LD) that emits light. In an embodiment, the light-emitting elements of the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3 may emit light of the same color. For example, the light-emitting elements of the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3 may emit blue light.

[0088] As the display panel DP, a self-emitting display panel such as a light-emitting diode (LED) display panel using micron-scale or nanoscale light-emitting diodes as light-emitting elements and an organic light-emitting display panel (OLED panel) using organic light-emitting diodes as light-emitting elements may be used.

[0089] Components for controlling the sub-pixel SP may be provided in the non-display area NDA. Wires connected to the sub-pixel SP (e.g., Figure 1 the first gate line GL1 to the m-th gate line GLm, the first data line DL1 to the n-th data line DLn, the power line PL, and the pixel control line PXCL) may be provided in the non-display area NDA.

[0090] Figure 1 At least one of the gate driver 120, the data driver 130, the voltage generator 140, and the controller 150 ( Figure 1A driver integrated circuit DIC separated from the display panel DP. The driver integrated circuit DIC can be connected to lines provided in the non-display area NDA. In other embodiments, the gate driver 120, the data driver 130, the voltage generator 140, and the controller 150 can be implemented as a single integrated circuit separated from the display panel DP.

[0091] In an embodiment, the display area DA can have various shapes. The display area DA can have a closed-loop shape including straight edges and / or curved edges. For example, within the spirit and scope of the present disclosure, the display area DA can have shapes such as polygons, circles, semi-circles, ellipses, etc.

[0092] In an embodiment, the display panel DP can have a flat display surface. In an embodiment, the display panel DP can have at least partially rounded display surfaces. In an embodiment, the display panel DP is bendable, foldable, or rollable. In the above cases, the display panel DP and / or the substrate of the display panel DP can include materials with flexible properties.

[0093] Figure 4 is for describing Figure 3 a schematic cross-sectional view of the display panel.

[0094] Referring to Figure 4 , the display panel DP can include a substrate SUB and a pixel circuit layer PCL, a display element layer DPL, a light conversion layer LCL, and a window WD stacked in sequence on the substrate SUB in a third direction DR3 intersecting the first direction DR1 and the second direction DR2.

[0095] The substrate SUB can be made of an insulating material such as glass or resin. For example, the substrate SUB can include a glass substrate. In another example, the substrate SUB can include a polyimide (PI) substrate. In another example, the substrate SUB can include a silicon wafer substrate formed by semiconductor processes.

[0096] In an embodiment, the substrate SUB can be made of a flexible material to be bendable or foldable, and can have a single-layer structure or a multi-layer structure. For example, examples of flexible materials can include at least one of the following: polystyrene, polyvinyl alcohol, polymethyl methacrylate, polyethersulfone, polyacrylate, polyetherimide, polyethylene naphthalate, polyethylene terephthalate, polyphenylene sulfide, polyarylate, polyimide, polycarbonate, triacetate cellulose, and cellulose acetate propionate. However, the embodiments are not limited thereto.

[0097] The pixel circuit layer PCL may be disposed on the substrate SUB. The pixel circuit layer PCL may include an insulating layer and semiconductor patterns and conductive patterns disposed between the insulating layers. Within the spirit and scope of the present disclosure, the conductive patterns of the pixel circuit layer PCL may be used as circuit elements, lines, etc.

[0098] The circuit elements of the pixel circuit layer PCL may include Figure 3 the corresponding sub-pixel circuits ( Figure 2 SPCs) of the sub-pixels SP of

[0099] In other words, the circuit elements of the pixel circuit layer PCL may be provided as transistors and one or more capacitors of the sub-pixel circuits SPC.

[0100] The display element layer DPL may be disposed on the pixel circuit layer PCL. The display element layer DPL may include light-emitting elements ( Figure 2 LDs) of the sub-pixels SP.

[0101] The light conversion layer LCL may be disposed on the display element layer DPL. The light conversion layer LCL may include a light conversion pattern having color conversion particles and / or scattering particles. For example, the color conversion particles may include quantum dots. The quantum dots may convert the wavelength (or color) of the light emitted from the display element layer DPL. In an embodiment, the light conversion pattern may be omitted. The light conversion layer LCL may further include a color filter layer including color filters. Each of the color filters may selectively transmit light of a selectable wavelength (or selectable color).

[0102] The window WD may be disposed on the light conversion layer LCL to protect the exposed surface (or upper surface) of the display panel DP. The window WD may protect the display panel DP from external impacts. The window WD may be bonded to the light conversion layer LCL by an optically transparent adhesive (or bonding agent). The window WD may have a multilayer structure selected from a glass substrate, a plastic film, and a plastic substrate. The multilayer structure may be formed by a continuous process or a bonding process using a bonding layer. The whole or part of the window WD may be flexible.

[0103] Figure 5 is a schematic plan view for describing an embodiment of any one of the pixels included in Figure 3 the display panel of

[0104] Refer to Figure 5, a pixel PXL may include a first sub-pixel SP1, a second sub-pixel SP2, and a third sub-pixel SP3. The first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3 may be arranged in a first direction DR1. However, the embodiments are not limited to the above examples. The arrangement of the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3 may vary according to the embodiments.

[0105] A partition wall structure BMW may be provided in the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3. The partition wall structure BMW may define a first accommodation space AC1, a second accommodation space AC2, and a third accommodation space AC3.

[0106] The first accommodation space AC1 may overlap with a first light-emitting element of the first sub-pixel SP1. A first color conversion layer CCL1 may be provided in the first accommodation space AC1. Light emitted from the first light-emitting element may be visible to a user of the display device DD via the first color conversion layer CCL1. The first color conversion layer CCL1 may include first color conversion particles. The first color conversion particles may convert the color of the light emitted from the first light-emitting element into red. Therefore, the first sub-pixel SP1 may be set as a red sub-pixel.

[0107] The second accommodation space AC2 may overlap with a second light-emitting element of the second sub-pixel SP2. A second color conversion layer CCL2 may be provided in the second accommodation space AC2. Light emitted from the second light-emitting element may be visible to a user of the display device DD via the second color conversion layer CCL2. The second color conversion layer CCL2 may include second color conversion particles. The second color conversion particles may convert the color of the light emitted from the second light-emitting element into green. Therefore, the second sub-pixel SP2 may be set as a green sub-pixel.

[0108] The third accommodation space AC3 may overlap with a third light-emitting element of the third sub-pixel SP3. A scattering layer SCL may be provided in the third accommodation space AC3. Light emitted from the third light-emitting element may be visible to a user of the display device DD via the scattering layer SCL. The scattering layer SCL may include scattering particles. The scattering particles may scatter the light emitted from the third light-emitting element. In an embodiment, the third light-emitting element may emit blue light. Therefore, the third sub-pixel SP3 may be set as a blue sub-pixel.

[0109] Figures 6 to 8 is a schematic plan view for describing a color filter layer included in the Figure 5 pixel.

[0110] Referring to Figure 5 and Figure 6 , a first color filter layer CF1 may be provided on the partition wall structure BMW.

[0111] The first color filter layer CF1 can transmit light having a first wavelength range and block light having a wavelength different from the first wavelength range. In an embodiment, the first color filter layer CF1 can selectively transmit red light. For example, the first color filter layer CF1 can selectively transmit light having a wavelength equal to or greater than about 630 nm and equal to or less than about 780 nm.

[0112] As described above, the first sub-pixel SP1 can be set as a red sub-pixel. In this case, the first color filter layer CF1 can overlap with the first accommodation space AC1. Therefore, in the area where the first sub-pixel SP1 is provided, only red light can pass through the first color filter layer CF1 and be visible to the user of the display device DD.

[0113] The first color filter layer CF1 can define a first opening OP1-1. The first opening OP1-1 can overlap with the second accommodation space AC2. Therefore, the light emitted from the second light-emitting element of the second sub-pixel SP2 can be substantially unblocked by the first color filter layer CF1. In an embodiment, the perimeter of the first opening OP1-1 can surround the perimeter of the second accommodation space AC2. In this case, the first opening OP1-1 can not only partially overlap with the second sub-pixel SP2, but also partially overlap with other sub-pixels adjacent to the second sub-pixel SP2 (e.g., the first sub-pixel SP1 and the third sub-pixel SP3).

[0114] The first color filter layer CF1 can define a second opening OP1-2. The second opening OP1-2 can overlap with the third accommodation space AC3. Therefore, the light emitted from the third light-emitting element of the third sub-pixel SP3 can be substantially unblocked by the first color filter layer CF1. In an embodiment, the perimeter of the second opening OP1-2 can be surrounded by the perimeter of the third accommodation space AC3.

[0115] Reference Figure 5 and Figure 7 , the second color filter layer CF2 can be provided on the partition structure BMW.

[0116] The second color filter layer CF2 can transmit light having a second wavelength range and block light having a wavelength different from the second wavelength range. In an embodiment, the second color filter layer CF2 can selectively transmit green light. For example, the second color filter layer CF2 can selectively transmit light having a wavelength equal to or greater than about 500 nm and equal to or less than about 570 nm.

[0117] As described above, the second sub-pixel SP2 can be set as a green sub-pixel. In this case, the second color filter layer CF2 can overlap with the second accommodation space AC2. Therefore, in the area where the second sub-pixel SP2 is provided, only green light can pass through the second color filter layer CF2 and be visible to the user of the display device DD.

[0118] The second color filter layer CF2 can define a 2-1 opening OP2-1. The 2-1 opening OP2-1 can overlap with the first accommodation space AC1. Therefore, the light emitted from the first light-emitting element of the first sub-pixel SP1 can be substantially unblocked by the second color filter layer CF2. In an embodiment, the perimeter of the 2-1 opening OP2-1 can surround the perimeter of the first accommodation space AC1. In this case, the 2-1 opening OP2-1 can not only partially overlap with the first sub-pixel SP1, but also partially overlap with other sub-pixels adjacent to the first sub-pixel SP1 (e.g., the second sub-pixel SP2).

[0119] The second color filter layer CF2 can define a 2-2 opening OP2-2. The 2-2 opening OP2-2 can overlap with the third accommodation space AC3. Therefore, the light emitted from the third light-emitting element of the third sub-pixel SP3 can be substantially unblocked by the second color filter layer CF2. In an embodiment, the perimeter of the 2-2 opening OP2-2 can surround the perimeter of the third accommodation space AC3. In this case, the 2-2 opening OP2-2 can not only partially overlap with the third sub-pixel SP3, but also partially overlap with other sub-pixels adjacent to the third sub-pixel SP3 (e.g., the second sub-pixel SP2).

[0120] In an embodiment, when the pixel PXL is arranged in the first direction DR1, the 2-2 opening OP2-2 defined by the second color filter layer CF2 provided in the pixel PXL can be integral with the 2-1 opening OP2-1 defined by the second color filter layer CF2 provided in another pixel adjacent to the pixel PXL in the first direction DR1.

[0121] Reference Figure 5 and Figure 8 , the third color filter layer CF3 can be provided on the partition wall structure BMW.

[0122] The third color filter layer CF3 can transmit light having a third wavelength range and block light having a wavelength different from the third wavelength range. In an embodiment, the third color filter layer CF3 can selectively transmit blue light. For example, the third color filter layer CF3 can selectively transmit light having a wavelength equal to or greater than about 450 nm and equal to or less than about 495 nm.

[0123] As described above, the third sub-pixel SP3 can be set as a blue sub-pixel. In this case, the third color filter layer CF3 can overlap with the third accommodation space AC3. Therefore, in the region where the third sub-pixel SP3 is provided, only blue light can pass through the third color filter layer CF3 and be visible to the user of the display device DD.

[0124] The third color filter layer CF3 can define a 3-1 opening OP3-1. The 3-1 opening OP3-1 can overlap with the first accommodation space AC1. Therefore, the light emitted from the first light-emitting element of the first sub-pixel SP1 can be substantially unblocked by the third color filter layer CF3. In an embodiment, the perimeter of the 3-1 opening OP3-1 can be surrounded by the perimeter of the first accommodation space AC1.

[0125] The third color filter layer CF3 can define a 3-2 opening OP3-2. The 3-2 opening OP3-2 can overlap with the second accommodation space AC2. Therefore, the light emitted from the second light-emitting element of the second sub-pixel SP2 can be substantially unblocked by the third color filter layer CF3. In an embodiment, the perimeter of the 3-2 opening OP3-2 can be surrounded by the perimeter of the second accommodation space AC2.

[0126] Refer again to Figures 5 to 8 , the first color filter layer CF1, the second color filter layer CF2, and the third color filter layer CF3 can be sequentially stacked on the partition wall structure BMW. Hereinafter, the first color filter layer CF1, the second color filter layer CF2, and the third color filter layer CF3 sequentially stacked on the partition wall structure BMW will be described in more detail with reference to Figure 9 FIG.

[0127] Figure 9 is a schematic cross-sectional view taken along the line X1-X1' of Figure 5 .

[0128] Refer to Figures 5 to 9 , the pixel circuit layer PCL, the display element layer DPL, and the light conversion layer LCL can be sequentially provided on the substrate SUB.

[0129] The pixel circuit layer PCL can include an insulating layer, a semiconductor pattern, and a conductive pattern stacked on the substrate SUB. The semiconductor pattern and the conductive pattern can be located between the insulating layers. The conductive pattern can include at least one of copper (Cu), molybdenum (Mo), tungsten (W), aluminum neodymium (AlNd), titanium (Ti), aluminum (Al), and silver (Ag).

[0130] The semiconductor pattern and the conductive pattern included in the pixel circuit layer PCL can be used as those already referred to in Figure 2The transistors and capacitors of the described sub-pixel circuit SPC. In addition, the semiconductor patterns and conductive patterns included in the pixel circuit layer PCL can also be used as lines. For example, Figure 1 the first gate line GL1 to the m-th gate line GLm, the first data line DL1 to the n-th data line DLn, the power line PL, and the pixel control line PXCL.

[0131] The transistors, capacitors, and lines included in the pixel circuit layer PCL can define the sub-pixel circuits of each of the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3 ( Figure 2 the SPC). For example, the first sub-pixel circuit SPC1 can be provided in the first sub-pixel SP1. The second sub-pixel circuit SPC2 can be provided in the second sub-pixel SP2. The third sub-pixel circuit SPC3 can be provided in the third sub-pixel SP3.

[0132] The display element layer DPL can be provided on the pixel circuit layer PCL. The display element layer DPL can include light-emitting elements of each of the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3 ( Figure 2 the LD). For example, the first light-emitting element LD1 can be provided in the first sub-pixel SP1. The second light-emitting element LD2 can be provided in the second sub-pixel SP2. The third light-emitting element LD3 can be provided in the third sub-pixel SP3.

[0133] The first light-emitting element LD1 can be electrically connected to the first sub-pixel circuit SPC1. The second light-emitting element LD2 can be electrically connected to the second sub-pixel circuit SPC2. The third light-emitting element LD3 can be electrically connected to the third sub-pixel circuit SPC3. The first light-emitting element LD1, the second light-emitting element LD2, and the third light-emitting element LD3 can emit light with a brightness corresponding to the electrical signals provided from the first sub-pixel circuit SPC1, the second sub-pixel circuit SPC2, and the third sub-pixel circuit SPC3. In an embodiment, the first light-emitting element LD1, the second light-emitting element LD2, and the third light-emitting element LD3 can emit light of the same color. For example, the first light-emitting element LD1, the second light-emitting element LD2, and the third light-emitting element LD3 can emit blue light.

[0134] The light conversion layer LCL can be provided on the display element layer DPL. The light conversion layer LCL can include a partition wall structure BMW, a first color conversion layer CCL1, a second color conversion layer CCL2, a scattering layer SCL, a cover layer CAP, a first color filter layer CF1, a second color filter layer CF2, a third color filter layer CF3, and an outer coating OC.

[0135] The partition wall structure BMW can be disposed on the display element layer DPL. In an embodiment, the partition wall structure BMW can be directly disposed on the display element layer DPL. In other words, the partition wall structure BMW can directly contact the upper surface of the display element layer DPL.

[0136] The partition wall structure BMW can include a light-blocking material. Thus, the partition wall structure BMW can be used to prevent light mixing between adjacent sub-pixels ( Figure 1 SP). In an embodiment, the partition wall structure BMW can include an organic insulating material. For example, the partition wall structure BMW can include an acrylic resin, an epoxy resin, a phenolic resin, a polyamide resin, and / or a polyimide resin.

[0137] The partition wall structure BMW can define a first accommodation space AC1, a second accommodation space AC2, and a third accommodation space AC3 that expose the upper surface of the display element layer DPL. The first accommodation space AC1 can overlap with the first light-emitting element LD1. The second accommodation space AC2 can overlap with the second light-emitting element LD2. The third accommodation space AC3 can overlap with the third light-emitting element LD3.

[0138] The first color conversion layer CCL1 can be disposed in the first accommodation space AC1. In an embodiment, the first color conversion layer CCL1 can be directly disposed on the display element layer DPL. In other words, the first color conversion layer CCL1 can directly contact the upper surface of the display element layer DPL.

[0139] The first color conversion layer CCL1 can include first color conversion particles QD1. The first color conversion particles QD1 can change the wavelength of the light emitted from the first light-emitting element LD1. For example, the first color conversion particles QD1 can convert the light emitted from the first light-emitting element LD1 into red light. Thus, the first sub-pixel SP1 can be set as a red sub-pixel. In an embodiment, the first color conversion particles QD1 can be quantum dots. In an embodiment, the first color conversion layer CCL1 can further include scattering particles.

[0140] The second color conversion layer CCL2 can be disposed in the second accommodation space AC2. In an embodiment, the second color conversion layer CCL2 can be directly disposed on the display element layer DPL. In other words, the second color conversion layer CCL2 can directly contact the upper surface of the display element layer DPL.

[0141] The second color conversion layer CCL2 may include second color conversion particles QD2. The second color conversion particles QD2 may change the wavelength of light emitted from the second light-emitting element LD2. For example, the second color conversion particles QD2 may convert the light emitted from the second light-emitting element LD2 into green light. Accordingly, the second sub-pixel SP2 may be set as a green sub-pixel. For example, the second color conversion particles QD2 may be quantum dots. In an embodiment, the second color conversion layer CCL2 may further include scattering particles.

[0142] The scattering layer SCL may be disposed in the third accommodation space AC3. In an embodiment, the scattering layer SCL may be directly disposed on the display element layer DPL. In other words, the scattering layer SCL may be in direct contact with the upper surface of the display element layer DPL.

[0143] The scattering layer SCL may include scattering particles SCT. The scattering particles SCT may scatter the light emitted from the third light-emitting element LD3 to improve the light output efficiency. Accordingly, in the case where the third light-emitting element LD3 emits blue light, the third sub-pixel SP3 may be set as a blue sub-pixel. In an embodiment, the scattering particles SCT may include TiO2.

[0144] In an embodiment, the scattering layer SCL may have a relatively small thickness. Each of the first color conversion layer CCL1 and the second color conversion layer CCL2 may have a relatively large thickness. For example, the thickness T_SCL of the scattering layer SCL in the third direction DR3 may be less than the thickness T_CCL1 of the first color conversion layer CCL1 in the third direction DR3 or the thickness T_CCL2 of the second color conversion layer CCL2 in the third direction DR3. In this case, the light output efficiency of the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3 may be improved.

[0145] For example, it may be assumed that the thickness T_BMW of the partition wall structure BMW in the third direction DR3 is about 10 micrometers. In this case, if the thickness T_SCL of the scattering layer SCL is about 8.5 micrometers, the light output efficiency of the third sub-pixel SP3 may be about 100%. Here, in the case where the thickness T_SCL of the scattering layer SCL is about 7.5 micrometers, the light output efficiency of the third sub-pixel SP3 may be increased to about 105%. In the case where the thickness T_SCL of the scattering layer SCL is about 6.5 micrometers, the light output efficiency of the third sub-pixel SP3 may be increased to about 108%. In the case where the thickness T_SCL of the scattering layer SCL is about 5.5 micrometers, the light output efficiency of the third sub-pixel SP3 may be increased to about 113%. In other words, as the thickness T_SCL of the scattering layer SCL relatively decreases, the light output efficiency of the third sub-pixel SP3 may be improved.

[0146] In another example, it can be assumed that the thickness T_BMW of the partition wall structure BMW in the third direction DR3 is about 10 micrometers. In this case, if the thickness T_CCL1 of the first color conversion layer CCL1 is about 8.5 micrometers, the light output efficiency of the first sub-pixel SP1 can be about 100%. When the thickness T_CCL1 of the first color conversion layer CCL1 is about 7.5 micrometers, the light output efficiency of the first sub-pixel SP1 can be reduced to about 96%. When the thickness T_CCL1 of the first color conversion layer CCL1 is about 6.5 micrometers, the light output efficiency of the first sub-pixel SP1 can be reduced to about 92%. When the thickness T_CCL1 of the first color conversion layer CCL1 is about 5.5 micrometers, the light output efficiency of the first sub-pixel SP1 can be reduced to about 86%. In other words, as the thickness T_CCL1 of the first color conversion layer CCL1 relatively increases, the light output efficiency of the first sub-pixel SP1 can be improved.

[0147] In another example, it can be assumed that the thickness T_BMW of the partition wall structure BMW in the third direction DR3 is about 10 micrometers. In this case, if the thickness T_CCL2 of the second color conversion layer CCL2 is about 8.5 micrometers, the light output efficiency of the second sub-pixel SP2 can be about 100%. Here, when the thickness T_CCL2 of the second color conversion layer CCL2 is about 7.5 micrometers, the light output efficiency of the second sub-pixel SP2 can be about 98.5%. When the thickness T_CCL2 of the second color conversion layer CCL2 is about 6.5 micrometers, the light output efficiency of the second sub-pixel SP2 can be about 97%. When the thickness T_CCL2 of the second color conversion layer CCL2 is about 5.5 micrometers, the light output efficiency of the second sub-pixel SP2 can be about 95%. In other words, as the thickness T_CCL2 of the second color conversion layer CCL2 relatively increases, the light output efficiency of the second sub-pixel SP2 can be improved.

[0148] As described above, in order to improve the light output efficiency of each of the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3, the scattering layer SCL can have a relatively small thickness, and each of the first color conversion layer CCL1 and the second color conversion layer CCL2 can have a relatively large thickness. For example, the thickness T_SCL of the scattering layer SCL can be equal to or greater than about 40% and less than or equal to about 80% of the thickness T_BMW of the partition wall structure BMW. In another example, the thickness T_CCL1 of the first color conversion layer CCL1 and the thickness T_CCL2 of the second color conversion layer CCL2 can each independently be equal to or greater than about 85% of the thickness T_BMW of the partition wall structure BMW.

[0149] Since the scattering layer SCL has a relatively small thickness, a step ST can be defined between the upper surface of the scattering layer SCL and the upper surface of the partition wall structure BMW adjacent to the third accommodation space AC3. For example, the step ST can be equal to or greater than about 20% of the thickness T_BMW of the partition wall structure BMW and less than or equal to about 60% of the thickness T_BMW of the partition wall structure BMW.

[0150] The cover layer CAP can cover the entire partition wall structure BMW, the first color conversion layer CCL1, the second color conversion layer CCL2, and the scattering layer SCL. The cover layer CAP can be used to protect the components disposed under or beneath the cover layer CAP.

[0151] In an embodiment, the cover layer CAP can include a material having a relatively low refractive index. In this case, the cover layer CAP can refract light or totally reflect light according to the incident angle. For example, the cover layer CAP can provide light that passes through the first color conversion layer CCL1 and then returns to the first color conversion layer CCL1. Therefore, the light conversion efficiency of the first color conversion layer CCL1 can be improved. The cover layer CAP will be described in detail later with reference to Figure 10 and Figure 11 will be described in detail.

[0152] In an embodiment, the cross-sectional profile of the cover layer CAP can be formed to correspond to the profile of the components disposed under or beneath the cover layer CAP (e.g., the partition wall structure BMW, the first color conversion layer CCL1, the second color conversion layer CCL2, and the scattering layer SCL). For example, the cover layer CAP can extend from the upper surface of the partition wall structure BMW adjacent to the third accommodation space AC3 to the upper surface of the scattering layer SCL disposed in the third accommodation space AC3. In this case, a step corresponding to the step ST can be defined in the cover layer CAP.

[0153] The first color filter layer CF1, the second color filter layer CF2, and the third color filter layer CF3 can be disposed on the cover layer CAP. The openings OP1-1, OP1-2, OP2-1, OP2-2, OP3-1, and OP3-2 described with reference to Figures 6 to 8 can be defined in the first color filter layer CF1, the second color filter layer CF2, and the third color filter layer CF3. Therefore, in some regions, the first color filter layer CF1, the second color filter layer CF2, and the third color filter layer CF3 can overlap each other. In some other regions, the first color filter layer CF1, the second color filter layer CF2, and the third color filter layer CF3 can not overlap each other. When the first color filter layer CF1, the second color filter layer CF2, and the third color filter layer CF3 overlap each other, the second color filter layer CF2 can be disposed on the first color filter layer CF1, and the third color filter layer CF3 can be disposed on the first color filter layer CF1 and the second color filter layer CF2.

[0154] The first color filter layer CF1 may overlap with the first accommodation space AC1. In this case, the first color filter layer CF1 may extend above the partition wall structure BMW adjacent to the first accommodation space AC1. In addition, the first color filter layer CF1 may be disposed on the partition wall structure BMW adjacent to the third accommodation space AC3.

[0155] The second color filter layer CF2 may overlap with the second accommodation space AC2. In this case, the second color filter layer CF2 may extend above the partition wall structure BMW adjacent to the second accommodation space AC2.

[0156] The third color filter layer CF3 may overlap with the third accommodation space AC3. In this case, the third color filter layer CF3 may extend above the partition wall structure BMW adjacent to the third accommodation space AC3. In addition, the third color filter layer CF3 may be disposed on the partition wall structure BMW adjacent to the first accommodation space AC1 and the second accommodation space AC2. In this case, the first color filter layer CF1 or the second color filter layer CF2 may be disposed below or beneath the third color filter layer CF3.

[0157] On the partition wall structure BMW adjacent to the first accommodation space AC1 and the third accommodation space AC3, the first color filter layer CF1 and the third color filter layer CF3 may be stacked in sequence in the third direction DR3, thereby defining a first light blocking stack LBM1. The first light blocking stack LBM1 may not overlap with the second color filter layer CF2. On the partition wall structure BMW adjacent to the second accommodation space AC2, the second color filter layer CF2 and the third color filter layer CF3 may be stacked in sequence in the third direction DR3, thereby defining a second light blocking stack LBM2. The second light blocking stack LBM2 may not overlap with the first color filter layer CF1. Thus, two different color filter layers may be stacked to define a light blocking stack for preventing light mixing between adjacent sub-pixels.

[0158] In an embodiment, the first light blocking stack LBM1 may extend from above the partition wall structure BMW to above the first color conversion layer CCL1, whereby the first light blocking stack LBM1 may partially overlap with the first accommodation space AC1.

[0159] In an embodiment, the second light blocking stack LBM2 may extend from above the partition wall structure BMW to above the second color conversion layer CCL2, whereby the second light blocking stack LBM2 may partially overlap with the second accommodation space AC2.

[0160] In an embodiment, the first light-blocking laminate LBM1 may extend from above the partition wall structure BMW to above the scattering layer SCL, whereby the first light-blocking laminate LBM1 may partially overlap with the third accommodation space AC3. Accordingly, the first light-blocking laminate LBM1 may cover the step ST defined between the upper surface of the scattering layer SCL and the upper surface of the partition wall structure BMW adjacent to the third accommodation space AC3.

[0161] In an embodiment, a corresponding step ST' to the step ST may be defined between the upper surface of the first light-blocking laminate LBM1 provided on the partition wall structure BMW adjacent to the third accommodation space AC3 and the upper surface of the third color filter layer CF3 overlapping with the scattering layer SCL. In the present disclosure, the first light-blocking laminate LBM1 may have a structure in which two color filter layers (e.g., the first color filter layer CF1 and the third color filter layer CF3) are stacked. Accordingly, compared with the case where the first light-blocking laminate LBM1 has a structure in which three color filters (e.g., the first color filter layer CF1, the second color filter layer CF2, and the third color filter layer CF3) are stacked, the thickness of the first light-blocking laminate LBM1 in the third direction DR3 may be relatively reduced. Accordingly, the step ST' formed corresponding to the step ST may be relatively reduced.

[0162] The outer coating OC may cover the entirety of the first color filter layer CF1, the second color filter layer CF2, and the third color filter layer CF3. The outer coating OC may be used to protect the components provided under or beneath the outer coating OC. In an embodiment, the outer coating OC may include an organic insulating material. For example, the outer coating OC may include an acrylic resin, an epoxy resin, a phenolic resin, a polyamide resin, a polyimide resin, an unsaturated polyester resin, a polyphenylene ether resin, a polyphenylene sulfide resin, and / or a benzocyclobutene resin.

[0163] In an embodiment, with reference to Figure 4 the window WD described or an adhesive (or bonding) film formed to provide the window WD may be provided on the outer coating OC. To this end, it may be required that the outer coating OC has a substantially flat upper surface. For example, it may be required that the step defined on the upper surface of the outer coating OC is equal to or less than about 0.5 micrometers. If the upper surface of the outer coating OC is not substantially flat, bonding defects (or adhesion defects) (e.g., formation of bubbles, etc.) may occur between the outer coating OC and the window WD or between the outer coating OC and the film. In such a case, the reliability of the window WD or the film may be reduced.

[0164] In an embodiment, in the region overlapping with the third accommodation space AC3, a recessed groove GR recessed in the direction toward the display element layer DPL may be defined in the outer coating OC. The recessed groove GR may be formed by the step ST' derived from the step ST.

[0165] As described above, since the first light-blocking laminate LBM1 provided on the partition wall structure BMW adjacent to the third accommodation space AC3 includes only two color filter layers (e.g., the first color filter layer CF1 and the third color filter layer CF3), the step ST' can be relatively reduced. Accordingly, the depth D_GR of the groove GR formed by the step ST' can also be relatively reduced. For example, the depth D_GR of the groove GR can be less than about 0.5 micrometers. In this case, the reliability of the window WD or the film provided on the outer coating OC may not be reduced.

[0166] In contrast to the above case, if the first light-blocking laminate LBM1 provided on the partition wall structure BMW adjacent to the third accommodation space AC3 is a laminate including three color filter layers (e.g., the first color filter layer CF1, the second color filter layer CF2, and the third color filter layer CF3), the depth D_GR of the groove GR may increase relatively. For example, the depth D_GR of the groove GR in the case where the first light-blocking laminate LBM1 includes three color filter layers may be equal to or greater than about 1.5 times the depth D_GR of the groove GR in the case where the first light-blocking laminate LBM1 includes two color filter layers. In this case, the reliability of the window WD or the film provided on the outer coating OC may be reduced.

[0167] Figure 10 is a schematic cross-sectional view for describing an embodiment of a cover layer included in a pixel of Figure 9

[0168] In an embodiment, the cover layer CAP may include a low refractive index inorganic layer LRIL. The low refractive index inorganic layer LRIL may include an inorganic insulating material having a refractive index of 1.3 or less. For example, the low refractive index inorganic layer LRIL may include silicon oxide.

[0169] In an embodiment, the cover layer CAP may further include a cover inorganic layer CVIL provided on the low refractive index inorganic layer LRIL. The cover inorganic layer CVIL may be used to prevent impurities from diffusing from the first color filter layer CF1, the second color filter layer CF2, and the third color filter layer CF3 provided on the cover layer CAP into the low refractive index inorganic layer LRIL. The cover inorganic layer CVIL may include an inorganic insulating material having a relatively high refractive index compared to the low refractive index inorganic layer LRIL. For example, the cover inorganic layer CVIL may include silicon oxynitride and / or silicon nitride.

[0170] Figure 11 is a schematic cross-sectional view for describing an embodiment of a cover layer included in a pixel of Figure 9

[0171] ​​In an embodiment, the capping layer CAP' may include a first capping inorganic layer CVIL1, a second capping inorganic layer CVIL2 disposed on the first capping inorganic layer CVIL1, and a low refractive index organic layer LROL between the first capping inorganic layer CVIL1 and the second capping inorganic layer CVIL2.

[0172] The low refractive index organic layer LROL may include an organic insulating material having a refractive index of 1.3 or less. The first capping inorganic layer CVIL1 may be used to prevent impurities from diffusing from components disposed below or beneath the low refractive index organic layer LROL into the low refractive index organic layer LROL. The second capping inorganic layer CVIL2 may be used to prevent impurities from diffusing from components disposed above the low refractive index organic layer LROL into the low refractive index organic layer LROL. The first capping inorganic layer CVIL1 and the second capping inorganic layer CVIL2 may each independently include an inorganic insulating material having a relatively high refractive index. For example, the first capping inorganic layer CVIL1 and the second capping inorganic layer CVIL2 may each independently include silicon oxynitride and / or silicon nitride.

[0173] Figure 12 is a schematic plan view for describing an embodiment of any one pixel among the pixels included in Figure 3 the display panel of.

[0174] Referring to Figure 12 , the pixel PXL' may include a first sub-pixel SP1', a second sub-pixel SP2', and a third sub-pixel SP3'. The first sub-pixel SP1', the second sub-pixel SP2', and the third sub-pixel SP3' may be arranged in a first direction DR1. However, the embodiment is not limited to the above example. The arrangement of the first sub-pixel SP1', the second sub-pixel SP2', and the third sub-pixel SP3' may be changed according to the embodiment.

[0175] A partition wall structure BMW may be provided in the first sub-pixel SP1', the second sub-pixel SP2', and the third sub-pixel SP3'. The partition wall structure BMW may define a first accommodation space AC1, a second accommodation space AC2, and a third accommodation space AC3.

[0176] The first accommodation space AC1 may overlap with a first light-emitting element of the first sub-pixel SP1'. A first color conversion layer CCL1 may be provided in the first accommodation space AC1. The light emitted from the first light-emitting element may be visible to the user of the display device DD via the first color conversion layer CCL1. The first color conversion layer CCL1 may include first color conversion particles. The first color conversion particles may convert the color of the light emitted from the first light-emitting element into red. Accordingly, the first sub-pixel SP1' may be set as a red sub-pixel.

[0177] The second accommodation space AC2 may overlap with the second light-emitting element of the second sub-pixel SP2'. The second color conversion layer CCL2 may be disposed in the second accommodation space AC2. The light emitted from the second light-emitting element may be visible to the user of the display device DD via the second color conversion layer CCL2. The second color conversion layer CCL2 may include second color conversion particles. The second color conversion particles may convert the color of the light emitted from the second light-emitting element into green. Accordingly, the second sub-pixel SP2' may be set as a green sub-pixel.

[0178] The third accommodation space AC3 may overlap with the third light-emitting element of the third sub-pixel SP3'. The scattering layer SCL may be disposed in the third accommodation space AC3. The light emitted from the third light-emitting element may be visible to the user of the display device DD via the scattering layer SCL. The scattering layer SCL may include scattering particles. The scattering particles may scatter the light emitted from the third light-emitting element. In an embodiment, the third light-emitting element may emit blue light. Accordingly, the third sub-pixel SP3' may be set as a blue sub-pixel.

[0179] Figures 13 to 15 is a schematic plan view for describing a color filter layer included in a pixel of Figure 12 .

[0180] Reference Figure 12 and Figure 13 , the first color filter layer CF1' may be disposed on the partition wall structure BMW.

[0181] The first color filter layer CF1' may transmit light having a first wavelength range and block light having a wavelength different from the first wavelength range. In an embodiment, the first color filter layer CF1' may selectively transmit red light. For example, the first color filter layer CF1' may selectively transmit light having a wavelength equal to or greater than about 630 nm and equal to or less than about 780 nm.

[0182] As described above, the first sub-pixel SP1' may be set as a red sub-pixel. In this case, the first color filter layer CF1' may overlap with the first accommodation space AC1. Accordingly, in the region where the first sub-pixel SP1' is provided, only red light may pass through the first color filter layer CF1' and be visible to the user of the display device DD.

[0183] The first color filter layer CF1' may define a first opening OP1-1'. The first opening OP1-1' may overlap with the second accommodation space AC2. Thus, the light emitted from the second light-emitting element of the second sub-pixel SP2' may be substantially unblocked by the first color filter layer CF1'. In an embodiment, the perimeter of the first opening OP1-1' may substantially overlap with the perimeter of the second accommodation space AC2. Here, "substantially overlap" may mean that the surface area of the region of the first opening OP1-1' that does not overlap with the second accommodation space AC2 in the plan view is about 10% or less of the surface area of the second accommodation space AC2, and by way of example, about 5% or less.

[0184] The first color filter layer CF1' may define a second opening OP1-2'. The second opening OP1-2' may overlap with the third accommodation space AC3. Thus, the light emitted from the third light-emitting element of the third sub-pixel SP3' may be substantially unblocked by the first color filter layer CF1'. In an embodiment, the perimeter of the second opening OP1-2' may be surrounded by the perimeter of the third accommodation space AC3.

[0185] Reference Figure 12 and Figure 14 , the second color filter layer CF2' may be disposed on the partition wall structure BMW.

[0186] The second color filter layer CF2' may transmit light having a second wavelength range and block light having a wavelength different from the second wavelength range. In an embodiment, the second color filter layer CF2' may selectively transmit green light. For example, the second color filter layer CF2' may selectively transmit light having a wavelength equal to or greater than about 500 nm and equal to or less than about 570 nm.

[0187] As described above, the second sub-pixel SP2' may be set as a green sub-pixel. In this case, the second color filter layer CF2' may overlap with the second accommodation space AC2. Thus, in the region where the second sub-pixel SP2' is provided, only green light may pass through the second color filter layer CF2' and be visible to the user of the display device DD.

[0188] The second color filter layer CF2' may define a 2-1 opening OP2-1'. The 2-1 opening OP2-1' may overlap with the first accommodation space AC1. Accordingly, light emitted from the first light-emitting element of the first sub-pixel SP1' may be substantially unblocked by the second color filter layer CF2'. In an embodiment, the perimeter of the 2-1 opening OP2-1' may substantially overlap the perimeter of the first accommodation space AC1. Here, "substantially overlap" may mean that the surface area of the region of the 2-1 opening OP2-1' that does not overlap with the first accommodation space AC1 in the plan view is about 10% or less of the surface area of the first accommodation space AC1, and by way of example, about 5% or less.

[0189] The second color filter layer CF2' may define a 2-2 opening OP2-2'. The 2-2 opening OP2-2' may overlap with the third accommodation space AC3. Accordingly, light emitted from the third light-emitting element of the third sub-pixel SP3' may be substantially unblocked by the second color filter layer CF2'. In an embodiment, the perimeter of the 2-2 opening OP2-2' may surround the perimeter of the third accommodation space AC3. In this case, the 2-2 opening OP2-2' may not only partially overlap with the third sub-pixel SP3', but may also partially overlap with other sub-pixels (e.g., the second sub-pixel SP2') adjacent to the third sub-pixel SP3'.

[0190] In an embodiment, when the pixel PXL' is arranged in the first direction DR1, the 2-2 opening OP2-2” defined in the second color filter layer CF2' in another pixel adjacent to the pixel PXL' in the direction opposite to the first direction DR1 may partially overlap with the first sub-pixel SP1' included in the pixel PXL'. In this case, in the pixel PXL' and the adjacent pixel, the 2-2 openings OP2-2' and OP2-2” may be integral.

[0191] Reference Figure 12 and Figure 15 and, a third color filter layer CF3' may be provided on the partition wall structure BMW.

[0192] The third color filter layer CF3' may transmit light having a third wavelength range and block light having a wavelength different from the third wavelength range. In an embodiment, the third color filter layer CF3' may selectively transmit blue light. For example, the third color filter layer CF3' may selectively transmit light having a wavelength equal to or greater than about 450 nm and equal to or less than about 495 nm.

[0193] As described above, the third sub-pixel SP3' can be set as a blue sub-pixel. In this case, the third color filter layer CF3' can overlap with the third accommodation space AC3. Therefore, in the area where the third sub-pixel SP3' is provided, only blue light can pass through the third color filter layer CF3' and be visible to the user of the display device DD.

[0194] The third color filter layer CF3' can define a 3-1 opening OP3-1'. The 3-1 opening OP3-1' can overlap with the first accommodation space AC1. Therefore, the light emitted from the first light-emitting element of the first sub-pixel SP1' can be substantially unblocked by the third color filter layer CF3'. In an embodiment, the perimeter of the 3-1 opening OP3-1' can be surrounded by the perimeter of the first accommodation space AC1.

[0195] The third color filter layer CF3' can define a 3-2 opening OP3-2'. The 3-2 opening OP3-2' can overlap with the second accommodation space AC2. Therefore, the light emitted from the second light-emitting element of the second sub-pixel SP2' can be substantially unblocked by the third color filter layer CF3'. In an embodiment, the perimeter of the 3-2 opening OP3-2' can be surrounded by the perimeter of the second accommodation space AC2.

[0196] Refer again to Figures 12 to 15 , the first color filter layer CF1', the second color filter layer CF2', and the third color filter layer CF3' can be sequentially stacked on the partition wall structure BMW. Hereinafter, the first color filter layer CF1', the second color filter layer CF2', and the third color filter layer CF3' sequentially stacked on the partition wall structure BMW will be described in more detail with reference to Figure 16 .

[0197] Figure 16 is a schematic cross-sectional view taken along the line X2-X2' of Figure 12 .

[0198] Refer to Figures 12 to 16 , the pixel circuit layer PCL, the display element layer DPL, and the light conversion layer LCL' can be sequentially provided on the substrate SUB.

[0199] The pixel circuit layer PCL and the display element layer DPL can be described in the same manner as described in reference to Figure 9 . Therefore, redundant explanations can be omitted.

[0200] The light conversion layer LCL' can be provided on the display element layer DPL. The light conversion layer LCL' can include a partition wall structure BMW, a first color conversion layer CCL1, a second color conversion layer CCL2, a scattering layer SCL, a cover layer CAP, a first color filter layer CF1', a second color filter layer CF2', a third color filter layer CF3', and an outer coating OC.

[0201] The partition wall structure BMW, the first color conversion layer CCL1, the second color conversion layer CCL2, and the scattering layer SCL can be described in the same manner as described in the reference. For example, the partition wall structure BMW, the first color conversion layer CCL1, the second color conversion layer CCL2, and the scattering layer SCL can be described in the same manner as described in the reference. Figure 9 The partition wall structure BMW, the first color conversion layer CCL1, the second color conversion layer CCL2, and the scattering layer SCL can be described in the same manner as described in the reference. For example, the partition wall structure BMW, the first color conversion layer CCL1, the second color conversion layer CCL2, and the scattering layer SCL can be described in the same manner as described in the reference. Figure 9 The step ST defined between the upper surface of the scattering layer SCL and the upper surface of the partition wall structure BMW adjacent to the third accommodation space AC3 can be described in the same manner as described in the reference. Therefore, redundant explanations can be omitted.

[0202] The cover layer CAP can be described in the same manner as described in the reference. For example, a step corresponding to the step ST can be defined in the cover layer CAP. In the following, redundant explanations can be omitted. Figures 9 to 11 The cover layer CAP can be described in the same manner as described in the reference. For example, a step corresponding to the step ST can be defined in the cover layer CAP. In the following, redundant explanations can be omitted.

[0203] The first color filter layer CF1', the second color filter layer CF2', and the third color filter layer CF3' can be provided on the cover layer CAP. The openings OP1-1', OP1-2', OP2-1', OP2-2', OP2-2", OP3-1', and OP3-2' described in the reference can be defined in the first color filter layer CF1', the second color filter layer CF2', and the third color filter layer CF3'. Therefore, in some regions, the first color filter layer CF1', the second color filter layer CF2', and the third color filter layer CF3' can overlap each other. In some other regions, the first color filter layer CF1', the second color filter layer CF2', and the third color filter layer CF3' can not overlap each other. When the first color filter layer CF1', the second color filter layer CF2', and the third color filter layer CF3' overlap each other, the second color filter layer CF2' can be provided on the first color filter layer CF1', and the third color filter layer CF3' can be provided on the first color filter layer CF1' and the second color filter layer CF2'. Figures 13 to 15 The first color filter layer CF1', the second color filter layer CF2', and the third color filter layer CF3' can overlap with the first accommodation space AC1. In this case, the first color filter layer CF1' can extend above the partition wall structure BMW adjacent to the first accommodation space AC1. In addition, the first color filter layer CF1' can be provided on the partition wall structure BMW adjacent to the third accommodation space AC3.

[0204] The second color filter layer CF2' can overlap with the second accommodation space AC2. In this case, the second color filter layer CF2' can extend above the partition wall structure BMW adjacent to the second accommodation space AC2.

[0205] The second color filter layer CF2' can overlap with the second accommodation space AC2. In this case, the second color filter layer CF2' can extend above the partition wall structure BMW adjacent to the second accommodation space AC2.

[0206] The third color filter layer CF3' may overlap with the third accommodation space AC3. In this case, the third color filter layer CF3' may extend above the partition wall structure BMW adjacent to the third accommodation space AC3. In addition, the third color filter layer CF3' may be disposed on the partition wall structure BMW adjacent to the first accommodation space AC1 and the second accommodation space AC2. In this case, the first color filter layer CF1' or the first color filter layer CF1' and the second color filter layer CF2' may be disposed under or below the third color filter layer CF3'.

[0207] On the partition wall structure BMW adjacent to the first accommodation space AC1 and the second accommodation space AC2, the first color filter layer CF1', the second color filter layer CF2', and the third color filter layer CF3' may be sequentially stacked in the third direction DR3, thereby defining a first light-blocking stack LBM1'. On the partition wall structure BMW adjacent to the third accommodation space AC3, the first color filter layer CF1' and the third color filter layer CF3' may be sequentially stacked in the third direction DR3, thereby defining a second light-blocking stack LBM2'. The second light-blocking stack LBM2' may not overlap with the second color filter layer CF2'. Thus, two different color filter layers or three different color filter layers may be stacked to define a light-blocking stack for preventing light mixing between adjacent sub-pixels.

[0208] In an embodiment, the first light-blocking stack LBM1' may extend from above the partition wall structure BMW to above the first color conversion layer CCL1, whereby the first light-blocking stack LBM1' may partially overlap with the first accommodation space AC1.

[0209] In an embodiment, the first light-blocking stack LBM1' may extend from above the partition wall structure BMW to above the second color conversion layer CCL2, whereby the first light-blocking stack LBM1' may partially overlap with the second accommodation space AC2.

[0210] In an embodiment, the second light-blocking stack LBM2' may extend from above the partition wall structure BMW to above the scattering layer SCL, whereby the second light-blocking stack LBM2' may partially overlap with the third accommodation space AC3. Accordingly, the second light-blocking stack LBM2' may cover a step ST defined between the upper surface of the scattering layer SCL and the upper surface of the partition wall structure BMW adjacent to the third accommodation space AC3.

[0211] In an embodiment, a step ST' corresponding to the step ST may be defined between an upper surface of a second light-blocking laminate LBM2' disposed on a partition wall structure BMW adjacent to a third accommodation space AC3 and an upper surface of a third color filter layer CF3' overlapping with a scattering layer SCL. In the present disclosure, the second light-blocking laminate LBM2' may have a structure in which two color filter layers (e.g., a first color filter layer CF1' and a third color filter layer CF3') are stacked. Accordingly, compared to a case where the second light-blocking laminate LBM2' has a structure in which three color filters (e.g., a first color filter layer CF1', a second color filter layer CF2', and a third color filter layer CF3') are stacked, a thickness of the second light-blocking laminate LBM2' in a third direction DR3 may be relatively reduced. Accordingly, the step ST' formed corresponding to the step ST may be relatively reduced.

[0212] In an embodiment, as Figure 16 shown, a second accommodation space AC2 and a third accommodation space AC3 may be disposed adjacent to each other. In this case, in a cross-sectional view, in a first overlapping region overlapping with a partition wall structure BMW disposed between the second accommodation space AC2 and the third accommodation space AC3, a surface area of a region where the second light-blocking laminate LBM2' is disposed may be equal to or greater than a surface area of a region where the first light-blocking laminate LBM1' is disposed. For example, in a cross-sectional view, in the first overlapping region, the surface area of the region where the second light-blocking laminate LBM2' is disposed may be greater than the surface area of the region where the first light-blocking laminate LBM1' is disposed. For another example, the surface area of the region where the second light-blocking laminate LBM2' is disposed may be about 80% or more of the surface area of the region where the first light-blocking laminate LBM1' is disposed. In this case, the step ST' may be effectively reduced.

[0213] In an embodiment, with Figure 12 and Figure 16As shown in the figure, the first sub-pixel SP1' can be arranged adjacent to the third sub-pixel SP3', and thus, the first accommodation space AC1 and the third accommodation space AC3 can be arranged adjacent to each other. In this case, in the cross-sectional view, in the second overlapping region overlapping with the partition wall structure BMW provided between the first accommodation space AC1 and the third accommodation space AC3, the surface area of the region provided with the second light-blocking laminate LBM2' can be equal to or larger than the surface area of the region provided with the first light-blocking laminate LBM1'. For example, in the cross-sectional view, in the second overlapping region, the surface area of the region provided with the second light-blocking laminate LBM2' can be larger than the surface area of the region provided with the first light-blocking laminate LBM1'. For another example, the surface area of the region provided with the second light-blocking laminate LBM2' can be about 80% or more of the surface area of the region provided with the first light-blocking laminate LBM1'. In this case, the step ST' can be effectively reduced.

[0214] The outer coating OC can cover the entirety of the first color filter layer CF1', the second color filter layer CF2', and the third color filter layer CF3'. The outer coating OC can be used to protect the components provided under or below the outer coating OC. In an embodiment, the outer coating OC can include an organic insulating material.

[0215] In an embodiment, referring to Figure 4 the window WD described or the bonding (or adhesion) film formed to provide the window WD can be provided on the outer coating OC. For this purpose, it can be required that the outer coating OC has a substantially flat upper surface. For example, it can be required that the step defined on the upper surface of the outer coating OC is equal to or less than about 0.5 micrometers. If the upper surface of the outer coating OC is not substantially flat, bonding defects (or adhesion defects) (e.g., formation of air bubbles, etc.) may occur between the outer coating OC and the window WD or between the outer coating OC and the film. In this case, the reliability of the window WD or the film may be reduced.

[0216] In an embodiment, in the region overlapping with the third accommodation space AC3, a groove GR recessed in the direction toward the display element layer DPL can be defined in the outer coating OC. The groove GR can be formed by the step ST' originating from the step ST.

[0217] As described above, since the second light-blocking stack LBM2' provided on the partition wall structure BMW adjacent to the third accommodation space AC3 includes only two color filter layers (e.g., the first color filter layer CF1' and the third color filter layer CF3'), the step ST' can be relatively reduced. Accordingly, the depth D_GR of the groove GR formed by the step ST' can also be relatively reduced. For example, the depth D_GR of the groove GR can be less than about 0.5 micrometers. In this case, the reliability of the window WD or the film provided on the outer coating OC may not be reduced.

[0218] A display device according to an embodiment may include: a partition wall structure formed to define a first accommodation space, a second accommodation space, and a third accommodation space, an upper surface of a display element layer being exposed through the first accommodation space, the second accommodation space, and the third accommodation space; a color conversion layer including a first color conversion layer provided in the first accommodation space and a second color conversion layer provided in the second accommodation space; a scattering layer provided in the third accommodation space and having a thickness smaller than each of the thicknesses of the first color conversion layer and the second color conversion layer; a cover layer covering the partition wall structure, the color conversion layer, and the scattering layer; and a color filter layer provided on the cover layer and including a first color filter layer overlapping the first accommodation space, a second color filter layer overlapping the second accommodation space, and a third color filter layer overlapping the third accommodation space.

[0219] A light-blocking stack formed by stacking the first color filter layer and the third color filter layer is provided on the partition wall structure adjacent to the third accommodation space. Thus, since the light-blocking stack including only two color filters is provided on the partition wall structure adjacent to the third accommodation space, a problem of deterioration in reliability due to a step defined by the scattering layer having a relatively small thickness can be prevented from occurring.

[0220] Although embodiments have been described above, those skilled in the art will understand that various modifications, additions, and substitutions are possible without departing from the scope and spirit of the present disclosure and the appended claims.

Claims

1. A display device, comprising: A partition wall structure that defines a first accommodation space, a second accommodation space, and a third accommodation space, and an upper surface of a display element layer is exposed through the first accommodation space, the second accommodation space, and the third accommodation space; A color conversion layer, including a first color conversion layer disposed in the first accommodation space and a second color conversion layer disposed in the second accommodation space; A scattering layer disposed in the third accommodation space, and the scattering layer has a thickness smaller than each of the thickness of the first color conversion layer and the thickness of the second color conversion layer; A cover layer covering the partition wall structure, the color conversion layer, and the scattering layer; And A color filter layer disposed on the cover layer, and the color filter layer includes a first color filter layer overlapping with the first accommodation space, a second color filter layer overlapping with the second accommodation space, and a third color filter layer overlapping with the third accommodation space, Wherein, A first light-blocking stack formed by stacking the first color filter layer and the third color filter layer is disposed on the partition wall structure adjacent to the first accommodation space and the third accommodation space, and A second light-blocking stack formed by stacking the second color filter layer and the third color filter layer is disposed on the partition wall structure adjacent to the second accommodation space.

2. The display device according to claim 1, wherein, The first light-blocking stack does not overlap with the second color filter layer.

3. The display device according to claim 1, wherein, The second light-blocking stack does not overlap with the first color filter layer.

4. The display device according to claim 1, wherein, A step is defined between an upper surface of the scattering layer and an upper surface of the partition wall structure adjacent to the third accommodation space.

5. The display device according to claim 4, wherein, The step is 20% or more and 60% or less of the thickness of the partition wall structure.

6. The display device according to claim 1, further comprising: An outer coating covering the color filter layer.

7. The display device according to claim 6, wherein, In a region overlapping with the third accommodation space, a groove recessed in a direction toward the display element layer is defined in the outer coating.

8. The display device according to claim 7, wherein, The depth of the groove is less than 0.5 micrometers.

9. The display device according to claim 1, wherein, The thickness of the first color conversion layer and the thickness of the second color conversion layer are each 85% or more of the thickness of the partition wall structure.

10. The display device according to claim 1, wherein, The cover layer includes a material having a refractive index of 1.3 or less.

11. The display device according to claim 1, wherein, The first color conversion layer includes first color conversion particles, The second color conversion layer includes second color conversion particles, and The scattering layer includes scattering particles.

12. The display device according to claim 1, wherein, The display element layer includes: A first light-emitting element overlapping with the first accommodation space; A second light-emitting element overlapping with the second accommodation space; and A third light-emitting element overlapping with the third accommodation space.

13. A display device, comprising: A partition wall structure that defines a first accommodation space, a second accommodation space, and a third accommodation space, and an upper surface of a display element layer is exposed through the first accommodation space, the second accommodation space, and the third accommodation space; A color conversion layer, including a first color conversion layer disposed in the first accommodation space and a second color conversion layer disposed in the second accommodation space; A scattering layer is disposed in the third accommodation space, and the scattering layer has a thickness smaller than each of the thickness of the first color conversion layer and the thickness of the second color conversion layer; A cover layer covers the partition wall structure, the color conversion layer, and the scattering layer; and A color filter layer is disposed on the cover layer. The color filter layer includes a first color filter layer overlapping with the first accommodation space, a second color filter layer overlapping with the second accommodation space, and a third color filter layer overlapping with the third accommodation space. Wherein, A first light-blocking stack formed by stacking the first color filter layer, the second color filter layer, and the third color filter layer is disposed on the partition wall structure adjacent to the first accommodation space and the second accommodation space, and A second light-blocking stack formed by stacking the first color filter layer and the third color filter layer is disposed on the partition wall structure adjacent to the third accommodation space.

14. The display device according to claim 13, wherein, The second light-blocking stack does not overlap with the second color filter layer.

15. The display device according to claim 13, wherein, A step is defined between the upper surface of the scattering layer and the upper surface of the partition wall structure adjacent to the third accommodation space.

16. The display device according to claim 15, wherein, The step is 20% or more and 60% or less of the thickness of the partition wall structure.

17. The display device according to claim 13, further comprising: An outer coating covers the color filter layer.

18. The display device according to claim 17, wherein, In a region overlapping with the third accommodation space, a groove recessed in a direction toward the display element layer is defined in the outer coating.

19. The display device according to claim 18, wherein, The depth of the groove is less than 0.5 micrometers.

20. The display device according to claim 13, wherein, The thickness of the first color conversion layer and the thickness of the second color conversion layer are each 85% or more of the thickness of the partition wall structure.

21. The display device according to claim 13, wherein, The cover layer includes a material having a refractive index of 1.3 or less.

22. The display device according to claim 13, wherein, In a cross-sectional view, in a region overlapping with the partition wall structure disposed between the first accommodation space and the third accommodation space, the surface area of the region where the second light-blocking stack is disposed is larger than the surface area of the region where the first light-blocking stack is disposed.

23. The display device according to claim 13, wherein, In a cross-sectional view, in a region overlapping with the partition wall structure disposed between the second accommodation space and the third accommodation space, the surface area of the region where the second light-blocking stack is disposed is larger than the surface area of the region where the first light-blocking stack is disposed.

Images