Array substrate, display panel and display equipment

Abstract

The embodiment of the invention relates to an array substrate, a display panel and display equipment. The array substrate comprises a channel layer which is provided with a channel region of a plurality of driving transistors; the first metal layer is arranged on one side of the channel layer, the first metal layer is provided with grid electrodes of the plurality of driving transistors, and the grid electrodes of the plurality of driving transistors are arranged corresponding to the channel regions of the plurality of driving transistors respectively; the orthographic projection of the grid electrode of the driving transistor on the channel layer is overlapped with the corresponding channel region; wherein the plurality of driving transistors comprise a plurality of first driving transistors, channel regions of the first driving transistors are provided with strip-shaped structures extending along a first direction, and the first channel lengths of the first driving transistors are equal to the first channel lengths of the first driving transistors. The size of the grid electrode is smaller than the size of at least part of the grid electrode of which the orthographic projection is not overlapped with the channel region in the first direction.

Description

Technical Field

[0001] Embodiments of the present application relate to the field of display technologies, and particularly to an array substrate, a display panel, and a display device. Background Art

[0002] With the continuous development of display technologies, people's requirements for the display quality of display panels are also constantly increasing. Among them, the color display ability of a display panel is an important evaluation factor for display quality. However, due to the driving differences of sub-pixels of different colors in the display panel, the brightness of sub-pixels of a certain color may be too high, resulting in a color deviation problem of the display panel. Summary of the Invention

[0003] Based on this, it is necessary to provide an array substrate, a display panel, and a display device for the above technical problems.

[0004] In a first aspect, the present application provides an array substrate, including:

[0005] A channel layer, provided with channel regions of a plurality of driving transistors;

[0006] A first metal layer, disposed on one side of the channel layer, the first metal layer being provided with gates of the plurality of driving transistors, the gates of the plurality of driving transistors being respectively disposed corresponding to the channel regions of the plurality of driving transistors, and the projection of the gate of the driving transistor on the channel layer overlapping with the corresponding channel region;

[0007] Wherein, the plurality of driving transistors include a plurality of first driving transistors, the channel region of the first driving transistor has a strip structure extending in a first direction, and the first channel length of the first driving transistor is less than the size of at least a part of the gate that does not overlap with the channel region in the first direction.

[0008] In a second aspect, the present application provides a display panel, including:

[0009] The array substrate as described above;

[0010] A light-emitting layer, disposed on one side of the array substrate, the light-emitting layer being provided with a plurality of sub-pixels, the plurality of sub-pixels being respectively disposed corresponding to the plurality of driving transistors, so as to emit light under the drive of the driving current output by the corresponding driving transistors;

[0011] Wherein, the variation amplitude of the driving current of the first driving transistor with temperature is less than the variation amplitude of the driving current of at least a second driving transistor with temperature, and the light-emitting color of the sub-pixel driven by the first driving transistor is different from the light-emitting color of the sub-pixel driven by the second driving transistor.

[0012] In a third aspect, the present application provides a display device, including the display panel as described above.

[0013] For the above-mentioned array substrate, display panel and display device, by providing a channel region located in the channel layer and a gate located in the first metal layer, and overlapping the gate with the corresponding channel region in the positive projection of the gate on the channel layer, a driving transistor of a sub-pixel can be formed to provide a driving current to the sub-pixel. Moreover, through a special setting of the gate shape, the widths of different positions of the gate are not completely the same, so that the channel region can be provided corresponding to the position where the size of the gate in the first direction is smaller, so that the overlapping region of the positive projection of the gate and the channel region can have a smaller size in the first direction, shortening the first channel length of the first driving transistor, and further effectively improving the channel width-to-length ratio of the first driving transistor. Since the first channel length is shortened, it is equivalent to shortening the distance for carriers to travel in the channel, reducing the scattering probability of carriers with the lattice, impurities, etc., thus contributing to reducing the resistance of the first driving transistor, accelerating the charging efficiency, outputting the required driving current in a shorter time, and improving the response speed and display quality of the display panel. Description of the Drawings

[0014] In order to more clearly illustrate the technical solutions in the embodiments of the present application or related technologies, the following will briefly introduce the drawings required for use in the description of the embodiments or related technologies. Obviously, the following drawings are only some embodiments of the present application. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0015] Figure 1 It is a partial cross-sectional schematic diagram of an array substrate according to an embodiment;

[0016] FIG. 2(a) is a top view schematic diagram of a first driving transistor according to an embodiment;

[0017] FIG. 2(b) is a top view schematic diagram of a first driving transistor according to an embodiment;

[0018] FIG. 2(c) is a top view schematic diagram of a first driving transistor according to an embodiment;

[0019] Figure 3 It is a top view schematic diagram of a first driving transistor in related technologies;

[0020] FIG. 4(a) is a top view schematic diagram of a second driving transistor according to an embodiment;

[0021] FIG. 4(b) is a top view schematic diagram of a second driving transistor according to an embodiment;

[0022] FIG. 4(c) is a top view schematic diagram of a second driving transistor according to an embodiment.

[0023] Element label description:

[0024] Channel layer: 100; channel region: 110; channel region of the first driving transistor: 110a; channel region of the second driving transistor: 110b; source contact region: 120; drain contact region: 130; first metal layer: 200; gate: 210; storage capacitor plate: 310. Detailed implementation manners

[0025] In order to make the objectives, technical solutions and advantages of the present application clearer and more understandable, the following further details the present application in combination with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0026] It can be understood that the terms "first", "second", etc. used in the present application may be used herein to describe various elements, but these elements are not limited by these terms. These terms are only used to distinguish the first element from another element. For example, without departing from the scope of the present application, the first metal layer may be referred to as the second metal layer, and similarly, the second metal layer may be referred to as the first metal layer.

[0027] In addition, the terms "first" and "second" are only used for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly indicating the quantity of the indicated technical features. Thus, the features defined with "first" and "second" may explicitly or implicitly include at least one of the features. The meaning of "a plurality" is at least two, such as two, three, etc., unless otherwise specifically defined. The meaning of "several" is at least one, such as one, two, etc., unless otherwise specifically defined.

[0028] In the array substrate of a display panel, there are usually multiple thin-film transistors (TFTs). Various factors will affect the performance of the thin-film transistors. If the influencing degrees of the thin-film transistors corresponding to sub-pixels of different colors are not exactly the same, the emission brightness of sub-pixels of different colors will be different, which is manifested as the color shift problem of the display panel. The following takes two related technologies as examples to briefly illustrate the causes of the color shift problem of the display panel.

[0029] In a related technology, if the display device where the display panel is located has a heating problem, the characteristic curve of the thin-film transistor in the array substrate will shift, resulting in a shift in the threshold voltage Vth. Especially when displaying a low gray-scale image, since the driving current of the sub-pixels is small, a slight change in the threshold voltage Vth of the driving transistors in multiple thin-film transistors will affect the driving current. Moreover, since the driving currents of sub-pixels of different colors are not exactly the same, the brightness of sub-pixels of different colors is also affected by temperature in different ways. Among them, the sub-pixel with a smaller driving current is more affected by temperature in terms of brightness. Taking an OLED display panel as an example, OLED materials of different colors may have different electroluminescence efficiencies, that is, different currents are required to generate the same brightness. For example, green light materials usually have higher efficiency, so a smaller driving current may be required to achieve the same brightness, while blue light materials have lower efficiency and may require a larger driving current. Accordingly, under the same temperature influence, the brightness change of the green sub-pixels will be greater, resulting in a green color shift of the display panel at high temperatures.

[0030] In another related technology, under different bias voltages, the electric field corresponding to the bias voltage will drive charged defects such as oxygen vacancies to migrate inside the material, affecting the interface state density, or injecting carriers into the semiconductor, resulting in a temporary decrease or increase in the defect concentration, thereby making the thin-film transistor exhibit different defect states. When the response of the defect state cannot keep up with the change speed of the external bias voltage, it will lead to a voltage switching, resulting in the hysteresis phenomenon of the thin-film transistor. Accordingly, since the driving currents of sub-pixels of different colors are not exactly the same, a larger driving current may make the change of the defect state more obvious, resulting in a longer hysteresis time, while a smaller driving current may make the change of the defect state smaller, resulting in a shorter hysteresis time. For example, green light materials usually have higher efficiency, so a smaller driving current may be required to achieve the same brightness, while blue light materials have lower efficiency and may require a larger driving current. Based on this, the long hysteresis time of the blue sub-pixels will cause the display effect of the blue sub-pixels not to meet the requirements, resulting in a color shift of the display panel.

[0031] The embodiment of the present application provides an array substrate, which can alleviate the color shift problem of the display panel. Specifically, Figure 1 is a partial cross-sectional schematic diagram of the array substrate of an embodiment. Refer to Figure 1 , the array substrate includes a channel layer 100 and a first metal layer 200.

[0032] Among them, the channel layer 100 is provided with a plurality of channel regions 110 of driving transistors. The first metal layer 200 is disposed on one side of the channel layer 100. The first metal layer 200 is provided with a plurality of gate electrodes 210 of driving transistors. The plurality of gate electrodes 210 of driving transistors are respectively arranged corresponding to the plurality of channel regions 110 of driving transistors. A driving transistor refers to one of the plurality of thin-film transistors in the pixel driving circuit that provides a driving current for a sub-pixel. Therefore, it can also be understood as a transistor that directly determines the brightness of the sub-pixel.

[0033] Optionally, when the array substrate includes a substrate, the first metal layer 200 is disposed on the side of the channel layer 100 away from the substrate. For example, two N regions can be formed in a P-type semiconductor as the source contact region and the drain contact region of the driving transistor. The source contact region 120 is used to connect to the source, and the drain contact region 130 is used to connect to the drain. The region between the source contact region 120 and the drain contact region 130 serves as the channel region 110. After forming the source contact region 120, the drain contact region 130, and the channel region 110, an insulating layer can be covered on the side of the three away from the substrate, and a gate electrode 210 can be formed on the side of the insulating layer away from the substrate to form a transistor structure. When the gate electrode 210 is located on the side of the channel layer 100 away from the substrate, the distance between the gate electrode 210 and the substrate is relatively far, thereby reducing the parasitic capacitance between the gate electrode 210 and the substrate, enabling the gate electrode 210 voltage to be charged and discharged faster, realizing the fast switching of the driving transistor, and reducing the dynamic power consumption. It should be noted that in some embodiments, the first metal layer 200 can also be disposed on the side of the channel layer 100 close to the substrate, which is not limited herein.

[0034] The orthographic projection of the gate electrode 210 of the driving transistor on the channel layer 100 overlaps with the corresponding channel region 110. Through the overlapping arrangement of the gate electrode 210 and the channel region 110, it can be ensured that the electric field of the gate electrode 210 can cover the effective region of the channel region 110, avoiding electric field leakage or action blind spots, thereby realizing precise control of the on and off states of the channel region 110. Specifically, when a suitable voltage is applied to the gate electrode 210 of the driving transistor, a conductive channel will be formed in the channel region 110, enabling current to flow between the source contact region 120 and the drain contact region 130. When the voltage of the gate electrode 210 changes, the conductivity of the channel region 110 changes, thereby blocking the current. That is, based on the one-to-one correspondence between the gate electrode 210 and the channel region 110, by controlling the voltage of the gate electrode 210, the on and off states of the channel region 110 can be controlled to adjust the current value of the driving current, so as to provide a suitable driving current to the sub-pixel, and thus realize precise control of the emission brightness of the sub-pixel.

[0035] The plurality of driving transistors includes a plurality of first driving transistors. FIG. 2(a) is one of the top view schematic diagrams of the first driving transistor in an embodiment. FIG. 2(a) shows the channel region 110a and the gate 210 corresponding to the first driving transistor corresponding to a sub-pixel in the display panel. Referring to FIG. 2(a), the channel region 110a of the first driving transistor is a linear bar structure, and the bar structure of the channel region 110a of the first driving transistor extends in the first direction. Among them, the first channel length of the first driving transistor is less than the dimension of at least a part of the gate 210 whose orthographic projection does not overlap with the channel region 110a in the first direction. The channel length refers to the dimension of the overlapping region of the orthographic projection of the gate 210 and the corresponding channel region 110a in the first direction. L1 shown in FIG. 2 is the first channel length. The orthographic projection of the gate 210 refers to the orthographic projection of the gate 210 on the corresponding channel region 110a.

[0036] Figure 3 is a top view schematic diagram of the first driving transistor in the related art. Refer to Figure 3 , in the related art, based on the rectangular gate 210, the dimensions of each part of the gate 210 in the first direction are the same. Therefore, no matter where the channel region 110a extending in the first direction is set corresponding to the gate 210, it has the same channel length. Moreover, since the setting of the gate 210 needs to be compatible with other transistors except the first driving transistor and the positions of other traces in the first metal layer 200, it is difficult to reduce the dimension of the gate 210 in the first direction to further reduce the channel length of the first driving transistor on the premise that the outer contour of the gate 210 is rectangular.

[0037] Exemplarily, the dimension of the channel region 110 of the driving transistor in the direction perpendicular to the first direction can be called the channel width. Taking the channel width of the first driving transistor in the present application and the related art as 3um as an example. Using the gate 210 shown in the embodiment of FIG. 2(a), the corresponding first channel length can be 10um. Therefore, the channel width-to-length ratio of the first driving transistor is 3 / 10. While using Figure 3 the rectangular gate 210 shown in the related art, the corresponding channel length is 13um. Therefore, the channel width-to-length ratio of the first driving transistor is 3 / 13. It should be noted that the above channel width and channel length are only for illustrative purposes and are not used to limit the protection scope of this embodiment.

[0038] In the embodiments of the application, by providing a channel region 110 located in the channel layer 100 and a gate 210 located in the first metal layer 200, and causing the positive projection of the gate 210 on the channel layer 100 to overlap with the corresponding channel region 110, a driving transistor of a sub-pixel can be formed to provide a driving current to the sub-pixel. Through a special setting of the shape of the gate 210, the widths of different positions of the gate 210 are not completely the same, so that the channel region 110a can be provided corresponding to a position where the size of the gate 210 in the first direction is smaller, so that the overlapping region of the positive projection of the gate 210 and the channel region 110a can have a smaller size in the first direction, shortening the first channel length of the first driving transistor, and thus effectively increasing the channel width-to-length ratio of the first driving transistor. Since the first channel length is shortened, it is equivalent to shortening the distance that carriers travel in the channel, reducing the scattering probability of carriers with the lattice, impurities, etc., which helps to reduce the resistance of the first driving transistor, accelerate the charging efficiency, output the required driving current in a shorter time, and improve the response speed and display quality of the display panel.

[0039] In one of the embodiments, the plurality of driving transistors further includes a plurality of second driving transistors. FIG. 4(a) is one of the top view schematic diagrams of a second driving transistor in an embodiment, and FIG. 4(a) shows the channel region 110b and the gate 210 corresponding to the second driving transistor corresponding to a sub-pixel in the display panel. The second channel length of the second driving transistor can be greater than the first channel length of the first driving transistor. That is, on the premise that the channel widths of the first driving transistor and the second driving transistor are the same, the channel width-to-length ratio of the second driving transistor is less than that of the first driving transistor. Taking the channel widths of the first driving transistor and the second driving transistor both being 3 um as an example. The first channel length can be 10 um, so the channel width-to-length ratio of the first driving transistor is 3 / 10. And the second channel length can be 15 um, so the channel width-to-length ratio of the first driving transistor is 3 / 15. It should be noted that the above channel width and channel length are only used for illustrative purposes and are not used to limit the protection scope of this embodiment.

[0040] In the embodiments of the application, by making the first driving transistor have a larger second channel length, the width-to-length ratio of the second driving transistor can be reduced, so that when the second driving transistor drives the corresponding sub-pixel, it can have the same or similar characteristics as when the first driving transistor drives the corresponding sub-pixel. For example, if the change amplitudes of the brightness of different sub-pixels are different due to temperature changes, the channel regions 110 of the first driving transistor and the second driving transistor can be changed to make the change amplitudes of the brightness of their corresponding sub-pixels the same or similar, thereby suppressing the color deviation problem of the display panel and improving the display quality of the display panel.

[0041] Further, the shape of the channel region 110b of the second driving transistor is different from the shape of the channel region 110a of the first driving transistor. It should be noted that the first driving transistor and the second driving transistor are divided only by the different shapes of the channel region 110, and the shapes of the gates 210 of the first driving transistor and the second driving transistor may be the same or different. The shape of the gate 210 is not limited in this embodiment. The second driving transistor and the first driving transistor can be used to drive sub-pixels of different colors, but the colors of the sub-pixels driven by different second driving transistors may not be completely the same. For example, the first driving transistor is used to drive blue sub-pixels, some of the second driving transistors are used to drive red sub-pixels, and some of the second driving transistors are used to drive green sub-pixels.

[0042] Among them, the second channel length of the second driving transistor is greater than the dimension of any part of the gate 210 in the first direction. Specifically, since the characteristic requirements of different driving transistors in the array substrate are different, the first driving transistor and the second driving transistor can have different channel lengths by adjusting the shape of the channel region 110. It can be understood that on the premise that the first channel length of the first driving transistor is less than the dimension of at least part of the gate 210 that does not intersect with the channel region 110a in the orthographic projection in the first direction, setting the second channel length of the second driving transistor to be greater than the dimension of any part of the gate 210 in the first direction can make the second channel length greater than the first channel length. Optionally, the shape of the channel region 110b of the second driving transistor can adopt any structure other than the linear structure with a single extension direction, including but not limited to a broken line shape, an arc shape, etc. By using a second driving transistor with a shape different from that of the channel region 110a of the first driving transistor, the second channel length of the second driving transistor can be extended while keeping the area of the gate 210 unchanged, thereby reducing the channel width-to-length ratio of the second driving transistor and not excessively occupying the space in the first metal layer 200.

[0043] In one embodiment, the channel region 110b of the second driving transistor includes at least one first channel segment and at least one second channel segment connected to each other. The extending direction of the first channel segment is parallel to the first direction, and the extending direction of the second channel segment intersects with the first direction. Specifically, as shown in FIG. 4(a) for example, the channel region 110b of the second driving transistor may include two first channel segments and one second channel segment. The second channel segment is used to connect the two first channel segments to enable the carriers to be transmitted in the channel region 110b. Wherein, the extending direction of the second channel segment may be perpendicular to the first direction, thereby reducing the design difficulty of the channel region 110b. It can be understood that the extending direction of the second channel segment may also form an angle of any value from 0° to 90° with the first direction, and the numbers of the first channel segment and the second channel segment of the second driving transistor may be set as required. For example, it includes three first channel segments and two second channel segments. On the premise that the second driving transistor includes a plurality of second channel segments, the extending directions of the plurality of second channel segments may be the same or different, which is not limited herein. In the embodiments of the application, by providing the channel region 110b including at least one first channel segment and at least one second channel segment, the second channel length of the second driving transistor can be effectively extended.

[0044] In one embodiment, in the overlapping region between the positive projection of the gate 210 of the second driving transistor and the corresponding channel region 110b, at least part of the channel region 110b has the same distance from the outer contours of the positive projections of the gates 210 on both sides. Therefore, in the overlapping region between the positive projection of the gate 210 of the second driving transistor and the corresponding channel region 110b, the extending direction of the channel region 110b of the second driving transistor at least partially coincides with the extending direction of the positive projection of the gate 210.

[0045] As shown in FIG. 4(a) for example, the shapes of the channel region 110b and the gate 210 of the second driving transistor can both be understood as zigzag, and the distances between each part of the channel region 110b and the outer contours of the positive projections of the gates 210 on both sides are all the same. That is, in the direction perpendicular to the extending direction of the second driving transistor, the first distance between the channel region 110b and one side of the positive projection of the gate 210 is the same as the second distance between the channel region 110b and the other side of the positive projection of the gate 210. This embodiment can be understood as disposing the channel region 110b corresponding to the middle of the gate 210. The above-mentioned setting method can make the electric field evenly distributed in the channel region 110b, ensure that the carriers are evenly transmitted across the entire channel width, thereby effectively controlling the current between the source and the drain, making the on and off states of the transistor clearer, and reducing signal distortion and transmission delay.

[0046] It can be understood that in some embodiments, in the overlapping region of the positive projection of the gate 210 of the second driving transistor and the corresponding channel region 110b, the distance between a part of the channel region 110b and the outer contours of the positive projections of the gates 210 on both sides can be made the same. To achieve the above setting, a T-shaped gate 210 shown in FIG. 4(b) or an L-shaped gate 210 shown in FIG. 4(c) can be adopted to avoid other traces in the first metal layer 200 and improve the flexibility of the layout design. It should be noted that FIGS. 4(b) and 4(c) further show part of the trace structure associated with the second driving transistor to make the connection relationship of the second driving transistor clearer.

[0047] In one embodiment, FIG. 2(b) is a second top view schematic diagram of the first driving transistor in an embodiment, and FIG. 2(c) is a third top view schematic diagram of the first driving transistor in an embodiment. FIGS. 2(b) and 2(c) respectively show the channel region 110a and the gate 210 corresponding to the first driving transistor of a sub-pixel in the display panel. It should be noted that FIGS. 2(b) and 2(c) further show part of the trace structure associated with the first driving transistor to make the connection relationship of the second driving transistor clearer. With reference to FIGS. 2(a) and 4(a), FIGS. 2(b) and 4(b), and FIGS. 2(c) and 4(c) in combination, the shape of the gate 210 corresponding to the first driving transistor is the same as the shape of the gate 210 corresponding to the second driving transistor. Further, the area of the gate 210 corresponding to the first driving transistor is the same as the area of the gate 210 corresponding to the second driving transistor. Specifically, the gate 210 of the driving transistor is located in a different layer from the source and the drain. Therefore, parasitic capacitance will be generated between the gate 210 and the source and the drain, and the capacitance value of the parasitic capacitance has a great correlation with the area and shape of the gate 210. Therefore, by using the first driving transistor and the second driving transistor with the same gate 210 shape, the capacitance values of the parasitic capacitances of different driving transistors can be made similar, thereby reducing the influence of the parasitic capacitance on the brightness of different sub-pixels and suppressing the color shift problem of the display panel.

[0048] In one embodiment, the first channel width of the first driving transistor is greater than or equal to the second channel width of the second driving transistor. Exemplarily, the first channel width of the first driving transistor is the same as the second channel width of the second driving transistor. For example, both the first channel width and the second channel width are 3 μm to reduce the design difficulty. In another example, the first channel width of the first driving transistor is greater than the second channel width of the second driving transistor. For example, the first channel width is 4 μm and the second channel width is 3 μm to increase the channel width-to-length ratio of the first driving transistor, thereby helping to reduce the resistance of the first driving transistor, accelerating the charging efficiency, outputting the required driving current in a shorter time, and improving the response speed and display quality of the display panel.

[0049] In one embodiment, the array substrate further includes a second metal layer. The second metal layer is disposed on a side of the first metal layer 200 away from the channel layer 100. The second metal layer is provided with a plurality of storage capacitor plates 310, and the plurality of storage capacitor plates 310 are respectively arranged corresponding to the gates 210 of the plurality of driving transistors. That is, the storage capacitor plates 310 corresponding to the gates 210 are opposite to each other, and at least a part of the orthographic projection of the outer contour of the storage capacitor plate 310 on the first metal layer 200 overlaps to form a storage capacitor in the pixel driving circuit. The storage capacitor is used to store the electric charge corresponding to the data signal in the data writing stage and provide a corresponding voltage to the driving transistor in the light emitting stage to control the driving current output by the driving transistor. Among them, the outer contour shape of the storage capacitor plate 310 is the same as the outer contour shape of the gate 210. Setting the storage capacitor plate 310 and the gate 210 with the same shape can improve the uniformity of the electric field distribution in the capacitor region.

[0050] At the same time, the size of the storage capacitor plate 310 is greater than or equal to the size of the corresponding gate 210, so that the orthographic projection of the outer contour of the storage capacitor plate 310 on the first metal layer 200 covers the corresponding gate 210. Further, the size of the storage capacitor plate 310 is greater than the size of the corresponding gate 210. The larger storage capacitor plate 310 can increase the capacitance value, while the smaller gate 210 is used to connect the driving transistor, so as to achieve a higher charge storage capacity within a limited pixel. Moreover, the storage capacitor plates 310 and gates 210 with different sizes can reduce the process difficulty and the influence of process fluctuations on the capacitance value of the storage capacitor, ensuring good performance consistency between different array substrates. Further, the overlapping area of the orthographic projection of the storage capacitor plate 310 on the first metal layer 200 and the gate 210 can be designed to be the same as the area of the rectangular storage capacitor in the related art, so that the storage capacitor can be unchanged, the influence of adjusting the shapes of the channel region 110 and the gate 210 on other structures in the array substrate can be reduced, and the design difficulty of the array substrate can be reduced.

[0051] The embodiment of the present application further provides a display panel, including a light-emitting layer and the array substrate as described above. Among them, the light-emitting layer is disposed on one side of the array substrate. Among them, in the case where the display panel includes a substrate, the light-emitting layer may be disposed on the side of the array substrate away from the substrate. The light-emitting layer is provided with a plurality of sub-pixels, and the plurality of sub-pixels are respectively arranged corresponding to a plurality of driving transistors, so as to emit light under the drive of the driving current output by the corresponding driving transistors. The sub-pixel may include any one of a plasma display, an organic light emitting diode (OLED) display device, an electro-wetting display (EWD), an electro-phoretic display (EPD), or an electro-chromic display (ECD), etc.

[0052] In one embodiment, the variation range of the driving current of the first driving transistor with temperature is less than at least the variation range of the driving current of the second driving transistor with temperature, and the light-emitting color of the sub-pixel driven by the first driving transistor is different from the light-emitting color of the sub-pixel driven by the second driving transistor. Specifically, since the driving currents of sub-pixels of different colors are not exactly the same, taking an OLED display panel as an example, OLED materials of different colors may have different electroluminescence efficiencies, that is, different currents are required to generate the same brightness. Therefore, the brightnesses of sub-pixels of different colors are not exactly the same affected by temperature. Among them, the smaller the driving current of the sub-pixel, the greater the influence of its brightness by temperature. Correspondingly, under the same temperature influence, the brightness changes of sub-pixels of different colors will also be different, thus causing color deviation of the display panel at high temperatures.

[0053] In the embodiment of the application, based on the fact that the light-emitting colors of the sub-pixels corresponding to the first driving transistor and the second driving transistor are different, for the first driving transistor corresponding to the sub-pixel with a larger required driving current, the variation range of the driving current with temperature is smaller. Therefore, through the setting of the channel region 110a and the gate 210 of the first driving transistor, the first channel length is shortened, which is equivalent to shortening the distance for carriers to travel in the channel, reducing the scattering probability of carriers with the lattice, impurities, etc., thereby helping to reduce the resistance of the first driving transistor and accelerating the charging efficiency, and outputting the required driving current in a shorter time. Based on this, the sub-pixel corresponding to the first driving transistor can have a greater brightness in a short time, and further can balance the situation that the brightness of the sub-pixel corresponding to the second driving transistor is too large at high temperatures, so that sub-pixels of different colors can have similar brightnesses to suppress the color deviation problem of the display panel.

[0054] In one embodiment, the light-emitting layer includes blue sub-pixels and green sub-pixels. The first driving transistor is used to drive sub-pixels whose emission color includes blue, and the second driving transistor is used to drive sub-pixels whose emission color includes green. Further, the light-emitting layer further includes red sub-pixels. Exemplarily, the red sub-pixels can be driven by either the first driving transistor or the second driving transistor. For example, the gate 210 and the channel region 110b of the driving transistors corresponding to the red sub-pixels and the green sub-pixels have the same structure, or the gate 210 and the channel region 110a of the driving transistors corresponding to the red sub-pixels and the blue sub-pixels have the same structure. Another exemplarily, the channel width-to-length ratio of the driving transistor corresponding to the red sub-pixels can be between the channel width-to-length ratio of the first driving transistor and the channel width-to-length ratio of the second driving transistor.

[0055] An embodiment of the present application further provides a display screen, which includes a cover plate and the display panel as described above. The cover plate is disposed on the light-emitting side of the display panel and covers the display panel. In this embodiment, by providing the cover plate, the display panel can be protected, and the damage to the display panel caused by external forces can be reduced, thereby improving the reliability of the display panel.

[0056] An embodiment of the present application further provides a display device. In this embodiment, based on the foregoing display panel and display screen, a display device with a small color shift at high temperatures is provided. Specifically, the display device can be, but is not limited to, various personal computers, laptop computers, smartphones, tablet computers, Internet of Things devices, and portable wearable devices. The Internet of Things devices can be smart speakers, smart TVs, smart air conditioners, smart vehicle-mounted devices, etc. The portable wearable devices can be smart watches, smart bracelets, head-mounted devices, etc.

[0057] The technical features of the above embodiments can be combined arbitrarily. For the sake of brevity of description, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, it should be considered as the scope described in this specification.

[0058] The above embodiments only express several implementation manners of the embodiments of the present application, and the description is relatively specific and detailed, but it cannot be understood as a limitation on the scope of the invention patent. It should be noted that for those of ordinary skill in the art, without departing from the concept of the embodiments of the present application, several deformations and improvements can still be made, and these all belong to the protection scope of the embodiments of the present application. Therefore, the protection scope of the patent of the embodiments of the present application should be subject to the appended claims.

Claims

1. An array substrate, characterized in that, Comprising: A channel layer provided with channel regions of a plurality of driving transistors; A first metal layer disposed on one side of the channel layer, the first metal layer being provided with gates of the plurality of driving transistors, the gates of the plurality of driving transistors being respectively arranged corresponding to the channel regions of the plurality of driving transistors, and the positive projection of the gate of the driving transistor on the channel layer overlapping the corresponding channel region; Wherein, the plurality of driving transistors include a plurality of first driving transistors, the channel region of the first driving transistor has a strip structure extending in a first direction, and the first channel length of the first driving transistor is less than the size of at least a part of the gate whose positive projection does not intersect the channel region in the first direction.

2. The array substrate according to claim 1, wherein The plurality of driving transistors further include a plurality of second driving transistors, and the shape of the channel region of the second driving transistor is different from the shape of the channel region of the first driving transistor; Wherein, the second channel length of the second driving transistor is greater than the size of any part of the gate in the first direction.

3. The array substrate according to claim 2, wherein The channel region of the second driving transistor includes at least one first channel segment and at least one second channel segment connected to each other, the extending direction of the first channel segment is parallel to the first direction, and the extending direction of the second channel segment intersects the first direction.

4. The array substrate according to claim 2, wherein In the overlapping region between the positive projection of the gate of the second driving transistor and the corresponding channel region, at least a part of the channel region has the same distance from the outer contours of the positive projections of the gates located on both sides.

5. The array substrate according to claim 2, wherein The shape of the gate corresponding to the first driving transistor is the same as the shape of the gate corresponding to the second driving transistor.

6. The array substrate according to any one of claims 2 to 5, characterized in that The first channel width of the first driving transistor is greater than or equal to the second channel width of the second driving transistor.

7. The array substrate according to claim 1, wherein Further comprising: A second metal layer disposed on the side of the first metal layer away from the channel layer, the second metal layer being provided with a plurality of storage capacitor plates, the plurality of storage capacitor plates being respectively arranged corresponding to the gates of the plurality of driving transistors; Wherein, the outer contour shape of the storage capacitor plate is the same as the outer contour shape of the gate, and the positive projection of the outer contour of the storage capacitor plate on the first metal layer covers the corresponding gate.

8. A display panel, characterized in that, Comprising: The array substrate according to any one of claims 1 to 7; A light-emitting layer disposed on one side of the array substrate, the light-emitting layer being provided with a plurality of sub-pixels, the plurality of sub-pixels being respectively arranged corresponding to the plurality of driving transistors to emit light under the drive of the driving current output by the corresponding driving transistors; Wherein, the variation range of the driving current of the first driving transistor with temperature is less than the variation range of the driving current of at least the second driving transistor with temperature, and the light-emitting color of the sub-pixel driven by the first driving transistor is different from the light-emitting color of the sub-pixel driven by the second driving transistor.

9. The display panel according to claim 8, wherein, The light-emitting color of the sub-pixel driven by the first driving transistor includes blue, and the light-emitting color of the sub-pixel driven by the second driving transistor includes green.

10. A display device, characterized in that, The display panel according to claim 8 or 9.

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