Display device and head-mounted display equipment

Abstract

The invention discloses a display device and a head-mounted display apparatus. The display device includes: a substrate including a light emitting area and a non-light emitting area; a diode-type bank positioned on the non-emission area and separating the plurality of sub-pixels from each other; a light emitting element disposed in each of the plurality of sub-pixels; and an encapsulation portion disposed on the light emitting element.

Description

Technical Field

[0001] The present disclosure relates to a display device for displaying images and a head-mounted display device including the display device. Background Art

[0002] Display devices are applied to various electronic devices, such as TVs, mobile phones, laptop computers, and tablet computers. For this reason, research on developing thinner, lighter, and lower-power-consuming display devices has been continuously carried out.

[0003] In a display device that uses images to display various information, an organic light-emitting display device (OLED) includes a plurality of pixel regions arranged in a display area for displaying images and a plurality of organic light-emitting elements corresponding to the plurality of pixel regions. Since the organic light-emitting elements are self-luminous elements that emit light by themselves, the organic light-emitting display device has a faster response speed, greater luminous efficiency and brightness, a wider viewing angle, and better contrast and color gamut compared to a liquid crystal display device.

[0004] Recently, as the demand for head-mounted display devices (HMDs) including organic light-emitting display devices has increased, research on HMDs has been increasing. A head-mounted display device is an image display device in the form of glasses or a helmet, where a focus is formed at a position close to the user's eyes. The head-mounted display device can implement virtual reality (VR) or augmented reality (AR). In a virtual reality (VR) device, due to its excellent user immersion, a viewer can use a 1-inch display to view a 60-inch screen. For this reason, the head-mounted display device employs a high-resolution organic light-emitting display device. However, research on solutions to problems caused by a small sub-pixel pitch for achieving high-resolution display is underway. Summary of the Invention

[0005] An embodiment of the present disclosure is to provide a display device including a diode-type bank, for example, the diode-type bank can achieve excellent light-blocking characteristics.

[0006] An embodiment of the present disclosure is to provide a display device that can improve the color gamut of emitted light emitted from a light-emitting region by implementing a diode-type bank having a low light transmittance.

[0007] An embodiment of the present disclosure is to provide a display device including a diode-type bank, and the diode-type bank can perform the function of an insulating film by replacing an organic insulating material or an inorganic insulating material in a display device having ultra-high resolution.

[0008] An embodiment of the present disclosure is to provide a head-mounted display device including a display device having a diode-type bank.

[0009] The objects according to the present disclosure are not limited to the above-mentioned objects. Other objects and advantages not mentioned according to the present disclosure can be understood based on the following description and can be more clearly understood based on the embodiments according to the present disclosure. In addition, it will be readily understood that the objects and advantages according to the present disclosure can be achieved by the means shown in the claims or combinations thereof.

[0010] A display device according to an aspect of the present disclosure includes: a substrate including a light-emitting region and a non-light-emitting region; a diode-type dam located on the non-light-emitting region and separating a plurality of sub-pixels from each other; a light-emitting element provided in each of the plurality of sub-pixels; and a packaging part provided on the light-emitting element.

[0011] A head-mounted display device according to another aspect of the present disclosure includes: a display device; a housing for accommodating the display device therein; and a lens array provided at one side of the housing and displaying an image output from the display device, and the display device includes: a substrate including a light-emitting region and a non-light-emitting region; a diode-type dam located on the non-light-emitting region and separating a plurality of sub-pixels from each other; a light-emitting element provided in each of the plurality of sub-pixels; and a packaging part provided on the light-emitting element.

[0012] According to an embodiment of the present disclosure, the color gamut of the emitted light emitted from the light-emitting element to the outside can be improved by including a diode-type dam that can achieve excellent light-blocking characteristics. As the color gamut is improved, the light-emitting element can be driven at low power, thereby reducing production energy.

[0013] According to an embodiment of the present disclosure, since a diode-type dam is included, problems that occur when using a dam including an organic or inorganic insulating material can be prevented.

[0014] According to an embodiment of the present disclosure, since a diode-type dam is included, deterioration of the color gamut of the display device caused by the emitted light emitted from the non-light-emitting region can be prevented.

[0015] According to an embodiment of the present disclosure, a head-mounted display device including a display device having a diode-type dam can provide a user with an ultra-high-resolution image having an excellent color gamut, thereby further enhancing the user's immersion in the image.

[0016] The effects of the present disclosure are not limited to the above-mentioned effects, and other effects not mentioned will be clearly understood by those skilled in the art based on the following description. In addition to the above effects, the specific effects of the present disclosure are described together when describing the specific details for implementing the present disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1It is a schematic perspective view of a display device according to an embodiment of the present disclosure.

[0018] Figure 2 It is a plan view schematically showing a part of a display device according to an embodiment of the present disclosure.

[0019] Figure 3 Is Figure 2 An enlarged plan view of the area of one pixel among a plurality of pixels in

[0020] Figure 4 Is along Figure 3 A cross-sectional view taken along line 4-4 in

[0021] Figure 5 Is Figure 4 An enlarged cross-sectional view of area 5 in

[0022] Figure 6 An enlarged cross-sectional view of one sub-pixel according to a comparative example.

[0023] Figures 7 to 9 It is a diagram showing the operation of a light-emitting element provided with a diode-type bank according to an embodiment of the present disclosure.

[0024] Figures 10 to 12 It shows a head-mounted display device including a display device according to an embodiment of the present disclosure. Detailed Description of Specific Embodiments

[0025] The advantages and features of the present disclosure and the methods for realizing the advantages and features will become apparent with reference to the embodiments described in detail later together with the appended Figure 1 However, the present disclosure is not limited to the embodiments disclosed below, but can be implemented in various different forms. Therefore, these embodiments are described merely to make the present disclosure complete and to fully inform those of ordinary skill in the technical field to which the present disclosure pertains of the scope of the present disclosure.

[0026] For simplicity and clarity of illustration, the elements in the figures are not necessarily drawn to scale. The same reference numerals in different figures represent the same or similar elements and thus perform similar functions. In addition, for simplicity of description, the description and details of well-known steps and elements are omitted. Further, in the following detailed description of the present disclosure, numerous specific details are set forth in order to provide a thorough understanding of the present disclosure. However, it will be understood that the present disclosure may be practiced without these specific details. In other instances, well-known methods, procedures, components, and circuits have not been described in detail so as not to unnecessarily obscure aspects of the present disclosure. Examples of various embodiments are further shown and described below. It will be understood that the description herein is not intended to limit the claims to the particular embodiments described. Rather, the intention is to cover alternatives, modifications, and equivalents as may be included in the spirit and scope of the present disclosure as defined by the appended claims.

[0027] The shapes, dimensions, ratios, angles, numbers, etc. disclosed in the figures used to illustrate the embodiments of the present disclosure are illustrative, and the embodiments of the present disclosure are not limited thereto.

[0028] The terms used herein are for the purpose of describing particular embodiments only and are not intended to limit the present disclosure. As used herein, the singular forms “a” and “an” are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will also be understood that when used in this specification, the terms “comprises,” “has,” “includes,” and “contains” specify the presence of the stated features, integers, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, integers, operations, elements, components, and / or portions thereof. As used herein, the term “and / or” includes any and all combinations of one or more of the associated listed items. Expressions such as “at least one” when preceding a list of elements may modify the entire list of elements and may not modify the individual elements in the list. When interpreting numerical values, errors or tolerances may occur therein even if not explicitly described.

[0029] In addition, it will also be understood that when a first element or layer is referred to as being “on” a second element or layer, the first element may be disposed directly on the second element or may be indirectly disposed on the second element with a third element or layer disposed between the first element or layer and the second element or layer. It will be understood that when an element or layer is referred to as “connected to” or “coupled to” another element or layer, it may be directly connected to or coupled to the other element or layer, or there may be one or more intermediate elements or layers. In addition, it will also be understood that when an element or layer is referred to as being “between” two elements or layers, it may be the only element or layer between the two elements or layers, or there may also be one or more intermediate elements or layers.

[0030] In addition, as used herein, when a layer, film, region, plate, etc. is disposed "on" or "on top of" another layer, film, region, plate, etc., the former may be in direct contact with the latter, or additional layers, films, regions, plates, etc. may be disposed between the former and the latter. As used herein, when a layer, film, region, plate, etc. is directly disposed "on" or "on top of" another layer, film, region, plate, etc., the former is in direct contact with the latter, and no additional layer, film, region, plate, etc. is disposed between the former and the latter. In addition, as used herein, when a layer, film, region, plate, etc. is disposed "under" or "beneath" another layer, film, region, plate, etc., the former may be in direct contact with the latter, or additional layers, films, regions, plates, etc. may be disposed between the former and the latter. As used herein, when a layer, film, region, plate, etc. is directly disposed "under" or "beneath" another layer, film, region, plate, etc., the former is in direct contact with the latter, and no additional layer, film, region, plate, etc. is disposed between the former and the latter.

[0031] In the description of time relationships, for example, the temporal precedence relationship between two events such as "after", "subsequently", "before", etc., unless indicating "immediately after", "subsequently immediately", or "immediately before", additional events may occur between these two events.

[0032] When a particular implementation can be realized differently, the functions or operations specified in a specific block may occur in an order different from the order specified in the flowchart. For example, two consecutive blocks may actually be executed substantially simultaneously, or these two blocks may be executed in the reverse order depending on the functions or operations involved.

[0033] It will be understood that although the terms "first", "second", "third", etc. may be used herein to describe various elements, components, regions, layers, and / or time periods, these elements, components, regions, layers, and / or time periods should not be limited by these terms. These terms are used to distinguish one element, component, region, layer, or time period from another element, component, region, layer, or time period. Thus, without departing from the spirit and scope of the present disclosure, a first element, component, region, layer, or time period as described below may be referred to as a second element, component, region, layer, or time period.

[0034] The features of the various embodiments of the present disclosure may be partially or fully combined with each other and may be technically related or operable with each other. The embodiments may be implemented independently of each other and may be implemented together in an associated relationship.

[0035] When interpreting a numerical value, even if it is not explicitly described separately, the value is interpreted as including an error range.

[0036] Unless otherwise defined, all terms used herein, including technical and scientific terms, have the same meaning as commonly understood by one of ordinary skill in the art to which this inventive concept pertains. It will be further understood that terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the relevant art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.

[0037] As used herein, "embodiment", "example", "aspect", etc. should not be construed so as to make any described aspect or design superior or preferable to other aspects or designs.

[0038] Furthermore, the term "or" means "inclusive or" rather than "exclusive or". That is, unless otherwise stated or clear from the context, the expression "x uses a or b" means any of the natural inclusive arrangements.

[0039] The terms used in the following description have been chosen to be general and common in the relevant technical field. However, depending on the development and / or changes in technology, convention, the preferences of those skilled in the art, etc., there may be other terms in addition to the described terms. Therefore, the terms used in the following description should not be construed as limiting the technical concept, but should be understood as examples of terms for illustrating embodiments.

[0040] In addition, in specific cases, the terms may be arbitrarily selected by the applicant, and in such cases, their detailed meanings will be described in the corresponding description paragraphs. Therefore, the terms used in the following description should be understood not only based on the name of the terms, but also based on the meaning of the terms and the content throughout the specific embodiments.

[0041] In the description of the signal flow, for example, when a signal is delivered from node A to node B, this may include the case where the signal is transmitted from node A to node B via another node, unless the phrase "immediately transmitted" or "directly transmitted" is used.

[0042] Hereinafter, a display device according to some embodiments will be described.

[0043] Figure 1 is a schematic perspective view of a display device according to an embodiment of the present disclosure. Figure 2 is a plan view schematically showing a part of a display device according to an embodiment of the present disclosure. Figure 3 is Figure 2 an enlarged plan view of region 3 in

[0044] Referring to Figures 1 to 3, the display device 10 according to an embodiment of the present disclosure may include a display panel 15 having a display area AA and a non-display area NAA positioned outside the display area AA.

[0045] The display area AA may be an area for displaying an image, and the non-display area NAA may be an area for not displaying an image. The non-display area NAA may include an upper edge area, a lower edge area, a left edge area, and a right edge area of the display panel 15. The non-display area NAA may be positioned outside the display area AA. However, embodiments of the present disclosure are not limited thereto. For example, the remaining area in the display area AA except for the light-emitting area that emits light to the outside may be included as the non-display area NAA.

[0046] A flexible printed circuit board 17 and a printed circuit board 20 may be provided on at least one side edge of the non-display area NAA. An integrated circuit chip 19 may be provided on the flexible printed circuit board 17. One side of the flexible printed circuit board 17 may be coupled to the first substrate 100, and the other side thereof may be coupled to the printed circuit board 20 to supply power and signals for driving the light-emitting elements supplied from the printed circuit board 20 to the display area AA of the first substrate 100. For example, the signals for driving the light-emitting elements may include a high-potential voltage, a low-potential voltage, a scan signal, a data signal, a touch detection signal, etc.

[0047] The printed circuit board 20 may supply signals to the integrated circuit chip 19 provided on the flexible printed circuit board 17. Various components for supplying various signals to the integrated circuit chip 19 may be provided on the printed circuit board 20. Figure 1 It is shown that there is a single flexible printed circuit board 17 and a single printed circuit board 20, but the present disclosure is not limited thereto. For example, a plurality of flexible printed circuit boards 17 and a plurality of printed circuit boards 20 may be provided on the edge at one side of the first substrate 100.

[0048] The pad 18 may be positioned on the non-display area NAA of the first substrate 100 and may include a plurality of electrode pads. The flexible printed circuit board 17 equipped with the integrated circuit chip 19 may be attached to the pad 18. In one example, the flexible printed circuit board 17 and the pad 18 may be attached to each other using an anisotropic conductive film. The electrode pads included in the pad 18 may include a plurality of power supply pads, a plurality of data supply pads, a control signal supply pad, a plurality of common power supply pads, etc., for transmitting the power and various signals for driving the light-emitting elements supplied from the printed circuit board 20 to the display area AA.

[0049] The display panel 15 includes a first substrate 100 and a second substrate 300. The first substrate 100 may include transparent plastic or glass. The second substrate 300 may include a transparent plastic film, a glass substrate, or a packaging film. The first substrate 100 or the second substrate 300 may have a square shape, or may have a square shape in which each corner has a circular shape when viewed from a plane. The second substrate 300 may be referred to as a cover window, a window cover, or a cover glass that covers the first substrate 100.

[0050] A plurality of pixels PX may be arranged on the display area AA of the first substrate 100. An image may be displayed in the display area AA via the plurality of pixels PX. In the non-display area NAA, several drivers may be provided to drive the plurality of pixels PX arranged on the display area AA. For example, the drivers may include a gate driver, a data driver, a touch driver, and a timing controller. However, embodiments of the present disclosure are not limited thereto.

[0051] Referring to Figure 3 and Figure 2 , a plurality of data lines DL and a plurality of scan lines SL may be provided on the display area AA. Each of the plurality of data lines DL may be provided to cross each of the plurality of scan lines SL. The pixel PX may be defined by one data line DL and one scan line SL that cross each other. The pixel PX may include a plurality of sub-pixels SP1, SP2, and SP3 that emit light of different colors. Each of the plurality of sub-pixels SP1, SP2, and SP3 may be electrically connected to the scan line SL and the data line DL.

[0052] The plurality of sub-pixels SP1, SP2, and SP3 may be arranged on the display area AA of the first substrate 100, and may be arranged in a matrix along a first direction of the first substrate 100 and a second direction that crosses the first direction. The first direction may be the X-axis direction or the horizontal direction, and the second direction may be the Y-axis direction or the vertical direction. However, the present disclosure is not limited thereto, and the arrangement order and direction of the sub-pixels SP1, SP2, and SP3 may be changed in various ways.

[0053] The sub-pixels SP1, SP2, and SP3 may include light-emitting elements, and may emit red light, green light, or blue light, respectively. A plurality of light-emitting areas EA may be correspondingly positioned by the light-emitting elements provided in the sub-pixels SP1, SP2, and SP3, respectively. The plurality of light-emitting areas EA may include: a first light-emitting area EA1 positioned in the first sub-pixel SP1, a second light-emitting area EA2 positioned in the second sub-pixel SP2, and a third light-emitting area EA3 positioned in the third sub-pixel SP3.

[0054] A plurality of first electrodes 130 are provided corresponding to a plurality of sub-pixels SP1, SP2, and SP3. The plurality of first electrodes 130 may be provided to be spaced apart from each other.

[0055] Each of the plurality of light-emitting regions EA1, EA2, and EA3 may be defined by a bank hole 135H defined in a diode-type bank 135. Corresponding portions of the plurality of first electrodes 130 that are not covered by the diode-type bank 135 and are exposed by the bank hole 135H may be the light-emitting regions EA1, EA2, and EA3. The remaining regions except for the light-emitting regions EA1, EA2, and EA3 may be non-light-emitting regions. The diode-type bank 135 may be provided to overlap with the non-light-emitting regions.

[0056] The first electrode 130 provided in each of the plurality of sub-pixels SP1, SP2, and SP3 may be connected to at least one transistor provided on the first substrate 100 via each contact region CA. The contact region CA may include a contact electrode that electrically connects the first electrode 130 to the transistor. This will be described with reference to Figure 4 to be described.

[0057] The display device according to an embodiment of the present disclosure may adopt one of a top emission scheme and a bottom emission scheme according to the direction of light emission from the light-emitting layer. Hereinafter, the top emission scheme will be described as an example.

[0058] Figure 4 is a cross-sectional view taken along line 4-4 in Figure 3 . In addition, Figure 5 is Figure 4 an enlarged cross-sectional view of region 5 in

[0059] Referring to Figure 4 and Figure 5 , a transistor TR may be provided on the first substrate 100. The first substrate 100 may include a silicon wafer. In one embodiment, the first substrate 100 may include glass or plastic.

[0060] The first substrate 100 may have a driver circuit including various signal lines, transistors, capacitors, etc. for each of the sub-pixels SP1, SP2, and SP3. The signal lines may include gate wirings, data wirings, power wirings, and reference wirings, and the transistor TR may include a switching transistor and a driving transistor. For example, the switching transistor and the driving transistor may be formed on the first substrate 100 using a complementary metal oxide semiconductor (CMOS) process.

[0061] The switching transistor switches in response to a gate signal supplied to the gate wiring, supplies a data voltage supplied from the data wiring to the driving transistor, and selects sub-pixels SP1, SP2, and SP3. The driving transistor drives the light-emitting element by supplying power to the first electrodes of the sub-pixels SP1, SP2, and SP3 selected by the switching transistor.

[0062] A capacitor can be used to hold the data voltage supplied to the driving transistor within one frame, and the electrodes of the capacitor can be electrically connected to the driving transistor.

[0063] The transistor TR may include an active semiconductor layer 103, a gate insulating layer 105, a gate electrode 107, and source / drain electrodes 115. The gate insulating layer 105 may be disposed between the active semiconductor layer 103 and the gate electrode 107. An insulating layer that reduces or prevents the penetration of moisture or impurities may also be included between the first substrate 100 and the active semiconductor layer 103.

[0064] The active semiconductor layer 103 may be made of an oxide semiconductor or a silicon-based semiconductor material. For example, the active semiconductor layer 103 may include a transparent oxide semiconductor material such as indium gallium zinc oxide (IGZO) or indium zinc oxide (IZO). In addition, the active semiconductor layer 103 may include a polysilicon semiconductor material.

[0065] The active semiconductor layer 103 may include a channel region 103a, a source region 103b, and a drain region 103c. The gate insulating layer 105 may include a single layer or multiple layers of silicon oxide (SiOx) or silicon nitride (SiNx).

[0066] The gate electrode 107 may be disposed on the gate insulating layer 105. The region of the active semiconductor layer 103 that overlaps the gate electrode 107 in the vertical direction may be the channel region 103a. The source region 103b and the drain region 103c may be located on both sides of the channel region 103a.

[0067] An interlayer insulating layer 109 and a passivation layer 111 may be sequentially disposed on the gate electrode 107.

[0068] The interlayer insulating layer 109 and the source / drain electrodes 115 that fill the contact holes 113 extending through the gate insulating layer 105 may be sequentially disposed on the gate electrode 107. The source / drain electrodes 115 may be respectively connected to the source region 103b and the drain region 103c of the active semiconductor layer 103.

[0069] A planarization layer 125 may be provided on the passivation layer 111 and the source / drain electrodes 115. The planarization layer 125 may include a first planarization layer 120 and a second planarization layer 123. The planarization layer 125 is used to planarize the steps generated by the lower circuit elements including the transistor (e.g., the driving transistor) TR.

[0070] The planarization layer 125 may include a pixel contact hole 127 that extends through the first planarization layer 120 and the second planarization layer 123 and exposes a part of the surface of the source / drain electrode 115 of the transistor TR. A pixel contact electrode 129 may fill the pixel contact hole 127, and one surface thereof is in contact with the source / drain electrode 115.

[0071] A first electrode 130 may be provided on the second planarization layer 123. The first electrode 130 may include a transparent conductive oxide (TCO), such as indium tin oxide (ITO) or indium zinc oxide (IZO). Alternatively, the first electrode 130 may have a single-layer or multi-layer structure including a reflective metal film made of silver (Ag), aluminum (Al), gold (Au), nickel (Ni), chromium (Cr), and their compounds. The first electrode 130 may also be referred to as an anode electrode or a pixel electrode.

[0072] A bank that separates adjacent sub-pixels SP1, SP2, and SP3 from each other may be provided on the second planarization layer 123. The bank according to the present disclosure may be a diode-type bank 135. The diode-type bank 135 may be formed to cover the edge of the first electrode 130. In the diode-type bank 135, light-emitting regions EA1, EA2, and EA3 may be realized via bank holes 135H that are openings.

[0073] Referring to Figure 5 , the diode-type bank 135 may include a structure in which a first semiconductor layer 135a and a second semiconductor layer 135b are joined together. The first semiconductor layer 135a and the second semiconductor layer 135b of the diode-type bank 135 may include amorphous silicon. The interior of single-crystalline silicon or polycrystalline silicon has regularly arranged atoms. In contrast, the interior of amorphous silicon has irregularly arranged atoms, and thus, has a larger light absorption coefficient than that of single-crystalline silicon or polycrystalline silicon. Therefore, amorphous silicon may have an opaque property. The diode-type bank 135 according to the present disclosure may have a lower density than that of polycrystalline silicon or single-crystalline silicon. Due to the increased internal light scattering effect, the diode-type bank 135 having a low density may have a light transmittance of less than 5%. Therefore, the diode-type bank 135 can prevent light of different colors from mixing with each other and being output between adjacent sub-pixels.

[0074] The first semiconductor layer 135a of the diode-type bank 135 may include amorphous silicon doped with impurities of a first conductivity type, and the second semiconductor layer 135b may include amorphous silicon doped with impurities of a second conductivity type. The impurities of the first conductivity type and the impurities of the second conductivity type may be impurities of different conductivity types. For example, the impurities of the first conductivity type may include n-type impurities such as phosphorus (P), arsenic (As), or antimony (Sb). The impurities of the second conductivity type may include p-type impurities such as boron (B), aluminum (Al), gallium (Ga), or indium (In).

[0075] Since the diode-type bank 135 has a structure in which the first semiconductor layer 135a and the second semiconductor layer 135b are joined together, a depletion region where no current flows can be realized at the interface where the first semiconductor layer 135a and the second semiconductor layer 135b are joined together. Since no current flows in the depletion region, the depletion region can act like an insulating material. This will be described later via Figure 7 and Figure 8 description.

[0076] The organic light-emitting layer 150 may be disposed on the first electrode 130. In one example, the organic light-emitting layer 150 may include an organic material that emits white light.

[0077] The organic light-emitting layer 150 may include a stacked structure including a hole transport layer (HTL), an emission material layer (EML), an electron transport layer (ETL), a hole blocking layer (HBL), a hole injection layer (HIL), an electron blocking layer (EBL), and an electron injection layer (EIL). In one example, the organic light-emitting layer 150 may have a multi-layer stacked structure in which at least two layers of the stacked structure are stacked. However, embodiments of the present disclosure are not limited thereto.

[0078] The organic light-emitting layer 150 may be disposed on the front surface of the first substrate 100. Therefore, the organic light-emitting layer 150 may have a shape that continuously extends along the shape of the diode-type bank 135.

[0079] The second electrode 160 may be disposed on the organic light-emitting layer 150. The second electrode 160 may be a common layer commonly formed on the plurality of sub-pixels SP1, SP2, and SP3. The second electrode 160 may be referred to as a cathode electrode or a common electrode. The second electrode 160 may include a transmissive material or a semi-transmissive material. When the second electrode 160 is transmissive, the second electrode 160 may include a transparent conductive oxide (TCO). For example, the second electrode 160 may include indium tin oxide (ITO) or indium zinc oxide (IZO). When the second electrode 160 is semi-transmissive, the second electrode 160 may include a metal material such as magnesium (Mg), silver (Ag), or an alloy of magnesium (Mg) and silver (Ag).

[0080] The light-emitting element 170 may include a first electrode 130, an organic light-emitting layer 150, and a second electrode 160. A display device according to an embodiment of the present disclosure may include an organic light-emitting element having an ultra-high resolution. The organic light-emitting element having an ultra-high resolution may be an organic light-emitting element formed on a first substrate 100 including a silicon wafer (organic light-emitting diode on silicon; OLEDos).

[0081] The first electrode 130 may supply holes to the organic light-emitting layer 150, and the second electrode 160 may supply electrons to the organic light-emitting layer 150. When a voltage is applied based on a signal transmitted from a driver, light generated by the recombination of holes supplied from the first electrode 130 to the organic light-emitting layer 150 and electrons supplied from the second electrode 160 to the organic light-emitting layer 150 may be emitted. The light extraction efficiency of the light generated from the organic light-emitting layer 150 may be improved by a microcavity phenomenon. For example, the light generated from the organic light-emitting layer 150 is reflected between the first electrode 130 and the second electrode 160, and a microcavity phenomenon occurs via constructive interference, thereby improving the light extraction efficiency.

[0082] An encapsulation part 190 may be provided on the second electrode 160. The encapsulation part 190 may prevent moisture or oxygen from penetrating into the underlying light-emitting element 170 and transistor TR. The encapsulation part 190 may be a multi-layer structure of an inorganic insulating layer and an organic insulating layer. For example, the encapsulation part 190 may include a first encapsulation layer 181, a second encapsulation layer 183, and a third encapsulation layer 185. Each of the first encapsulation layer 181 and the third encapsulation layer 185 may include an inorganic insulating material. For example, the inorganic insulating material may be selected from silicon nitride, aluminum nitride, zirconium nitride, titanium nitride, hafnium nitride, tantalum nitride, silicon oxide, aluminum oxide, titanium oxide, etc. The second encapsulation layer 183 may flatten the steps generated by the light-emitting element 170 and the diode-type dam 135, and may prevent foreign substances from penetrating into the light-emitting element 170. The second encapsulation layer 183 may include an organic insulating material.

[0083] A color filter 210 may be provided on the third encapsulation layer 185. The color filter 210 may be provided to correspond to each of the plurality of sub-pixels SP1, SP2, and SP3. The color filter 210 may include a first color filter 210a, a second color filter 210b, and a third color filter 210c. The first color filter 210a of the first color may be positioned corresponding to the first sub-pixel SP1, the second color filter 210b of the second color may be positioned corresponding to the second sub-pixel SP2, and the third color filter 210c of the third color may be positioned corresponding to the third sub-pixel SP3. The first color may be red, the second color may be green, and the third color may be blue. However, embodiments of the present disclosure are not limited thereto.

[0084] A black matrix 200 may be provided at a boundary between adjacent color filters 210a, 210b, and 210c. However, embodiments of the present disclosure are not limited thereto.

[0085] On the color filter 210, Figure 1 the second substrate 300 in

[0086] Figure 6 is an enlarged cross-sectional view of a sub-pixel according to a comparative example. For ease of description, components redundant to the components in Figure 5 are denoted by the same reference numerals in Figure 6 the same.

[0087] Referring to Figure 6 , in the comparative example, a bank BK containing an insulating material may be provided at an edge of the first electrode 130. The bank BK containing the insulating material may prevent defects such as non-light emission or brightness reduction caused by an electrical short circuit due to a thin deposition of the organic light-emitting layer 150 at the edge of the first electrode 130. For example, the insulating material constituting the bank BK may be an organic insulating material including an acrylic material or a black resin. However, in a display device for achieving ultra-high resolution, the organic insulating material lacks resolution, making it difficult to precisely pattern the bank BK that separates the sub-pixels from each other. Therefore, an inorganic insulating material is applied to the bank BK in a display device for achieving ultra-high resolution. For example, the inorganic insulating material may include transparent silicon nitride (SiNx) or silicon oxide (SiOx).

[0088] A sub-pixel includes a light-emitting region EA defined by a bank hole BKH defined in a bank BK and a non-light-emitting region NEA where light is blocked by the bank BK. The light-emitting region EA may be a region where light generated by a light-emitting element 170 of a display device is emitted to the outside. The non-light-emitting region NEA may be a region that does not emit light to the outside. The non-light-emitting region NEA may extend from the light-emitting region EA and include an edge of the first electrode 130 covered by the bank BK.

[0089] The light emitted from the light-emitting region EA to the outside may be referred to as first emitted light La. Among the corresponding plurality of sub-pixels, first emitted lights La of different colors may be emitted to the outside. In the non-light-emitting region NEA, since it is covered by the bank BK, light should not be emitted to the outside. However, according to a comparative example in which the bank BK is made of a transparent insulating material, second emitted light Lb may be emitted to the outside in the non-light-emitting region NEA.

[0090] For example, when a leakage current occurs at an edge of the first electrode 130 in the non-light-emitting region NEA, since the bank BK is made of a transparent inorganic insulating material, the light that has passed through the bank BK may be reflected by the second electrode 160 to generate reflected light, and the reflected light may become the second emitted light Lb emitted to the outside.

[0091] Due to the arrangement of the bank BK, the non-light-emitting region NEA has a cell gap different from that of the light-emitting region EA. The cell gap may be the distance between the first electrode 130 and the second electrode 160. For example, the light-emitting region EA may have a first cell gap Ga with a first distance between the first electrode 130 and the second electrode 160. Since the bank BK is disposed between the first electrode 130 and the second electrode 160, the non-light-emitting region NEA may have a second cell gap Gb having a second distance relatively greater than the cell gap of the light-emitting region EA.

[0092] Since the light-emitting region EA and the non-light-emitting region NEA have the first cell gap Ga and the second cell gap Gb with different distances respectively, first emitted light La and second emitted light Lb having different wavelengths are emitted to the outside. Since the second emitted light Lb is emitted through the bank BK made of a transparent material, the second emitted light Lb may have an intensity that may cause an interference effect on the color of the first emitted light La.

[0093] Since both first emitted light La and second emitted light Lb having different wavelengths are emitted from one sub-pixel, the color coordinates of the color to be realized may be deviated, which may lead to color gamut deterioration. The color gamut, which is the range of colors that can be presented in a display device, may be referred to as color expression or color region.

[0094] For example, a sub-pixel that emits light of a first color should emit light having a peak wavelength corresponding to the first color in the light-emitting region EA. The peak wavelength may refer to the wavelength having the maximum intensity within the wavelength region. However, when both a first emitted light La and a second emitted light Lb having different wavelengths are emitted from one sub-pixel, not only the intensity of the peak wavelength increases, but also the intensity of the sub-peak wavelength increases, causing interference when realizing the first color, such that the color gamut may deteriorate.

[0095] Regarding such a problem, a display device according to an embodiment of the present disclosure can prevent color gamut deterioration by implementing the bank as a diode-type bank 135. Hereinafter, reference will be made to Figure 7 and Figure 8 describe this.

[0096] Figures 7 to 9 is a diagram showing the operation of a light-emitting element in which a diode-type bank is provided according to an embodiment of the present disclosure. For ease of description, Figures 7 to 9 will be described as Figure 4 an enlarged view of region 5 in Figure 7 shows a state in which no driving voltage is applied to the light-emitting element in which the diode-type bank is provided. Figure 8 shows a state in which a driving voltage is applied to the light-emitting element in which the diode-type bank is provided. In addition, Figure 8 shows the emitted light of the light-emitting element to which the driving voltage is applied.

[0097] Referring to Figures 7 to 9 , the diode-type bank 135 according to an embodiment of the present disclosure may be a structure in which a first semiconductor layer 135a and a second semiconductor layer 135b are joined together. In the diode-type bank 135, the first semiconductor layer 135a may be positioned at the lower side, and the second semiconductor layer 135b may be provided on the first semiconductor layer 135a. The first semiconductor layer 135a may include amorphous silicon containing impurities of a first conductivity type, and the second semiconductor layer 135b may include amorphous silicon containing impurities of a second conductivity type. The impurities of the first conductivity type may include n-type impurities, and the impurities of the second conductivity type may include p-type impurities.

[0098] As Figure 7As shown, when a driving voltage for driving the light-emitting element 170 is not applied, a first depletion region D1 having a first width can be generated in a boundary region where the first semiconductor layer 135a and the second semiconductor layer 135b are joined together in the diode-type bank 135. In the first depletion region D1, ions having (+) charges are provided in the first semiconductor layer 135a, and ions having (-) charges are provided in the second semiconductor layer 135b, thereby generating a region where no current flows. In addition, ions having (-) charges are included as majority carriers in the first semiconductor layer 135a except for the first depletion region D1, and ions having (+) charges are included as majority carriers in the second semiconductor layer 135b except for the first depletion region D1.

[0099] As Figure 8 shown, when a driving voltage for driving the light-emitting element 170 is applied, the first electrode 130 can supply holes to the organic light-emitting layer 150, and the second electrode 160 can supply electrons to the organic light-emitting layer 150. For example, a positive (+) voltage can be applied to the first electrode 130, and a negative (-) voltage can be applied to the second electrode 160.

[0100] When a driving voltage for driving the light-emitting element 170 is applied, a reverse voltage can be applied to the diode-type bank 135 that is provided to overlap the edge of the first electrode 130 and cover the edge of the first electrode 130. The state of applying a reverse voltage to the diode-type bank 135 can be a state of applying a (+) voltage to the first semiconductor layer 135a containing an n-type impurity and applying a (-) voltage to the second semiconductor layer 135b containing a p-type impurity.

[0101] When a reverse voltage is applied to the diode-type bank 135, ions having (-) charges, which are majority carriers included in the first semiconductor layer 135a, can be attracted by the (+) voltage applied to the first electrode 130, and ions having (+) charges, which are majority carriers included in the second semiconductor layer 135b, can be attracted by the (-) voltage applied to the second electrode 160. Then, a second depletion region D2 having a second width greater than the first width of the first depletion region D1 can be generated. Therefore, the region where current does not flow and which acts like an insulating material increases, enabling the diode-type bank 135 to perform the function of an insulating film. In other words, the second depletion region D2 can have insulating properties such that the diode-type bank 135 can be used as an insulating material.

[0102] In addition, the diode-type bank 135 includes low-density amorphous silicon. Since amorphous silicon has a structure in which atoms are irregularly arranged inside, amorphous silicon has the lowest electron carrier mobility compared to single-crystalline silicon or polycrystalline silicon, so that when a reverse voltage is applied, its function as an insulating film can be further improved.

[0103] Since the diode type bank 135 includes low density amorphous silicon, the diode type bank 135 may have a light transmittance of less than 5%. Accordingly, light emitted from the light emitting element 170 can be prevented or reduced from passing through the diode type bank 135 and being emitted to the outside.

[0104] Specifically, referring to Figure 9 , the diode type bank 135 is disposed in the non-light emitting area NEA. The diode type bank 135 may include low density amorphous silicon. Since amorphous silicon has a structure in which atoms are irregularly arranged inside, the effect of light emitted from the light emitting element 170 being scattered inside the diode type bank 135 is increased, which can reduce the transmittance. Accordingly, when the first emitted light L having the peak wavelength of the first color is emitted to the outside in the light emitting area EA, in the non-light emitting area NEA, light emission to the outside can be prevented or reduced through the diode type bank 135.

[0105] For example, the non-light emitting area NEA and the light emitting area EA have cell gaps G1 and G2 with different distances. The light emitting area EA may have a first cell gap G1 of a first distance between the first electrode 130 and the second electrode 160, and the non-light emitting area NEA may have a second cell gap G2 that is relatively larger than the cell gap of the light emitting area EA due to the diode type bank 135.

[0106] The emitted light L of the first color may be emitted from the light emitting area EA having the first cell gap G1. In the non-light emitting area NEA having the second cell gap G2, reflected light having a wavelength different from the wavelength of the first color may occur. However, the reflected light can be prevented from being emitted to the outside by scattering and absorption inside the diode type bank 135, or the reflected light can be emitted to the outside with a transmittance of less than 5%. In addition, the reflected light emitted to the outside with a transmittance of less than 5% has an intensity significantly lower than the intensity that may interfere with the presentation of the first color, thereby preventing an interference effect from occurring when presenting the first color.

[0107] Accordingly, a sub-pixel can emit the emitted light L having the peak wavelength corresponding to the first color to the outside via the microcavity phenomenon, thereby improving the color gamut.

[0108] According to an embodiment of the present disclosure, since a diode type bank that can achieve excellent light blocking characteristics is included, the color gamut of the emitted light emitted from the light emitting element to the outside can be improved. Due to the improvement of the color gamut, the light emitting element can be driven with low power, thereby reducing production energy.

[0109] According to an embodiment of the present disclosure, since a diode type bank is included, problems that occur when using a bank including an organic or inorganic insulating material can be prevented.

[0110] According to an embodiment of the present disclosure, since a diode-type bank is included, deterioration of the color gamut of a display device caused by emitted light emitted from a non-light-emitting region can be prevented.

[0111] Note that although the present disclosure has been mainly described herein with an example in which a light-emitting element included in a display device is an organic light-emitting element, the present disclosure is not limited thereto, and those skilled in the art can use a suitable light-emitting element according to actual needs. In addition, although the specific structure of the diode-type bank has been described above with the example shown in the drawings, the structure of the diode-type bank is not limited to the above example, and those skilled in the art can select a suitable structure of the diode-type bank according to actual needs.

[0112] Figures 10 to 12 is a view of a head-mounted display device including a display device according to an embodiment of the present disclosure. Specifically, Figure 10 is a schematic perspective view of a head-mounted display device including a display device according to an embodiment of the present disclosure, and Figure 11 is a top view showing a head-mounted display device for realizing virtual reality. Figure 12 is a side view showing a head-mounted display device for realizing augmented reality.

[0113] Referring to Figure 10 , a head-mounted display device including a display device according to an embodiment of the present disclosure may include a housing 30 and a head mounting band 40.

[0114] The housing 30 may accommodate components such as a display device, a lens array, an eyepiece, a sound device, an accelerometer, and a position sensor therein. The head mounting band 40 is fixed to the housing 30. The head mounting band 40 is shown as being formed to surround the upper surface and two opposite side surfaces of the user's head. However, embodiments of the present disclosure are not limited thereto. The head mounting band 40 is used to fix the head-mounted display device to the user's head. In another example, the head mounting band 40 may be implemented as a helmet-shaped structure or a spectacle frame that completely surrounds the user's head.

[0115] The head-mounted display device may include a display device according to an embodiment of the present disclosure as described in Figure 4 , and may provide an image for realizing virtual reality (VR) or an image for realizing augmented reality (AR) to the user.

[0116] Referring to Figure 11, A head-mounted display device for implementing virtual reality may include a display device 31 for the left eye, a display device 32 for the right eye, a lens array 33, and a left-eye eyepiece 35a and a right-eye eyepiece 35b. The display device 31 for the left eye, the display device 32 for the right eye, the lens array 33, and the left-eye eyepiece 35a and the right-eye eyepiece 35b may be accommodated in a housing 30.

[0117] The display device 31 for the left eye and the display device 32 for the right eye may display the same image. When the display device 31 for the left eye and the display device 32 for the right eye display the same image, the user may view a 2D image through the head-mounted display device. Alternatively, the display device 31 for the left eye may display an image for the left eye, and the display device 32 for the right eye may display an image for the right eye that is different from the image for the left eye. In this case, the user may view a three-dimensional image through the head-mounted display device. Each of the display device 31 for the left eye and the display device 32 for the right eye may include a display device according to Figure 4 as described above.

[0118] One of the lens arrays 33 may be spaced apart from each of the left-eye eyepiece 35a and the display device 31 for the left eye, and may be disposed between the left-eye eyepiece 35a and the display device 31 for the left eye. That is, one of the lens arrays 33 may be positioned in front of the left-eye eyepiece 35a and behind the display device 31 for the left eye. In addition, the other of the lens arrays 33 may be spaced apart from each of the right-eye eyepiece 35b and the display device 32 for the right eye, and may be disposed between the right-eye eyepiece 35b and the display device 32 for the right eye. That is, the other of the lens arrays 33 may be positioned in front of the right-eye eyepiece 35b and behind the display device 32 for the right eye.

[0119] The lens array 33 may include, but is not limited to, a microlens array. In one example, the lens array 33 may include a pinhole array. Due to the lens array 33, the image displayed by the display device 31 for the left eye or the display device 32 for the right eye may be visible to the user in a magnified manner. The user's left eye LE may be positioned behind the left-eye eyepiece 35a, and the user's right eye RE may be positioned behind the right-eye eyepiece 35b.

[0120] Referring to Figure 12 , A head-mounted display device for implementing augmented reality includes a display device 31 for the left eye, a lens array 33, a left-eye eyepiece 35a, a transmissive and reflective portion 36, and a transmissive window 37. For ease of explanation, Figure 12 only the configuration related to the left eye is shown, and the configuration related to the right eye is the same as or similar to the configuration related to the left eye.

[0121] The display device 31 for the left eye, the lens array 33, the left-eye eyepiece 35a, the transmission and reflection part 36, and the transmission window 37 are accommodated in the housing 30 (see Figure 10 ). The display device 31 for the left eye may be disposed on one side of the transmission and reflection part 36, for example, on its upper side, such that the display device 31 for the left eye does not block the transmission window 37. Accordingly, the display device 31 for the left eye can provide an image to the transmission and reflection part 36 without blocking the external background visible through the transmission window 37.

[0122] The display device 31 for the left eye may include a display device according to an embodiment of the present disclosure as Figure 4 shown. The lens array 33 may be disposed between the left-eye eyepiece 35a and the transmission and reflection part 36. The user's left eye may be positioned behind the left-eye eyepiece 35a.

[0123] The transmission and reflection part 36 is disposed between the lens array 33 and the transmission window 37. The transmission and reflection part 36 may include a transmission and reflection surface 36a that transmits a part of light therethrough and reflects another part of light therefrom. The transmission and reflection surface 36a includes a semi-transmissive metal film. For example, the semi-transmissive metal film may be made of a semi-transmissive metal material such as magnesium (Mg), silver (Ag), or an alloy of magnesium (Mg) and silver (Ag). The transmission and reflection surface 36a may be formed such that an image displayed by the display device 31 for the left eye can be guided to the lens array 33.

[0124] Accordingly, the user can view both the external background visible through the transmission window 37 and the image displayed by the display device 31 for the left eye. In other words, the user can view both the real background and the virtual image as one image in an overlapping manner. Accordingly, augmented reality can be achieved.

[0125] A display device according to an embodiment of the present disclosure includes: a substrate including a light-emitting region and a non-light-emitting region; a diode-type bank positioned on the non-light-emitting region and separating a plurality of sub-pixels from each other; a light-emitting element disposed in each of the plurality of sub-pixels; and a packaging part disposed on the light-emitting element.

[0126] In a display device according to some embodiments of the present disclosure, the diode-type bank may include an opaque semiconductor material.

[0127] In a display device according to some embodiments of the present disclosure, the diode-type bank may include a first semiconductor layer and a second semiconductor layer disposed on the first semiconductor layer.

[0128] In a display device according to some embodiments of the present disclosure, the first semiconductor layer may include amorphous silicon doped with impurities of a first conductivity type, the second semiconductor layer may include amorphous silicon doped with impurities of a second conductivity type, and the impurities of the first conductivity type and the impurities of the second conductivity type may have different conductivity types.

[0129] In a display device according to some embodiments of the present disclosure, the impurities of the first conductivity type may include n-type impurities, the n-type impurities including phosphorus (P), arsenic (As), or antimony (Sb), and the impurities of the second conductivity type may include p-type impurities, the p-type impurities including boron (B), aluminum (Al), gallium (Ga), or indium (In).

[0130] In a display device according to some embodiments of the present disclosure, each of the first semiconductor layer and the second semiconductor layer may have a density lower than that of polycrystalline silicon or single-crystalline silicon.

[0131] In a display device according to some embodiments of the present disclosure, the first semiconductor layer and the second semiconductor layer may have a light transmittance of less than 5%.

[0132] In a display device according to some embodiments of the present disclosure, the light-emitting element may include: a first electrode that overlaps with a light-emitting region and has an edge covered by a diode-type bank; an organic light-emitting layer disposed on the first electrode; and a second electrode disposed on the organic light-emitting layer.

[0133] In a display device according to some embodiments of the present disclosure, the diode-type bank may include: a first semiconductor layer having a portion overlapping with the edge of the first electrode, wherein the first semiconductor layer is doped with impurities of a first conductivity type; a second semiconductor layer disposed on the first semiconductor layer and doped with impurities of a second conductivity type different from the impurities of the first conductivity type; and a first depletion region having a first width, the first depletion region being disposed in a boundary region between the first semiconductor layer and the second semiconductor layer.

[0134] In a display device according to some embodiments of the present disclosure, the impurities of the first conductivity type may include n-type impurities, and the impurities of the second conductivity type may include p-type impurities.

[0135] In a display device according to some embodiments of the present disclosure, the diode-type bank may be disposed between a first electrode receiving a positive (+) voltage and a second electrode receiving a negative (-) voltage, wherein the diode-type bank includes a second depletion region between the first semiconductor layer and the second semiconductor layer, the second depletion region having a second width greater than the first width of the first depletion region, and wherein no current flows in the second depletion region.

[0136] A head-mounted display device according to an embodiment of the present disclosure includes: a display device; a housing for accommodating the display device therein; and a lens array disposed at one side of the housing and displaying an image output from the display device, and the display device includes: a substrate including a light-emitting region and a non-light-emitting region; a diode-type bank positioned on the non-light-emitting region and separating a plurality of sub-pixels from each other; a light-emitting element disposed in each of the plurality of sub-pixels; and a packaging portion disposed on the light-emitting element.

[0137] In a head-mounted display device according to some embodiments of the present disclosure, the diode-type bank may include a first semiconductor layer and a second semiconductor layer disposed on the first semiconductor layer.

[0138] In a head-mounted display device according to some embodiments of the present disclosure, the first semiconductor layer may include amorphous silicon doped with impurities of a first conductivity type, the second semiconductor layer may include amorphous silicon doped with impurities of a second conductivity type, and the impurities of the first conductivity type and the impurities of the second conductivity type may have different conductivity types.

[0139] In a head-mounted display device according to some embodiments of the present disclosure, the impurities of the first conductivity type may include n-type impurities including phosphorus (P), arsenic (As), or antimony (Sb), and the impurities of the second conductivity type may include p-type impurities including boron (B), aluminum (Al), gallium (Ga), or indium (In).

[0140] In a head-mounted display device according to some embodiments of the present disclosure, the diode-type bank may further include a first depletion region having a first width disposed in a boundary region between the first semiconductor layer and the second semiconductor layer.

[0141] Although embodiments of the present disclosure have been described with reference to the accompanying drawings, the present disclosure is not limited to the above embodiments and may be implemented in various different forms. Those skilled in the art will understand that the present disclosure may be implemented in other specific forms without changing the technical spirit or essential features of the present disclosure. Therefore, it should be understood that the embodiments described above are illustrative in all respects and not restrictive.

Claims

1. A display device, comprising: a substrate including a light-emitting region and a non-light-emitting region; a diode-type bank positioned on the non-light-emitting region and configured to separate a plurality of sub-pixels from each other; a light-emitting element provided in each of the plurality of sub-pixels; and a packaging portion provided on the light-emitting element.

2. The display device according to claim 1, wherein, The diode-type bank contains an opaque semiconductor material.

3. The display device according to claim 1, wherein, The diode-type bank includes a first semiconductor layer and a second semiconductor layer provided on the first semiconductor layer.

4. The display device according to claim 3, wherein, The first semiconductor layer contains amorphous silicon doped with impurities of a first conductivity type, and the second semiconductor layer contains amorphous silicon doped with impurities of a second conductivity type, wherein the impurities of the first conductivity type and the impurities of the second conductivity type have different conductivity types.

5. The display device according to claim 4, wherein, The impurities of the first conductivity type include n-type impurities, and the n-type impurities include phosphorus P, arsenic As, or antimony Sb, wherein the impurities of the second conductivity type include p-type impurities, and the p-type impurities include boron B, aluminum Al, gallium Ga, or indium In.

6. The display device according to claim 4, wherein, Each of the first semiconductor layer and the second semiconductor layer has a density lower than that of polycrystalline silicon or single-crystalline silicon.

7. The display device according to claim 4, wherein, Each of the first semiconductor layer and the second semiconductor layer has a light transmittance of less than 5%.

8. The display device according to claim 1, wherein, The light-emitting element includes: a first electrode overlapping with the light-emitting region and having an edge covered by the diode-type bank; an organic light-emitting layer provided on the first electrode; and a second electrode provided on the organic light-emitting layer.

9. The display device according to claim 8, wherein, The diode-type bank includes: a first semiconductor layer having a portion overlapping with the edge of the first electrode, wherein the first semiconductor layer is doped with impurities of a first conductivity type; a second semiconductor layer provided on the first semiconductor layer and doped with impurities of a second conductivity type different from the impurities of the first conductivity type; and a first depletion region having a first width provided in a boundary region between the first semiconductor layer and the second semiconductor layer.

10. The display device according to claim 9, wherein, The impurities of the first conductivity type include n-type impurities, and the impurities of the second conductivity type include p-type impurities.

11. The display device according to claim 9, wherein, The diode-type bank is provided between the first electrode receiving a positive voltage and the second electrode receiving a negative voltage, wherein, when the first electrode is applied with a positive voltage and the second electrode is applied with a negative voltage, the diode-type bank includes a second depletion region between the first semiconductor layer and the second semiconductor layer, the second depletion region having a second width greater than the first width of the first depletion region, and wherein no current flows in the second depletion region.

12. A head-mounted display device, comprising: a display device; a housing for accommodating the display device in the housing; and a lens array provided on one side of the housing and configured to display an image output from the display device, wherein the display device includes: a substrate including a light-emitting region and a non-light-emitting region; a diode-type bank positioned on the non-light-emitting region and configured to separate a plurality of sub-pixels from each other; A light-emitting element disposed in each of the plurality of sub-pixels; and An encapsulation portion disposed on the light-emitting element.

13. The head-mounted display device according to claim 12, wherein, The diode-type bank includes a first semiconductor layer and a second semiconductor layer disposed on the first semiconductor layer.

14. The head-mounted display device according to claim 13, wherein, The first semiconductor layer contains amorphous silicon doped with impurities of a first conductivity type, and the second semiconductor layer contains amorphous silicon doped with impurities of a second conductivity type, wherein the impurities of the first conductivity type and the impurities of the second conductivity type have different conductivity types.

15. The head-mounted display device according to claim 14, wherein, The impurities of the first conductivity type include n-type impurities, and the n-type impurities include phosphorus P, arsenic As, or antimony Sb, wherein the impurities of the second conductivity type include p-type impurities, and the p-type impurities include boron B, aluminum Al, gallium Ga, or indium In.

16. The head-mounted display device according to claim 14, wherein, The diode-type bank further includes a first depletion region having a first width disposed in a boundary region between the first semiconductor layer and the second semiconductor layer.

17. A head-mounted display device, comprising: The display device according to any one of claims 2, 6 to 11; A housing for accommodating the display device in the housing; And A lens array disposed at one side of the housing and configured to display an image output from the display device.

Images