Display substrate, display panel and display device
By setting up a support structure in the display substrate, the problem of short-circuit traces under narrow frame design is solved, and clearer trace patterns and more stable signal transmission are achieved, supporting high-resolution and high-density signal transmission requirements.
Patent Information
- Application Number
- CN202510541684.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-04-27
- Publication Date
- 2025-07-22
AI Technical Summary
The problem of short circuit in traces caused by narrow frame design, especially in high-precision manufacturing processes in limited spaces. Small errors lead to deviations in the shape and position of organic materials in the organic groove, resulting in insufficient exposure and lack of insulating layers, resulting in short circuit risk.
A support structure is provided between the substrate and the organic packaging layer to reduce the breakage in the organic groove, ensure that the surface of the organic material is smooth and the light propagates evenly. Through the design of the support structure and the retaining wall structure, the wiring pattern formation is optimized to avoid the loss of the insulating layer.
It effectively reduces the risk of short circuit in the trace, improves the clarity and stability of the trace pattern, and ensures the reliability of signal transmission and the narrowing of the frame design.
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Figure CN120358903A_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to the field of display technology, and in particular to a display substrate, a display panel and a display device. Background Art
[0002] Organic Light Emitting Diode (OLED) and Quantum Dot Light Emitting Diode (QLED) are active light-emitting display devices with the advantages of self-luminescence, wide viewing angle, high contrast, low power consumption, extremely high response speed, thinness, bendability and low cost. With the continuous development of display technology, flexible display devices (Flexible Display) using OLED or QLED as light-emitting devices and thin film transistors (TFT) for signal control have become the mainstream products in the current display field.
[0003] With the development of display technology, consumers have higher and higher requirements for the display effects of display products, and narrow borders have become a new trend in the development of display products. However, the narrowing of the border will reduce the wiring space used for power supply or signal transmission, causing wiring short circuit problems. Summary of the invention
[0004] Embodiments of the present disclosure provide a display substrate, a display panel, and a display device to solve or alleviate the problem of wiring short circuits caused by narrow bezels in the prior art.
[0005] As a first aspect of an embodiment of the present disclosure, an embodiment of the present disclosure provides a display substrate, comprising a display area and a peripheral area surrounding the display area, the peripheral area comprising a frame area located on one side of the display area, the display substrate comprising: a substrate; a display structure layer located on one side of the substrate and at least located in the display area; an organic encapsulation layer located in the display area and the peripheral area, and located on a side of the display structure layer away from the substrate; a retaining wall structure located on the one side of the substrate and surrounding the display area, a portion of the retaining wall structure being located in the frame area and on a side of the organic encapsulation layer away from the display area; a supporting structure located between the substrate and the organic encapsulation layer and between the display area and the retaining wall structure, the orthographic projection of the supporting structure on the substrate being located within the orthographic projection of the organic encapsulation layer on the substrate.
[0006] Optionally, in a direction parallel to the substrate, a distance between the support structure and the retaining wall structure is smaller than a distance between the support structure and the display structure layer.
[0007] Optionally, the height of the support structure in the first direction is less than the height of the retaining wall structure in the first direction, where the first direction is perpendicular to the substrate.
[0008] Optionally, the support structure satisfies at least one of the following: the support structure includes a first support portion and a second support portion arranged in a stack; the support structure includes at least a first support portion and a second support portion, and the first support portion and the second support portion are arranged in sequence in the direction pointing from the display area to the retaining wall structure.
[0009] Optionally, the display structure layer includes a first flat layer, and the support structure is arranged on the same layer as the first flat layer.
[0010] Optionally, the display structure layer includes a first flat layer and a second flat layer, the support structure includes a first support portion and a second support portion arranged in a stack, the first support portion is arranged on the same layer as the first flat layer, and the second support portion is arranged on the same layer as the second flat layer.
[0011] Optionally, the display substrate further includes a touch structure layer on a side of the organic encapsulation layer away from the substrate, the touch structure layer includes a plurality of touch electrodes located in the display area and a plurality of touch traces located in the peripheral area, and the plurality of touch electrodes and the plurality of touch traces are connected; some line segments of the plurality of touch traces are located between the retaining wall structure and the display structure layer.
[0012] Optionally, each touch trace of the plurality of touch traces includes a double-layer structure, the double-layer structure includes a first metal layer and a second metal layer arranged in sequence, the first metal layer includes a first signal trace located in a first preset area, and the second metal layer includes a second signal trace located in the first preset area; the first signal trace and the second signal trace are alternately arranged with each other in the first preset area; alternatively, in the first preset area, a positive projection of the first signal trace on the substrate at least partially overlaps a positive projection of the second signal trace on the substrate; the border area includes a lower border, the first preset area is located in the lower border, and the first preset area is an area in the border area located between the display structure layer and the retaining wall structure.
[0013] Optionally, the first metal layer further includes a third signal trace located in a second preset area, the second metal layer further includes a fourth signal trace located in the second preset area, in the second preset area, a positive projection of the third signal trace on the substrate at least partially overlaps a positive projection of the fourth signal trace on the substrate, the second preset area is located in the lower border, and the second preset area is an area between the display area and the first preset area.
[0014] Optionally, a part of the touch traces located in the first preset area overlap with the support structure in the orthographic projection on the substrate.
[0015] Optionally, the lower border includes a bonding area. In the direction parallel to the substrate, the bonding area is located on the side of the retaining wall structure away from the support structure; the bonding area includes a middle area and end areas at both ends of the middle area. Power pins are provided in both the middle area and the end areas. The display substrate further includes a power line, and the power line is connected to the corresponding power pin.
[0016] Optionally, signal pins are further provided in the bonding area. The signal pins are located between adjacent power pins. The target signal traces are connected to the corresponding signal pins. The target signal traces include at least part of the first signal trace, the second signal trace, the third signal trace, and the fourth signal trace.
[0017] As a second aspect of the embodiments of the present disclosure, the embodiments of the present disclosure provide a display panel including the display substrate according to any one of the first aspect.
[0018] As a third aspect of the embodiments of the present disclosure, the embodiments of the present disclosure provide a display device including the display panel according to the second aspect.
[0019] The technical solution of the embodiments of the present disclosure provides a display substrate. The display substrate includes a substrate and a display structure layer, an organic encapsulation layer, and a retaining wall structure provided on the substrate. By providing a support structure between the substrate and the organic encapsulation layer and at a position between the display area and the retaining wall structure, the depth of this part is relatively reduced, the difference between the organic materials on both sides in the organic groove is reduced, the probability of irregularity and burrs of the organic materials at the edge of the organic groove during the IJP printing process is reduced, and reducing the difference helps the light to penetrate evenly during TSP exposure. And after the printing nozzle sprays the organic material solution, the surface of the deposited organic material is made smoother, the light propagates more evenly at the organic groove, and can be exposed more effectively, so that the photoresist is better cured to form a clearer trace pattern. This helps to maintain an appropriate distance between the traces, avoid the lack or incompleteness of the insulating layer between the traces caused by insufficient exposure, and thus reduce the risk of short circuit.
[0020] The above summary is only for the purpose of the specification and is not intended to be limiting in any way. In addition to the above-described illustrative aspects, embodiments, and features, further aspects, embodiments, and features of the present disclosure will be readily apparent by reference to the drawings and the following detailed description. Description of the Drawings
[0021] In the drawings, unless otherwise specified, the same reference numerals throughout the several views denote the same or similar components or elements. These drawings are not necessarily drawn to scale. It should be understood that these drawings depict only some embodiments in accordance with the present disclosure and should not be regarded as limiting the scope of the present disclosure.
[0022] Figure 1 is a schematic structural diagram of a display device;
[0023] Figure 2 is a schematic structural diagram of a display substrate
[0024] Figure 3 shows a schematic cross-sectional structure diagram of a display substrate in the related art;
[0025] Figure 4 shows a schematic cross-sectional structure diagram of a display substrate provided in this embodiment;
[0026] Figure 5 shows a schematic structural diagram of a support structure provided in this embodiment;
[0027] Figure 6 shows another schematic structural diagram of a support structure provided in this embodiment;
[0028] Figure 7 shows another schematic cross-sectional structure diagram of a display substrate provided in this embodiment;
[0029] Figure 8 shows yet another schematic cross-sectional structure diagram of a display substrate provided in this embodiment;
[0030] Figure 9 shows a schematic plan view of a display substrate provided in an embodiment of the present application;
[0031] Figure 10 shows an enlarged schematic view of a lower border of a display substrate provided in an embodiment of the present application.
[0032] Description of reference numerals:
[0033] Display area 100, peripheral area 101, border area 300, first border area 301, bonding area 200, substrate 401, display structure layer 402, organic encapsulation layer 403, barrier structure 404, support structure 405, first support portion 4051, second support portion 4052, circuit board 500, organic groove 600, first signal trace 701, second signal trace 702, third signal trace 703, fourth signal trace 704. Detailed Description
[0034] In the following text, only some exemplary embodiments are briefly described. As those skilled in the art can recognize, the described embodiments can be modified in various different ways without departing from the spirit or scope of the present disclosure, and different embodiments can be arbitrarily combined without conflict. Therefore, the accompanying drawings and the description are considered to be exemplary in nature rather than restrictive.
[0035] Unless the context otherwise requires, throughout the specification and claims, the term "comprising" is interpreted in an open, inclusive sense, i.e., "including, but not limited to". In the description of the specification, the terms "one embodiment", "some embodiments", "exemplary embodiments", "examples" or "some examples", etc., are intended to indicate that the specific features, structures, materials or characteristics related to the embodiment or example are included in at least one embodiment or example of the present disclosure. The schematic representations of the above terms do not necessarily refer to the same embodiment or example. In addition, the described specific features, structures, materials or characteristics can be included in any one or more embodiments or examples in any appropriate manner.
[0036] When describing some embodiments, the expressions "connected" and its derivatives may be used. For example, when describing some embodiments, the term "connected" may be used to indicate that two or more components have direct physical contact or electrical contact with each other. The embodiments disclosed herein are not necessarily limited to the content herein.
[0037] In this application, "parallel" means a state where the angle formed by two straight lines is more than -10° and less than 10°, and thus also includes a state where the angle is more than -5° and less than 5°. In addition, "perpendicular" means a state where the angle formed by two straight lines is more than 80° and less than 100°, and thus also includes an angle state of more than 85° and less than 95°.
[0038] Figure 1 It is a schematic structural diagram of a display device. As Figure 1As shown, the display device may include a timing controller, a data driver, a scan driver, a light-emitting driver, and a pixel array. The timing controller is respectively connected to the data driver, the scan driver, and the light-emitting driver. The data driver is respectively connected to a plurality of data signal lines (D1 to Dn). The scan driver is respectively connected to a plurality of scan signal lines (S1 to Sm). The light-emitting driver is respectively connected to a plurality of light-emitting signal lines (E1 to Eo). The pixel array may include a plurality of sub-pixels Pxij, where i and j may be natural numbers. At least one sub-pixel Pxij may include a circuit unit and a light-emitting device connected to the circuit unit. The circuit unit may include at least one scan signal line, at least one data signal line, at least one light-emitting signal line, and a pixel driving circuit. In an exemplary embodiment, the timing controller may provide a gray value and a control signal suitable for the specification of the data driver to the data driver, may provide a clock signal, a scan start signal, etc. suitable for the specification of the scan driver to the scan driver, and may provide a clock signal, an emission stop signal, etc. suitable for the specification of the light-emitting driver to the light-emitting driver. The data driver may use the gray value and the control signal received from the timing controller to generate data voltages to be provided to the data signal lines D1, D2, D3,..., and Dn. For example, the data driver may sample the gray value using a clock signal and apply the data voltage corresponding to the gray value to the data signal lines D1 to Dn in pixel row units, where n may be a natural number. The scan driver may generate scan signals to be provided to the scan signal lines S1, S2, S3,..., and Sm by receiving a clock signal, a scan start signal, etc. from the timing controller. For example, the scan driver may sequentially provide scan signals having conductive level pulses to the scan signal lines S1 to Sm. For example, the scan driver may be configured in the form of a shift register and may generate scan signals in such a way that the scan start signal provided in the form of a conductive level pulse is sequentially transmitted to the next-stage circuit under the control of the clock signal, where m may be a natural number. The light-emitting driver may generate emission signals to be provided to the light-emitting signal lines E1, E2, E3,..., and Eo by receiving a clock signal, an emission stop signal, etc. from the timing controller. For example, the light-emitting driver may sequentially provide emission signals having cut-off level pulses to the light-emitting signal lines E1 to Eo. For example, the light-emitting driver may be configured in the form of a shift register and may generate emission signals in such a way that the emission stop signal provided in the form of a cut-off level pulse is sequentially transmitted to the next-stage circuit under the control of the clock signal, where o may be a natural number.
[0039] Figure 2 It is a schematic structural diagram of a display substrate. As Figure 2As shown, the display substrate may include a display area 100 and a border area 300 located around the display area 100. The border area 300 may include a first border area 301 on one side of the display area 100, and the first border area 301 includes a bonding area 200. In an exemplary embodiment, the display area 100 may include a plurality of sub-pixels arranged in a matrix, and the sub-pixels may include a pixel driving circuit and a light-emitting device. The bonding area 200 may at least include a bonding circuit for connecting signal lines of the plurality of sub-pixels to an external driving device. The border area 300 may at least include a barrier structure, a gate driving circuit, and a power supply line for transmitting voltage signals to the plurality of sub-pixels. The bonding area 200 and the barrier structure of the border area 300 form an annular structure surrounding the display area 100.
[0040] In some examples, the display device may be any device that displays whether it is moving (e.g., video) or stationary (e.g., still image), and whether it is text or image. More specifically, it is contemplated that the embodiments may be implemented in or associated with a variety of electronic devices, such as (but not limited to) mobile phones, wireless devices, personal digital assistants (PDAs), handheld or portable computers, global positioning system (GPS) receivers / navigators, cameras, Moving Picture Experts Group 4 (MP4) video players, camcorders, game consoles, watches, clocks, calculators, television monitors, computer monitors, automotive displays (e.g., odometer displays, etc.), navigators, cockpit controllers and / or displays, displays of camera views (e.g., displays of rear-view cameras in vehicles), electronic photos, electronic billboards or signs, projectors, architectural structures, packaging, and aesthetic structures (e.g., displays of images of a piece of jewelry), etc.
[0041] With the development of display technology, consumers have higher and higher requirements for the display effect of display products. Narrow bezels have become a new trend in the development of display products. However, the narrowing of the bezel area will reduce the routing space for power supply or signal transmission. The routing can be formed by using a "patterning process", including processes such as photoresist coating, mask exposure, development, etching, and photoresist stripping. When the space in the bezel area becomes smaller, the space of the organic trough for accommodating organic materials is compressed. When performing high-precision manufacturing processes such as IJP (Ink jet print) printing, photolithography, and etching in a limited space, the tiny errors in the process may be amplified, resulting in a large deviation between the shape and position of the organic materials fixed in the organic trough and the design, thus generating a large step difference. For example, during the IJP printing process, if the accuracy of the printing nozzle is insufficient, it may cause the organic materials at the edge position of the organic trough to not flow to the specified height, thereby increasing the step difference, which will seriously affect the propagation of light at the organic trough during exposure (Thermal Swing Process, TSP).
[0042] Figure 3 The cross-sectional structure schematic diagram of a display substrate in the related art is shown. As Figure 3 shown, there is a large height difference between the surface of the organic layer formed at the position of the organic trough 600 and the upper surface of the retaining wall 404, that is, the step difference between the organic materials in the organic trough 600 and the structures on both sides is too large. Since light cannot effectively penetrate the large step difference area, the exposure of the routing at the organic trough 600 is insufficient, resulting in incomplete curing of the photoresist, which is then removed during the development process, causing the loss of insulation isolation between different routings and finally short circuit. For example, in the edge area of the organic trough 600, two adjacent routings are in direct contact due to insufficient exposure and the absence of an insulating layer, forming a short circuit path.
[0043] Based on this, the present embodiment provides a display substrate. The display substrate includes a substrate, a display structure layer, an organic encapsulation layer, and a retaining wall structure provided on the substrate. By providing a support structure between the substrate and the organic encapsulation layer and at a position between the display area and the retaining wall structure (that is, inside the organic trough 600), the depth of this part is relatively reduced, the step difference between the organic materials in the organic trough and the two sides is reduced, the probability of irregularity and burr generation of the organic materials at the edge of the organic trough during the IJP printing process is reduced, and reducing the step difference helps the uniform penetration of light during TSP exposure. And after the printing nozzle sprays the organic material solution, the surface of the deposited organic materials is made smoother, the propagation of light at the organic trough 600 is more uniform, and it can be exposed more effectively, enabling the photoresist to cure better and forming a clearer routing pattern. This helps to maintain an appropriate distance between the routings, avoid the absence or incompleteness of the insulating layer between the routings caused by insufficient exposure, and thus reduce the risk of short circuit.
[0044] Refer toFigure 2 and Figure 4 , Figure 4 FIG. 2 is a schematic cross-sectional structure diagram of a display substrate provided in this embodiment. Figure 2 The display substrate provided in the embodiment of the present application includes a display area 100 and a peripheral area surrounding the display area 100, wherein the peripheral area includes a frame area 300 located on one side of the display area. Figure 4 The display substrate includes: a substrate 401; a display structure layer 402, located on one side of the substrate 401 and at least located in the display area 100; an organic encapsulation layer 403, located in the display area and the peripheral area, and located on the side of the display structure layer 402 away from the substrate 401; a retaining wall structure 404, located on one side of the substrate 401 and surrounding the display area, a part of the structure of the retaining wall structure 404 is located in the frame area 300 and on the side of the organic encapsulation layer 403 away from the display area 100; a supporting structure 405, located between the substrate 401 and the organic encapsulation layer 403, and between the display area 100 and the retaining wall structure 404, the orthographic projection of the supporting structure 405 on the substrate 401 is located within the orthographic projection of the organic encapsulation layer 403 on the substrate 401.
[0045] like Figure 2 As shown, the display substrate includes a display area 100 and a peripheral area surrounding the display area 100 , wherein the peripheral area includes a frame area 300 located on one side of the display area. The display area 100 is used to display images, and the frame area 300 is used to arrange driving circuits, wiring, etc.
[0046] like Figure 4 As shown, in a direction perpendicular to the display substrate, the display substrate includes a substrate 401, a display structure layer 402 and an organic encapsulation layer 403. The substrate 401 is the underlying structure of the display substrate and can be made of glass, plastic and other materials to provide support for the display structure layer 402 and other components. The display structure layer 402 is located on one side of the substrate 401 and is at least located in the display area. In an example, the display structure layer 402 may include pixel electrodes, thin film transistors (TFT) and other structures. The display structure layer is at least located in the display area to realize image display. Part of the insulating layer in the display structure layer can also extend to the frame area and the binding area. The organic encapsulation layer 403 is located in the display area and the peripheral area, and is located on the side of the display structure layer 402 away from the substrate 401.
[0047] In an exemplary embodiment, the organic encapsulation layer 403 may include a stacked first encapsulation layer, second encapsulation layer, and third encapsulation layer. The first encapsulation layer and the third encapsulation layer may be made of inorganic materials, and the second encapsulation layer may be made of an organic material. The second encapsulation layer is disposed between the first encapsulation layer and the third encapsulation layer, which can prevent external moisture from entering the display structure layer 402. In an exemplary embodiment, the first encapsulation layer and the third encapsulation layer made of inorganic materials may be prepared by a deposition process using an Open Mask, and the second encapsulation layer made of an organic material may be prepared by an Inkjet Printing (IJP) process.
[0048] As described above, the second encapsulation layer made of an organic material may be prepared by an Inkjet Printing (IJP) process. To prevent the organic material printed by inkjet from flowing to other areas, the display substrate of this embodiment includes a dam structure 404 to block the flow of the organic material. The dam structure 404 is located on one side of the substrate 401 and surrounds the display area. Specifically, the dam structure 404 is located on the side of the substrate 401 facing the display structure layer 402. That is to say, the display structure layer 402, the organic encapsulation layer 403, and the dam structure 404 are disposed on the same side of the substrate 401, and a part of the dam structure 404 is located in the border area and on the side of the organic encapsulation layer 403 away from the display area. In this way, the flow of the organic material can be blocked.
[0049] It should be noted that, as Figure 4 shown, the display substrate of this embodiment includes: a support structure 405, which is located between the substrate 401 and the organic encapsulation layer 403, and between the display area 100 and the dam structure 404. The orthographic projection of the support structure 405 on the substrate 401 is located within the orthographic projection of the organic encapsulation layer 403 on the substrate 401.
[0050] In this embodiment, the material of the support structure 405 may be an organic material, which can make the material of the support structure 405 the same as the material of the organic material solution sprayed by the printing head, without affecting the display effect.
[0051] That is to say, in the direction perpendicular to the substrate 401, the support structure 405 is located between the substrate 401 and the organic encapsulation layer 403. In the direction parallel to the substrate 401, the support structure 405 is located between the display structure layer 402 and the dam structure 404. The orthographic projection of the support structure 405 on the substrate 401 being within the orthographic projection of the organic encapsulation layer 403 on the substrate 401 can enable the support structure 405 to be encapsulated by the organic encapsulation layer 403. In this way, the support structure 405 can be located within the organic groove 600, reducing the depth of this part relatively, reducing the step difference between the organic material in the organic groove and the adjacent structures on both sides (such as the dam structure 404). Reducing the step difference helps the light to penetrate uniformly during TSP exposure. And after the printing nozzle sprays the organic material solution, the surface of the deposited organic material becomes smoother, the light propagates more uniformly on the surface of the organic material at the organic groove, and can be exposed more effectively, making the photoresist cure better and forming a clearer wiring pattern. This helps to maintain an appropriate distance between the wirings, avoiding the lack or incompleteness of the insulating layer between the wirings caused by insufficient exposure, thereby reducing the risk of short circuits.
[0052] In the embodiment of the present application, in the direction parallel to the substrate 401, the distance between the support structure 405 and the dam structure 404 is less than the distance between the support structure 405 and the display structure layer 402.
[0053] In an example, in the direction parallel to the substrate 401, the distance between the support structure 405 and the dam structure 404 is d1, and the distance between the support structure 405 and the display structure layer 402 is d2, then d1 < d2. This design makes the support structure 405 closer to the dam structure 404, which increases the deposition height of the inkjet-printed organic material at the position close to the dam structure 404, reducing the step difference between the surface of the deposited organic material and the dam structure 404. Refer to Figure 3 and Figure 4 , Figure 4 After adding the support structure 405, the height difference between its surface and the dam structure 404 becomes smaller, that is, the step difference can be reduced. And after adding the support structure 405, its surface is flatter than Figure 3 the case without the support structure 405.
[0054] In the embodiment of the present application, the height of the support structure 405 in the first direction is less than the height of the dam structure 404 in the first direction, and the first direction is the direction perpendicular to the substrate 401.
[0055] In one example, in a first direction perpendicular to the substrate 401, the height of the support structure 405 in the first direction is h1, and the height of the retaining wall structure 404 in the first direction is h2. Then h1 < h2, which can prevent the support structure 405 from blocking the light in the display area, ensure the display effect, and prevent the support structure 405 from being too high and affecting the overall structural stability of the display substrate.
[0056] In the embodiments of the present application, the support structure 405 satisfies at least one of the following:
[0057] The support structure 405 includes a first support portion 4051 and a second support portion 4052 which are stacked.
[0058] The support structure 405 includes at least a first support portion 4051 and a second support portion 4052. The first support portion 4051 and the second support portion 4052 are arranged in sequence in the direction from the display structure layer 402 to the retaining wall structure 404.
[0059] Figure 5 Shows a schematic structural diagram of the support structure provided in this embodiment. As Figure 5 shown, the support structure 405 includes a first support portion 4051 and a second support portion 4052 which are stacked. In the first direction, the first support portion 4051 and the second support portion 4052 are stacked, as Figure 5 shown, the first support portion 4051 is far from the substrate 401 in the first direction, and the second support portion 4052 is close to the substrate 401 in the first direction. Among them, the orthographic projection of the first support portion 4051 on the substrate 401 may completely overlap with the orthographic projection of the second support portion 4052 on the substrate 401, or may partially overlap.
[0060] Figure 6 Shows another schematic structural diagram of the support structure provided in this embodiment. As Figure 6 shown, the support structure 405 includes a first support portion 4051 and a second support portion 4052. The first support portion 4051 and the second support portion 4052 are arranged in sequence in the direction from the display area to the retaining wall structure 404. The first support portion 4051 and the second support portion 4052 may be spaced apart or in contact.
[0061] As Figure 4 shown, when the support structure 405 includes one of the first support portion 4051 and the second support portion 4052, Figure 4 the support structure 405 in
[0062] That is to say, the support structure 405 in the embodiments of the present application can be a single support unit structure, or a stack of two support parts in a direction perpendicular to the substrate 401, or an arrangement of two support parts in sequence in a direction from the display area to the barrier structure 404. The specific number of support parts can be adjusted according to specific requirements such as different display substrate types or design accuracies. This embodiment can improve the flexibility of substrate design and meet different design requirements.
[0063] As Figure 4 shown, in the embodiments of the present application, the display structure layer 402 includes a first planarization layer PNL1, and the support structure 405 is disposed on the same layer as the first planarization layer PNL1.
[0064] A planarization layer is a thin film layer used in the manufacturing process of a display substrate, which can provide a flat surface to facilitate subsequent process steps such as lithography, deposition, and the formation of other thin films. The planarization layer is usually made of organic or inorganic materials and has good filling and planarization characteristics, which can reduce the unevenness of the underlying structure and ensure the uniformity and quality of subsequent layers.
[0065] In this embodiment, the display structure layer 402 includes a first planarization layer PNL1, and the support structure 405 is disposed on the same layer as the first planarization layer PNL1. That is to say, in the manufacturing process of the display substrate, the first planarization layer PNL1 and the support structure 405 can be deposited or lithographed simultaneously, thereby reducing the complexity of alignment and positioning in the manufacturing process, saving time, improving production efficiency, reducing manufacturing costs, and the same-layer arrangement makes the support structure 405 and the first planarization layer PNL1 more compact in space, optimizing the overall layout of the display substrate, especially in the border area, which helps to achieve a narrower border design.
[0066] As Figure 5 shown, in the embodiments of the present application, the display structure layer 402 includes a first planarization layer PNL1 and a second planarization layer PNL2, the support structure 405 includes a first support part 4051 and a second support part 4052 arranged in a stack, the first support part 4051 is disposed on the same layer as the first planarization layer PNL1, and the second support part 4052 is disposed on the same layer as the second planarization layer PNL2.
[0067] The display structure layer 402 includes a first planarization layer PNL1 and a second planarization layer PNL2. The two planarization layers can provide a more uniform surface, better fill the micro defects and unevenness of the underlying layer, reduce the unevenness of the underlying structure, reduce defects in the lithography and deposition processes, and ensure the high-quality progress of subsequent processes.
[0068] The multi-layer flat layer and the support structure 405 can make better use of the space in the vertical direction, optimize the overall layout of the display substrate, and the first support portion 4051 and the second support portion 4052 are respectively arranged on the same layer as the first flat layer PNL1 and the second flat layer PNL2, which can provide hierarchical support and enhance the structural stability of the display substrate.
[0069] In the embodiment of the present application, the display substrate further includes a touch structure layer on the side of the organic encapsulation layer away from the substrate. The touch structure layer includes a plurality of touch electrodes located in the display area and a plurality of touch traces located in the peripheral area. The plurality of touch electrodes and the plurality of touch traces are connected; some line segments of the plurality of touch traces are located between the barrier structure and the display structure layer.
[0070] The connection between the plurality of touch electrodes and the plurality of touch traces can ensure the efficient transmission of touch signals, thereby improving the sensitivity and accuracy of touch. Some line segments of the touch traces are located between the barrier structure and the display structure layer. This layout helps to reduce the interference between touch signals and other signals, improves touch performance, and can also make more efficient use of space to avoid the touch traces occupying the display area.
[0071] Figure 7 Another cross-sectional structure schematic diagram of the display substrate provided in this embodiment is shown. As Figure 7 shown, in the embodiment of the present application, each touch trace of the plurality of touch traces includes a double-layer structure. The double-layer structure includes a first metal layer and a second metal layer arranged in sequence. The first metal layer includes a first signal trace 701 located in a first preset area M, and the second metal layer includes a second signal trace 702 located in the first preset area M. The first preset area M is an area in the border area between the display structure layer and the barrier structure 404. In the first preset area, the orthographic projection of the first signal trace 701 on the substrate 401 and the orthographic projection of the second signal trace 702 on the substrate 401 at least partially overlap. The border area includes a lower border. The first preset area M is located in the lower border, and the first preset area M is an area in the border area between the display structure layer and the barrier structure.
[0072] In this embodiment, the first signal trace 701 and the second signal trace 702 can be touch lines for transmitting display area signals, or scan lines, clock lines, etc.
[0073] In this embodiment, the first signal trace 701 and the second signal trace 702 are routed in a way that their projections overlap. The first signal trace 701 and the second signal trace 702 form a double-layer routing, which can reasonably utilize the limited space in the border area, improve the space utilization rate, reduce the overall space occupation, and achieve a narrower border design.
[0074] Alternatively, the first signal trace 701 and the second signal trace 702 are alternately arranged with each other in the first preset area. Figure 8 FIG. shows another cross-sectional structure schematic diagram of the display substrate provided in this embodiment. As Figure 8 shown, in the first preset area, the first signal trace 701 and the second signal trace 702 are alternately arranged with each other. The first signal trace 701 and the second signal trace 702 adopt a single-layer alternate trace mode. Since there is a certain distance between different traces, short circuits between different traces can be effectively avoided, crosstalk between signals can be reduced, and the stability of signal transmission can be improved.
[0075] As Figure 7 and 8 shown, in the embodiment of the present application, the first metal layer further includes a third signal trace 703 located in the second preset area N, and the second metal layer further includes a fourth signal trace 704 located in the second preset area N. In the second preset area, the orthographic projection of the third signal trace 703 on the substrate 401 at least partially overlaps with the orthographic projection of the fourth signal trace 704 on the substrate 401. The second preset area N is located at the lower border, and the second preset area N is the area between the display area 100 and the first preset area M.
[0076] In this embodiment, the first signal trace 701, the second signal trace 702, the third signal trace 703, and the fourth signal trace 704 can be traces of the same type, or traces of different types, or partially the same and partially different traces. For example, if the first signal trace 701 and the third signal trace 703 are located on the same layer, they are traces of the same type; if the second signal trace 702 and the fourth signal trace 704 are located on the same layer, they are traces of another same type. The first signal trace 701, the second signal trace 702, the third signal trace 703, and the fourth signal trace 704 can also all be touch lines.
[0077] That is to say, in the direction of the display area and the barrier structure 404, it is successively divided into: the display area, the second preset area N, the first preset area M, and the barrier structure 404.
[0078] In this embodiment, the projections of the first signal trace 701 and the second signal trace 702 in the first preset area at least partially overlap, and the projections of the third signal trace 703 and the fourth signal trace 704 in the second preset area at least partially overlap. More signal traces can be arranged within a limited space to support high-resolution and high-density signal transmission requirements, and the space utilization rate of the border can be optimized.
[0079] In this embodiment, a part of the touch traces located in the first preset area M overlaps with the support structure in the orthographic projection on the substrate. Thus, when the support structure reduces the step between the organic materials on both sides in the organic groove, the surface of the organic material deposited in the organic groove part is smoother, the light propagates more uniformly at the organic groove, and can be exposed more effectively, so that the photoresist can be better cured to form a clearer trace pattern. This helps to maintain an appropriate distance between the touch traces, avoid the absence or incompleteness of the insulating layer between the traces caused by insufficient exposure, and thus reduce the risk of short circuit.
[0080] In this embodiment, according to different positions, the functional layout of different areas is optimized. The first preset area M corresponds to the position of the organic groove. Then, the first signal trace 701 and the second signal trace 702 in the first preset area M are arranged alternately. Compared with the multi-layer traces, the first signal trace 701 and the second signal trace 702 arranged alternately are single-layer traces, which can reduce the number of etching times and reduce the error in the substrate preparation process. It can effectively avoid the short circuit between the traces at different positions of the organic groove, reduce the crosstalk between signals, and improve the stability of signal transmission.
[0081] In the embodiment of the present application, the border area includes a first border area 301 located on one side of the display area 100, that is, the lower border. The lower border includes a bonding area 200. In the direction parallel to the substrate 401, the bonding area 200 is located on the side of the barrier structure 404 away from the support structure 405; the bonding area 200 includes a middle area and end areas located at both ends of the middle area. Power pins are provided in both the middle area and the end areas. The display substrate further includes a power line, and the power line is connected to the corresponding power pin.
[0082] The bonding area 200 may at least include a bonding circuit for connecting the signal lines of multiple sub-pixels to an external driving device. The border area 300 may at least include a barrier structure 404, a gate driving circuit, and a power line for transmitting voltage signals to multiple sub-pixels. The barrier structure 404 of the bonding area 200 and the border area 300 form an annular structure surrounding the display area 100.
[0083] Figure 9 The schematic plan view of the display substrate provided by the embodiment of the present application is shown, as Figure 9 shown, in the direction parallel to the substrate, the bonding area 200 is located on the side of the barrier structure 404 away from the support structure 405; the bonding area 200 includes a middle area and end areas located at both ends of the middle area. Power pins are provided in both the middle area and the end areas. The display substrate further includes a power line, and the power line is connected to the corresponding power pin.
[0084] In the related art, power pins are only provided at both ends of the bonding area. That is, the circuit in the bonding area is connected to the traces in the border area through the areas at both ends of the bonding area. This will cause the traces at both ends of the border area to be crowded, affecting the narrowing effect of the border.
[0085] The display substrate further includes power lines, and the power lines are connected to the corresponding power pins, which can provide the corresponding power voltage for the power pins. The power voltage can include VDD and VSS. For example, VDD is 4.6V and VSS is -3V. The power lines include a positive power line VDD and a negative power line VSS. The positive power line VDD is located in the display area 100 (not shown in the figure) and is electrically connected to the VDD pins of the bonding area 200. The VDD pins are electrically connected to the circuit board 500, and the positive voltage signal is transmitted to the multiple sub-pixels Pxjj in the display area 100 through the VDD pins and the positive power line VDD in the display area 100 via the circuit board 500. The negative power line VSS is located in the peripheral area 101 and at least partially surrounds the display area 100. The negative power line VSS is electrically connected to the VSS pins of the bonding area 200. The VSS pins are electrically connected to the circuit board 500, and the negative voltage signal is transmitted to the cathodes of the multiple sub-pixels Pxjj in the display area 100 through the VSS pins and the negative power line VSS via the circuit board 500.
[0086] In this embodiment, the bonding area includes a middle area such as Figure 9 the area C in Figure 9 and end areas located at both ends of the middle area, such as
[0087] In the embodiment of the present application, signal pins are further provided in the bonding area, and the target signal traces are connected to the corresponding signal pins. The target signal traces include at least a part of the first signal trace 701, the second signal trace 702, the third signal trace 703, and the fourth signal trace 704.
[0088] In this embodiment, the signal pins can be distributed in the middle area of the bonding area and the end areas at both ends of the middle area, which can reduce the interference between signal lines and improve the stability of signal transmission. The power pins can provide a stable reference potential. By separately providing signal pins and power pins, the crosstalk between signal lines can be reduced.
[0089] The target signal trace includes at least a part of the first signal trace 701, the second signal trace 702, the third signal trace 703, and the fourth signal trace 704. That is to say, the target signal trace can be any one or more of the first signal trace 701, the second signal trace 702, the third signal trace 703, and the fourth signal trace 704. The target signal trace is connected to the corresponding signal pin, and the pin of the target signal trace is connected to the circuit board 500. Through the circuit board 500, signal transmission between the display area 100 and the bonding area 200 can be realized. The circuit board 500 can be, for example, a flexible circuit board.
[0090] In this embodiment, at least a part of the first signal trace 701, the second signal trace 702, the third signal trace 703, and the fourth signal trace 704 in the border area can be connected to the bonding area through any area among areas A, B, and C, which can realize the dispersed routing of signals, thereby avoiding the congestion of traces at both ends of the border area and contributing to the narrowing of the border.
[0091] As Figure 9 shown, the display substrate includes a display area 100 and a peripheral area 101 surrounding the display area 100. The peripheral area 101 includes a border area 300 on one side of the display area. The border area 300 on one side of the display area can be any side of the display area. The border area 300 can include the first border area 301 of the display substrate of the display area, that is Figure 9 the lower border close to the circuit board 500 shown. The retaining wall structure 404 is located in the border area 300. The retaining wall structure 404 includes a first retaining wall Dam1 and a second retaining wall Dam2 as Figure 9 shown, and Dam1 and Dam2 are distributed around the display area 100.
[0092] Figure 10 FIG. shows an enlarged schematic diagram of the lower border of a display substrate provided by an embodiment of the present application. It should be noted that the above Figures 3 to 8 is Figure 9 and Figure 10 a schematic diagram of the cross-sectional position of the O-O' plane of the lower border in
[0093] The display area 100 includes a plurality of touch electrodes. There are multiple touch traces in the peripheral area (such as Figure 9 Tx and Rx shown). The multiple touch electrodes are connected to the multiple touch traces. Some line segments of the multiple touch traces are located between the retaining wall structure 404 and the display area 100. In the lower border, since the touch traces need to extend to the bonding area and be connected to the external circuit board 500, the distribution of the touch traces in the lower border is complex. In this embodiment, a support structure 405 is arranged at the position of the lower border. As Figure 9 and Figure 10 shown, the support structure 405 is located between the display area 100 and the retaining wall structure 404. As Figures 4 - 8As shown, the orthographic projection of the support structure 405 on the substrate 401 is located within the orthographic projection of the organic encapsulation layer 403 on the substrate 401. When forming traces (such as the touch traces in this embodiment) using a "patterning process" such as coating photoresist and mask exposure, the support structure 405 can increase the deposition height of the inkjet-printed organic material near the dam structure, reducing the step difference between the surface of the deposited organic material and the dam structure. As Figure 4 shown, after adding the support structure, the height difference between the surface of the organic material in the organic groove and the dam structure becomes smaller, that is, the step difference can be reduced, which helps the uniform penetration of light during TSP exposure of the touch traces. Moreover, after adding the support structure, the surface of the deposited organic material becomes flatter, the light propagates more uniformly in the organic groove, can be exposed more effectively, the photoresist can be cured better, and a clearer touch trace pattern can be formed.
[0094] As Figure 9 and 10 shown, in the direction from the display area to the bonding area in this embodiment, it sequentially includes a display area 100, a second preset area N, a first preset area M, and a dam structure 404. As Figure 7 and 8 shown, since the second preset area N is far from the dam structure and the probability of light being blocked is small, therefore, double-layer traces can be used in the second preset area N, which can reasonably utilize the limited space in the border area, improve the space utilization rate, reduce the overall space occupation, and achieve a narrower border design. For the first preset area M, since the probability of light being blocked is large, therefore, single-layer alternating traces can also be used in the first preset area, that is, the first signal trace 701 and the second signal trace 702 are in a single-layer alternating trace mode. Since a part of the touch traces in the first preset area overlap with the orthographic projection of the support structure on the substrate. Thus, in the case where the support structure reduces the step difference between the organic material in the organic groove and the two-side structures (such as the dam structure 404), the surface of the organic material deposited in the organic groove part is flatter, the light propagates more uniformly in the organic groove, can be exposed more effectively, the photoresist can be cured better, and a clearer trace pattern can be formed. This helps to maintain an appropriate distance between the touch traces in the first preset area, avoid the lack or incompleteness of the insulating layer between the traces caused by insufficient exposure, and thus reduce the risk of short circuit.
[0095] In addition, compared with the related art where the power pins are only arranged at both ends of the bonding area, that is, the circuit in the bonding area is connected to the traces in the border area through the areas at both ends of the bonding area, in this embodiment, the bonding area includes a middle area C and end areas A and B located at both ends of the middle area, and power pins are arranged in both the middle area and the end areas. The orthographic projection of the touch traces in the bonding area 200 on the substrate overlaps at least partially with the orthographic projections of the VSS pin and the VDD pin on the substrate, which is more conducive to the narrowing design of the border area. AsFigure 9 In the display substrate shown, the touch traces (Tx, Rx) connecting the touch electrodes are routed along the lower border and then dispersedly connected to three different regions A, B, and C.
[0096] An embodiment of the present application also provides a display panel, including the display substrate described in any one of the above. The display substrate can be as Figure 2 shown.
[0097] An embodiment of the present application also provides a display device, including the above-mentioned display panel. The display panel is composed of a display substrate and other related components (such as a backlight module, a driving circuit, etc.), and is the core component capable of realizing image display. It displays an image by controlling the pixel units on the display substrate and is the main part of the display device. The pixel units include multiple sub-pixels Pxjj. For example, a liquid crystal display panel (LCD Panel) is composed of an array substrate, a color filter substrate, a liquid crystal layer, a polarizer, a backlight module, etc., and adjusts the transmission of light by controlling the arrangement of liquid crystal molecules to display an image. Or active light-emitting display devices such as organic light-emitting diodes (OLEDs) and quantum dot light-emitting diodes (QLEDs).
[0098] In the description of this specification, it should be understood that the orientation or positional relationship indicated by the terms "center", "longitudinal", "transverse", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc. is based on the orientation or positional relationship shown in the drawings, and is only for the convenience of describing the present disclosure and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus should not be construed as a limitation to the present disclosure.
[0099] In addition, the terms "first" and "second" are only used for descriptive purposes and cannot be construed as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, the features defined with "first" and "second" may explicitly or implicitly include one or more of such features. In the description of the present disclosure, "a plurality" means two or more, unless otherwise specifically defined.
[0100] In this disclosure, unless otherwise clearly defined or limited, terms such as "installed", "connected", "joined", "fixed", etc. should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or integrated; it can be a mechanical connection, an electrical connection, or a communication connection; it can be directly connected, or indirectly connected through an intermediate medium, and can be the communication inside two components or the interaction relationship between two components. For those of ordinary skill in the art, the specific meanings of the above terms in this disclosure can be understood according to specific circumstances.
[0101] In this disclosure, unless otherwise clearly defined or limited, the first feature being "on" or "under" the second feature may include the first and second features being in direct contact, or may include the first and second features not being in direct contact but in contact through additional features therebetween. Moreover, the first feature being "above", "over" and "on top of" the second feature includes the first feature being directly above and obliquely above the second feature, or merely indicating that the first feature has a higher horizontal height than the second feature. The first feature being "under", "beneath" and "underneath" the second feature includes the first feature being directly below and obliquely below the second feature, or merely indicating that the first feature has a lower horizontal height than the second feature.
[0102] The above disclosure provides many different embodiments or examples for implementing different structures of this disclosure. To simplify this disclosure, the components and settings of specific examples are described above. Of course, they are only examples and are not intended to limit this disclosure. In addition, this disclosure may repeat reference numerals and / or reference letters in different examples. This repetition is for the purpose of simplification and clarity, and does not itself indicate the relationship between the various embodiments and / or settings discussed.
[0103] The above are only the specific embodiments of this disclosure, but the protection scope of this disclosure is not limited thereto. Any person skilled in the art within the technical scope disclosed by this disclosure can easily think of various changes or substitutions. Different parts in different embodiments can be combined with each other without conflict, and these should all be covered within the protection scope of this disclosure. Therefore, the protection scope of this disclosure should be subject to the protection scope of the claims.
Claims
1. A display substrate, characterized in that, The display substrate includes a display area and a peripheral area surrounding the display area, wherein the peripheral area includes a frame area located on one side of the display area. The display substrate includes: substrate; A display structure layer, located on one side of the substrate and at least located in the display area; an organic encapsulation layer, located in the display area and the peripheral area, and located on a side of the display structure layer away from the substrate; a retaining wall structure, located on the one side of the substrate and surrounding the display area, a portion of the retaining wall structure being located in the frame area and on a side of the organic encapsulation layer away from the display area; The support structure is located between the substrate and the organic encapsulation layer and between the display area and the retaining wall structure, and the orthographic projection of the support structure on the substrate is located within the orthographic projection of the organic encapsulation layer on the substrate.
2. The display substrate according to claim 1, wherein In a direction parallel to the substrate, a distance between the support structure and the retaining wall structure is smaller than a distance between the support structure and the display structure layer.
3. The display substrate according to claim 1, characterized in that, A height of the supporting structure in a first direction is smaller than a height of the retaining wall structure in the first direction, and the first direction is a direction perpendicular to the base.
4. The display substrate according to claim 1, characterized in that, The support structure satisfies at least one of the following: The support structure comprises a first support portion and a second support portion which are stacked; The supporting structure includes at least a first supporting portion and a second supporting portion, and the first supporting portion and the second supporting portion are arranged in sequence in a direction from the display area to the retaining wall structure.
5. The display substrate according to claim 1, characterized in that The display structure layer includes a first flat layer, and the support structure is arranged on the same layer as the first flat layer.
6. The display substrate according to claim 1, wherein The display structure layer includes a first flat layer and a second flat layer, and the support structure includes a first support portion and a second support portion that are stacked. The first support portion is disposed in the same layer as the first flat layer, and the second support portion is disposed in the same layer as the second flat layer.
7. The display substrate according to any one of claims 1-6, characterized in that, The display substrate also includes a touch structure layer located on a side of the organic encapsulation layer away from the base, the touch structure layer includes a plurality of touch electrodes located in the display area and a plurality of touch wirings located in the peripheral area, the plurality of touch electrodes are connected to the plurality of touch wirings; some line segments of the plurality of touch wirings are located between the retaining wall structure and the display structure layer.
8. The display substrate according to claim 7, wherein Each of the plurality of touch lines comprises a double-layer structure, the double-layer structure comprises a first metal layer and a second metal layer arranged in sequence, the first metal layer comprises a first signal line located in a first preset area, and the second metal layer comprises a second signal line located in the first preset area; The first signal routing lines and the second signal routing lines are alternately arranged in the first preset area; or, in the first preset area, the orthographic projection of the first signal routing lines on the substrate and the orthographic projection of the second signal routing lines on the substrate at least partially overlap; The frame area includes a lower frame, the first preset area is located in the lower frame, and the first preset area is an area of the lower frame located between the display structure layer and the retaining wall structure.
9. The display substrate according to claim 8, wherein The first metal layer also includes a third signal routing located in a second preset area, and the second metal layer also includes a fourth signal routing located in the second preset area. In the second preset area, the orthographic projection of the third signal routing on the substrate at least partially overlaps with the orthographic projection of the fourth signal routing on the substrate. The second preset area is located at the lower frame, and the second preset area is an area between the display area and the first preset area.
10. The display substrate according to claim 9, wherein Part of the touch wiring located in the first preset area overlaps with the orthographic projection of the support structure on the substrate.
11. The display substrate according to claim 9, wherein The lower frame includes a binding area, and in a direction parallel to the base, the binding area is located on a side of the retaining wall structure away from the supporting structure; The binding area includes a middle area and end areas located at both ends of the middle area, the middle area and the end areas are both provided with power pins, and the display substrate also includes power lines connected to the corresponding power pins.
12. The display substrate according to claim 11, wherein The binding area is also provided with a signal pin, and a target signal line is connected to the corresponding signal pin, and the target signal line includes at least part of the first signal line, the second signal line, the third signal line, and the fourth signal line.
13. A display panel, characterized in that, A display substrate comprising any one of claims 1 to 12.
14. A display device, characterized in that, Includes the display panel as claimed in claim 13.