Storage space control method and device
By receiving data operation requests, and using re-reference predicted values and importance parameters to determine candidate data addresses, the cache pollution problem is solved, and efficient replacement of storage space and data security is achieved.
Patent Information
- Application Number
- CN202410225113.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-02-28
- Publication Date
- 2025-07-25
AI Technical Summary
The prior art cannot accurately determine the importance of data in cache replacement algorithms, resulting in the replacement of important data by unimportant data, causing the problem of cache pollution.
By receiving data operation requests, the candidate data address is determined using the re-reference predicted value and importance parameters, and the candidate data address table is updated to avoid important data being replaced and improve the accuracy of cache replacement.
It realizes efficient replacement of storage space, avoids cache pollution, and improves the robustness and data security of storage space operations.
Smart Images
Figure CN120371195A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of computer storage technologies, and in particular, to a storage space control method and apparatus. Background Art
[0002] Modern mobile computing devices generally run multiple applications concurrently on a heterogeneous multi-processor architecture. Therefore, the system-level on-chip cache (System Cache) is crucial for data access performance.
[0003] The basic idea of caching is the principle of locality, which keeps the data that has been repeatedly accessed recently inside the cache. When the capacity is insufficient, the data that has been least recently accessed is preferentially replaced. The currently widely used basic replacement algorithms consider fewer factors when calculating the importance of data and cannot accurately determine the importance of data, which may lead to the probability that important data is replaced by unimportant data, resulting in the problem of cache pollution. Summary of the Invention
[0004] This application aims to at least solve one of the technical problems in the related art to some extent.
[0005] To this end, the first object of this application is to propose a storage space control method.
[0006] The second object of this application is to propose an apparatus.
[0007] The third object of this application is to propose an electronic device.
[0008] The fourth object of this application is to propose a computer-readable storage medium.
[0009] The fifth object of this application is to propose a computer program product.
[0010] To achieve the above object, an embodiment of the first aspect of this application proposes a storage space control method, including:
[0011] Receiving a data operation request, determining candidate data addresses in the storage space according to the data operation request and the re-reference prediction values corresponding to each data address, and determining a target address according to the importance parameter of the candidate data address, where the re-reference prediction value is determined by the attribute data in the data operation request;
[0012] Operating on the target address in the storage space according to the data operation request;
[0013] Updating the candidate data address table according to the target data address, where the candidate data address table contains the historical records of data address replacement;
[0014] Update the re-reference prediction value corresponding to each data address according to the candidate data address, the attribute data, or the importance parameter.
[0015] Optionally, determining a candidate data address in the storage space according to the data operation request and the re-reference prediction value corresponding to each data address includes:
[0016] Obtain the required address and required data in the data operation request;
[0017] Sort and filter the re-reference prediction values corresponding to each data address to determine the candidate data address;
[0018] If the required address in the storage space contains the required data, determine the data address configured in the data operation request as the target data address; or,
[0019] If the required address in the storage space does not contain the required data, determine the target data address according to the importance parameter corresponding to the candidate data address.
[0020] Optionally, sorting and filtering the re-reference prediction values corresponding to each data address to determine the candidate data address includes:
[0021] Obtain the quantity threshold of the candidate data address;
[0022] Arrange the re-reference prediction values in descending order to obtain a re-reference prediction value sequence;
[0023] Select the same number of re-reference prediction values from the re-reference prediction value sequence according to the quantity threshold, and determine the corresponding data address as the candidate data address.
[0024] Optionally, determining the target data address according to the importance parameter corresponding to the candidate data address includes:
[0025] Sort the importance parameters in ascending order to obtain an importance parameter sequence;
[0026] Use the candidate data address corresponding to the first item of the importance parameter sequence as the target data address.
[0027] Optionally, the method further includes:
[0028] If the required address in the storage space contains the required data, update the re-reference prediction value corresponding to each data address according to the attribute data;
[0029] In response to the demand address in the storage space not containing the demand data, update the re-reference prediction values corresponding to each data address according to the candidate data address, the attribute data, and the importance parameter.
[0030] Optionally, the attribute data includes at least one of the following: data stream identifier, service identifier, data operation type identifier.
[0031] To achieve the above object, an embodiment of the second aspect of the present application proposes a storage space control device, including:
[0032] A request receiving module, configured to receive a data operation request, determine a candidate data address in the storage space according to the data operation request and the re-reference prediction values corresponding to each data address, and determine a target address according to the importance parameter of the candidate data address, where the re-reference prediction value is determined by the attribute data in the data operation request;
[0033] A cache address determination module, configured to operate on the target address in the storage space according to the data operation request;
[0034] A candidate address update module, configured to update the candidate data address table according to the target data address, where the candidate data address table contains historical records of data address replacement;
[0035] A re-reference prediction value update module, configured to update the re-reference prediction values corresponding to each data address according to the candidate data address, the attribute data, or the importance parameter.
[0036] To achieve the above object, an embodiment of the third aspect of the present application proposes an electronic device, including: a processor, and a memory communicatively connected to the processor;
[0037] The memory stores computer execution instructions;
[0038] The processor executes the computer execution instructions stored in the memory to implement the method according to any one of the first aspect.
[0039] To achieve the above object, an embodiment of the fourth aspect of the present application proposes a computer-readable storage medium, where computer execution instructions are stored in the computer-readable storage medium, and when the computer execution instructions are executed by a processor, they are used to implement the method according to any one of the first aspect.
[0040] To achieve the above object, an embodiment of the fifth aspect of the present application proposes a computer program product, and when the computer program is executed by a processor, it implements the method according to any one of the first aspect.
[0041] The storage space control method, device, electronic device, and storage medium provided by this application determine the re-reference prediction value through the attribute data in the data operation request, and determine the target address based on the re-reference prediction value, realizing the replacement of the storage space, avoiding cache pollution caused by the replacement of important data, and improving the robustness of the storage space operation and the security of the data.
[0042] Additional aspects and advantages of this application will be given in part in the following description, become apparent in part from the following description, or be learned through the practice of this application. BRIEF DESCRIPTION OF THE DRAWINGS
[0043] The above and / or additional aspects and advantages of this application will become apparent and be readily understood from the following description of the embodiments in conjunction with the accompanying drawings, in which:
[0044] Figure 1 is a schematic flowchart of a storage space control method provided by an embodiment of this application;
[0045] Figure 2 is a schematic diagram of a mobile computing architecture provided by an embodiment of this application;
[0046] Figure 3 is a schematic flowchart of a storage space control method provided by an embodiment of this application;
[0047] Figure 4 is a schematic structural diagram of a storage space control device provided by an embodiment of this application;
[0048] Figure 5 is a schematic structural diagram of a storage space control device provided by an embodiment of this application. DETAILED DESCRIPTION OF THE EMBODIMENTS
[0049] The embodiments of this application will be described in detail below. Examples of the embodiments are shown in the accompanying drawings, where the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are intended to explain this application and should not be construed as limiting this application.
[0050] Modern mobile computing devices generally run multiple applications concurrently on a heterogeneous multi-processor architecture. Therefore, the system-level on-chip cache System Cache is crucial for data access performance.
[0051] The basic idea of caching is the principle of locality. Data that has been repeatedly accessed recently is kept inside the cache. When the capacity is insufficient, the data that has been least recently accessed is preferentially replaced. The basic replacement algorithms widely used currently consider fewer factors when calculating the importance of data and cannot accurately determine the importance of data, which may lead to the probability that important data is replaced by unimportant data, resulting in the problem of cache pollution.
[0052] In a possible embodiment, the Least Recently Used (LRU) strategy is used for cache replacement, that is, it is always expected that the access to the cache is a near-immediate re-reference. The cache path of the LRU strategy can be regarded as a queue. The position at the end of the queue (to be kicked out) is the LRU, that is, the position of the least recently used; the position at the head of the queue is the Most Recently Used (MRU).
[0053] In a possible embodiment, the Not Recent Used (NRU) strategy is used for cache replacement. NRU is an approximate strategy of LRU and is widely used in modern high-performance processors. For a cache applying the NRU strategy, a mark needs to be added to each cache block / cache line, and this mark is the NRU bit. When the NRU bit is "0", it means that it is likely to be accessed recently, and when the NRU bit is "1", it means that it cannot be accessed recently.
[0054] Whenever a cache hit occurs, the NRU bit of the cache block / cache line is set to "0", indicating that in the near future, this cache block / cache line is very likely to be accessed again; whenever a cache miss occurs, the replacement algorithm scans the cache block / cache line with the NRU bit of "1" from left to right. If found, this cache block / cache line is replaced, and the NRU bit of the newly inserted cache block / cache line is set to "0". If not found, then the NRU bits of all cache block / cache lines are set to "1" and scanned from left to right again.
[0055] However, during actual business operations, due to the different importance levels of different services, the importance levels of the data corresponding to different services are also different. In the above embodiments, when considering the importance of the data in the cache, only whether the data was recently replaced was taken into account, without considering the service to which the data corresponds. This may result in important data in the cache being replaced, leading to cache pollution.
[0056] To address this issue, the embodiments of the present application provide a storage space control method. Figure 1 The following is a flowchart showing a storage space control method provided by the embodiments of the present application. As Figure 1 shown, the method includes the following steps:
[0057] Step 101: Receive a data operation request, determine candidate data addresses in the storage space according to the data operation request and the re-reference prediction values corresponding to each data address, and determine a target address according to the importance parameters of the candidate data addresses, where the re-reference prediction value is determined by the attribute data in the data operation request.
[0058] Optionally, the storage space is the system cache System Cache. Figure 2 The following is a schematic diagram of a mobile computing architecture provided by the embodiments of the present application. As Figure 2 shown, multiple processors access the off-chip main memory (DRAM) through a bus (Bus). A system cache System Cache is set between the Bus and the DRAM to temporarily store data. The System Cache has three functions: 1) Expand the capacity of the processor's local cache, such as serving as an extension of the CPU L3 cache; 2) Intercept the large-bandwidth memory access traffic of the processor, such as the graphics data of the GPU; 3) Share data between different processors, such as the image data of the NPU and the ISP.
[0059] In this embodiment, the cache receives a data operation request, which is used to operate on the data at a specific address in the cache, such as reading, writing, deleting, etc.
[0060] The re-reference prediction value (Re-Reference Prediction Value, RRPV) reflects the probability of the data at each data address being re-referenced (i.e., re-operated). Optionally, one data address corresponds to one RRPV, or one cache line corresponds to one RRPV. It should be noted that one byte in a cacheline corresponds to one data address, but for each cache line, only the address of the first byte and the length of the cache line need to be recorded. Based on these two pieces of data, the addresses of each bit in the cache line can be determined.
[0061] The RRPV value is determined by the attribute data in the data operation request. The attribute data is related to the service flow, data flow, and operation type corresponding to the operation request. In this way, the factors considered by the RRPV are more comprehensive, and it can more accurately reflect the probability of the corresponding data address (or cache line) being re-referenced.
[0062] When accessing the storage space according to the data operation request, it is necessary to query the data address specified in the data operation request to determine whether the data address contains the data required by the data operation request. If it contains, it is called a cache hit; if it does not contain, it is called a cache miss.
[0063] Candidate data addresses with a lower probability of being re-referenced are selected according to the RRPV value as the alternative addresses for replacing data. If it is a cache hit, there is no need for candidate data addresses, and the data address specified in the data operation request can be used as the target address. If it is a cache miss, a target address needs to be selected from the candidate data addresses to perform data operations according to the data operation request.
[0064] Step 102, operate on the target address in the storage space according to the data operation request;
[0065] In this embodiment, after determining the target address, the data in the target address can be operated on according to the data operation request. Specifically, the corresponding cache line is determined according to the target address.
[0066] Optionally, if the data operation request is a read, the data stored in the cache line is read; if the data operation request is a write, the data stored in the cache line is deleted, and the data carried in the data operation request is written into the cache line.
[0067] Step 103, update the candidate data address table according to the target data address, where the candidate data address table contains the historical records of data address replacement;
[0068] In this embodiment, after each operation on the target address, the candidate data address table (VictimTable) needs to be updated. It is used to record the data addresses replaced recently. If the data address of a cache miss appears in the VictimTable, it means that this is the data that was replaced recently but is used again, indicating that the data in this data address is relatively important, and its importance level should be increased to avoid being replaced again as much as possible.
[0069] Step 104: Update the re-reference prediction value corresponding to each data address according to the candidate data address, the attribute data, or the importance parameter.
[0070] In this embodiment, after each operation on the target address, the distance between the time of the last operation on each data address and the current time changes. Therefore, it is necessary to update the re-reference prediction value corresponding to all data addresses. Using the candidate data address, the attribute data, or the importance parameter as input data, perform operations through a preset algorithm to obtain the PPRV value corresponding to each data address, and the PPRV values form a PPRV table. For reference in cache replacement when a data operation request is received next time, dynamically updating the PPRV table can ensure the accuracy and robustness of cache replacement.
[0071] This embodiment determines the re-reference prediction value through the attribute data in the data operation request, and determines the target address based on the re-reference prediction value, realizing the replacement of the storage space, avoiding cache pollution caused by the replacement of important data, and improving the robustness of storage space operations and the security of data.
[0072] This embodiment provides another storage space control method. Figure 3 It is a flowchart of a storage space control method provided by an embodiment of the present application. As Figure 3 shown, the method may include the following steps:
[0073] Step 301: Obtain the required address and required data in the data operation request.
[0074] In this embodiment, the required address is the data address to be operated on by the current data operation request, and the required data is the data to be operated on. Optionally, if the data operation request is a read request, there is no required data or the required data is empty; if the data operation request is a write request, the required data is the data to be written into the storage space.
[0075] Step 302: Sort and filter the re-reference prediction values corresponding to each data address to determine the candidate data address.
[0076] In this embodiment, select candidate data addresses with a lower probability of being re-referenced according to the RRPV value as alternative addresses for replacing data for writing when the cache misses. When the origin user accesses the storage space, if the storage space has cached the data (required data) to be accessed, it is called a hit; if not, it is a miss. The process of fetching data is synchronized with the user's access, so even if new data is fetched again, the user will not feel a delay. Hit rate = number of hits / (number of hits + number of misses). The cache hit rate is one of the important factors for judging the performance of the server.
[0077] Step 303, in response to the demand address in the storage space including the demand data, determining the data address configured in the data operation request as the target data address; or,
[0078] Step 304, in response to the demand address in the storage space not including the demand data, determining the target data address according to the importance parameter corresponding to the candidate data address.
[0079] In this embodiment, when the demand address in the storage space includes the demand data, it is a cache hit, and data can be directly read and written from the cache; when the demand address in the storage space does not include the demand data, it is a cache miss, and the target data address needs to be selected from the candidate data addresses according to the importance parameter to insert the demand data into this address.
[0080] The importance parameter is pre-configured data. In a multi-concurrent scenario, the cost of cache miss for different threads or data operation requests may be different. If a cacheline originally belongs to Thread B and is now replaced by the data of Thread A, and then Thread B accesses this cacheline again, then Thread B will have a miss. If the miss cost of Thread B is higher than that of Thread A, then the previous strategy of "Thread A replacing Thread B" is not optimal. The idea of using cost decision to replace the strategy can be extended to other classification criteria, such as different devices, different operation types, etc. The importance parameter represents the cost of replacing a data address or the data in a cacheline. The higher the importance parameter, the higher the importance parameter corresponding to the data address or cacheline, indicating that the data stored here is more important and the cost of replacing the data here is higher.
[0081] Optionally, step 302 of sorting and screening the re-reference prediction values corresponding to each data address to determine the candidate data address includes:
[0082] Obtaining the quantity threshold of the candidate data address;
[0083] Arranging the re-reference prediction values in descending order to obtain the re-reference prediction value sequence;
[0084] Selecting the same number of re-reference prediction values from the re-reference prediction value sequence according to the quantity threshold, and determining the corresponding data address as the candidate data address.
[0085] In this embodiment, the RRPV value reflects the probability of data in each data address being re-referenced. The larger the RRPV value, the smaller the probability of data in the data address being re-referenced; the smaller the RRPV value, the greater the probability of data in the data address being re-referenced. Therefore, we need to select data addresses with larger RRPV values as candidate data addresses, which will reduce the risk of replacing important data and the risk of cache pollution. Since the total number of data addresses is large, it is necessary to select data addresses with larger RRPV values as data addresses according to the pre-configured quantity threshold of candidate data addresses.
[0086] In a possible embodiment, the quantity threshold is 10, that is, the top 10 data addresses with the highest RRPV values are selected as candidate data addresses.
[0087] Optionally, step 304 of determining the target data address according to the importance parameter corresponding to the candidate data address includes:
[0088] Sort the importance parameters in ascending order to obtain an importance parameter sequence;
[0089] Use the candidate data address corresponding to the first item of the importance parameter sequence as the target data address.
[0090] In this embodiment, the importance parameter characterizes the cost of replacing data in a data address or a cache line. The higher the importance parameter, the higher the importance parameter corresponding to the data address or cache line, indicating that the data stored here is more important and the cost of replacing the data here is higher. Since only one candidate address needs to be selected as the target address, it is necessary to select the candidate data address with the lowest importance parameter.
[0091] Optionally, the method further includes:
[0092] In response to the demand address in the storage space including the demand data, update the re-reference prediction value corresponding to each data address according to the attribute data;
[0093] In response to the demand address in the storage space not including the demand data, update the re-reference prediction value corresponding to each data address according to the candidate data address, the attribute data, and the importance parameter.
[0094] Optionally, the attribute data includes at least one of the following: data stream identifier, service identifier, data operation type identifier.
[0095] In a possible embodiment, the TA-DRRIP algorithm that updates the re-reference prediction value corresponding to each data address according to the candidate data address, the attribute data, and the importance parameter is used. The TA-DRRIP algorithm defines optional values for updating the RRPV according to the flowid when there is a Cache hit or miss. When there is a Cache miss, the optional value of the RRPV can be updated according to the importance parameter of the opcode.
[0096] Based on the above, the present application proposes a method for updating the RRPV in combination with the victim. The following description of the method is only an example, and the judgment conditions and update results should be designed according to system requirements. "
[0097] If there is a Cache hit, the RRPV of the cacheline with a hit is decremented by 1. If the RRPV is already 0, no processing is done.
[0098] If there is a Cache miss, determine whether the replacement algorithm used according to the fowid is SRRIP or BRRIP.
[0099] For SRRIP, obtain 1 RRPV value according to the importance parameter of the opcode. The higher the importance parameter, the smaller the RRPV value.
[0100] For BRRIP, obtain 2 RRPV values with a difference of 1 according to the importance parameter of the opcode. The higher the level, the smaller these 2 RRPV values, and then randomly select 1 RRPV value from them according to a preset probability.
[0101] If the newly inserted cacheline appears in the victim table, the RRPV is decremented by 1, otherwise no processing is done.
[0102] Figure 4 It is a schematic structural diagram of a storage space control device provided by an embodiment of the present application. As Figure 4 shown, in the device, after a new request (data operation request) enters the system cache, the system cache space is queried according to the demand address. At the same time, the new request carries attribute data: flowid, which is used to indicate different service flows of different devices; opcode, which is used to indicate the operation type of the data.
[0103] If there is a cache hit, the demand data is written into the cacheline corresponding to the target data address in the SRAM, and then the flowid and opcode are input into the TA-DDRIP algorithm for calculation to update the RRPV value in the RRPV table;
[0104] If there is a cache miss, query the RRPV table to obtain a set of candidate victims (candidate data addresses) to form a victim table, and then query the Cost / Critical table (importance parameter) to determine the final victim (target data address) according to the importance parameter corresponding to the victim; insert the new data carried in the new request into the cache, and then input the RRPV of the new request into the TA-DDRIP algorithm according to the flowid, opcode, and victim table history record to update the RRPV table.
[0105] Optionally, the TA-DDRIP replacement policy is an extension of NRU. It extends the NRU bit (RRPV value) to M bits. When M = 1, the algorithm degenerates into NRU. The reason for extending to M bits is to distinguish cache blocks with finer granularity, rather than just having two states (about to be accessed recently and least likely to be accessed recently).
[0106] The description of this algorithm is the same as that of NRU. Whenever there is a cache hit, the NRU bit of this cacheline / data address is set to "0", indicating that in the near future, this cacheline / data address is very likely to be accessed again; whenever there is a cache miss, the replacement algorithm scans the blocks with NRU bit "2^M - 1" from left to right. If found, replace this cacheline / data address and set the NRU bit of the newly inserted cacheline / data address to "2^M - 2". If not found, then increase the NRU bit of all cacheline / data addresses by 1 and scan from left to right again.
[0107] Setting the newly inserted cacheline / data address to "2^M - 2" above is mainly to prevent cacheline / data addresses that are rarely used again from occupying cache space for a long time, which will affect the performance of programs with good spatial locality.
[0108] In the RRIP class of policies, the NRU bit is described as RRPV (Re-reference Prediction Values), which can be understood as the possibility that the current block will be replaced, and the higher the value, the easier it is to be replaced.
[0109] To implement the above embodiments, the present application also proposes a storage space control device. Figure 5 The structural schematic diagram of a storage space control device provided by an embodiment of the present application. As Figure 5 shown, the device includes:
[0110] A request receiving module 510, configured to receive a data operation request, determine a candidate data address in a storage space according to the data operation request and a re-reference prediction value corresponding to each data address, and determine a target address according to an importance parameter of the candidate data address, where the re-reference prediction value is determined by attribute data in the data operation request;
[0111] A cache address determination module 520, configured to operate on the target address in the storage space according to the data operation request;
[0112] A candidate address update module 530, configured to update a candidate data address table according to the target data address, where the candidate data address table contains a historical record of data address replacement;
[0113] A re-reference prediction value update module 540, configured to update the re-reference prediction value corresponding to each data address according to the candidate data address, the attribute data, or the importance parameter.
[0114] To implement the above embodiments, the present application further provides an electronic device, including: a processor, and a memory communicatively connected to the processor; the memory stores computer-executable instructions; the processor executes the computer-executable instructions stored in the memory to implement the method provided in the foregoing embodiments.
[0115] To implement the above embodiments, the present application further provides a computer-readable storage medium, where computer-executable instructions are stored in the computer-readable storage medium, and when the computer-executable instructions are executed by a processor, they are used to implement the method provided in the foregoing embodiments.
[0116] To implement the above embodiments, the present application further provides a computer program product, including a computer program, where when the computer program is executed by a processor, it implements the method provided in the foregoing embodiments.
[0117] The collection, storage, use, processing, transmission, provision, and disclosure of user personal information involved in the present application all comply with the provisions of relevant laws and regulations and do not violate public order and good customs.
[0118] It should be noted that personal information from users should be collected for legal and reasonable purposes and should not be shared or sold outside of these legal uses. In addition, such collection / sharing should be carried out after obtaining the informed consent of the user, including but not limited to notifying the user to read the user agreement / user notice and sign an agreement / authorization including authorizing relevant user information before the user uses the function. In addition, any necessary steps should be taken to protect and safeguard access to such personal information data and ensure that others with access to personal information data comply with their privacy policies and procedures.
[0119] This application is expected to provide an implementation scheme for users to selectively prevent the use or access of personal information data. That is, the present disclosure is expected to provide hardware and / or software to prevent or block access to such personal information data. Once the personal information data is no longer needed, the risk can be minimized by restricting data collection and deleting the data. In addition, when applicable, personal identifiers are removed from such personal information to protect the privacy of users.
[0120] In the description of the foregoing embodiments, the descriptions referring to the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples", etc. mean that the specific features, structures, materials, or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic expressions of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described can be combined in a suitable manner in any one or more embodiments or examples. In addition, without contradiction, those skilled in the art can combine and combine the different embodiments or examples described in this specification and the features of different embodiments or examples.
[0121] In addition, the terms "first" and "second" are only used for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, the features defined with "first" and "second" may explicitly or implicitly include at least one of the features. In the description of the present application, "a plurality" means at least two, such as two, three, etc., unless otherwise specifically defined.
[0122] Any process or method description shown in the flowchart or described in other ways herein can be understood as representing a module, segment, or part of code including one or more executable instructions for implementing a customized logic function or process, and the scope of the preferred embodiments of the present application includes additional implementations, where the functions can be executed in a substantially simultaneous manner or in a reverse order according to the functions involved, rather than in the order shown or discussed, which should be understood by those skilled in the art to which the embodiments of the present application belong.
[0123] The logic and / or steps represented in the flowchart or otherwise described herein, for example, can be considered as a definable sequence list of executable instructions for implementing logical functions, which can be specifically implemented in any computer-readable medium for use by an instruction execution system, apparatus, or device (such as a computer-based system, a system including a processor, or other systems that can fetch and execute instructions from the instruction execution system, apparatus, or device), or used in combination with these instruction execution systems, apparatus, or devices. For the purposes of this specification, a "computer-readable medium" can be any device that can contain, store, communicate, propagate, or transmit a program for use by or in combination with an instruction execution system, apparatus, or device. More specific examples (a non-exhaustive list) of computer-readable media include the following: an electrical connection portion with one or more wirings (electronic device), a portable computer diskette (magnetic device), a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber device, and a portable compact disc read-only memory (CDROM). Additionally, the computer-readable medium can even be paper or other suitable media on which the program can be printed, because the program can be obtained electronically, for example, by optically scanning the paper or other media, followed by editing, interpretation, or otherwise processing as appropriate, and then storing it in a computer memory.
[0124] It should be understood that various parts of the present application can be implemented by hardware, software, firmware, or a combination thereof. In the above-described embodiments, multiple steps or methods can be implemented by software or firmware stored in a memory and executed by a suitable instruction execution system. For example, if implemented in hardware, as in another embodiment, any one or a combination of the following techniques well known in the art can be used: discrete logic circuits with logic gate circuits for implementing logical functions on data signals, application-specific integrated circuits with appropriate combinational logic gate circuits, programmable gate arrays (PGAs), field programmable gate arrays (FPGAs), etc.
[0125] Those of ordinary skill in the art of this technology can understand that all or part of the steps carried by the method of implementing the above embodiments can be completed by a program instructing relevant hardware, and the program can be stored in a computer-readable storage medium. When the program is executed, it includes one or a combination of the steps of the method embodiments.
[0126] In addition, each functional unit in various embodiments of the present application may be integrated into one processing module, or each unit may exist physically alone, or two or more units may be integrated into one module. The above-mentioned integrated module may be implemented in the form of hardware or in the form of a software functional module. When the integrated module is implemented in the form of a software functional module and sold or used as an independent product, it may also be stored in a computer-readable storage medium.
[0127] The above-mentioned storage medium may be a read-only memory, a magnetic disk or an optical disc, etc. Although the embodiments of the present application have been shown and described above, it can be understood that the above embodiments are exemplary and should not be construed as limiting the present application. Those of ordinary skill in the art can make changes, modifications, substitutions, and variations to the above embodiments within the scope of the present application.
Claims
1. A storage space control method, characterized in that, Including the following steps: Receiving a data operation request, determining candidate data addresses in a storage space according to the data operation request and the re-reference prediction values corresponding to each data address, and determining a target address according to the importance parameter of the candidate data address, wherein the re-reference prediction value is determined by the attribute data in the data operation request; Operating on the target address in the storage space according to the data operation request; Updating a candidate data address table according to the target data address, wherein the candidate data address table contains a historical record of data address replacement; Updating the re-reference prediction values corresponding to each data address according to the candidate data address, the attribute data or the importance parameter.
2. The method according to claim 1, characterized in that, The determining of the candidate data addresses in the storage space according to the data operation request and the re-reference prediction values corresponding to each data address includes: Obtaining a required address and required data in the data operation request; Sorting and filtering the re-reference prediction values corresponding to each data address to determine the candidate data addresses; In response to the required data being included in the required address in the storage space, determining the data address configured in the data operation request as the target data address; or, In response to the required data not being included in the required address in the storage space, determining the target data address according to the importance parameter corresponding to the candidate data address.
3. The method according to claim 2, characterized in that, The sorting and filtering of the re-reference prediction values corresponding to each data address to determine the candidate data addresses includes: Obtaining a quantity threshold of candidate data addresses; Arranging the re-reference prediction values in descending order to obtain a re-reference prediction value sequence; Selecting the same number of re-reference prediction values from the re-reference prediction value sequence according to the quantity threshold, and determining the corresponding data addresses as the candidate data addresses.
4. The method according to claim 2, wherein The determining of the target data address according to the importance parameter corresponding to the candidate data address includes: Sorting the importance parameters in ascending order to obtain an importance parameter sequence; Taking the candidate data address corresponding to the first item of the importance parameter sequence as the target data address.
5. The method according to claim 2, characterized in that, The method further includes: In response to the required data being included in the required address in the storage space, updating the re-reference prediction values corresponding to each data address according to the attribute data; In response to the required data not being included in the required address in the storage space, updating the re-reference prediction values corresponding to each data address according to the candidate data address, the attribute data and the importance parameter.
6. The method according to any one of claims 1-5, characterized in that The attribute data includes at least one of the following: data stream identifier, service identifier, data operation type identifier.
7. A storage space control device, characterized in that, Including: A request receiving module, configured to receive a data operation request, determine candidate data addresses in a storage space according to the data operation request and the re-reference prediction values corresponding to each data address, and determine a target address according to the importance parameter of the candidate data address, wherein the re-reference prediction value is determined by the attribute data in the data operation request; A cache address determination module, configured to operate on the target address in the storage space according to the data operation request; A candidate address update module, configured to update a candidate data address table according to the target data address, wherein the candidate data address table contains historical records of data address replacement; A re-reference prediction value update module, configured to update the re-reference prediction value corresponding to each data address according to the candidate data address, the attribute data, or the importance parameter.
8. An electronic device, characterized in that, Comprising: A processor, and a memory communicatively connected to the processor; The memory stores computer-executable instructions; The processor executes the computer-executable instructions stored in the memory to implement the method according to any one of claims 1-10.
9. A computer-readable storage medium, characterized in that, Computer-executable instructions are stored in the computer-readable storage medium, and when the computer-executable instructions are executed by a processor, they are used to implement the method according to any one of claims 1-10.
10. A computer program product, characterized in that, Comprising a computer program, which when executed by a processor implements the method according to any one of claims 1-10.