Network card connects circuit and server

Abstract

The present application discloses a network card connection circuit and a server, relating to the field of network card connection technology. The network card connection circuit includes a first adapter card and a second adapter card. The first adapter card is used to receive a first output signal emitted by a first processor, and separate the communication signal and the power supply voltage in the first output signal to obtain a first communication signal and a first power supply voltage. The second adapter card is arranged on the second processor, and is used to receive and integrate the first communication signal and the first power supply voltage to obtain a second output signal, and / or receive a third output signal emitted by the second processor, and send the second output signal or the third output signal through a target network card. Therefore, when the resources of the first processor are insufficient, the target network card corresponding to the second processor can be multiplexed through the first adapter card and the second adapter card, which can solve the technical problem of communication transmission delay of the OCP network card when CPU resources are insufficient, and achieve the technical effect of cross-CPU resource allocation of the target network card.

Description

Technical Field

[0001] The present application relates to the field of network card connection technology, and in particular to a network card connection circuit and a server. Background Art

[0002] Driven and organized by the Open Compute Project (OCP), a server technology association, more and more enterprises and institutions are increasingly demanding OCP NIC (Network Interface Card) network cards in cloud computing server systems. This requires server solution providers and system manufacturers to perfectly adapt to the compatibility of OCP NIC network cards.

[0003] In related technologies, OCP network cards (OCPs) are arranged in a one-to-one correspondence with CPUs (Central Processing Units). Each OCP card is connected to its corresponding CPU via a corresponding link and adapter card, and each CPU transmits information through the connected OCP card. However, when CPU resources are overloaded, communication transmission delays on the OCP card can occur, reducing the user experience. Summary of the Invention

[0004] The present application provides a network card connection circuit and a server to at least solve the problem of communication transmission delay of the OCP network card when CPU resources are insufficient in the related art.

[0005] The present application provides a network card connection circuit, comprising: a first adapter card, wherein the input end of the first adapter card is connected to the network card interface of the first processor, and is used to receive a first output signal emitted by the first processor, and separate the communication signal and the power supply voltage in the first output signal to obtain a first communication signal and a first power supply voltage; a second adapter card is arranged on the second processor, the first input end of the second adapter card is connected to the output end of the first adapter card, the second input end of the second adapter card is connected to the data interface of the second processor, and the output end of the second adapter card is connected to the target network card, and is used to receive and integrate the first communication signal and the first power supply voltage to obtain a second output signal, and / or receive a third output signal emitted by the second processor, and send the second output signal or the third output signal through the target network card.

[0006] The present application also provides a server, comprising: a plurality of processors, wherein the plurality of processors include a second processor and a first processor; and the above-mentioned network card connection circuit.

[0007] Through the present application, since the network card interface of the first processor can be connected to the target network card corresponding to the second processor through the first adapter card and the second adapter card, it can not only be used for communication transmission of the second processor through the target network card, but also can be used for the communication transmission needs of the first processor. At this time, when the resources of the first processor are insufficient, the target network card corresponding to the second processor can be multiplexed through the first adapter card and the second adapter card, so as to perform communication transmission based on the target network card. Therefore, the technical problem of communication transmission delay of the OCP network card when CPU resources are insufficient can be solved, and the technical effect of dynamically allocating target network cards across CPU resources and improving load balancing can be achieved. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] In order to more clearly illustrate the embodiments of the present application, the following is a brief introduction to the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0009] Figure 1 A schematic diagram of a network card connection circuit provided in an embodiment of the present application;

[0010] Figure 2 A schematic diagram of a network card connection circuit provided in a specific embodiment of the present application;

[0011] Figure 3 A schematic diagram of a network card connection circuit provided in another specific embodiment of the present application;

[0012] Figure 4 A schematic diagram of a server connection provided in an embodiment of the present application. DETAILED DESCRIPTION

[0013] The following will be combined with the accompanying drawings in the embodiments of this application to clearly and completely describe the technical solutions in the embodiments of this application. Obviously, the embodiments described are only part of the embodiments of this application, not all of them. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0014] It should be noted that, in the description of this application, the terms "comprises," "includes," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or device comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or elements inherent to such process, method, article, or device. The terms "first," "second," etc., in this application are used to distinguish similar objects, and are not used to describe a particular order or sequence.

[0015] In order to enable those skilled in the art to better understand the present application, the present application is further described in detail below with reference to the accompanying drawings and specific implementation methods.

[0016] Driven and organized by the OCP Association, more and more enterprises and institutions are increasingly demanding OCP NIC network cards in cloud computing server systems. This requires server solution providers and system manufacturers to perfectly adapt to the compatibility of OCP NIC network cards.

[0017] In related technologies, a connection solution between a server and an OCP network card or a connection solution where a CPU and an OCP network card are bound one to one is adopted. The details are as follows:

[0018] In a server-to-OCP network card (NIC) connection solution, an OCP NIC adapter design with a fixed upstream PCIe (Peripheral Component Interconnect Express) link and bandwidth is used on the server motherboard. By placing a fixed OCP NIC 4C+ / 4C (Connector) connector on the motherboard, the connector's upstream PCIe signals are connected to a fixed CPU or bridge chip, providing the OCP NIC with a fixed PCIe link and bandwidth. However, while this standard design based on the motherboard providing a fixed PCIe link to the OCP NIC card is effective, it is only compatible with a limited number of OCP NIC types and cannot meet the compatibility requirements of a wide range of OCP NICs. Taking the example of customers using server OCP NICs, if the operations and maintenance personnel are not fully familiar with the internal design of the servers in the computer room and the types of external OCP NICs, when inserting a Type A OCP NIC into a server that only supports Type B OCP NICs, the server will be incompatible with the external OCP NIC, causing server downtime and malfunction of the OCP NIC, which is not conducive to user experience.

[0019] In a one-to-one binding solution for CPUs and OCP network cards, the OCP network card is connected to a single CPU (such as CPU1) through a single link and an adapter card. When the server is configured with only a single CPU or CPU1 resources are overloaded, latency increases, reducing the user experience.

[0020] In order to solve at least one of the above technical problems, the present application proposes a network card connection circuit, in which the network card interface of the first processor (such as CPU1) can be connected to the target network card corresponding to the second processor (such as CPU0) through a first adapter circuit and a second adapter circuit. In this way, not only can the target network card be used for communication transmission of CPU0, but it can also be used for the communication transmission needs of CPU1. At this time, when the resources of CPU1 are insufficient, the target network card at CPU0 can be multiplexed through the first adapter card and the second adapter card, so that communication transmission is performed based on the target network card. Therefore, the technical problem of communication transmission delay of the OCP network card when CPU resources are insufficient can be solved, and the technical effect of dynamic allocation of target network card resources across CPUs and improved load balancing can be achieved, thereby solving the problem of hardware-level resource exclusivity.

[0021] The following describes the network card connection circuit of the embodiment of the present application in detail, taking the target network card as an OCP network card as an example.

[0022] Figure 1 A schematic diagram of a network card connection circuit provided in an embodiment of the present application.

[0023] like Figure 1 As shown, the network card connection circuit 100 of the embodiment of the present application includes: a first riser card 10 and a second riser card 20 provided on the second processor.

[0024] The input end of the first adapter card 10 is respectively connected to the network card interface of the first processor, and is used to receive the first output signal sent by the first processor, and separate the communication signal and power supply voltage in the first output signal to obtain the first communication signal and the first power supply voltage. The first input end of the second adapter card 20 is respectively connected to the output end of the first adapter card 10, the second input end of the second adapter card 20 is connected to the data interface of the second processor, and the output end of the second adapter card 20 is connected to the target network card, and is used to receive the first communication signal and the first power supply voltage, and integrate the first communication signal and the first power supply voltage to obtain the second output signal, and / or receive the third output signal sent by the second processor, so as to send the second output signal or the third output signal through the target network card.

[0025] Specifically, the first riser card 10 is arranged in the area corresponding to the first processor. Connected to the first processor's OCP interface (i.e., the first processor's network interface), it receives the first output signal from the first processor, separates the PCIe signal (i.e., the communication signal) and the 12V power supply voltage from the first output signal, processes the PCIe signal, such as by amplifying and filtering, to obtain a processed PCIe signal (i.e., the first communication signal), and processes the 12V power supply voltage, such as by filtering, to obtain a processed 12V power supply (i.e., the second power supply voltage). By separating the PCIe signal and 12V power supply of the first output signal into independent lines and transmitting them separately to the second riser card 20, the first riser card 10 avoids power supply noise coupling.

[0026] The second processor can be selected based on the processor load in the server, and the processor with a smaller load can be selected as the second processor. The specific selection can be made according to the actual situation. The second adapter card 20 is arranged in the area where the second processor is located and is connected to the motherboard through the Slimline x8 interface. On the one hand, the second output signal can be obtained by integrating the first communication signal and the first power supply voltage, and output through the target network card, that is, the data transmission task of the first processor is completed by the target network card set at the second processor; on the other hand, the data sending task issued by the second processor, namely the third output signal, can be received based on the Slimline x8 interface, and output through the target network card. It should be noted that the second output signal needs to meet the PCIe signal requirements of the second processor, such as converting the second power supply voltage into 3.3V / 5V to adapt to the PCIe power supply requirements of the second processor, and thus is issued based on the OCP interface of the second processor, namely the output end of the second adapter card 20.

[0027] In addition, the second output signal or the third output signal can be sent through the target network card by controlling the line on / off inside the second adapter card 20, or by controlling the mainboard, without limitation.

[0028] This embodiment, through the circuit connection between the first riser card 10 and the second riser card 20, can complete communication transmission for the first processor based on the target network interface card (NIC) installed on the second processor. Furthermore, based on the transmission strategy of separating communication and power supply, interference is reduced and transmission efficiency is guaranteed. The second riser card 20 can implement signal transmission from the OCP interface to the first and second processors based on communication switching. Seamless switching of PCIe channels from the first to the second processor is achieved through the riser card hardware without software intervention. This enables dynamic cross-processor resource allocation for OCP NICs based on dual riser cards, solving the load balancing problem of insufficient processor resources in related technologies and improving the application flexibility of the target network card. This circuit is also applicable to dynamic resource allocation for PCIe peripherals such as GPUs (Graphics Processing Units) and NVMe (Non-Volatile Memory Express) devices.

[0029] Furthermore, the network card connection circuit 100 may include multiple first adapter cards 10. In this case, each first adapter card 10 corresponds to a first processor, which is used to communicate and separate the power supply of the first output signal of the corresponding first processor. The output ends are respectively connected to the corresponding ports of the first input ends of the second adapter card 20. The ports of the first input end of the second adapter card 20 identify the inputs of different processors, thereby integrating and outputting signals, thereby realizing dynamic allocation of resources among multiple processors.

[0030] Combine Figure 2 As shown, in some embodiments of the present application, the first adapter card 10 includes: a signal relay module 11, the input end of the signal relay module 11 is connected to the communication port of the input end of the first adapter card 10, and the output end of the signal relay module 11 is suitable for being connected to the communication port of the first input end of the second adapter card 20, for receiving the communication signal in the first output signal through the communication port of the input end of the first adapter card, and generating a first communication signal based on the communication signal in the first output signal; a power supply separation module 12, the input end of the power supply separation module 12 is connected to the power supply port of the input end of the first adapter card 10, and the output end of the power supply separation module 12 is suitable for being connected to the power supply port of the first input end of the second adapter card 20, for receiving the power supply voltage in the first output signal through the power supply port of the input end of the first adapter card 10, and generating a first power supply voltage based on the power supply voltage in the first output signal.

[0031] Specifically, the signal relay module 11 is a signal relay node from the first processor to the target network card, which is used to receive, amplify and forward signals, thereby realizing the functions of expanding signal coverage, enhancing transmission reliability and compensating for signal attenuation, so as to solve the signal attenuation problem in long-distance transmission and ensure the stability and reliability of long-distance communication. The signal relay module 11 processes the communication signal separated from the first output signal to obtain a first communication signal for long-distance transmission, and sends the second output signal to the communication port of the first input end of the second adapter card 20 through the communication line. The power supply separation module 12 processes the power supply voltage separated from the first output signal to obtain a first power supply voltage for transmission, and transmits it to the power supply port of the first input end of the second adapter card 20 through the power line. Thus, by separating the 12V power supply and the PCIe signal into independent lines, power supply noise coupling is avoided.

[0032] In some embodiments of the present application, the signal relay module 11 includes: a differential signal amplification unit, the input end of the differential signal amplification unit is connected to the communication port of the input end of the first adapter card 10, and is used to amplify the communication signal in the first output signal to generate a first communication signal.

[0033] Specifically, differential signaling is a signal transmission method that transmits signals via two signal lines, one positive and the other negative, with opposite phases. This signal transmission method offers advantages such as strong anti-interference capabilities and good signal integrity, making it suitable for high-speed signal transmission. The differential signal amplification unit includes at least one differential signal amplifier, which is used to amplify the received communication signal to generate a first communication signal, thereby enhancing signal quality and enabling more stable and reliable transmission over longer distances.

[0034] For example, the gain value of the differential signal amplification unit can be set to 8dB@5GHz, that is, at a frequency of 5GHz, the signal gain is 8 decibels. Gain is an indicator to measure the degree of signal amplification. A higher gain can amplify the signal more effectively during transmission, thereby enhancing the strength and quality of the signal. A gain of 8dB is a relatively reasonable value in high-speed signal transmission. It can effectively improve the signal transmission performance without introducing too much noise and distortion. The specific setting can be made according to actual conditions. The gain can be achieved by adjusting the resistance value of an external resistor. The degree of signal amplification can be precisely controlled to achieve the best signal transmission effect. This allows users to flexibly adjust the gain size according to actual application requirements and system characteristics, providing greater flexibility and adaptability for system design, and can better meet the signal transmission requirements in different scenarios.

[0035] This embodiment utilizes the differential signal amplification unit to optimize signal transmission performance, ensuring accurate and rapid data transmission, thereby improving communication transmission efficiency and reliability.

[0036] In addition, the signal relay module 11 may also include an adaptive equalization and compensation unit to support adaptive equalization and compensation functions, including CTLE (Continuous Time Linear Equalizer) and DFE (Decision Feedback Equalizer). CTLE compensates for high-frequency attenuation caused by transmission line characteristics during signal transmission, restoring the signal's high-frequency components. DFE adjusts the current signal based on historical information about received signals to further optimize signal quality. The adaptive equalization and compensation function automatically adjusts equalization parameters based on the actual signal transmission conditions, thereby better adapting to different transmission environments and improving the reliability and stability of signal transmission.

[0037] In some embodiments of the present application, the signal relay module 11 further includes: an electrostatic protection unit, one end of which is connected to the communication port at the input end of the first adapter card and the input end of the differential signal amplification unit respectively, and the other end of the electrostatic protection unit is grounded.

[0038] Specifically, electrostatic discharge refers to the instantaneous high-voltage discharge phenomenon caused by the accumulation of static electricity. This discharge may cause damage to electronic equipment, especially at the input end, because the input end is directly connected to the external signal source or the user operation interface, and is more susceptible to interference and impact from external static electricity. In order to prevent electrostatic discharge from damaging the internal circuit and ensure the stable operation and reliability of the circuit. This embodiment provides an electrostatic protection unit, which can be specifically deployed at the input end of the signal relay module 11 by deploying a bidirectional TVS (Transient Voltage Suppressor) diode array and achieving a protection level of ±15kV, thereby providing electrostatic protection capabilities for electronic equipment, effectively reducing the risk of damage to the circuit caused by static electricity, and ensuring the normal operation and reliability of the circuit.

[0039] In some embodiments of the present application, the signal relay module 11 further includes: an impedance matching unit, one end of the impedance matching unit is connected to the output end of the differential signal amplification unit, and the other end of the impedance matching unit serves as the output end of the signal relay module.

[0040] Specifically, when a signal propagates on a communication line, if the characteristic impedance of the communication line does not match the impedance of the signal source and load, signal reflection will occur, causing signal distortion and transmission loss. Therefore, this embodiment adds an impedance matching unit to the signal relay module 11. Through the impedance matching network, it ensures that the first communication signal can be efficiently and completely transmitted to the second adapter card 20, reducing reflections and interference of the first communication signal and improving the quality and reliability of signal transmission.

[0041] For example, the impedance matching unit deploys a 100Ω differential resistor (±1% accuracy) at the output of the signal relay module 11, ensuring that the PCB (Printed Circuit Board) traces maintain a strict 100Ω differential impedance (4 mil line width, 8 mil spacing). The 100Ω differential resistor is deployed at the output of the signal relay module 11 to achieve impedance matching for the differential signal, ensuring that the differential signal (i.e., the first communication signal) is well matched at the end of the communication line, reducing signal reflections and ensuring signal integrity. The ±1% accuracy requirement for the differential resistor means that the actual value of the differential resistor should be between 99Ω and 101Ω. High-precision resistors enable more accurate impedance matching, thereby improving the quality and stability of signal transmission. Furthermore, differential impedance refers to the impedance characteristics of the differential signal transmission line to the signal, which is related to the transmission line's geometry, dielectric material, and other factors. Therefore, in PCB design, achieving a specific differential impedance value requires precise trace design. The 100Ω differential impedance in this embodiment requires consideration of factors such as the transmission line width, spacing, and dielectric thickness. The specific PCB trace width used is 4 mil and the spacing is 8 mil, which can be determined based on the differential impedance calculation formula and the dielectric material properties of the PCB to ensure that a 100Ω differential impedance is achieved under a given PCB structure. This can ensure the impedance consistency of the differential signal during transmission and reduce reflections and distortion during signal transmission.

[0042] In some embodiments of the present application, the output end of the signal relay module 11 is adapted to be connected to the communication port of the first input end of the second riser card 20 through a shielded cable.

[0043] That is, the first riser card 10 and the second riser card 20 are interconnected through a customized cable, and the signal relay module 11 transmits PCIe differential signals through a shielded cable, and reduces interference through an additional shielding layer of the shielded cable.

[0044] In some embodiments of the present application, the power supply separation module 12 includes: a filtering unit and a noise isolation unit, configured to perform filtering and noise isolation processing on the power supply voltage in the first output signal to generate the first power supply voltage.

[0045] Specifically, the order in which the filtering unit and the noise isolation unit are connected is not limited. The separated supply voltage can be first filtered by the filtering unit, and then the filtered supply voltage can be subjected to noise isolation processing by the noise isolation unit to obtain the first supply voltage. Alternatively, the separated supply voltage can be first subjected to noise isolation processing by the noise isolation unit, and then the noise-isolated supply voltage can be filtered by the filtering unit to obtain the first supply voltage. The filtering is used to remove high-frequency noise, and the noise isolation processing can include high-frequency noise suppression and transient overvoltage suppression protection.

[0046] For example, a π-type filter can be used as a filter unit, consisting of a 10μF ceramic capacitor, a 10Ω@100MHz ferrite bead, and a 10μF tantalum capacitor, with an insertion loss of -40dB@100MHz. The 10μF ceramic capacitor is a temperature-compensated ceramic capacitor with excellent temperature stability and high-frequency characteristics. It is primarily used to filter high-frequency noise. Its 10μF capacitance provides low impedance at high frequencies, effectively bypassing high-frequency noise signals. The 10μF tantalum capacitor, with its high capacitance density and excellent stability, is suitable for low-frequency filtering, further filtering low-frequency noise in the power supply. When used in conjunction with the ceramic capacitor, it achieves filtering across a wider frequency range. Ferrite beads are high-frequency inductors whose impedance increases with frequency. A 10Ω@100MHz ferrite bead has an impedance of 10Ω at 100MHz, effectively suppressing the passage of high-frequency noise. In a π-type filter, the bead provides high impedance at high frequencies, preventing high-frequency noise from entering subsequent circuits. Insertion loss refers to the degree of signal attenuation after passing through the filter. The insertion loss of -40dB@100MHz means that at a frequency of 100MHz, the filter can attenuate the noise signal to 1 / 10000 of its original value, ensuring that the π-type filter has strong noise suppression capabilities at 100MHz, which can effectively reduce high-frequency noise in the power supply and improve the purity of the power supply.

[0047] The noise isolation unit may include high-impedance ferrite beads and transient voltage suppressors (TVSs). High-impedance ferrite beads provide higher impedance at high frequencies, effectively suppressing the propagation of high-frequency noise and reducing noise coupling and propagation. The high-impedance ferrite beads further isolate noise on the power line, preventing it from propagating from one circuit section to another, thereby improving the overall system's anti-interference capabilities. TVSs are used to suppress transient overvoltages (such as lightning strikes and arcing). They quickly conduct when an overvoltage occurs, clamping the overvoltage to a safe level and protecting subsequent circuits from damage. By clamping the overvoltage within a safe range for a short period of time, they protect circuits from overvoltage damage.

[0048] The filtering unit and noise isolation unit in this embodiment can effectively reduce power supply noise, improve the quality and stability of the power supply, and thus provide reliable protection for the normal operation of electronic devices. The first power supply voltage output by the power supply separation module 12 is transmitted through the power line, separating the OCP power supply of the first processor from the signal transmission of the second processor, thereby avoiding conflicts with the mainboard power supply.

[0049] Furthermore, the power ground of the power supply separation module 12 and the signal ground of the signal relay module 11 are connected at a single point through a 0Ω resistor, thereby achieving effective isolation between the power ground and the signal ground, reducing the interference of power noise on the signal line, and improving the integrity and reliability of the signal. In this embodiment, the 0Ω resistor is essentially a conductor, which plays the role of connecting the power ground and the signal ground in the circuit to ensure that the two are electrically connected. In addition, although the resistance of the 0Ω resistor is close to zero, it still has a certain parasitic inductance and parasitic capacitance under high-frequency signals. These parasitic parameters can isolate high-frequency noise to a certain extent and prevent high-frequency noise from propagating between the power ground and the signal ground through the ground path. In some situations where hot plugging is required, the 0Ω resistor can limit the impact of instantaneous current and protect the circuit from damage. During the circuit design and debugging stage, the 0Ω resistor can be easily removed or replaced to facilitate testing and optimization of the circuit's grounding strategy.

[0050] In some embodiments of the present application, the power supply separation module 12 further includes: a power supply protection unit, configured to cut off the input of the power supply voltage in response to a network card migration request.

[0051] Specifically, NIC migration refers to the migration of a NIC from one processor to another in some multi-processor or distributed systems. This migration may be due to load balancing, failover, or other system management policies. When a NIC migration request is detected, it means that the NIC is about to switch from one processor to another, which may cause a sudden change in power requirements.

[0052] The power supply isolation module 12 of the first adapter card 10 can implement intelligent power distribution management using electronic fuses. By monitoring the current of the first processor's OCP interface (network interface), it determines whether a network card migration request has been received. Upon detecting a network card migration request, the 12V main power supply is disconnected within 10ms, while maintaining a 3.3V standby power supply. Back-to-back MOSFETs (Metal-Oxide-Semiconductor Field-Effect Transistors) are also integrated to prevent power from the second processor from flowing back into the first processor. By disconnecting the power supply voltage input, power supply overload or damage is prevented during the network card migration process, ensuring stable system operation. Maintaining a 3.3V standby power supply prevents a complete system power outage, enabling rapid resumption of operation after the main power supply is restored, reducing the time and complexity of system restarts. Furthermore, the back-to-back MOSFET, a circuit structure consisting of two MOSFETs, prevents power from the second processor from flowing back into the first processor during power switching, which could cause a power short circuit or other failure. Therefore, back-to-back MOSFETs are used to achieve power isolation.

[0053] In some embodiments of the present application, the second adapter card 20 includes: a signal reshaping module 21, the input end of the signal reshaping module 21 is connected to the communication port of the first input end of the second adapter card 20, and the output end of the signal reshaping module 21 is suitable for being connected to the communication port of the output end of the second adapter card 20, for receiving a first communication signal and performing signal loss compensation on the first communication signal to generate a second communication signal; a voltage conversion module 22, the input end of the voltage conversion module 22 is connected to the power supply port of the first input end of the second adapter card 20, and the output end of the voltage conversion module 22 is suitable for being connected to the power supply port of the output end of the second adapter card 20, for receiving a first power supply voltage and performing voltage conversion on the first power supply voltage to generate a second power supply voltage; wherein, the second communication signal and the second power supply voltage are integrated at the output end of the second adapter card 20 to obtain a second output signal.

[0054] Specifically, the signal reshaping module 21 is used to compensate for the signal attenuation of the first communication signal due to long-distance transmission, thereby generating a second communication signal. For example, the signal reshaping module 21 can compensate for the signal attenuation of the received first communication signal through a signal relay chip, and then output the second communication signal. The voltage conversion module 22 is used to convert the first supply voltage to a target voltage compatible with the target network card to adapt to the PCIe power supply requirements of the second processor. The second communication signal is then integrated with the network card interface of the second adapter card 20 (i.e., the output end of the second adapter card 20) to generate a second output signal, which is then output through the target network card.

[0055] This embodiment isolates and transmits the communication signal and power supply in the first output signal of the first processor separately, and integrates and outputs them after signal and voltage processing respectively on the second adapter card 20. While ensuring the signal quality of the first processor, it is adapted to the target network card to meet the dynamic matching application requirements.

[0056] In some embodiments of the present application, the signal reshaping module 21 includes: a signal re-driving unit, configured to perform high-frequency gain compensation on the first communication signal based on the initial gain to generate a second communication signal.

[0057] Specifically, the signal re-driving unit performs high-frequency gain compensation on the received first communication signal to offset the attenuation of high-frequency components during cable transmission. For example, the initial gain is set to 6dB to compensate for the high-frequency attenuation of the first 8 inches of cable. The initial gain can be set according to actual conditions.

[0058] This embodiment can redrive and condition the received first communication signal through the signal redriving unit to enhance the signal quality so that the signal can be transmitted more stably and reliably.

[0059] In some embodiments of the present application, the signal re-driving unit is further configured to adjust the initial gain based on a signal transmission bit error rate test result, so as to perform high-frequency gain compensation on the first communication signal based on the adjusted initial gain.

[0060] Specifically, the Bit Error Rate (BER) test is a method used to evaluate the performance of digital communication systems. It quantifies signal quality by measuring the ratio of the number of bit errors occurring during transmission to the total number of bits transmitted. This test can be performed using a Bit Error Rate Tester (BERT), which generates a known test signal and detects errors in the signal at the receiving end to calculate the signal transmission bit error rate. For example, the signal re-driver unit is set to an initial gain of 6dB to compensate for high-frequency attenuation in the first 8 inches of cable, and a 5-tap tap is set to eliminate intersymbol interference (ISI). Based on the BER test results, the gain is dynamically adjusted (from -3.5dB to -6dB) to further optimize signal quality.

[0061] This embodiment dynamically adjusts the compensation gain based on the signal transmission bit error rate test result to further improve the transmission quality and reliability of the signal.

[0062] In some embodiments of the present application, the voltage conversion module 22 includes: a voltage reduction unit, configured to reduce the first supply voltage to a target voltage to generate a second supply voltage.

[0063] That is to say, when the power supply separation module 12 outputs the first power supply voltage through filtering and noise isolation, the first power supply voltage (12V) is reduced to 3.3V / 5V required by the target network card through the step-down unit in the voltage conversion module 22 to obtain the second power supply voltage for signal integration.

[0064] Combine Figure 3 As shown, in some embodiments of the present application, the second adapter card 20 further includes: a hot plug button for triggering a hot plug request and sending it to the second processor, so that the second processor triggers a hot plug control process based on the hot plug request.

[0065] In other words, the second adapter card 20 supports hot-swap functionality, which means that hardware components can be safely inserted or removed while the device is running without affecting the normal operation of the system. For network adapter cards, hot-swap functionality allows users to safely insert or remove network cards without shutting down the system power, thereby improving system availability and efficient maintenance.

[0066] The second adapter card 20 is provided with a communication interface connected to the communication interface of the second processor, and can communicate with the second processor via the EDID (Extended Display Identification Data) protocol.

[0067] The hot-swap button can be a physical button located on the front panel or side of the second riser card 20. The user can trigger the hot-swap operation by pressing this button. Specifically, after the user presses the hot-swap button, a hot-swap request is sent to the second processor via communication. Upon receiving the hot-swap request, the second processor executes the following hot-swap control process to ensure that the second riser card can be hot-swapped. The specific hot-swap control process is as follows:

[0068] Cut off the power supply: Cut off the power supply of the network card to ensure that no arcing or circuit damage occurs when inserting or removing the network card;

[0069] Disable signal channel: disable the signal channel of the network card to prevent signal interference or damage;

[0070] Update system status: The system updates its internal status and records the insertion or removal of the network card;

[0071] Indicator light: The system uses an indicator light to provide feedback to the user on the status of hot-swap operations. For example, when the indicator light turns green, it means that the network card can be safely inserted or removed.

[0072] Insert or remove the network card: Users can safely insert or remove the network card according to the prompts of the indicator light;

[0073] System recovery: When the network card is inserted, the system will re-supply power and enable the signal channel to restore the normal operation of the network card.

[0074] This embodiment implements hot-swap functionality based on a hot-swap button, allowing users to safely insert or remove network cards without powering down the system. This functionality utilizes a series of safety mechanisms (such as power management, signal isolation, and software support) to ensure that the hot-swap process does not damage the system or the network card. Hot-swap functionality is crucial in scenarios where frequent maintenance and replacement of network cards is required, such as data centers, servers, and industrial control systems, improving system availability and maintenance efficiency.

[0075] Furthermore, the second adapter card 20 also supports the PCIe 4.0 / 5.0 protocol and is connected to other interfaces of the second processor.

[0076] As a specific embodiment of this application, Figure 1-3 As shown, the hardware deployment of the network card connection circuit 100 is as follows: A first riser card 10 is inserted into the OCP 3.0 port of the first processor and fixed to the rear window of the server. A custom cable is used to connect the output of riser card 1 to the input of a second riser card 20. Second riser card 20 is inserted into the Slimline port reserved on the motherboard, which is the data port of the second processor.

[0077] The signal processing flow of the network card connection circuit 100 is as follows: the PCIe signal from the first processor is relayed by the first riser card 10 and then transmitted to the second riser card 20 via a shielded differential line. The re-driver chip in the second riser card 20 reshapes the signal and then sends it to the network card interface of the second processor.

[0078] The power management process for the network card connection circuit 100 is as follows: the first adapter card 10 obtains 12V power from the OCP interface and transmits it to the second adapter card 20 via an independent power line. The second adapter card 20 has a built-in DC-DC (Direct Current-Direct Current) module that converts the 12V power to the 3.3V / 5V required by the target network card.

[0079] In addition, the power supply separation module 12 of the first adapter card 10 uses eFuse (electronic fuse) to implement intelligent power distribution management: it monitors the OCP interface current of the first processor, and when a network card migration request is detected, it cuts off the 12V main power supply within 10ms, retains the 3.3V standby power supply, and integrates back-to-back MOSFETs to prevent the power supply on the second processor side from flowing back to the first processor.

[0080] The second adapter card 20 is equipped with a re-driver chip that performs adaptive equalization. On the receiving end, CTLE (Continuous Time Linear Equalization) uses an initial gain of 6dB to compensate for high-frequency attenuation in the first 8 inches of cable. A fifth-order tap eliminates intersymbol interference (ISI). Dynamic adjustment (-3.5dB to -6dB) is performed based on BER testing.

[0081] Therefore, in this embodiment, the first adapter card 10 connected to the first processor is used to separate the PCIe signal and power supply, and the second adapter card 20 connected to the second processor integrates signal reshaping and voltage conversion functions, and independently transmits signals and power through the shielded cable connecting the two adapter cards.

[0082] The network card connection circuit 100 dynamically allocates resources across CPUs based on the dual-rise card OCP network card, and can achieve at least the following beneficial effects:

[0083] Load balancing: Flexibly allocates OCP network cards to idle CPUs to improve resource utilization. Specifically, this optimizes the match between the OCP network card and the target CPU (i.e., the second processor) based on each CPU's PCIe channel utilization, memory bandwidth occupancy, and computing load, combined with the NUMA (Non-Uniform Memory Access) topology. In typical dual-core server scenarios, cross-CPU resource allocation can improve overall resource utilization while reducing network latency fluctuations.

[0084] Compatibility: The hardware is compatible with the OCP NIC 3.0 standard. The specially designed mechanical structure maintains the original server chassis layout. The riser card gold finger definition is fully compatible with the standard OCP slot, supporting mainstream server architecture without modifying the motherboard design.

[0085] Cost advantage: The signal-power separation architecture eliminates the need for complex high-speed switching chips and supporting clock buffer circuits, reducing hardware costs.

[0086] In summary, the network card connection circuit of the embodiment of the present application receives the first output signal emitted by the corresponding first processor through the first adapter card, and separates the communication signal and the power supply voltage in the first output signal to obtain the first communication signal and the first power supply voltage, and sends them to the first input end of the second processor through the communication line and the power line respectively. The second adapter card integrates the received first communication signal and the first power supply voltage to obtain the second output signal, and sends the second output signal based on the target network card. The second adapter card is also used to receive the third output signal emitted by the second processor, so as to send the third output signal through the target network card for communication transmission of the second processor. That is to say, the network card interface of the first processor can be connected to the target network card corresponding to the second processor through the first adapter circuit and the second adapter circuit. As a result, it can not only be used for communication transmission of the second processor through the target network card, but also can be used for the communication transmission needs of the first processor. At this time, when the resources of the first processor are insufficient, the target network card corresponding to the second processor can be multiplexed through the first adapter card and the second adapter card, so as to perform communication transmission based on the target network card. Therefore, the technical problem of communication transmission delay of the OCP network card when CPU resources are insufficient can be solved, and the technical effect of dynamically allocating target network cards across CPU resources and improving load balancing can be achieved.

[0087] Corresponding to the above embodiment, the present application also provides a server.

[0088] like Figure 4 As shown, the server 1000 of the embodiment of the present application includes: multiple processors, wherein the multiple processors include a second processor 200 and a first processor 300; and the above-mentioned network card connection circuit 100.

[0089] The server 1000 can be provided with multiple network card connection circuits 100 as required. Each network card connection circuit 100 can correspond to a second processor 200 and a first processor 300, or can correspond to a second processor 200 and a first processor 300, without any specific limitation.

[0090] In some embodiments of the present application, the second processor 200 is determined based on the utilization of each processor in the plurality of processors.

[0091] Specifically, the utilization rate of each processor can be determined by the physical link connection status. For example, when there are many devices such as hard disks and network cards connected to the processor, the CPU utilization rate is considered to be higher. Alternatively, by viewing the command in real time under the operating system, the utilization rate value of each CPU can be seen, and the processor with lower utilization rate can be selected as the second processor 200.

[0092] As a result, server 1000 can achieve load balancing, flexibly assigning OCP network cards to idle CPUs and improving resource utilization. Specifically, the target network card and the second processor can be matched based on each CPU's PCIe channel utilization, memory bandwidth occupancy, and computing load indicators, combined with the NUMA (Non-Uniform Memory Access) topology characteristics.

[0093] In summary, the server of the embodiment of the present application realizes network card sharing between the first processor and the second processor through the network card connection circuit, that is, the network card interface of the first processor is connected to the target network card at the second processor through the network card connection circuit, thereby not only being used for communication transmission of the second processor through the target network card, but also being used for the communication transmission needs of the first processor. When the resources of the first processor are insufficient, communication transmission can be performed based on the target network card, thereby solving the technical problem of communication transmission delay of the OCP network card when CPU resources are insufficient, and achieving the technical effect of dynamically allocating target network cards across CPU resources and improving load balancing.

[0094] Through the description of the above implementation methods, those skilled in the art can clearly understand that the method according to the above embodiment can be implemented by means of software plus the necessary general hardware platform, and of course it can also be implemented by hardware, but in many cases the former is a better implementation method.

[0095] Professionals may further appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of the two. In order to clearly illustrate the interchangeability of hardware and software, the above description has generally described the components and steps of each example according to their functions. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professionals and technicians may use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0096] The above is a detailed introduction to a network card connection circuit and server provided by the present application. Specific examples are used herein to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only intended to help understand the method and core ideas of the present application. It should be pointed out that, for those skilled in the art, without departing from the principles of the present application, several improvements and modifications can be made to the present application, and these improvements and modifications also fall within the scope of protection of the claims of the present application.

Claims

1. A network card connection circuit, characterized in that: include: a first adapter card, wherein an input end of the first adapter card is connected to the network card interface of the first processor, and is configured to receive a first output signal sent by the first processor, and separate a communication signal and a power supply voltage from the first output signal to obtain a first communication signal and a first power supply voltage; a second riser card provided for the second processor, wherein a first input end of the second riser card is connected to an output end of the first riser card, a second input end of the second riser card is connected to a data interface of the second processor, and an output end of the second riser card is connected to a target network card, and is configured to receive and integrate the first communication signal and the first supply voltage to obtain a second output signal, and / or receive a third output signal sent by the second processor, and send the second output signal or the third output signal through the target network card; The first adapter card includes: a signal relay module, wherein an input end of the signal relay module is connected to the communication port of the input end of the first riser card, and an output end of the signal relay module is adapted to be connected to the communication port of the first input end of the second riser card, and is configured to receive the communication signal in the first output signal through the communication port of the input end of the first riser card, and generate a first communication signal based on the communication signal in the first output signal; A power supply separation module, wherein the input end of the power supply separation module is connected to the power supply port of the input end of the first adapter card, and the output end of the power supply separation module is suitable for being connected to the power supply port of the first input end of the second adapter card, and is used to receive the power supply voltage in the first output signal through the power supply port of the input end of the first adapter card, and generate a first power supply voltage based on the power supply voltage in the first output signal.

2. The network card connection circuit according to claim 1, wherein: The signal relay module includes: A differential signal amplifying unit, the input end of which is connected to the communication port of the input end of the first adapter card, and is used to amplify the communication signal in the first output signal to generate the first communication signal.

3. The network card connection circuit according to claim 2, characterized in that: The signal relay module further includes: An electrostatic protection unit, one end of which is connected to the communication port at the input end of the first adapter card and the input end of the differential signal amplifying unit respectively, and the other end of which is grounded.

4. The network card connection circuit according to claim 2, characterized in that: The signal relay module further includes: An impedance matching unit, one end of which is connected to the output end of the differential signal amplifying unit, and the other end of which serves as the output end of the signal relay module.

5. The network card connection circuit according to any one of claims 1 to 4, characterized in that: The output end of the signal relay module is adapted to be connected to the communication port of the first input end of the second adapter card through a shielded cable.

6. The network card connection circuit according to claim 1, characterized in that: The power supply separation module includes: a filtering unit and a noise isolation unit, which are used to filter and perform noise isolation processing on the power supply voltage in the first output signal to generate a first power supply voltage.

7. The network card connection circuit according to claim 1 or 6, characterized in that: The power supply separation module further includes: The power supply protection unit is configured to cut off the input of the power supply voltage in response to a network card migration request.

8. The network card connection circuit according to claim 1, characterized in that: The second riser card includes: a signal reshaping module, wherein an input end of the signal reshaping module is connected to the communication port of the first input end of the second riser card, and an output end of the signal reshaping module is adapted to be connected to the communication port of the output end of the second riser card, and is configured to receive the first communication signal and perform signal loss compensation on the first communication signal to generate a second communication signal; a voltage conversion module, wherein the input end of the voltage conversion module is connected to the power supply port of the first input end of the second riser card, and the output end of the voltage conversion module is adapted to be connected to the power supply port of the output end of the second riser card, and is configured to receive the first supply voltage and perform voltage conversion on the first supply voltage to generate a second supply voltage; The second communication signal and the second power supply voltage are integrated at the output end of the second adapter card to obtain the second output signal.

9. The network card connection circuit according to claim 8, characterized in that: The signal reshaping module includes: A signal re-driving unit is configured to perform high-frequency gain compensation on the first communication signal based on an initial gain to generate the second communication signal.

10. The network card connection circuit according to claim 9, characterized in that: The signal re-driving unit is further configured to adjust the initial gain based on a signal transmission bit error rate test result, so as to perform high-frequency gain compensation on the first communication signal according to the adjusted initial gain.

11. The network card connection circuit according to claim 8, characterized in that: The voltage conversion module includes: A voltage reduction unit is configured to reduce the first supply voltage to a target voltage to generate the second supply voltage.

12. The network card connection circuit according to claim 1, wherein: The second riser card further includes: The hot plug button is used to trigger a hot plug request and send it to the second processor, so that the second processor triggers a hot plug control process based on the hot plug request.

13. A server, characterized in that: include: Multiple processors, the multiple processors include a second processor and a first processor, wherein the second processor and the first processor are applied to the network card connection circuit according to any one of claims 1-12.

14. The server according to claim 13, wherein: The second processor is determined based on a utilization rate of each processor in the plurality of processors.

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