Display device and manufacturing method thereof

Abstract

An embodiment discloses a display device including: a substrate in which a first sub-pixel, a second sub-pixel, and a third sub-pixel are defined, each sub-pixel being divided into four sub-regions; an insulating layer disposed on the substrate; a plurality of first electrodes disposed on the insulating layer to correspond to four sub-regions in each of the first to third sub-pixels; the grooves are positioned among four sub-regions divided in each of the first sub-pixel, the second sub-pixel and the third sub-pixel; hole layers formed on the plurality of first electrodes, respectively; first to third emission material layers formed on the hole layer, respectively; an electron layer formed on the substrate including the first to third emission material layers; and a second electrode formed on the electronic layer.

Description

[0001] Cross - reference to related applications

[0002] This application claims the priority and benefit of Korean Patent Application No. 2024 - 0009931, filed on January 23, 2024, the disclosure of which is incorporated herein by reference in its entirety. Technical field

[0003] The present disclosure relates to a display device, and more particularly, to a display device for displaying an image and a method of manufacturing the same. Background art

[0004] With the development of the information society, the demand for display devices for displaying images has increased in various forms. Accordingly, various display devices, such as liquid crystal display (LCD) devices, plasma display panel (PDP) devices, quantum dot light - emitting display (QLED) devices, and organic light - emitting display (OLED) devices, have been used in recent years.

[0005] Recently, a head - mounted display (HMD) equipped with such a display device has been developed. A head - mounted display is a glasses - type monitor device for virtual reality (VR) or augmented reality (AR), which is worn in the form of glasses or a helmet to form a focus at a short distance in front of the user's eyes. For such a head - mounted display, it is important to reduce the distance between pixels and increase the light - emitting area for improving performance. Summary of the invention

[0006] The present disclosure relates to providing a display device and a method of manufacturing the same, which can ensure that the anode area of a thin - film transistor matches the emission area of an emissive material layer (EML) at a ratio of greater than or equal to 1:2 to improve the manufacturing freedom of a fine metal mask (FMM), thereby implementing the FMM manufacturing technology and mass productivity required for an ultra - high - resolution display.

[0007] The object of the present disclosure is not limited to the above - mentioned object, and other objects not mentioned will be clearly understood by those skilled in the art from the following description.

[0008] According to one aspect of the present disclosure, a display device is provided, including: a substrate in which a first sub-pixel, a second sub-pixel, and a third sub-pixel are defined, each sub-pixel being divided into at least two sub-regions; a plurality of thin film transistors respectively disposed corresponding to the at least two sub-regions in each of the first sub-pixel to the third sub-pixel; an insulating layer disposed on the plurality of thin film transistors; a plurality of first electrodes disposed on the insulating layer to correspond to the at least two sub-regions in each of the first sub-pixel to the third sub-pixel and respectively connected to the plurality of thin film transistors; trenches located between the sub-regions divided in each of the first sub-pixel to the third sub-pixel; an organic electroluminescent compound layer disposed on the first electrodes; and a second electrode formed on the organic electroluminescent compound layer, wherein the at least two sub-regions in each of the first sub-pixel to the third sub-pixel have the same color.

[0009] According to another aspect of the present disclosure, a display device is provided, including: a substrate in which a first sub-pixel, a second sub-pixel, and a third sub-pixel are defined, each sub-pixel being divided into at least two sub-regions; an insulating layer disposed on the substrate; a reflective electrode disposed on the insulating layer; a plurality of first electrodes disposed on the insulating layer to correspond to the at least two sub-regions in each of the first sub-pixel to the third sub-pixel; trenches located between the at least two sub-regions divided in each of the first sub-pixel to the third sub-pixel; an organic electroluminescent compound layer disposed on the first electrodes; and a second electrode formed on the organic electroluminescent compound layer, wherein the at least two sub-regions in each of the first sub-pixel to the third sub-pixel have the same color.

[0010] According to another aspect of the present disclosure, there is provided a method for manufacturing a display device, the method including: preparing a substrate, defining a first sub-pixel, a second sub-pixel, and a third sub-pixel in the substrate, each sub-pixel being divided into at least two sub-regions, forming a plurality of first electrodes, the plurality of first electrodes being respectively disposed corresponding to the at least two sub-regions in each of the first sub-pixel to the third sub-pixel, forming a first hole layer to a third hole layer respectively on the plurality of first electrodes in the sub-regions in the first sub-pixel to the third sub-pixel, sequentially forming a first emission material layer to a third emission material layer (EML) on the first hole layer to the third hole layer on the sub-regions in the first sub-pixel to the third sub-pixel using first to third fine metal masks (FMM), forming an electron layer on the substrate including the first to third emission material layers, and forming a second electrode on the electron layer. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] The above and other objects, features, and advantages of the present disclosure will become more apparent to those of ordinary skill in the art by referring to the accompanying drawings and by describing the exemplary embodiments of the present disclosure in detail, wherein:

[0012] Figure 1 is a perspective view showing a display device according to an embodiment of the present disclosure;

[0013] Figure 2 is a plan view schematically showing a first substrate;

[0014] Figure 3 is a plan view schematically showing a trench of a sub-pixel;

[0015] Figure 4 shows Figure 3 a plan view of an arrangement of sub-pixels;

[0016] Figure 5 is a cross-sectional view taken along line I-I' of Figure 4 ;

[0017] Figure 6 is a cross-sectional view specifically showing a configuration example of a first electrode, an emission material layer, and a second electrode in four sub-regions of a green sub-pixel in a display device according to an embodiment of the present disclosure;

[0018] Figure 7 is a cross-sectional view taken along line II-II' of Figure 4 ;

[0019] Figure 8 is Figure 7 an enlarged cross-sectional view of part A of;

[0020] Figure 9It is a cross-sectional view specifically showing an example configuration of a first electrode, an emission material layer, and a second electrode in two of four sub-regions of green, blue, and red sub-pixels in a display device according to an embodiment of the present disclosure;

[0021] Figure 10 It is a flowchart showing a manufacturing process of a display device according to an embodiment of the present disclosure;

[0022] Figures 11A to 11H It is a cross-sectional view showing a manufacturing method of a display device according to an embodiment of the present disclosure;

[0023] Figure 12 It is a plan view showing a case where a green (G)-emission material layer (EML) is formed on a sub-region in a green sub-pixel by applying a green fine metal mask (FMM) in a display device according to an embodiment of the present disclosure;

[0024] Figure 13 It is a plan view showing a case where a red (R)-EML is formed on a sub-region in a red sub-pixel by applying a red FMM in a display device according to an embodiment of the present disclosure;

[0025] Figure 14 It is a plan view showing a case where a blue (B)-EML is formed on a sub-region in a blue sub-pixel by applying a blue FMM in a display device according to an embodiment of the present disclosure;

[0026] Figure 15 It is a plan view showing a case where one pixel is composed of red, green, and blue sub-pixels in a display device according to an embodiment of the present disclosure;

[0027] Figure 16 In another embodiment of the present disclosure, along Figure 4 a cross-sectional view taken along line II-II'; and

[0028] Figure 17 It is a cross-sectional view specifically showing an example configuration of a first electrode, an emission material layer, and a second electrode in two of four sub-regions of green, red, and blue sub-pixels in a display device according to another embodiment of the present disclosure. Detailed Description

[0029] Advantages and features of the present disclosure and methods for implementing them will become clear through the embodiments described below with reference to the accompanying drawings and in detail. However, the present disclosure is not limited to the embodiments disclosed below, but can be implemented in various different forms. These embodiments are provided only to allow those skilled in the art to fully understand the scope of the present disclosure, and the present disclosure is defined only by the scope of the claims.

[0030] The figures, dimensions, ratios, angles, quantities, etc. disclosed in the accompanying drawings for describing the embodiments of the present disclosure are merely illustrative and are not limited to what is shown in the present disclosure. In addition, when describing the present disclosure, detailed descriptions of well-known technologies will be omitted when it is determined that the well-known technologies may unnecessarily obscure the gist of the present disclosure.

[0031] Terms such as "including", "having", and "consisting of" used herein are intended to allow the addition of other elements, unless these terms are used together with the term "only".

[0032] Even if not explicitly stated, components are interpreted to include the ordinary error range.

[0033] When describing positional relationships, for example, when expressing the positional relationship between two parts as "above", "over", "below", "next to", etc., unless the terms "immediately" or "directly" are used in the description, one or more parts may be inserted therebetween.

[0034] When an element or layer is disposed "on" another element or layer, the element is directly disposed on the other element or layer, or may be disposed on the other element or layer with another element therebetween.

[0035] In addition, terms such as "first", "second", etc. are used herein to describe various components, but the components are not limited by these terms. These terms are only used to distinguish one component from another. Therefore, without departing from the teachings of the present disclosure, the first component discussed below may be referred to as the second component.

[0036] Throughout the specification, the same reference numerals generally denote the same elements.

[0037] For ease of description, the dimensions and thicknesses of each component are shown in the accompanying drawings, but the present disclosure is not necessarily limited to the dimensions and thicknesses of the components shown.

[0038] The features of various embodiments of the present disclosure can be partially or completely combined or integrated with each other. The embodiments can interoperate and be executed in various ways technically, and can also be executed independently of each other or in association with each other.

[0039] Hereinafter, examples of a display device according to the present disclosure will be described in detail with reference to the accompanying drawings. When adding reference numerals to the components in each drawing, the same components have the same reference numerals as much as possible even if shown in different drawings.

[0040] Figure 1 is a perspective view showing a display device according to an embodiment of the present disclosure.

[0041] Reference Figure 1, a display device according to an embodiment of the present disclosure includes a display panel 100, a source driver integrated circuit (hereinafter referred to as "source driver IC") 21, a flexible film 22, a circuit board 23, and a timing controller 24.

[0042] The display panel 100 includes a first substrate 111 and a second substrate 112. The second substrate 112 may be a packaging substrate. Gate lines, data lines, and pixels are formed on one surface of the first substrate 111 facing the second substrate 112. The second substrate may be disposed on a part of the first substrate. However, the first substrate may include an exposed portion on which the second substrate is not disposed.

[0043] Pixels are disposed in regions defined by the crossing structure of the gate lines and the data lines. Each pixel may include a light-emitting element, which includes a thin-film transistor, a first electrode, an emission material layer, and a second electrode. Each pixel is provided in a region defined by the crossing structure of the gate lines and the data lines by using the thin-film transistor.

[0044] When a gate signal from the gate line is input thereto by using the thin-film transistor, each pixel supplies a predetermined current to the organic light-emitting element according to the data voltage of the data line. Therefore, the organic light-emitting element of each pixel can emit light with a predetermined brightness according to the predetermined current. The structure of each pixel will be described later with reference to Figure 5 Describe the structure of each pixel.

[0045] The display panel 100 may be divided into a display area in which pixels are formed to display an image and a non-display area in which no image is displayed. Gate lines, data lines, and pixels may be formed in the display area. A gate driver and pads may be disposed in the non-display area. In addition, in a variant, some or all of the gate lines, data lines, and pixels are not disposed in the non-display area.

[0046] The gate driver supplies a gate signal to the gate lines according to a gate control signal input from the timing controller 24. The gate driver may be formed in a non-display area outside one or both sides of the display area of the display panel 100 by using an in-panel gate driver (GIP) method. Alternatively, the gate driver may be manufactured as a driving chip, may be mounted on the flexible film, and may be attached to a non-display area outside one or both sides of the display area of the display panel 100. The gate driver may be attached to the non-display area by a tape automated bonding (TAB) method, but the attachment method is not limited thereto.

[0047] The source driver IC 21 receives digital video data and source control signals from the timing controller 24. The source driver IC 21 converts the digital video data into analog data voltages according to the source control signals and supplies the analog data voltages to the data lines. When the source driver IC 21 is manufactured as a driver chip, the source driver IC 21 can be mounted on the flexible film 22. In addition, when the source driver IC 21 is manufactured as a driver chip, the source driver IC 21 can be mounted by a chip on film (COF) method or a chip on plastic (COP) method, but the mounting method is not limited thereto.

[0048] Pads such as data pads can be formed in the non-display area of the display panel 100. Wires for connecting the pads to the source driver IC 21 and wires for connecting the pads to the wires in the circuit board 23 can be formed in the flexible film 22. The flexible film 22 can be attached to the pads using an anisotropic conductive film so that the pads can be connected to the wires in the flexible film 22.

[0049] The circuit board 23 can be attached to the flexible film 22. However, in another embodiment, the flexible film can be attached to the circuit board 23. A plurality of circuits implemented as driver chips can be mounted on the circuit board 23. For example, the timing controller 24 can be mounted on the circuit board 23. The circuit board 23 can be a printed circuit board or a flexible printed circuit board.

[0050] The timing controller 24 receives digital video data and timing signals from an external system board through the cable of the circuit board 23. The timing controller 24 generates a gate control signal for controlling the operation timing of the gate driver and a source control signal for controlling the source driver IC 21 based on the timing signals. The timing controller 24 supplies the gate control signal to the gate driver and supplies the source control signal to the source driver IC 21.

[0051] Figure 2 is a plan view schematically showing a first substrate, Figure 3 is a plan view schematically showing a trench of a sub-pixel, and Figure 4 is showing Figure 3 the layout of the sub-pixels.

[0052] Reference Figures 2 to 4 , the first substrate 111 is divided into a display area DA, a non-display area NDA, and a pad area PA where pads are provided. In addition, the pad area PA can be provided in the non-display area NDA.

[0053] Data lines and gate lines intersecting the data lines are formed in the display area DA. In addition, in the display area DA, pixels P for displaying an image in a matrix form are formed in the intersecting area of the data lines and the gate lines.

[0054] Each pixel P may include a first sub-pixel P1, a second sub-pixel P2, and a third sub-pixel P3. The first sub-pixel P1 may be provided to emit green light, the second sub-pixel P2 may be provided to emit red light, and the third sub-pixel P3 may be provided to emit blue light. However, the present disclosure is not necessarily limited thereto. For example, each of the first sub-pixel P1, the second sub-pixel P2, and the third sub-pixel P3 may be configured to emit one of green light, red light, or blue light. Each pixel may further include a fourth sub-pixel that emits white (W) light. Additionally, the arrangement order of the sub-pixels P1, P2, and P3 may be changed in various ways.

[0055] Reference Figures 3 to 4 , the first sub-pixel P1 may be divided into at least two sub-regions, such as four first sub-regions P1-1, P1-2, P1-3, and P1-4, the second sub-pixel P2 may be divided into four second sub-regions P2-1, P2-2, P2-3, and P2-4, and the third sub-pixel P3 may be divided into four third sub-regions P3-1, P3-2, P3-3, and P3-4. However, the present disclosure is not necessarily limited thereto. For example, the first to third sub-pixels may be divided into less than four sub-regions or more than four sub-regions.

[0056] In this embodiment, the case where each of the sub-pixels P1, P2, and P3 is divided into four sub-regions is described by way of example, but it may be defined by dividing each sub-pixel into at least two sub-regions.

[0057] As described above, by ensuring that the anode area of the thin-film transistor corresponds to the emission area of the emission material layer (EML) (i.e., the area that requires the FMM) at a ratio of at least 1:2, rather than the conventional 1:1 matching, the manufacturing freedom of the fine metal mask (FMM) can be increased by four times to achieve the FMM manufacturing technology and mass productivity required for R / G / B in an ultra-high resolution display. In another embodiment, the ratio of the anode area to the emission area may be a 1:4 ratio. However, the configuration is not limited thereto.

[0058] In particular, by dividing each of the first to third sub-pixels P1, P2, and P3 into at least two or more sub-regions, such as four sub-regions P1-1 to P1-4, P2-1 to P2-4, or P3-1 to P3-4, the area of the EML to be formed can be increased by four times by using the FMM, thereby reducing the manufacturing process difficulty of the FMM. In addition, the problem of mask clogging in the FMM can be reduced by increasing the opening area, thereby improving the production efficiency.

[0059] In the present embodiment, the first sub-pixel P1 is a green (G) sub-pixel, the second sub-pixel P2 is a red (R) sub-pixel, and the third sub-pixel P3 is a blue (B) sub-pixel. However, the present disclosure is not limited thereto.

[0060] Here, when a gate signal is input through a gate line, each of the sub-pixels P1, P2, and P3 supplies a predetermined current to a light-emitting element according to a data voltage of a data line. Accordingly, the light-emitting elements in each of the sub-pixels P1, P2, and P3 can emit light having a predetermined brightness according to the predetermined current. In addition, a power supply voltage is supplied to a power supply line. The power supply line supplies the power supply voltage to each of the sub-pixels P1, P2, and P3.

[0061] Hereinafter, the structures of the sub-pixels P1, P2, and P3 according to an embodiment of the present disclosure will be described in more detail. Here, two of the four sub-regions of each of the sub-pixels P1, P2, and P3, i.e., P1-1 and P1-2, P2-1 and P2-2, or P3-1 and P3-2, will be described by way of example.

[0062] Figure 5 is a cross-sectional view taken along line I-I' of Figure 4 and Figure 6 is a cross-sectional view specifically showing an example of the arrangement of a first electrode, an emission material layer, and a second electrode in two of the four sub-regions of a green sub-pixel in a display device according to an embodiment of the present disclosure.

[0063] Figure 7 is a cross-sectional view taken along line II-II' of Figure 4 Figure 8 is Figure 7 a magnified cross-sectional view of part A of Figure 9 and is a cross-sectional view specifically showing an example of the arrangement of a first electrode, an emission material layer, and a second electrode in two of the four sub-regions of green, blue, and red sub-pixels in a display device according to an embodiment of the present disclosure.

[0064] Referring to Figures 5 to 9 , the first substrate 111 is divided into a display area DA and a non-display area NDA, and a pad area PA in which pads are formed may be formed in the non-display area NDA.

[0065] Data lines and gate lines intersecting the data lines are formed in the display area DA. In addition, pixels P for displaying an image in a matrix form are formed in the display area DA at the intersection areas of the data lines and the gate lines.

[0066] ​Each pixel P may include a first sub-pixel P1, a second sub-pixel P2, and a third sub-pixel P3. The first sub-pixel P1 may be provided to emit green light, the second sub-pixel P2 may be provided to emit red light, and the third sub-pixel P3 may be provided to emit blue light. However, the present disclosure is not necessarily limited thereto. Each pixel may further include a fourth sub-pixel that emits white (W) light. Additionally, the arrangement order of the sub-pixels P1, P2, and P3 may be changed in various ways.

[0067] Reference Figure 3 , the first sub-pixel P1 may be divided into four first sub-regions P1-1, P1-2, P1-3, and P1-4, the second sub-pixel P2 may be divided into four second sub-regions P2-1, P2-2, P2-3, and P2-4, and the third sub-pixel P3 may be divided into four third sub-regions P3-1, P3-2, P3-3, and P3-4.

[0068] In this embodiment, the first sub-pixel P1 is a green sub-pixel, the second sub-pixel P2 is a red sub-pixel, and the third sub-pixel P3 is a blue sub-pixel. However, the present disclosure is not limited thereto.

[0069] Here, when a gate signal is input through a gate line, each of the sub-pixels P1, P2, and P3 supplies a predetermined current to a light-emitting element according to the data voltage of a data line. Accordingly, the light-emitting elements of each of the sub-pixels P1, P2, and P3 may emit light having a predetermined brightness according to the predetermined current. In addition, a power supply voltage is supplied to a power supply line. The power supply line supplies the power supply voltage to each of the sub-pixels P1, P2, and P3.

[0070] Hereinafter, the structures of the sub-pixels P1, P2, and P3 according to an embodiment of the present disclosure will be described in more detail. Here, an example in which the green sub-pixel P1 is divided into four sub-regions P1-1, P1-2, P1-3, and P1-4 will be described by way of example.

[0071] Reference Figure 5 and 7 , a driving transistor TFT, an insulating layer 115, first, second, and third reflective electrodes 117, 118, and 119, first electrodes 121, 122, and 123, an emission material layer 130, a second electrode 140, a packaging film 170, a cover layer 160, first to third partition walls 151, 152, and 153, and a trench T are formed on one surface of the first substrate 111 facing the second substrate 112.

[0072] The first substrate 111 may be made of glass or plastic, but is not necessarily limited thereto, and may also be made of a semiconductor material such as a silicon wafer. The first substrate 111 may be made of a transparent material or an opaque material.

[0073] The display device according to an embodiment of the present disclosure may be provided in a top emission type in which the emitted light is emitted toward the upper part of the display panel 100, but the present disclosure is not necessarily limited thereto. When the display device according to an embodiment of the present disclosure is provided in a top emission type in which the emitted light is emitted toward the upper part of the display panel 100, the first substrate 111 may be made of an opaque material and a transparent material. Meanwhile, when the display device according to an embodiment of the present disclosure is provided in a so-called bottom emission type in which the emitted light is emitted toward the lower part of the display panel 100, the first substrate 111 may be made of a transparent material.

[0074] Reference Figure 7 , for each of the sub-pixels P1, P2, and P3, circuit elements including various signal lines, thin film transistors, capacitors, etc. are formed on the first substrate 111. The signal lines may include gate lines, data lines, power lines, and reference lines. In addition, the thin film transistors may include switching thin film transistors, driving transistors TFT, and sensing thin film transistors.

[0075] The switching thin film transistor is switched according to the gate signal provided to the gate line, and is used to provide the data voltage provided from the data line to the driving thin film transistor.

[0076] The driving transistor TFT is switched according to the data voltage provided from the switching thin film transistor, generates a data current according to the power provided from the power line, and is used to provide the generated data current to the first electrode 121.

[0077] The sensing thin film transistor is used to sense the threshold voltage deviation of the driving thin film transistor, which is the cause of image degradation, and provides the current of the driving thin film transistor to the reference line in response to the sensing control signal provided from the gate line or a separate sensing line.

[0078] The capacitor is used to hold the data voltage provided from the driving transistor TFT within one frame, and is connected to each of the gate terminal and the source terminal of the driving transistor TFT.

[0079] An insulating layer 115 is formed on the circuit element including the driving transistor TFT. The insulating layer 115 may be formed of an inorganic film, such as a silicon oxide (SiOx) film, a silicon nitride (SiNx) film, or a multilayer film of SiOx and SiNx, but the present disclosure is not necessarily limited thereto. The insulating layer 115 may be formed of an acrylic resin, an epoxy resin, a phenolic resin, a polyamide resin, a polyimide resin, etc. Alternatively, the insulating layer 115 may be formed of a multilayer film including at least one inorganic film and at least one organic film.

[0080] On the insulating layer 115, first to third reflective electrodes 117, 118, 119 and first electrodes 121, 122, 123 are respectively formed for sub-pixels P1, P2, P3.

[0081] The first sub-pixel P1 is divided into four sub-regions P1-1, P1-2, P1-3 and P1-4, and the first reflective electrode 117 and the first electrode 121 are formed in each of the four sub-regions P1-1, P1-2, P1-3 and P1-4.

[0082] In addition, the second sub-pixel P2 is divided into four sub-regions P2-1, P2-2, P2-3 and P2-4, and the second reflective electrode 118 and the first electrode 122 are formed in each of the four sub-regions P2-1, P2-2, P2-3 and P2-4.

[0083] In addition, the third sub-pixel P3 is divided into four sub-regions P3-1, P3-2, P3-3 and P3-4, and the third reflective electrode 119 and the first electrode 123 are formed in each of the four sub-regions P3-1, P3-2, P3-3 and P3-4.

[0084] The first to third reflective electrodes 117, 118 and 119 can be used as reflectors for reflecting the light emitted from the organic electroluminescent compound layer 130. In addition, the first to third reflective electrodes 117, 118 and 119 can be formed of silver (Ag), aluminum (Al) and molybdenum (Mo) having high conductivity and low work function or an alloy of the above materials, including an alloy of silver (Ag) and magnesium (Mg), but not limited thereto.

[0085] Reference Figure 7 , the first electrodes 121, 122 and 123 are connected to the driving transistors TFT. Specifically, the first electrodes 121, 122 and 123 are connected to the source or drain terminals of the driving transistors TFT through contact holes CH passing through the insulating layer 115, so that signals from the driving transistors TFT can be applied to the first electrodes 121, 122 and 123.

[0086] The first electrodes 121, 122 and 123 can be made of one of a transparent conductive metal material, a semi-transparent conductive metal material and a metal material having a high reflectivity, but not limited thereto.

[0087] When the display device is set to a top-emission type, the first electrodes 121, 122, and 123 may be formed of a metal material with a high reflectivity or a stacked structure of a metal material with a high reflectivity and a transparent conductive material. For example, the first electrodes 121, 122, and 123 may be formed of a metal material with a high reflectivity, such as a stacked structure of Al and titanium (Ti / Al / Ti), a stacked structure of Al and indium tin oxide (ITO) (ITO / Al / ITO), an Ag alloy, and a stacked structure of an Ag alloy and ITO (ITO / Ag alloy / ITO). The Ag alloy may be an alloy of silver (Ag), palladium (Pd), copper (Cu), etc. However, the first electrodes 121, 122, and 123 are not limited thereto and may be formed of other materials.

[0088] When the display device is set to a bottom-emission type, the first electrodes 121, 122, and 123 may be formed of a transparent conductive material (TCO) such as ITO and IZO that can transmit light, or a semi-transparent conductive material such as magnesium (Mg), silver (Ag), or an alloy of Mg and Ag. However, the first electrodes 121, 122, and 123 are not limited thereto and may be formed of other materials.

[0089] The first partition walls 151, the second partition walls 152, and the third partition walls 153 are formed on the first electrodes 121, 122, and 123, and an emission region EA is defined in each of the plurality of first sub-pixels P1, second sub-pixels P2, and third sub-pixels P3. That is, in each of the first sub-pixel to the third sub-pixels P1, P2, and P3, the region where the first partition walls 151, the second partition walls 152, and the third partition walls 153 are not formed and the first electrodes 121, 122, and 123 are exposed becomes the emission region EA. On the other hand, the region outside the emission region EA is a non-emission region.

[0090] In addition, in each of the sub-regions P1-1, P1-2, P1-3, and P1-4 divided from the first sub-pixel P1, the first partition wall 151 may define the emission region EA. In this embodiment, the first sub-pixel P1 is described as an example of a green sub-pixel, but the present disclosure is not limited thereto.

[0091] In addition, in each sub-region of the 2-1st to 2-4th sub-pixels P2-1, P2-2, P2-3, and P2-4 divided from the second sub-pixel P2, the second partition 152 may define an emission region EA. In this embodiment, the second sub-pixel P2 is described by taking the red sub-pixel as an example, but the present disclosure is not limited thereto. In addition, in each sub-pixel of the 3-1st to 3-4th sub-pixels P3-1, P3-2, P3-3, and P3-4 divided from the third sub-pixel P3, the third partition 153 may define an emission region EA. In this embodiment, the third sub-pixel P3 is described by taking the blue sub-pixel as an example, but the present disclosure is not limited thereto.

[0092] The first partition 151, the second partition 152, and the third partition 153 are respectively formed at the edges of the first electrodes 121, 122, and 123, so that the problem of current concentration at the ends of the first electrodes 121, 122, and 123 and the reduction of the light emission efficiency can be prevented.

[0093] Meanwhile, according to an embodiment of the present disclosure, the first partition 151, the second partition 152, and the third partition 153 are formed such that the trench T formed between the sub-pixels P1, P2, and P3 is exposed. That is, the first partition 151, the second partition 152, and the third partition 153 are respectively formed at the edges of the upper surfaces of the first electrodes 121, 122, and 123 formed in the sub-pixels P1, P2, and P3. However, the first partition 151, the second partition 152, and the third partition 153 may or may not be respectively formed on the side surfaces of the first electrodes 121, 122, and 123.

[0094] The first partition 151, the second partition 152, and the third partition 153 may be formed of an inorganic film, such as a SiOx film, a SiNx film, or a multi-layer film of SiOx and SiNx, but the present disclosure is not necessarily limited thereto. In another embodiment, the first partition 151, the second partition 152, and the third partition 153 may be formed of an organic film such as an acrylic resin, an epoxy resin, a phenolic resin, a polyamide resin, or a polyimide resin. However, the first partition 151, the second partition 152, and the third partition 153 are not limited thereto and may be formed of other materials.

[0095] The trench T is formed in the insulating layer 115, the first electrodes 121, 122, and 123, and the first dam 151, the second dam 152, and the third dam 153. The trench T may be formed between the sub-pixels P1, P2, and P3 to pass through the first electrodes 121, 122, and 123, the first reflective electrode 117, the second reflective electrode 118, and the third reflective electrode 119, and the first dam 151, the second dam 152, and the third dam 153, such that a portion of the insulating layer 115 is recessed, but the present disclosure is not necessarily limited thereto. The trench T may also be formed to pass through the insulating layer 115. Hereinafter, for convenience of description, the trench T may represent a portion passing through the first electrode 121 and the first dam 151, or a portion recessed from or passing through the insulating layer 115. However, the present disclosure is not limited thereto, and the trench T may also be applied to the first electrodes 122 and 123, the second reflective electrode 118 and the third reflective electrode 119, and the second dam 152 and the third dam 153 of the second sub-pixel P2 and the third sub-pixel P3 in the same manner.

[0096] More specifically, referring to Figure 8 , the trench T may be formed in a direction from the upper surface of the first dam 151 toward the first substrate 111. The trench T includes a first surface T1, a second surface T2, and a third surface T3 connecting the first surface T1 and the second surface T2.

[0097] The first surface T1 of the trench T may include the side surface 151a of the first dam 151 provided in one first sub-pixel P1, the side surface 121a of the first electrode 121, the side surface 117a of the first reflective electrode 117, and the first side surface 115a of the insulating layer 115. The trench T may be formed to expose the side surface 151a of the first dam 151 provided in one first sub-pixel P1. Additionally, the trench T may be formed to expose the side surface 121a of the first electrode 121 provided in one first sub-pixel P1. In this case, the side surface 121a of the first electrode 121 provided in one sub-pixel may be exposed in the trench T without being covered by the first dam 151 formed at the edge of the upper surface 121b of the first electrode 121.

[0098] The second surface T2 of the trench T may include the side surface 152a of the second partition wall 152, the side surface 122a of the first electrode 122, the side surface 118a of the second reflective electrode 118, and the second side surface 115b of the insulating layer 115, which are disposed in another second sub-pixel P2 adjacent to one sub-pixel. The trench T may be formed to expose the side surface 152a of the second partition wall 152 disposed in another second sub-pixel P2. Additionally, the trench T may be formed to expose the side surface 122a of the first electrode 122 and the side surface 118a of the second reflective electrode 118 disposed in another second sub-pixel P2. In this case, the side surface 122a of the first electrode 122 disposed in another second sub-pixel P2 may be exposed in the trench T without being covered by the second partition wall 152 formed at the edge of the upper surface 122b of the first electrode 122.

[0099] The third surface T3 of the trench T is disposed between the first surface T1 and the second surface T2 and connects the first surface T1 and the second surface T2 to each other. One end of the third surface T3 of the trench T is connected to the first surface T1, and the other end is connected to the second surface T2. The third surface T3 of the trench T may include an inner bottom surface 115c that connects the first side surface 115a and the second side surface 115b of the insulating layer 115 to each other.

[0100] The first electrodes 121, 122, and 123 may be formed for the sub-pixels P1, P2, and P3, respectively. Additionally, the partition walls 151, 152, and 153 may be formed at the edges of the upper surfaces of the first electrodes 121, 122, and 123 disposed in the first sub-pixel to the third sub-pixels P1, P2, and P3, respectively. That is, the trench T may also be formed in each of the first sub-pixel to the third sub-pixels P1, P2, and P3, which are divided into four first sub-regions P1-1 to P1-4, four second sub-regions P2-1 to P2-4, and four third sub-regions P3-1 to P3-4.

[0101] The trench T separates the first electrodes 121, 122, and 123 formed in the first sub-pixel to the third sub-pixels P1, P2, and P3 from each other to expose the side surfaces of each of the first electrodes 121, 122, and 123. In this case, the width of the trench T is equal to the interval distance between the first electrodes 121, 122, and 123. However, the present disclosure is not necessarily limited thereto.

[0102] Specifically, referring to Figure 7, the trench T may be disposed between the first sub-pixel P1 and the second sub-pixel P2. In addition, the width of the trench T may be equal to the spacing distance between the first electrode 121 disposed in the first sub-pixel P1 and the first electrode 122 disposed in the second sub-pixel P2. Additionally, the width of the trench T disposed between the second sub-pixel P2 and the third sub-pixel P3 may be equal to the spacing distance between the first electrode 122 disposed in the second sub-pixel P2 and the first electrode 123 disposed in the third sub-pixel P3. However, the present disclosure is not necessarily limited thereto.

[0103] Additionally, the trench T will be respectively formed to separate the first partition wall 151, the second partition wall 152, and the third partition wall 153 in the first sub-pixel to the third sub-pixels P1, P2, and P3 from each other, so as to expose the side surfaces of each of the first partition wall 151, the second partition wall 152, and the third partition wall 153.

[0104] In this case, the width of the trench T is equal to the spacing distance between the partition walls 151, 152, and 153. Specifically, the width of the trench T disposed between the first sub-pixel P1 and the second sub-pixel P2 may be equal to the spacing distance between the first partition wall 151 disposed in the first sub-pixel P1 and the second partition wall 152 disposed in the second sub-pixel P2. Additionally, the width of the trench T disposed between the second sub-pixel P2 and the third sub-pixel P3 may be equal to the spacing distance between the second partition wall 152 disposed in the second sub-pixel P2 and the third partition wall 153 disposed in the third sub-pixel P3. Moreover, the width of each of the trenches T may be equal to each other. However, in another embodiment, the width of each of the trenches T does not have to be equal to each other.

[0105] The width of the trench T may be determined in consideration of the thickness of the emissive material layer 130 and the deposition method. When each of the first organic electroluminescent compound layers 130g includes a first hole layer 131g, a first EML 132g, and a first electron layer 133g, the trench T may have a width such that the first hole layer 131g and the first EML 132g are disconnected from each other in the trench T while the first electron layer 133g is connected in the trench T. In this case, the first EML 132g is a green (G) EML. However, the present disclosure is not limited thereto.

[0106] Reference Figure 8, when the width of the trench T is formed to be small, the first EML 132g and the second EML 132r of adjacent sub-pixels can be connected to each other. Specifically, the trench T can be formed between the first sub-pixel P1 and the second sub-pixel P2, and the hole layer 131g, the EML 132g, and the electron layer 133g of the organic electroluminescent compound layer 130g can be sequentially stacked in the trench T. For example, when the width of the trench T is formed to be less than 0.09 μm, the first hole layer 131g stacked in the first sub-pixel P1 and the second hole layer 131r stacked in the second sub-pixel P2 can be in contact with each other at the upper part of the trench T. Therefore, the first EML 132g stacked on the first hole layer 131g in the first sub-pixel P1 is connected to the second sub-pixel P2, which may cause leakage current to occur between the adjacent sub-pixels P1 and P2. However, the trench T is used to block the leakage current generated between the adjacent sub-pixels P1 and P2. Therefore, when the first sub-pixel P1 emits light, the trench T is used to prevent the adjacent sub-pixel P2 from emitting light by blocking the connection between the EML 132g and the EML 132r of the adjacent sub-pixel P2, thereby preventing leakage current from occurring between the first sub-pixel P1 and the second sub-pixel P2.

[0107] In order to prevent the first hole layer 131g stacked in the first sub-pixel P1 and the second hole layer 131r stacked in the second sub-pixel P2 from being in contact with each other at the upper part of the trench T, in a display device according to an embodiment of the present disclosure, the width of the trench T can be formed to be greater than or equal to 0.09 μm. However, the present disclosure is not necessarily limited thereto. On the other hand, when the width of the trench T is formed to be large, the second electrodes 140 of adjacent sub-pixels can be disconnected from each other rather than connected to each other in the trench T. For example, when the width of the trench T is formed to be greater than or equal to 0.20 μm, the second electrode 140 stacked in the first sub-pixel P1 and the second electrode 140 stacked in the second sub-pixel P2 can be disconnected from each other through the trench T.

[0108] At this time, the second electrode 140 stacked in the first sub-pixel P1 can be formed on the first surface T1 of the trench T. The second electrode 140 stacked in the second sub-pixel P2 can be formed on the second surface T2 of the trench T. The side surface 121a of the first electrode 121 provided in the first sub-pixel P1 can still be exposed. In this case, the side surface 121a of the first electrode 121 can be in contact with the second electrode 140, and a short circuit may occur between them. Alternatively, the side surface 122a of the first electrode 122 provided in the second sub-pixel P2 can still be exposed. In this case, the side surface 122a of the first electrode 122 may be in contact with the second electrode 140, and a short circuit may occur between them.

[0109] In a display device according to an embodiment of the present disclosure, the width W of the trench T may be formed to be less than 0.20 μm so that the second electrodes 140 stacked in the first sub-pixel P1 and the second electrodes 140 stacked in the second sub-pixel P2 are connected to each other.

[0110] For ease of description, the organic electroluminescent compound layer 130 is defined to include organic electroluminescent compound layers 130g, 130r, and 130b located in the first sub-pixel P1, the second sub-pixel P2, and the third sub-pixel P3, respectively.

[0111] The organic electroluminescent compound layer 130 is formed on the first electrodes 121, 122, and 123. The organic electroluminescent compound layer 130 may be a white emission material layer that emits white light. In this case, the organic electroluminescent compound layer 130 may be a common layer formed in the sub-pixels P1, P2, and P3 together.

[0112] As Figure 9 shown, the organic electroluminescent compound layer 130 includes a hole layer 131, an EML 132, and an electron layer 133. The hole layer 131 includes a hole injection layer HIL and a hole transport layer HTL. The electron layer 133 includes an electron transport layer ETL and an electron injection layer EIL.

[0113] Referring to Figures 7 to 9 , the organic electroluminescent compound layer 130 includes a first organic electroluminescent compound layer 130g located in the first sub-pixel P1, a second organic electroluminescent compound layer 130r located in the second sub-pixel P2, and a third organic electroluminescent compound layer 130b located in the third sub-pixel P3.

[0114] In addition, the hole layer 131 includes a first hole layer 131g located in the first sub-pixel P1, a second hole layer 131r located in the second sub-pixel P2, and a third hole layer 131b located in the third sub-pixel P3.

[0115] The electron layers 133g, 133r, and 133b are located on the upper portions of the first EML 132g, the second EML 132r, and the third EML 132b, and are disposed on the entire surfaces of the first sub-pixel to the third sub-pixels P1, P2, and P3.

[0116] Referring to Figure 7, in order to change the cavity lengths d1, d2, and d3 between the second electrode 140 and the first to third reflective electrodes 117, 118, and 119 respectively located in the sub-pixels P1, P2, and P3, the thickness of the first electron layer 133g in the first sub-pixel P1 can be formed to be less than the thickness of the second electron layer 133r in the second sub-pixel P2 and greater than the thickness of the third electron layer 133b in the third sub-pixel P3. In addition, the thickness of the second electron layer 133r in the second sub-pixel P2 can be greater than the thickness of the third electron layer 133b in the third sub-pixel P3. However, in other embodiments, the thicknesses of the first to third sub-pixels P1, P2, and P3 can vary.

[0117] In this case, the electron transport layers ETL constituting the first to third electron layers 133g, 133r, and 133b can be formed to have different thicknesses. Here, in this embodiment, the case where the electron transport layer ETL forming the electron layer is formed to have different thicknesses is described by way of example, but the hole transport layer HTL forming the hole layer can also be formed to have different thicknesses.

[0118] In addition, the EML 132 includes a first EML 132g located in the first sub-pixel P1 and emitting green light, a second EML 132r located in the second sub-pixel P2 and emitting red light, and a third EML 132b located in the third sub-pixel P3 and emitting blue light. However, the present disclosure is not necessarily limited thereto.

[0119] In addition, the EML is formed by applying a fine metal mask (FMM). For example, in order to form the first EML 132g in the green first sub-pixel P1 among the first to third sub-pixels P1, P2, and P3, a green emission material layer material is deposited while the FMM (not shown) is disposed on the upper portion of the first hole layer 131g of the plurality of first sub-pixels P1 corresponding to the green sub-pixels, thereby forming the first EML 132g in the green first sub-pixel P1.

[0120] At this time, since each of the plurality of first sub-pixels P1 is divided into four sub-regions P1-1, P1-2, P1-3, and P1-4, the first EML 132g can be easily formed using the FMM (not shown), thereby increasing the manufacturing freedom of the FMM by more than four times.

[0121] In addition, the red second EML 132r of the second sub-pixel P2 and the blue third EML 132b of the third sub-pixel P3 can be formed by using separate FMMs.

[0122] Accordingly, even in a case where each of the second sub-pixels P2 divided into four sub-regions P2-1, P2-2, P2-3, and P2-4 and each of the third sub-pixels P3 divided into four sub-regions P3-1, P3-2, P3-3, and P3-4, the second EML 132r and the third EML 132b can be formed using an FMM (not shown), thereby increasing the manufacturing freedom of the FMM by more than four times.

[0123] As Figure 7 shown, due to the stepped portion of the trench T, the first EML 132g formed in the first sub-pixel P1, the second EML 132r formed in the second sub-pixel P2, and the third EML 132b formed in the third sub-pixel P3 are disconnected from each other.

[0124] Meanwhile, the first EML 132g formed in the first sub-pixel P1 and the second EML 132r formed in the second sub-pixel P2 do not contact each other at the upper portion of the trench T.

[0125] Since the first EML to the third EML 132g, 132r, and 132b of the first sub-pixel to the third sub-pixel P1, P2, and P3 are disconnected from each other within the trench T, it is difficult for charges to move between adjacent sub-pixels P1, P2, and P3 through the first EML to the third EML 132g, 132r, and 132b.

[0126] The organic electroluminescent compound layers 130g, 130r, and 130b according to an embodiment of the present disclosure can minimize the influence of leakage current on adjacent first sub-pixels to third sub-pixels P1, P2, and P3.

[0127] As described above, when holes and electrodes are injected into the first electrodes 121, 122, and 123 serving as anodes and the second electrode 140 serving as a cathode and are recombined in the EMLs 132g, 132r, and 132b, excitons are formed during the excitation process and light is emitted due to the energy from the excitons, wherein the first electrodes 121, 122, and 123 and the second electrode 140 face each other, and the organic electroluminescent compound layers 130g, 130r, and 130b are inserted therebetween. In particular, the organic light emitting diode device displays an image by electrically controlling the amount of light generated from the EMLs 132g, 132r, and 132b.

[0128] Meanwhile, the second electrode 140 is formed on the upper portion of the organic electroluminescent compound layers 130g, 130r, and 130b. The second electrode 140 may be a common layer formed in the first sub-pixel to the third sub-pixel P1, P2, and P3.

[0129] The second electrode 140 may be made of a transparent conductive material, a translucent conductive material, or a metallic material with a high reflectivity.

[0130] When the display device is set as a top emission type, the second electrode 140 may be formed of a transparent conductive material (TCO), such as ITO and IZO, which can transmit light, or formed of a translucent conductive material, such as magnesium (Mg), silver (Ag), or an alloy of Mg and Ag. When the display device is set as a bottom emission type, the second electrode 140 may be formed of a metallic material with a high reflectivity, such as a stacked structure of Al and Ti (Ti / Al / Ti), a stacked structure of Al and ITO (ITO / Al / ITO), an Ag alloy, and a stacked structure of an Ag alloy and ITO (ITO / Ag alloy / ITO). The Ag alloy may be an alloy of silver (Ag), palladium (Pd), copper (Cu), etc. The second electrode 140 may be a cathode.

[0131] Reference Figures 7 to 9 , a first distance (cavity length) d1 between the first reflective electrode 117 and the second electrode 140 in the first sub-pixel P1 may be less than a second distance (cavity length) d2 between the second reflective electrode 118 and the second electrode 140 in the second sub-pixel P2, and greater than a third distance (cavity length) d3 between the third reflective electrode 119 and the second electrode 140 in the third sub-pixel P3.

[0132] However, in another embodiment, the lengths of the distances d1, d2, and d3 may vary. For example, in another embodiment, the length of the third distance d3 between the third reflective electrode 119 and the second electrode 140 in the third sub-pixel P3 may be longer than the length of the first distance d1 between the first reflective electrode 117 and the second circuit 140 in the first sub-pixel P1. In addition, the length of the third distance d3 between the third reflective electrode 119 and the second electrode 140 in the third sub-pixel P3 may be less than the length of the second distance d2 between the second reflective electrode 118 and the second electrode 140 in the second sub-pixel P2.

[0133] In particular, the wavelength of each of red light, green light, and blue light may be considered in the order of red > green > blue, so the cavity length may also be considered in the order of red > green > blue. That is, red light has a transmittance peak at a band higher than the bands of green light and blue light.

[0134] Accordingly, a first distance d1 between a first reflective electrode 117 and a second electrode 140 in a first sub-pixel P1 may be less than a second distance d2 between a second reflective electrode 118 and the second electrode 140 in a second sub-pixel P2, and greater than a third distance d3 between a third reflective electrode 119 and the second electrode 140 in a third sub-pixel P3. However, in another embodiment where the colors of the first to third sub-pixels P1, P2, and P3 are changed, the respective distances between the second electrode 140 and the reflective electrodes 117, 118, and 119 may be changed to correspond to the color of each of the first to third sub-pixels P1, P2, and P3.

[0135] A cover layer 160 and an encapsulation film 170 may be formed on the second electrode 140. The cover layer 160 and the encapsulation film 170 are protective layers to protect the plurality of organic electroluminescent compound layers 130g, 130r, and 130b and the second electrode 140 from the penetration of moisture (H2O) or other foreign substances from the outside.

[0136] The encapsulation film 170 is used to prevent oxygen or moisture from penetrating into the organic electroluminescent compound layers 130g, 130r, and 130b and the second electrode 140. To this end, the encapsulation film 170 may include at least one inorganic film and at least one organic film. Specifically, the encapsulation film 170 may include a first inorganic film and an organic film. In one embodiment, the encapsulation film 170 may further include a second inorganic film.

[0137] The first inorganic film is formed to cover the second electrode 140. The organic film is formed on the first inorganic film and at a distance sufficient to prevent particles from penetrating the first inorganic film and entering the organic electroluminescent compound layers 130g, 130r, and 130b and the second electrode 140. The second inorganic film is formed to cover the organic film.

[0138] Each of the first inorganic film and the second inorganic film may be formed of silicon nitride, aluminum nitride, zirconium nitride, titanium nitride, hafnium nitride, tantalum nitride, silicon oxide, aluminum oxide, or titanium oxide. The first inorganic film and the second inorganic film may be deposited by a chemical vapor deposition (CVD) method or an atomic layer deposition (ALD) method, but the present disclosure is not limited thereto.

[0139] The organic film may be formed of an acrylic resin, an epoxy resin, a phenolic resin, a polyamide resin, or a polyimide resin. The organic film may be formed by a vapor deposition method, a printing method, or a slot coating method, but is not limited to these methods, and the organic film may also be formed by an inkjet method.

[0140] Hereinafter, a method of manufacturing a display device according to an embodiment of the present disclosure will be described.

[0141] Figure 10It is a flowchart showing the manufacturing process of a display device according to an embodiment of the present disclosure.

[0142] Referring Figure 10 , in the manufacturing process of a display device according to an embodiment of the present disclosure, as a first operation (S110), circuit elements (not shown) and an insulating layer (not shown) are formed on a substrate.

[0143] Next, as a second operation (S120), materials for forming a reflective electrode (not shown) and a first electrode (not shown) are deposited on the insulating layer. The deposited materials may be patterned while or after being deposited on the insulating layer.

[0144] Next, as a third operation (S130), a material for forming a partition is formed in a non-emitting region. The material for forming the partition may be patterned while or after being formed in the non-emitting region.

[0145] Next, as a fourth operation (S140), trenches are formed in the insulating layer between the reflective electrodes and between the first electrodes to separate the reflective electrodes and the first electrodes, thereby preventing leakage current.

[0146] Next, as a fifth operation (S150), an organic electroluminescent compound layer including a hole layer, an emitting material layer, and an electron layer is formed on the first electrode between the partitions.

[0147] Next, as a sixth operation (S160), a second electrode is formed on the organic electroluminescent compound layer.

[0148] Next, as a seventh operation (S170), a cover layer (not shown) is formed on the upper portion of the second electrode.

[0149] Next, as an eighth operation (S180), a packaging film is formed on the cover layer.

[0150] Meanwhile, the manufacturing method of a display device according to an embodiment of the present disclosure will be described in more detail.

[0151] Figures 11A to 11H It is a cross-sectional view showing the manufacturing method of a display device according to an embodiment of the present disclosure.

[0152] Although not shown in the figure, the first substrate 111 may be divided into a display region (not shown, Figure 2 DA in Figure 2 ) and a non-display region (not shown,

[0153] Data lines and gate lines intersecting the data lines are formed in the display area DA. In addition, pixels P for displaying an image in a matrix form are formed in the display area DA in the intersecting area of the data lines and the gate lines.

[0154] Each pixel P may include a first sub-pixel P1, a second sub-pixel P2, and a third sub-pixel P3. The first sub-pixel P1 may be provided to emit green light, the second sub-pixel P2 may be provided to emit red light, and the third sub-pixel P3 may be provided to emit blue light. However, the present disclosure is not necessarily limited thereto. Each pixel may further include a fourth sub-pixel that emits white (W) light. In addition, the arrangement order of the sub-pixels P1, P2, and P3 may be changed in various ways.

[0155] Referring to the above Figure 3 , the first sub-pixel P1 may be divided into four first sub-regions P1-1, P1-2, P1-3, and P1-4, the second sub-pixel P2 may be divided into four second sub-regions P2-1, P2-2, P2-3, and P2-4, and the third sub-pixel P3 may be divided into four third sub-regions P3-1, P3-2, P3-3, and P3-4.

[0156] In an embodiment of the present disclosure, the first sub-pixel P1 is a green sub-pixel, the second sub-pixel P2 is a red sub-pixel, and the third sub-pixel P3 is a blue sub-pixel. In addition, the description will focus on two of the four sub-regions of each of the sub-pixels P1, P2, and P3. For example, P1-1 and P1-2, P2-1 and P2-2, and P3-1 and P3-2. However, the description is not limited thereto.

[0157] The first substrate 111 may be made of glass or plastic, but is not necessarily limited thereto, and may also be made of a semiconductor material such as a silicon wafer. The first substrate 111 may be made of a transparent material or an opaque material.

[0158] A display device according to an embodiment of the present disclosure may be provided in a top emission type in which emitted light is emitted upward, but the present disclosure is not necessarily limited thereto. When a display device according to an embodiment of the present disclosure is provided in a top emission type in which emitted light is emitted upward, the first substrate 111 may be made of an opaque material as well as a transparent material. Meanwhile, when a display device according to an embodiment of the present disclosure is provided in a so-called bottom emission type in which emitted light is emitted downward, the first substrate 111 may be made of a transparent material.

[0159] Referring to Figure 11A, for each of the first, second, and third sub-pixels P1, P2, and P3, circuit elements (not shown) including various signal lines (not shown), thin film transistors TFT, capacitors (not shown), etc. are formed on the first substrate 111. The signal lines may include gate lines, data lines, power supply lines, and reference lines, and the thin film transistors may include switching thin film transistors, driving transistors TFT, and sensing thin film transistors.

[0160] The switching thin film transistor is switched according to the gate signal provided to the gate line, and is used to provide the data voltage provided from the data line to the driving thin film transistor.

[0161] The driving transistor TFT is switched according to the data voltage provided from the switching thin film transistor to generate a data current according to the power supplied from the power supply line, and is used to provide the generated data current to the first electrode 121.

[0162] The sensing thin film transistor is used to sense the threshold voltage deviation of the driving thin film transistor, which is the cause of image degradation, and in response to the sensing control signal provided from the gate line or a separate sensing line, provides the current of the driving thin film transistor to the reference line.

[0163] The capacitor is used to hold the data voltage provided from the driving transistor TFT within one frame, and is connected to each of the gate terminal and the source terminal of the driving transistor TFT.

[0164] Next, an insulating layer 115 is formed on the circuit element including the driving transistor TFT.

[0165] The insulating layer 115 may be formed of an inorganic film, such as a SiOx film, a SiNx film, or a multilayer film of SiOx and SiNx, but the present disclosure is not necessarily limited thereto. The insulating layer 115 may be formed of an organic film, such as an acrylic resin, an epoxy resin, a phenolic resin, a polyamide resin, a polyimide resin, etc. Alternatively, the insulating layer 115 may be formed of a multilayer film including at least one inorganic film and at least one organic film.

[0166] Next, referring to Figure 11B , a reflective electrode forming material layer 117a and a first electrode forming material layer 121a are stacked on the insulating layer 115. In addition, a contact hole CH may be formed between the driving transistor TFT and the reflective electrode forming material layer 117a.

[0167] Next, referring to Figure 11C , a bank forming material layer is formed on the upper part of the first electrode forming material layer 121a, and the bank forming material layer is selectively patterned to expose a part of the first electrode forming material layer 121a. At this time, the exposed part of the first electrode forming material layer 121a corresponds to the emission region EA.

[0168] Next, referring to Figure 11D , the damascene materials layer and the underlying first electrode forming material layer 121a and reflective electrode forming material layer 117a are etched in sequence to form dams 151, 152, and 153, first electrodes 121, 122, and 123, and first to third reflective electrodes 117, 118, and 119.

[0169] In this case, the first to third reflective electrodes 117, 118, and 119 and the first electrodes 121, 122, and 123 are formed on the insulating layer 115 provided on the substrate 111 for the first to third sub-pixels P1, P2, and P3, respectively.

[0170] The first sub-pixel P1 is divided into four sub-regions P1-1, P1-2, P1-3, and P1-4, and the first reflective electrode 117 and the first electrode 121 are formed in each of the four sub-regions P1-1, P1-2, P1-3, and P1-4.

[0171] In addition, the second sub-pixel P2 is divided into four sub-regions P2-1, P2-2, P2-3, and P2-4, and the second reflective electrode 118 and the first electrode 122 are formed in each of the four sub-regions P2-1, P2-2, P2-3, and P2-4.

[0172] In addition, the third sub-pixel P3 is divided into four sub-regions P3-1, P3-2, P3-3, and P3-4, and the third reflective electrode 119 and the first electrode 123 are formed in each of the four sub-regions P3-1, P3-2, P3-3, and P3-4.

[0173] Here, the first to third reflective electrodes 117, 118, and 119 can be used as reflectors for reflecting the light emitted from the organic electroluminescent compound layers 130g, 130r, and 130b, and can be formed of silver (Ag), aluminum (Al), and molybdenum (Mo) having high conductivity and low work function or an alloy of the above materials, including an alloy of silver (Ag) and magnesium (Mg). However, the first to third reflective electrodes 117, 118, and 119 can also be formed of other materials.

[0174] The first electrodes 121, 122, and 123 are connected to the driving transistors TFT. Specifically, the first electrodes 121, 122, and 123 are connected to the source terminal or drain terminal of the driving transistor TFT through contact holes CH penetrating the insulating layer 115, so that signals from the driving transistor TFT can be applied to the first electrodes 121, 122, and 123. The first electrodes 121, 122, and 123 may be formed of a transparent conductive metal material, a semi-transparent conductive metal material, or a metal material with a high reflectivity. However, the first to third reflective electrodes 117, 118, and 119 may also be formed of other materials.

[0175] When the display device is set to a top emission type, the first electrodes 121, 122, 123 may be formed of a metal material with a high reflectivity or a stacked structure of a metal material with a high reflectivity and a transparent conductive material. For example, the first electrodes 121, 122, and 123 may be formed of a metal material with a high reflectivity, such as a stacked structure of Al and Ti (Ti / Al / Ti), a stacked structure of Al and ITO (ITO / Al / ITO), an Ag alloy, and a stacked structure of an Ag alloy and ITO (ITO / Ag alloy / ITO). The Ag alloy may be an alloy of silver (Ag), palladium (Pd), copper (Cu), etc. However, the materials for the first to third reflective electrodes 117, 118, and 119 are not limited thereto.

[0176] When the display device is set to a bottom emission type, the first electrodes 121, 122, and 123 may be formed of a transparent conductive material (TCO) such as ITO and IZO, which can transmit light, or a semi-transparent conductive material such as magnesium (Mg), silver (Ag), or an alloy of Mg and Ag. The first electrodes 121, 122, and 123 may be anodes. However, the materials for the first to third reflective electrodes 117, 118, and 119 are not limited thereto.

[0177] First dams 151, second dams 152, and third dams 153 are formed on the first electrodes 121, 122, and 123, and emission regions EA are defined in each of the plurality of first sub-pixels P1, second sub-pixels P2, and third sub-pixels P3. That is, in each of the first to third sub-pixels P1, P2, and P3, the regions where the first dams 151, second dams 152, and third dams 153 are not formed and the first electrodes 121, 122, and 123 are exposed. The exposed regions are the emission regions EA. On the other hand, the regions outside the emission regions EA are non-emission regions.

[0178] In addition, the first partition wall 151 may define an emission region EA in each of the sub-regions 1-1 to 1-4, i.e., P1-1, P1-2, P1-3, and P1-4, divided in the first sub-pixel P1. In this embodiment, the first sub-pixel P1 is described by taking the green sub-pixel as an example, but the present disclosure is not limited thereto.

[0179] In addition, the second partition wall 152 may define an emission region EA in each of the sub-regions 2-1 to 2-4, i.e., P2-1, P2-2, P2-3, and P2-4, divided in the second sub-pixel P2. In this embodiment, the second sub-pixel P2 is described by taking the red sub-pixel as an example, but the present disclosure is not limited thereto. In addition, the third partition wall 153 may define an emission region EA in each of the sub-regions 3-1 to 3-4, i.e., P3-1, P3-2, P3-3, and P3-4, divided in the third sub-pixel P3. In the embodiment of the present disclosure, the third sub-pixel P3 is described by taking the blue sub-pixel as an example, but the present disclosure is not limited thereto.

[0180] Partition walls 151, 152, and 153 are respectively formed at the edges of the first electrodes 121, 122, and 123, thereby preventing the problem of current concentration at the ends of the first electrodes 121, 122, and 123. When current is concentrated at the ends of the first electrodes 121, 122, and 123, the luminous efficiency may be reduced. Therefore, the partition walls 151, 152, and 153 formed at the edges of the first electrodes 121, 122, and 123 contribute to improving the luminous efficiency.

[0181] These partition walls 151, 152, and 153 may be formed of an inorganic film, such as a SiOx film, a SiNx film, or a multilayer film composed of SiOx and SiNx, but the present disclosure is not necessarily limited thereto. The partition walls 151, 152, and 153 may be formed of an organic film, such as an acrylic resin, an epoxy resin, a phenolic resin, a polyamide resin, or a polyimide resin.

[0182] Grooves T are formed in the insulating layer 115, the first to third reflective electrodes 117, 118, and 119, the first electrodes 121, 122, and 123, and the partition walls 151, 152, and 153. The grooves T may be formed between the sub-pixels P1, P2, and P3 to pass through the first to third reflective electrodes 117, 118, and 119, the first electrodes 121, 122, and 123, and the partition walls 151, 152, and 153, such that a part of the insulating layer 115 is recessed, but the present disclosure is not necessarily limited thereto. The grooves T may also be formed to pass through the insulating layer 115. Hereinafter, for convenience of description, the grooves T may represent the parts passing through the first electrodes 121, 122, and 123 and the partition walls 151, 152, and 153, or the parts recessed from or passing through the insulating layer 115.

[0183] More specifically, trenches T may be formed in a direction from the upper surfaces of the partition walls 151, 152, and 153 toward the first substrate 111.

[0184] Next, referring to Figure 11E , an organic electroluminescent compound layer 130g, 130r, and 130b is respectively formed on the first electrodes 121, 122, and 123. The organic electroluminescent compound layers 130g, 130r, and 130b may be white emission material layers that emit white light. In this case, the organic electroluminescent compound layers 130g, 130r, and 130b may be common layers formed in the sub-pixels P1, P2, and P3 together.

[0185] As described above Figure 5 and Figure 7 shown, the organic electroluminescent compound layers 130g, 130r, and 130b respectively include a hole layer 131g, 131r, and 131b, an EML 132g, 132r, and 132b, and an electron layer 133g, 133r, and 133b. The hole layers 131g, 131r, and 131b each include a hole injection layer HIL and a hole transport layer HTL. The electron layers 133g, 133r, and 133b each include an electron transport layer ETL and an electron injection layer EIL.

[0186] The organic electroluminescent compound layer 130 includes a first organic electroluminescent compound layer 130g in the first sub-pixel P1, a second organic electroluminescent compound layer 130r in the second sub-pixel P2, and a third organic electroluminescent compound layer 130b in the third sub-pixel P3.

[0187] The hole layer 131 includes a first hole layer 131g in the first sub-pixel P1, a second hole layer 131r in the second sub-pixel P2, and a third hole layer 131b in the third sub-pixel P3.

[0188] The electron layer 133 is located above the EML 132 and is disposed on the entire surfaces of the first to third sub-pixels P1, P2, and P3. The electron layer 133 includes a first electron layer 133g in the first sub-pixel P1, a second electron layer 133r in the second sub-pixel P2, and a third electron layer 133b in the third sub-pixel P3.

[0189] However, in other embodiments, the cavity lengths d1, d2, and d3 may have different configurations. For example, the length of the third distance d3 between the third reflective electrode 119 and the second electrode 140 in the third sub-pixel P3 may be longer than the length of the first distance d1 between the first reflective electrode 117 and the second circuit 140 in the first sub-pixel P1. In addition, the length of the third distance d3 between the third reflective electrode 119 and the second electrode 140 in the third sub-pixel P3 may be less than the length of the second distance d2 between the second reflective electrode 118 and the second electrode 140 in the second sub-pixel P2.

[0190] To change the cavity lengths d1, d2, and d3 between the second electrode 140 and the first to third reflective electrodes 117, 118, and 119 respectively located in the sub-pixels P1, P2, and P3, the thickness of the first electron layer 133g in the first sub-pixel P1 may be formed to be less than the thickness of the second electron layer 133r in the second sub-pixel P2 and greater than the thickness of the third electron layer 133b in the third sub-pixel P3.

[0191] In this case, the electron transport layers ETL constituting the first to third electron layers 133, 133r, and 133b may be formed to have different thicknesses. Here, in this embodiment, the case where the electron transport layer ETL forming the electron layer is formed to have different thicknesses is described by way of example, but the hole transport layer HTL forming the hole layer may also be formed to have different thicknesses.

[0192] In addition, the EML 132 as the emission material layer includes a first EML 132g that is located in the first sub-pixel P1 and emits green light, a second EML 132r that is located in the second sub-pixel P2 and emits red light, and a third EML 132b that is located in the third sub-pixel P3 and emits blue light. However, the present disclosure is not necessarily limited thereto.

[0193] At this time, each of the first EML 132g, the second EML 132r, and the third EML 132b is formed by applying FMM. For example, in order to form the first EML 132g in the green first sub-pixel P1 among the first sub-pixel to the third sub-pixel P1, P2, and P3, a green emissive material layer material may be deposited while the FMM is disposed on the upper portion of the hole layer 131g of a plurality of first sub-pixels P1 corresponding to the green sub-pixel, thereby forming the first EML 132g in the green first sub-pixel P1. For the remaining second EML 132r and third EML 132b, the second EML 132r and the third EML 132b may be formed in the red second sub-pixel P2 and the blue third sub-pixel P3 by depositing a red emissive material layer material and a blue emissive material layer material, while the FMM is disposed on the upper portions of the second hole layer 131r and the third hole layer 131b of a plurality of second sub-pixels P2 and third sub-pixels P3 corresponding to the red sub-pixel and the blue sub-pixel.

[0194] As described above, since the plurality of first sub-pixels P1, second sub-pixels P2, and third sub-pixels P3 are respectively divided into four sub-regions P1-1, P1-2, P1-3, and P1-4, four sub-regions P2-1, P2-2, P2-3, and P2-4, and four sub-regions P3-1, P3-2, P3-3, and P3-4, the first EML 132g, the second EML 132r, and the third EML 132b can be easily formed using the FMM (not shown), thereby increasing the manufacturing freedom of the FMM by more than four times.

[0195] As Figure 7 shown, due to the stepped portion of the trench T, the first EML 132g formed in the first sub-pixel P1, the second EML 132r formed in the second sub-pixel P2, and the third EML 132b formed in the third sub-pixel P3 are disconnected from each other.

[0196] Meanwhile, the first EML 132g formed in the first sub-pixel P1 and the second EML 132r formed in the second sub-pixel P2 do not contact each other above the trench T.

[0197] Since the first EML to the third EML 132g, 132r, and 132b of the first sub-pixel to the third sub-pixel P1, P2, and P3 are disconnected from each other within the trench T, it is difficult for charges to move between adjacent sub-pixels P1, P2, and P3 through the first EML to the third EML 132g, 132r, and 132b. Therefore, the trench T can effectively reduce the leakage current between adjacent first sub-pixel to third sub-pixel P1, P2, and P3.

[0198] The organic electroluminescent compound layers 130g, 130r, and 130b according to an embodiment of the present disclosure can minimize the influence of leakage current on adjacent first to third sub-pixels P1, P2, and P3.

[0199] As described above, when holes and electrons are injected into the first electrodes 121, 122, and 123 serving as anodes and the second electrode 140 serving as a cathode and recombine in the EMLs 132g, 132r, and 132b, excitons are formed during the excitation process and emit light due to the energy from the excitons, where the first electrodes 121, 122, and 123 and the second electrode 140 face each other, and the organic electroluminescent compound layer 130 is inserted therebetween. In particular, the organic light-emitting diode device displays an image by electrically controlling the amount of light generated from the EMLs 132g, 132r, and 132b.

[0200] Next, an electron layer 133 is formed on the first substrate 111 including the EMLs 132g, 132r, and 132b. In this case, the electron layer 133 is located on the upper part of the EML 132 and is disposed on the entire surfaces of the first to third sub-pixels P1, P2, and P3. The electron layer 133 includes a first electron layer 133g in the first sub-pixel P1, a second electron layer 133r in the second sub-pixel P2, and a third electron layer 133b in the third sub-pixel P3.

[0201] To change the cavity lengths d1, d2, and d3 between the second electrode 140 and the first to third reflective electrodes 117, 118, and 119 respectively located in the sub-pixels P1, P2, and P3, the thickness of the first electron layer 133g in the first sub-pixel P1 can be less than the thickness of the second electron layer 133r in the second sub-pixel P2 and greater than the thickness of the third electron layer 133b in the third sub-pixel P3.

[0202] In this case, the electron transport layers ETL constituting the first to third electron layers 133g, 133r, and 133b can be formed to have different thicknesses. Here, in the present embodiment, the case where the electron transport layer ETL forming the electron layer is formed to have different thicknesses is described by way of example, but the hole transport layer HTL forming the hole layer can also be formed to have different thicknesses.

[0203] Next, referring to Figure 11F , a second electrode 140 is formed on the organic electroluminescent compound layer 130. The second electrode 140 can be a common layer formed in the first to third sub-pixels P1, P2, and P3.

[0204] The second electrode 140 can be made of a transparent conductive metal material, a semi-transparent conductive metal material, or a metal material having a high reflectivity, but is not limited thereto.

[0205] When the display device is set to be top-emitting type, the second electrode 140 can be formed of a transparent conductive material (TCO), such as ITO and IZO, which can transmit light, or formed of a semi-transparent conductive material, such as magnesium (Mg), silver (Ag), or an alloy of Mg and Ag. When the display device is set to be bottom-emitting type, the second electrode 140 can be formed of a metal material with high reflectivity, such as a stacked structure of Al and Ti (Ti / Al / Ti), a stacked structure of Al and ITO (ITO / Al / ITO), an Ag alloy, and a stacked structure of an Ag alloy and ITO (ITO / Ag alloy / ITO). The Ag alloy can be an alloy of silver (Ag), palladium (Pd), copper (Cu), etc. This second electrode 140 can be a cathode.

[0206] In this case, the first cavity length d1 between the first reflective electrode 117 in the first sub-pixel P1 and the second electrode 140 can be less than the second cavity length d2 between the second reflective electrode 118 in the second sub-pixel P2 and the second electrode 140, and greater than the third cavity length d3 between the third reflective electrode 119 in the third sub-pixel P3 and the second electrode 140.

[0207] However, in other embodiments, the cavity lengths d1, d2, and d3 can have different configurations. For example, the length of the third distance d3 between the third reflective electrode 119 in the third sub-pixel P3 and the second electrode 140 can be longer than the length of the first distance d1 between the first reflective electrode 117 in the first sub-pixel P1 and the second circuit 140. In addition, the length of the third distance d3 between the third reflective electrode 119 in the third sub-pixel P3 and the second electrode 140 can be less than the length of the second distance d2 between the second reflective electrode 118 in the second sub-pixel P2 and the second electrode 140.

[0208] In particular, the wavelengths of red light, green light, and blue light can be considered to be in the order of red > green > blue, so the cavity lengths can also be considered to be in the order of red > green > blue. That is to say, red light can have a transmittance peak at a wavelength band higher than those of green light and blue light.

[0209] Therefore, a first cavity length d1 between a first reflective electrode 117 and a second electrode 140 in a first sub-pixel P1 may be less than a second cavity length d2 between a second reflective electrode 118 and the second electrode 140 in a second sub-pixel P2, and greater than a third cavity length d3 between a third reflective electrode 119 and the second electrode 140 in a third sub-pixel P3. However, in another embodiment of changing colors of the first to third sub-pixels P1, P2, and P3, corresponding distances between the second electrode 140 and the reflective electrodes 117, 118, and 119 may be changed to correspond to colors of each of the first to third sub-pixels P1, P2, and P3.

[0210] Next, referring to Figure 11G and 11H , an overcoat layer 160 and a encapsulation film 170 are formed on the second electrode 140. The overcoat layer 160 and the encapsulation film 170 are protective layers to protect the plurality of organic electroluminescent compound layers 130 and the second electrode 140 from penetration of moisture (H2O) or foreign substances from the outside.

[0211] The encapsulation film 170 is used to prevent oxygen or moisture from penetrating into the emissive material layer 130 and the second electrode 140. To this end, the encapsulation film 170 may include at least one inorganic film and at least one organic film. Specifically, the encapsulation film 170 may include a first inorganic film and an organic film. In one embodiment, the encapsulation film 170 may further include a second inorganic film.

[0212] The first inorganic film is formed to cover the second electrode 140. The organic film is formed on the first inorganic film and may be formed at a distance sufficient to prevent particles from penetrating the first inorganic film and entering the organic electroluminescent compound layers 130 and the second electrode 140. The second inorganic film is formed to cover the organic film.

[0213] Both the first inorganic film and the second inorganic film may be formed of silicon nitride, aluminum nitride, zirconium nitride, titanium nitride, hafnium nitride, tantalum nitride, silicon oxide, aluminum oxide, or titanium oxide. The first inorganic film and the second inorganic film may be deposited by a chemical vapor deposition (CVD) method or an atomic layer deposition (ALD) method, but the present disclosure is not limited thereto.

[0214] The organic film may be formed of an acrylic resin, an epoxy resin, a phenolic resin, a polyamide resin, or a polyimide resin. The organic film may be formed by a vapor deposition method, a printing method, or a slot coating method, but is not limited to these methods, and the organic film may be formed by an inkjet method.

[0215] Figure 12 is a plan view showing a case where a green EML is formed on a sub-region in a green sub-pixel by applying a green FMM in a display device according to an embodiment of the present disclosure.

[0216] Reference Figure 12 , in a display device according to an embodiment of the present disclosure, an FMM (not shown) is used to form a G EML on four divided sub-regions P1-1, P1-2, P1-3, and P1-4 of each of the plurality of first sub-pixels P1 (i.e., on the sub-regions in the green sub-pixel P1) (Reference Figure 7 132g in). At this time, the remaining second and third sub-pixels P2 and P3 are blocked by the FMM.

[0217] Figure 13 is a plan view showing a case where a red EML is formed on a sub-region in a red sub-pixel by applying a red FMM in a display device according to an embodiment of the present disclosure.

[0218] Reference Figure 13 , in a display device according to an embodiment of the present disclosure, an FMM (not shown) is used to form an R EML on four divided second sub-regions P2-1, P2-2, P2-3, and P2-4 of each of the plurality of second sub-pixels P2 (i.e., on the sub-regions in the red sub-pixel P2) (Reference Figure 7 132r in). At this time, the remaining first and third sub-pixels P1 and P3 are blocked by the FMM.

[0219] Figure 14 is a plan view showing a case where a blue EML is formed on a sub-region in a blue sub-pixel by applying a blue FMM in a display device according to an embodiment of the present disclosure.

[0220] Reference Figure 14 , in a display device according to an embodiment of the present disclosure, an FMM is used to form a B EML on four divided sub-regions P3-1, P3-2, P3-3, and P3-4 of each of the plurality of third sub-pixels P3 (i.e., on the sub-regions in the blue sub-pixel P3) (Reference Figure 7 132b in). At this time, the remaining first and second sub-pixels P1 and P2 are blocked by the FMM.

[0221] Figure 15 is a plan view showing a case where a pixel is composed of red, green, and blue sub-pixels in a display device according to an embodiment of the present disclosure.

[0222] Reference Figure 15, in a display device according to an embodiment of the present disclosure, an organic electroluminescent compound layer 130 is formed by sequentially forming EMLs 132g, 132r, and 132b on sub-regions in each of the first sub-pixel to the third sub-pixels P1, P2, and P3. After that, a pixel P is realized by combining the green sub-region, the red sub-region, and the blue sub-region in the first sub-pixel to the third sub-pixels P1, P2, and P3. That is, each of the plurality of pixels P can be realized as a combination of a red sub-region R, a green sub-region G, and a blue sub-region B, or can be realized as a combination of a green sub-region G, a red sub-region R, and a blue sub-region B.

[0223] In this case, the blue sub-region B of the pixel P has a larger area than the red sub-region R and the green sub-region G. This is because the brightness of the blue sub-region B is lower than that of the red sub-region R and the green sub-region G of the pixel P. Therefore, the area of the blue sub-region B can be formed to be larger than that of the red sub-region R and the green sub-region G to compensate for the brightness. However, in another embodiment, each of the green sub-region G, the red sub-region R, and the blue sub-region B can be the same.

[0224] Hereinafter, a display device according to another embodiment of the present disclosure will be described.

[0225] Figure 16 is a cross-sectional view taken along line II-II' in another embodiment of the present disclosure. Figure 4 of the line II-II'.

[0226] Figure 17 is a cross-sectional view specifically showing a configuration example of a first electrode, an emissive material layer, and a second electrode in two of the four sub-regions of green, red, and blue sub-pixels in a display device according to another embodiment of the present disclosure.

[0227] Each pixel P may include a first sub-pixel P1, a second sub-pixel P2, and a third sub-pixel P3. The first sub-pixel P1 may be provided to emit green light, the second sub-pixel P2 may be provided to emit red light, and the third sub-pixel P3 may be provided to emit blue light. However, the present disclosure is not necessarily limited thereto. Each pixel may further include a fourth sub-pixel that emits white (W) light. In addition, the arrangement order of the sub-pixels P1, P2, and P3 can be changed in various ways.

[0228] Referring to the above Figure 3 , the first sub-pixel P1 may be divided into four first sub-regions P1-1, P1-2, P1-3, and P1-4, the second sub-pixel P2 may be divided into four second sub-regions P2-1, P2-2, P2-3, and P2-4, and the third sub-pixel P3 may be divided into four third sub-regions P3-1, P3-2, P3-3, and P3-4.

[0229] In an embodiment of the present disclosure, the first sub-pixel P1 is a green sub-pixel, the second sub-pixel P2 is a red sub-pixel, and the third sub-pixel P3 is a blue sub-pixel. However, the present disclosure is not limited thereto.

[0230] Here, when a gate signal is input through a gate line, each of the sub-pixels P1, P2, and P3 supplies a predetermined current to the light-emitting element according to the data voltage of the data line. Therefore, the light-emitting elements of each of the sub-pixels P1, P2, and P3 can emit light with a predetermined brightness according to the predetermined current. In addition, a power supply voltage is supplied to a power supply line. The power supply line supplies the power supply voltage to each of the sub-pixels P1, P2, and P3.

[0231] Reference Figure 16 and 17 As shown in FIGS. 11 and 12, a driving transistor TFT, an insulating layer 215, first to third reflective electrodes 217, 218, and 219, auxiliary insulating layers 220a and 220b, first electrodes 221, 222, and 223, an organic electroluminescent compound layer 230, a second electrode 240, dams 251, 252, and 253, a cover layer 260, a packaging film 270, and a trench T are formed on one surface of the first substrate 211.

[0232] The first substrate 211 may be made of glass or plastic, but is not necessarily limited thereto, and may also be made of a semiconductor material such as a silicon wafer. The first substrate 211 may be made of a transparent material or an opaque material.

[0233] The display device according to an embodiment of the present disclosure may be provided in a top emission type in which the emitted light is emitted upward, but the present disclosure is not necessarily limited thereto. When the display device according to an embodiment of the present disclosure is provided in a top emission type in which the emitted light is emitted upward, the first substrate 211 may be made of an opaque material or a transparent material. At the same time, when the display device according to an embodiment of the present disclosure is provided in a so-called bottom emission type in which the emitted light is emitted downward, the first substrate 211 may be made of a transparent material.

[0234] For each of the sub-pixels P1, P2, and P3, circuit elements including various signal lines, thin film transistors, capacitors, etc. are formed on the first substrate 211 (see FIGS. 11 and 12). Figure 7 ) The signal lines may include gate lines, data lines, power supply lines, and reference lines, and the thin film transistors may include switching thin film transistors, driving transistors TFT, and sensing thin film transistors.

[0235] The switching thin film transistor is switched according to the gate signal provided to the gate line, and is used to supply the data voltage provided from the data line to the driving thin film transistor.

[0236] The driving thin film transistor (TFT) switches according to the data voltage provided from the switching thin film transistor to generate a data current based on the power supplied from the power line, and is used to supply the generated data current to the first electrode 221.

[0237] The sensing thin film transistor is used to sense the threshold voltage deviation of the driving thin film transistor, which is the cause of image degradation, and supplies the current of the driving thin film transistor to the reference line in response to the sensing control signal provided from the gate line or a separate sensing line.

[0238] The capacitor is used to hold the data voltage provided from the driving transistor TFT within one frame, and is connected to each of the gate terminal and the source terminal of the driving transistor TFT.

[0239] The insulating layer 215 is formed on the circuit elements including the driving transistor TFT. The insulating layer 215 may be formed of an inorganic film, such as a SiOx film, a SiNx film, or a multi-layer film composed of SiOx and SiNx, but the present disclosure is not necessarily limited thereto. The insulating layer 215 may be formed of an acrylic resin, an epoxy resin, a phenolic resin, a polyamide resin, a polyimide resin, etc. Alternatively, the insulating layer 215 may be formed of a multi-layer film including at least one inorganic film and at least one organic film.

[0240] The respective portions of the insulating layer 215 located at the first sub-pixel P1, the second sub-pixel P2, and the third sub-pixel P3 are formed to have different thicknesses. That is, the thickness of the portion of the insulating layer 215 located in the first sub-pixel P1 is formed to be greater than the thickness of the portion of the insulating layer 215 located in the second sub-pixel P2, and less than the thickness of the portion of the insulating layer 215 located in the third sub-pixel P3, and in this case, the respective portions of the insulating layer 215 having different thicknesses can be formed into a structure having different thicknesses by using a halftone mask or other masks for selective etching. However, the present disclosure is not limited thereto.

[0241] This is done to ensure that the cavity lengths d1, d2, and d3 between the first reflective electrode 217, the second reflective electrode 218, and the third reflective electrode 219 and the second electrode 240 are formed differently. That is, the wavelength bands of each of red light, green light, and blue light can be considered to be in the order of red > green > blue, and thus the cavity lengths d2, d1, and d3 can also be considered to be in the order of red > green > blue.

[0242] However, in other embodiments, the cavity lengths d1, d2, and d3 may have different configurations. For example, the length of the third distance d3 between the third reflective electrode 219 and the second electrode 240 in the third sub-pixel P3 may be longer than the length of the first distance d1 between the first reflective electrode 217 and the second circuit 240 in the first sub-pixel P1. Additionally, the length of the third distance d3 between the third reflective electrode 219 and the second electrode 240 in the third sub-pixel P3 may be less than the length of the second distance d2 between the second reflective electrode 118 and the second circuit 240 in the second sub-pixel P2.

[0243] The first to third reflective electrodes 217, 218, and 219 are respectively formed on respective portions of different thicknesses of the insulating layer 215. That is, the third reflective electrode 219 is formed on the region of the maximum thickness of the insulating layer 215. The second reflective electrode 218 is formed on the region of the minimum thickness of the insulating layer 215. Additionally, the first reflective electrode 217 is formed on the region of the intermediate thickness of the insulating layer 215.

[0244] Additionally, auxiliary insulating layers 220a and 220b are respectively formed on the first reflective electrode 217 and the second reflective electrode 218.

[0245] Additionally, first electrodes 221, 222, and 223 are respectively formed on the auxiliary insulating layers 220a and 220b and the third reflective electrode 219.

[0246] The first sub-pixel P1 is divided into four sub-regions P1-1, P1-2, P1-3, and P1-4, and the first electrode 221 is formed in each of the four sub-regions P1-1, P1-2, P1-3, and P1-4.

[0247] Additionally, the second sub-pixel P2 is divided into four sub-regions P2-1, P2-2, P2-3, and P2-4, and the first electrode 222 is formed in each of the four sub-regions P2-1, P2-2, P2-3, and P2-4.

[0248] Additionally, the third sub-pixel P3 is divided into four sub-regions P3-1, P3-2, P3-3, and P3-4, and the first electrode 223 is formed in each of the four sub-regions P3-1, P3-2, P3-3, and P3-4.

[0249] The first to third reflective electrodes 217, 218, and 219 can be used as reflectors for reflecting light emitted from the organic electroluminescent compound layer 230, and can be formed of silver (Ag), aluminum (Al), and molybdenum (Mo) having high conductivity and low work function or alloys of the above materials, including an alloy of silver (Ag) and magnesium (Mg).

[0250] The first electrodes 221, 222, and 223 are connected to the driving transistors TFT. Specifically, the first electrodes 221, 222, and 223 are connected to the source or drain terminals of the driving transistors TFT through contact holes CH passing through the insulating layer 215, such that signals from the driving transistors TFT can be applied to the first electrodes 221, 222, and 223.

[0251] The first electrodes 221, 222, and 223 can be made of one of a transparent conductive metal material, a semi-transparent conductive metal material, and a metal material with a high reflectivity.

[0252] When the display device is set to a top emission type, the first electrodes 221, 222, and 223 can be formed of a metal material with a high reflectivity or a stacked structure of a metal material with a high reflectivity and a transparent conductive material. For example, the first electrodes 221, 222, and 223 can be formed of a stacked structure of a metal material with a high reflectivity, such as a stacked structure of Ti and Al (Ti / Al / Ti), a stacked structure of Al and ITO (ITO / Al / ITO), an Ag alloy, and a stacked structure of an Ag alloy and ITO (ITO / Ag alloy / ITO). The Ag alloy can be an alloy of silver (Ag), palladium (Pd), copper (Cu), etc.

[0253] When the display device is set to a bottom emission type, the first electrodes 221, 222, and 223 can be formed of a transparent conductive material (TCO) that can transmit light (such as ITO and IZO) or a semi-transparent conductive material (such as magnesium (Mg), silver (Ag), or an alloy of Mg and Ag). These first electrodes 221, 222, and 223 can be anodes.

[0254] Partition walls 251, 252, and 253 are formed on the first electrodes 221, 222, and 223, and emission regions EA are defined in each of the plurality of first, second, and third sub-pixels P1, P2, and P3. That is, in each of the first to third sub-pixels P1, P2, and P3, the regions where the partition walls 251, 252, and 253 are not formed and the first electrodes 221, 222, and 223 are exposed become the emission regions EA. On the other hand, the regions other than the emission regions EA become non-emission regions.

[0255] In addition, referring to Figure 3 , the partition wall 251 can define the emission region EA in each of the sub-regions P1-1, P1-2, P1-3, and P1-4 divided in the first sub-pixel P1. In this embodiment, the first sub-pixel P1 is described as an example of a green sub-pixel, but the present disclosure is not limited thereto.

[0256] In addition, referring to Figure 3, the partition walls 252 can define the emission regions EA in each of the sub-regions P2-1 to P2-4 divided in the second sub-pixel P2. In this embodiment, the second sub-pixel P2 is described by taking the red sub-pixel as an example, but the present disclosure is not limited thereto. Additionally, referring to Figure 3 , the partition walls 253 can define the emission regions EA in each of the sub-regions P3-1 to P3-4 divided in the third sub-pixel P3. In this embodiment, the third sub-pixel P3 is described by taking the blue sub-pixel as an example, but the present disclosure is not limited thereto.

[0257] The partition walls 251, 252, and 253 are respectively formed at the edges of the first electrodes 221, 222, and 223 to prevent the problem that the current concentration at the ends of the first electrodes 221, 222, and 223 reduces the light-emitting efficiency.

[0258] Meanwhile, the partition walls 251, 252, and 253 according to an embodiment of the present disclosure are formed such that the trenches T formed between the sub-pixels P1, P2, and P3 are exposed. That is, the partition walls 251, 252, and 253 are respectively formed at the edges of the upper surfaces of the first electrodes 221, 222, and 223 formed in the sub-pixels P1, P2, and P3. However, the partition walls 251, 252, and 253 may or may not be respectively formed on the side surfaces of the first electrodes 221, 222, and 223.

[0259] These partition walls 251, 252, and 253 may be formed of an inorganic film, such as a SiOx film, a SiNx film, or a multi-layer film composed of SiOx and SiNx, but the present disclosure is not necessarily limited thereto. The partition walls 251, 252, and 253 may also be formed of an organic film, such as an acrylic resin, an epoxy resin, a phenolic resin, a polyamide resin, or a polyimide resin.

[0260] The trenches T are formed in the insulating layer 215, the auxiliary insulating layers 220a, 220b, the first electrodes 221, 222, 223, and the partition walls 251, 252, 253. The trenches T may be formed between the sub-pixels P1, P2, and P3 to penetrate the first electrodes 221, 222, and 223 and the partition walls 251, 252, and 253, such that a part of the insulating layer 215 is recessed, but the present disclosure is not necessarily limited thereto. The trenches T may also be formed to penetrate the insulating layer 215.

[0261] The first electrodes 221, 222, and 223 are formed on the auxiliary insulating layers 220a, 220b, and the third reflective electrode 219. At this time, the metal material layer forming the first electrodes 221, 222, and 223 may be formed as a single layer spanning all the first sub-pixels to the third sub-pixels P1, P2, and P3, rather than being separately formed for each sub-pixel.

[0262] Bank barriers 251, 252, and 253 are formed at the upper edges of the first electrodes 221, 222, and 223 to prevent the problem of current concentration at the ends of the first electrodes 221, 222, and 223, which would reduce the light emission efficiency.

[0263] The first electrodes 221, 222, and 223 may be formed for the sub-pixels P1, P2, and P3, respectively. Additionally, bank barriers 251, 252, and 253 may be formed at the edges of the upper surfaces of the first electrodes 221, 222, and 223 provided in the first sub-pixel to the third sub-pixel P1, P2, and P3, respectively. That is, trenches T may also be formed in each of the sub-pixels of the first sub-pixel to the third sub-pixel P1, P2, and P3 that are respectively divided into four first sub-regions P1-1 to P1-4, four second sub-regions P2-1 to P2-4, and four third sub-regions P3-1 to P3-4.

[0264] The trenches T will separately form between the first electrodes 221, 222, and 223 in the first sub-pixel to the third sub-pixel P1, P2, and P3 to expose the side surfaces of each of the first electrodes 221, 222, and 223. In this case, the width of the trench T may be equal to the spacing distance between the first electrodes 221, 222, and 223. However, the present disclosure is not necessarily limited thereto.

[0265] Additionally, the trenches T will separately form between the bank barriers 251, 252, and 253 in the first sub-pixel to the third sub-pixel P1, P2, and P3 to expose the side surfaces of each of the bank barriers 251, 252, and 253.

[0266] The width of the trench T may be determined considering the thickness of the organic electroluminescent compound layer 230 and the deposition method.

[0267] The trench T may be formed between the first sub-pixel P1 and the second sub-pixel P2, and the hole layer 231g of the organic electroluminescent compound layer 230, the light-emitting material layer 232g as the EML, and the electron layer 233g may be sequentially stacked in the trench T. For example, when the width of the trench T is formed to be less than 0.09 μm, the first hole layer 231g stacked in the first sub-pixel P1 and the second hole layer 231r stacked in the second sub-pixel P2 may contact each other at the upper part of the trench T. Therefore, the first EML 232g stacked on the first hole layer 231g in the first sub-pixel P1 is connected to the first EML 232g in the second sub-pixel P2, resulting in a leakage current between the adjacent sub-pixels P1 and P2.

[0268] In order to prevent the first hole layer 231g stacked in the first sub-pixel P1 and the second hole layer 231r stacked in the second sub-pixel P2 from contacting each other at the upper part of the trench T, in a display device according to another embodiment of the present disclosure, the width of the trench T may be formed to be greater than or equal to 0.09 μm. However, the present disclosure is not necessarily limited thereto.

[0269] On the other hand, when the width of the trench T is formed to be larger, the second electrodes 240 of adjacent sub-pixels may be disconnected from each other in the trench T without being connected to each other. For example, when the width of the trench T is formed to be greater than or equal to 0.20 μm, the second electrode 240 stacked in the first sub-pixel P1 and the second electrode 240 stacked in the second sub-pixel P2 may be disconnected from each other through the trench T.

[0270] An organic electroluminescent compound layer 230 is formed on the first electrodes 221, 222, and 223. The organic electroluminescent compound layer 230 may be a white emission material layer that emits white light. In this case, the organic electroluminescent compound layer 230 may be a common layer formed in the sub-pixels P1, P2, and P3 together.

[0271] As Figure 17 shown, the organic electroluminescent compound layers 230g, 230r, and 230b include hole layers 231g, 231r, and 231b and EMLs 232g, 232r, and 232b respectively, and include an electron layer 233. The hole layers 231g, 231r, and 231b each include a hole injection layer HIL and a hole transport layer HTL, and the electron layer 233 includes an electron transport layer ETL and an electron injection layer EIL.

[0272] The organic electroluminescent compound layer 230 includes a first organic electroluminescent compound layer 230g located in the first sub-pixel P1, a second organic electroluminescent compound layer 230r located in the second sub-pixel P2, and a third organic electroluminescent compound layer 230b located in the third sub-pixel P3.

[0273] In addition, the hole layer 231 includes a first hole layer 231g located in the first sub-pixel P1, a second hole layer 231r located in the second sub-pixel P2, and a third hole layer 231b located in the third sub-pixel P3.

[0274] The electron layer 233 is located above the EMLs 232g, 232r, and 232b, and is disposed on the entire surface of the first sub-pixel to the third sub-pixels P1, P2, and P3.

[0275] Reference Figure 16 and Figure 17, in order to change the cavity lengths d1, d2, and d3 between the second electrode 240 and the first to third reflective electrodes 217, 218, and 219 respectively located in the sub-pixels P1, P2, and P3, the thickness of the insulating layer 215 in the first sub-pixel P1 can be formed to be less than the thickness of the insulating layer 215 in the second sub-pixel P2 and greater than the thickness of the insulating layer 215 in the third sub-pixel P3.

[0276] In addition, the EML includes a first EML 232g that emits green light and is located in the first sub-pixel P1, a second EML 232r that emits red light and is located in the second sub-pixel P2, and a third EML 232b that emits blue light and is located in the third sub-pixel P3. However, the present disclosure is not limited thereto.

[0277] In addition, the EMLs 232g, 232r, and 232b are formed by applying FMM. For example, in order to form the first EML 232g in the green first sub-pixel P1 among the first to third sub-pixels P1, P2, and P3, a green light-emitting material layer material is deposited while an FMM (not shown) is disposed on the upper portion of the first hole layer 231g of a plurality of first sub-pixels P1 corresponding to the green sub-pixels, thereby forming the first EML 232g in the green first sub-pixel P1.

[0278] At this time, since each of the plurality of first sub-pixels P1 is divided into four sub-regions P1-1, P1-2, P1-3, and P1-4, the first EML 232g can be easily formed using an FMM (not shown), thereby increasing the manufacturing freedom of the FMM by more than four times.

[0279] Meanwhile, the red second sub-pixel P2 and the blue third sub-pixel P3 can also be formed by using FMM for the red second EML 232r and the blue third EML 232b respectively. The red second sub-pixel P2 and the blue third sub-pixel P3 can be formed similarly to the green first sub-pixel P1.

[0280] Therefore, in the case of each of the second sub-pixels P2 and the third sub-pixels P3 divided into four sub-regions P2-1, P2-2, P2-3, and P2-4 and four sub-regions P3-1, P3-2, P3-3, and P3-4, FMM can be used to form the second EML 232r and the third EML 232b, thereby increasing the manufacturing freedom of the FMM by more than four times.

[0281] Due to the stepped portion of the trench T, the first EML 232g formed in the first sub-pixel P1, the second EML 232r formed in the second sub-pixel P2, and the third EML 232b formed in the third sub-pixel P3 are disconnected from each other.

[0282] Meanwhile, the first EML 232g formed in the first sub-pixel P1 and the second EML 232r formed in the second sub-pixel P2 do not contact each other above the trench T.

[0283] Since the first EML to the third EML 232g, 232r, and 232b of the first sub-pixel to the third sub-pixel P1, P2, and P3 are disconnected from each other within the trench T, it is difficult for charges to move between adjacent sub-pixels P1, P2, and P3 through the first EML to the third EML 232g, 232r, and 232b.

[0284] The organic electroluminescent compound layer 230 according to another embodiment of the present disclosure can minimize the influence of leakage current on adjacent first sub-pixel to third sub-pixel P1, P2, and P3.

[0285] As described above, when holes and electrons are injected into the first electrodes 221, 222, and 223 as anodes and the second electrode 240 as a cathode and recombine in the EML 232g, 232r, and 232b, excitons are formed during the excitation process and emit light due to the energy from the excitons, where the first electrodes 221, 222, and 223 and the second electrode 240 face each other and the organic electroluminescent compound layer 230 is inserted therebetween. In particular, the organic light-emitting diode device displays an image by electrically controlling the amount of light generated from the EML 232g, 232r, and 232b.

[0286] Meanwhile, the second electrode 240 is formed on the organic electroluminescent compound layer 230. The second electrode 240 can be a common layer formed in the first sub-pixel to the third sub-pixel P1, P2, and P3.

[0287] The first cavity length d1 between the first reflective electrode 217 in the first sub-pixel P1 and the second electrode 240 can be less than the second cavity length d2 between the second reflective electrode 218 in the second sub-pixel P2 and the second electrode 240, and greater than the third cavity length d3 between the third reflective electrode 219 in the third sub-pixel P3 and the second electrode 240.

[0288] However, in other embodiments, the cavity lengths d1, d2, and d3 can have different configurations. For example, the length of the third distance d3 between the third reflective electrode 219 in the third sub-pixel P3 and the second electrode 240 can be longer than the length of the first distance d1 between the first reflective electrode 217 in the first sub-pixel P1 and the second circuit 240. In addition, the length of the third distance d3 between the third reflective electrode 219 in the third sub-pixel P3 and the second electrode 240 can be less than the length of the second distance d2 between the second reflective electrode 218 in the second sub-pixel P2 and the second electrode 240.

[0289] In particular, the wavelengths of red light, green light, and blue light can be considered to be in the order of red > green > blue, and thus the cavity lengths can also be considered to be in the order of red > green > blue. That is to say, red light can have a transmittance peak at a wavelength band higher than those of green light and blue light. However, in another embodiment in which the colors of the first sub-pixel to the third sub-pixels P1, P2, and P3 are changed, the corresponding distances between the second electrode 240 and the reflective electrodes 217, 218, and 219 can be changed to correspond to the color of each of the first sub-pixel to the third sub-pixels P1, P2, and P3.

[0290] Accordingly, a first cavity length d1 between the first reflective electrode 217 in the first sub-pixel P1 and the second electrode 240 can be less than a second cavity length d2 between the second reflective electrode 218 in the second sub-pixel P2 and the second electrode 240, and greater than a third cavity length d3 between the third reflective electrode 219 in the third sub-pixel P3 and the second electrode 240.

[0291] A cover layer 260 and a encapsulation film 270 can be formed on the second electrode 240. The cover layer 260 and the encapsulation film 270 are protective layers to protect the plurality of organic electroluminescent compound layers 230 and the second electrode 240 from the penetration of moisture (H2O) or foreign substances from the outside.

[0292] The display device according to an embodiment of the present disclosure can be applied to mobile devices, video phones, smart watches, watch phones, wearable devices, foldable devices, rollable devices, bendable devices, flexible devices, curved devices, sliding devices, variable devices, electronic notepads, e-books, portable multimedia players (PMPs), personal digital assistants (PDAs), MP3 players, mobile medical devices, desktop personal computers (PCs), laptop PCs, netbook computers, workstations, navigation devices, automotive display devices, theater displays, televisions (TVs), wallpaper devices, signage devices, notebook computers, monitors, cameras, camcorders, household appliances, etc. Additionally, the display device according to one or more embodiments of the present disclosure manufactured by a light-emitting element transfer mold and a light-emitting element transfer method using the transfer mold can be applied to an organic light-emitting lighting device or an inorganic light-emitting lighting device, but is not limited thereto. Furthermore, the display device can be applied to any device using a display

[0293] The display device according to one or more embodiments of the present disclosure can be described as follows.

[0294] A display device according to one or more embodiments of the present disclosure includes: a substrate in which a first sub-pixel, a second sub-pixel, and a third sub-pixel are defined, each sub-pixel being divided into at least two sub-regions; a plurality of thin film transistors respectively disposed corresponding to at least two sub-regions in each of the first sub-pixel to the third sub-pixel; an insulating layer disposed on the plurality of thin film transistors; a plurality of first electrodes disposed on the insulating layer to correspond to the at least two sub-regions in each of the first sub-pixel to the third sub-pixel and respectively connected to the plurality of thin film transistors; trenches located between the sub-regions divided in each of the first sub-pixel to the third sub-pixel; an organic electroluminescent compound layer disposed on the first electrodes; and a second electrode formed on the organic electroluminescent compound layer, wherein the at least two sub-regions in each of the first sub-pixel to the third sub-pixel have the same color.

[0295] A dam can be further disposed at an edge of the first electrode, and the first electrode is disposed on at least two sub-regions divided in each of the first sub-pixel to the third sub-pixel.

[0296] A reflective electrode can be further disposed under the first electrode, and the first electrode is disposed in each of the at least two sub-regions in each of the first sub-pixel to the third sub-pixel.

[0297] The first sub-pixel can be a green sub-pixel, the second sub-pixel can be a red sub-pixel, and the third sub-pixel can be a blue sub-pixel.

[0298] The cavity length d1 between the reflective electrode and the second electrode of the first sub-pixel can be less than the cavity length d2 between the reflective electrode and the second electrode of the second sub-pixel and greater than the cavity length d3 between the reflective electrode and the second electrode of the third sub-pixel.

[0299] The first thickness of the electron layer located in the first sub-pixel can be less than the second thickness of the electron layer located in the second sub-pixel and greater than the third thickness of the electron layer located in the third sub-pixel.

[0300] The thickness of the insulating layer under the reflective electrode of the first sub-pixel can be greater than the thickness of the insulating layer under the reflective electrode of the second sub-pixel and less than the thickness of the insulating layer under the reflective electrode of the third sub-pixel.

[0301] The organic electroluminescent compound layer can include a hole layer respectively formed on the first electrodes, an EML respectively formed on the hole layer, and an electron layer formed on a substrate including the EML.

[0302] The first to third emission material layers may be respectively formed on the first to third hole layers in the sub-regions of the first to third sub-pixels, and there are trenches between the first to third sub-pixels.

[0303] At least two sub-regions may include four sub-regions.

[0304] A display device according to one or more embodiments of the present disclosure includes: a substrate in which a first sub-pixel, a second sub-pixel, and a third sub-pixel are defined, each sub-pixel being divided into at least two sub-regions; an insulating layer provided on the substrate; a reflective electrode provided on the insulating layer; a plurality of first electrodes provided on the insulating layer corresponding to at least two sub-regions in each of the first to third sub-pixels; a trench located between the at least two sub-regions divided in each of the first to third sub-pixels; an organic electroluminescent compound layer provided on the first electrode; and a second electrode formed on the organic electroluminescent compound layer, wherein the at least two sub-regions in each of the first to third sub-pixels have the same color.

[0305] A reflective electrode may be further provided below the first electrode, and the first electrode is provided in each of at least two sub-regions in each of the first to third sub-pixels.

[0306] The organic electroluminescent compound layer may include a hole layer respectively formed on the first electrode, an EML respectively formed on the hole layer, and an electron layer formed on a substrate including the EML.

[0307] The first sub-pixel may be a green sub-pixel, the second sub-pixel may be a red sub-pixel, and the third sub-pixel may be a blue sub-pixel.

[0308] The distance d1 between the reflective electrode and the second electrode of the first sub-pixel may be smaller than the distance d2 between the reflective electrode and the second electrode of the second sub-pixel and larger than the distance d3 between the reflective electrode and the second electrode of the third sub-pixel.

[0309] At least two sub-regions may include four sub-regions.

[0310] A method for manufacturing a display device according to one or more embodiments of the present disclosure includes: preparing a substrate, defining a first sub-pixel, a second sub-pixel, and a third sub-pixel in the substrate, each sub-pixel being divided into at least two sub-regions; forming a plurality of first electrodes respectively disposed corresponding to the at least two sub-regions in each of the first sub-pixel to the third sub-pixel; forming a first hole layer to a third hole layer respectively on the plurality of first electrodes in the sub-regions of the first sub-pixel to the third sub-pixel; sequentially forming a first EML to a third EML on the first hole layer to the third hole layer in the sub-regions of the first sub-pixel to the third sub-pixel using first to third FMMs; forming an electron layer on the substrate including the first EML to the third EML; and forming a second electrode on the electron layer.

[0311] The cavity length d1 between the reflective electrode of the first sub-pixel and the second electrode may be less than the cavity length d2 between the reflective electrode of the second sub-pixel and the second electrode, and greater than the cavity length d3 between the reflective electrode of the third sub-pixel and the second electrode.

[0312] The at least two sub-regions may include four sub-regions.

[0313] The sub-regions in the first sub-pixel to the third sub-pixel may be formed by the same process, and at least two sub-regions in the first sub-pixel to the third sub-pixel may have the same color.

[0314] Since the content of the present disclosure described in the problems to be solved, the means for solving the problems, and the effects does not specify the essential features of the claims, the scope of the claims is not limited to the content described in the present disclosure.

[0315] According to the present disclosure, by ensuring that the anode area of the thin film transistor matches the emission area of the EML at a ratio of greater than or equal to 1:2, the manufacturing freedom of the FMM can be improved to achieve the FMM manufacturing technology and mass productivity required for ultra-high resolution displays.

[0316] According to the present disclosure, the difficulty of the mask manufacturing process can be reduced by increasing the opening area of the FMM by at least twice, and the mask clogging problem can be reduced by the increased opening area, thereby improving the mass productivity.

[0317] According to the present disclosure, even when the area of the emissive material layer is increased by four times, trench can be utilized to achieve self-pixelization at one sub-pixel size.

[0318] The effects of the present disclosure are not limited to the above effects, and those skilled in the art can clearly understand other effects not mentioned from the description of the claims.

[0319] Although the embodiments have been described in detail above with reference to the accompanying drawings, the present disclosure is not limited to these embodiments, and various changes and modifications can be made without departing from the technical spirit of the present disclosure. Therefore, the embodiments disclosed herein are considered to be descriptive rather than restrictive of the technical spirit of the present disclosure, and the scope of the technical spirit of the present disclosure is not limited by these embodiments. Therefore, the above embodiments should be understood as being exemplary and not limiting in any way.

Claims

1. A display device, comprising: a substrate, in which a first sub-pixel, a second sub-pixel, and a third sub-pixel are provided, and each of the first to third sub-pixels is divided into at least two sub-regions; a plurality of thin film transistors, the plurality of thin film transistors being respectively provided corresponding to the at least two sub-regions in each of the first to third sub-pixels; an insulating layer provided on the plurality of thin film transistors; a plurality of first electrodes, the plurality of first electrodes being provided on the insulating layer, configured to correspond to the at least two sub-regions in each of the first to third sub-pixels, and respectively connected to the plurality of thin film transistors; grooves, the grooves being located between the at least two sub-regions in each of the first to third sub-pixels; an organic electroluminescent compound layer provided on the plurality of first electrodes; and a second electrode provided on the organic electroluminescent compound layer, wherein at least two sub-regions in the first sub-pixel have the same color, at least two sub-regions in the second sub-pixel have the same color but different from the color of the two sub-regions in the first sub-pixel, and at least two sub-regions in the third sub-pixel have the same color but different from the at least two sub-regions in the first sub-pixel and the second sub-pixel.

2. The display device according to claim 1, further comprising a plurality of dams, wherein, Partition walls are further provided at edges of the first electrodes corresponding to the at least two sub-regions divided in each of the first to third sub-pixels.

3. The display device according to claim 1, further comprising a reflective electrode, the reflective electrode being further provided below the first electrodes corresponding to the at least two sub-regions in each of the first to third sub-pixels.

4. The display device according to claim 3, wherein, The first sub-pixel is a green sub-pixel, wherein the second sub-pixel is a red sub-pixel, and wherein the third sub-pixel is a blue sub-pixel.

5. The display device according to claim 4, wherein, The cavity length between the reflective electrode of the first sub-pixel and the second electrode is less than the cavity length between the reflective electrode of the second sub-pixel and the second electrode, and greater than the cavity length between the reflective electrode of the third sub-pixel and the second electrode.

6. The display device according to claim 1, wherein, The organic electroluminescent compound layer includes a plurality of hole layers respectively provided on the plurality of first electrodes, a plurality of light emitting material layers (EML) respectively provided on the hole layers, and an electron layer formed on the substrate including the plurality of EMLs.

7. The display device according to claim 5, wherein, A first thickness of a part of the electron layer in the first sub-pixel is less than a second thickness of a part of the electron layer in the second sub-pixel, and greater than a third thickness of a part of the electron layer in the third sub-pixel.

8. The display device according to claim 5, wherein, A thickness of a part of the insulating layer below the reflective electrode of the first sub-pixel is greater than a thickness of a part of the insulating layer below the reflective electrode of the second sub-pixel, and less than a thickness of a part of the insulating layer below the reflective electrode of the third sub-pixel.

9. The display device according to claim 6, wherein, First EML to third EML among the plurality of EMLs are respectively formed on first hole layer to third hole layer among the plurality of hole layers in at least two sub-regions of the first sub-pixel to the third sub-pixel, and the trench is disposed therebetween.

10. The display device according to claim 4, wherein, The at least two sub-regions of the first sub-pixel to the third sub-pixel include four sub-regions.

11. A display device, comprising: a substrate in which a first sub-pixel, a second sub-pixel, and a third sub-pixel are provided, and each of the first sub-pixel to the third sub-pixel is divided into at least two sub-regions; an insulating layer disposed on the substrate; a reflective electrode disposed on the insulating layer; a plurality of first electrodes disposed on the insulating layer and configured to correspond to at least two sub-regions in each of the first sub-pixel to the third sub-pixel; a trench located between at least two sub-regions divided in each of the first sub-pixel to the third sub-pixel; an organic electroluminescent compound layer disposed on the plurality of first electrodes; and a second electrode disposed on the organic electroluminescent compound layer, wherein at least two sub-regions in the first sub-pixel have the same color, at least two sub-regions in the second sub-pixel have the same color but different from the color of at least two sub-regions in the first sub-pixel, and at least two sub-regions in the third sub-pixel have the same color but different from the colors of two sub-regions in the first sub-pixel and the second sub-pixel.

12. The display device according to claim 11, wherein, The first sub-pixel is a green sub-pixel, wherein the second sub-pixel is a red sub-pixel, and wherein the third sub-pixel is a blue sub-pixel.

13. The display device according to claim 12, wherein, A cavity length between the reflective electrode of the first sub-pixel and the second electrode is less than a cavity length between the reflective electrode of the second sub-pixel and the second electrode, and greater than a cavity length between the reflective electrode of the third sub-pixel and the second electrode.

14. The display device according to claim 11, wherein, The at least two sub-regions include four sub-regions of the first sub-pixel to the third sub-pixel.

15. The display device according to claim 11, wherein, The organic electroluminescent compound layer includes a plurality of hole layers respectively disposed on the plurality of first electrodes, a plurality of light-emitting material layers (EML) respectively disposed on the hole layers, and an electron layer disposed on the substrate including the plurality of EMLs.

16. A method for manufacturing a display device, the method comprising: preparing a substrate in which a first sub-pixel, a second sub-pixel, and a third sub-pixel are provided, and each of the first sub-pixel to the third sub-pixel is divided into at least two sub-regions; Form a plurality of first electrodes, wherein the plurality of first electrodes are respectively arranged to correspond to at least two sub-regions in each of the first sub-pixel to the third sub-pixel; Form a first hole layer to a third hole layer respectively on the plurality of first electrodes in at least two sub-regions among the first sub-pixel to the third sub-pixel; Use a first fine metal mask to a third fine metal mask to sequentially form a first emissive material layer to a third emissive material layer on the first hole layer to the third hole layer on at least two sub-regions among the first sub-pixel to the third sub-pixel; Form an electron layer on the substrate including the first EML to the third EML; And Form a second electrode on the electron layer.

17. The method according to claim 16, wherein The cavity length between the reflective electrode of the first sub-pixel and the second electrode is less than the cavity length between the reflective electrode of the second sub-pixel and the second electrode, and greater than the cavity length between the reflective electrode of the third sub-pixel and the second electrode.

18. The method according to claim 16, wherein, The at least two sub-regions of the first sub-pixel to the third sub-pixel include four sub-regions.

19. The method according to claim 16, wherein, Among them, The at least two sub-regions in each of the first sub-pixel to the third sub-pixel are formed by the same process, and Wherein, at least two sub-regions in the first sub-pixel have the same color, at least two sub-regions in the second sub-pixel have the same color but different from the color of the two sub-regions in the first sub-pixel, and at least two sub-regions in the third sub-pixel have the same color but different from the at least two sub-regions in the first sub-pixel and the second sub-pixel.

Images