Display device

Abstract

A display device is disclosed. The display device may include a display panel including a first area, a second area overlapping the first area, and a third area between the first area and the second area; a printed circuit board disposed at the first region and the second region; and a controller disposed on the printed circuit board. The display panel may be bent in the third area. The printed circuit board may include a first hole.

Description

Technical Field

[0001] The present disclosure relates to a display device, and more particularly, for example, but not limited to, to a display device having enhanced attachment strength between a printed circuit board and a board layer of a display panel. Background Art

[0002] As the information society develops, various demands for display devices for displaying images are increasing, and various types of display devices such as liquid crystal display (LCD) devices and organic light emitting diode (OLED) display devices are being adopted.

[0003] Among display devices, OLED displays, as self-luminous types, do not require a separate backlight and therefore offer advantages over LCDs, including wider viewing angles, higher contrast, lighter weight, thinner dimensions, and lower power consumption. OLED displays also have the advantages of being able to operate at low voltages, having fast response times, and being inexpensive to manufacture.

[0004] The description provided in the description of the background technology section should not be assumed to be prior art simply because it is mentioned in the description of the background technology section or is associated with the description of the background technology section. The description of the background technology section may include information describing one or more aspects of the subject technology, and the description in this section does not limit the present invention. Summary of the Invention

[0005] The inventors have recognized that the prior art has poor adhesion strength between a printed circuit board and a display panel layer. Therefore, the present disclosure is intended to provide a display device having enhanced adhesion (attachment) between a printed circuit board and a display panel layer.

[0006] The present disclosure is directed to providing a display device in which the occurrence of lift-off in an area on a printed circuit board where a controller is provided and an area near the printed circuit board where the controller is provided can be minimized.

[0007] A display device according to an exemplary embodiment of the present disclosure may include: a display panel including a first region, a second region overlapping the first region, and a third region between the first and second regions; a printed circuit board disposed between the first and second regions; and a controller disposed on the printed circuit board. The display panel may be bent in the third region. The printed circuit board may include a first hole.

[0008] A display device according to another exemplary embodiment of the present disclosure includes: a display panel including a first region, a second region overlapping the first region, and a third region located between the first region and the second region; a printed circuit board disposed in the first region and the second region; and a first coupling layer disposed in a portion of the first region that does not overlap the second region and located below the printed circuit board. The printed circuit board may include a first hole. The first coupling layer may include a second hole. The first hole and the second hole may overlap each other. The first hole and the second hole have steps.

[0009] A display device according to another exemplary embodiment of the present disclosure may include a display panel, a printed circuit board disposed above the display panel, and a controller disposed on the printed circuit board. The printed circuit board may include a first hole. The first hole may overlap the controller.

[0010] According to an exemplary embodiment of the present disclosure, the display panel may include a bending region, and the display panel may be bent in the bending region. Accordingly, the border area of the display panel may be reduced.

[0011] According to an exemplary embodiment of the present disclosure, the printed circuit board may be attached to the board layer through a coupling layer. Accordingly, movement of the printed circuit board may be minimized. Accordingly, physical interference between the printed circuit board and the components disposed thereon may be minimized.

[0012] According to an exemplary embodiment of the present disclosure, movement of the printed circuit board may be minimized, thereby minimizing physical interference between the printed circuit board and the components disposed thereon, enhancing the durability of the display device, and increasing the lifespan of the display device.

[0013] According to an exemplary embodiment of the present disclosure, during a suction operation, air bubbles remaining inside the first coupling layer, at the interface between the first coupling layer and the printed circuit board, or at the interface between the first coupling layer and the board layer may be removed. Accordingly, lifting of the printed circuit board may be minimized.

[0014] According to an exemplary embodiment of the present disclosure, since a printed circuit board including holes is configured, adhesion (or attachment force) between the board layers in the region where the controller of the printed circuit board is disposed during a suction operation may be increased.

[0015] According to an exemplary embodiment of the present disclosure, during a suction operation through the holes in the coupling layer and the printed circuit board, the air bubbles sucked by the suction device may form a vortex due to the steps, thereby increasing the suction force of the suction device. Accordingly, adhesion (or attachment force) with the board layer MP in the region where the controller of the printed circuit board is disposed during a suction operation may be further increased.

[0016] It should be understood that the foregoing description and the following detailed description are both exemplary and explanatory, and are intended to provide further explanation of the claimed inventive concept.

[0017] Note:

[0018] Note 1. A display device, the display device comprising:

[0019] A display panel, the display panel including a first region, a second region overlapping the first region, and a third region located between the first region and the second region;

[0020] A printed circuit board, the printed circuit board being disposed at the first region and the second region; and

[0021] A controller, the controller being disposed on the printed circuit board,

[0022] wherein the display panel is bent in the third region, and

[0023] wherein the printed circuit board includes a first hole.

[0024] Note 2. The display device according to Note 1, the display device further comprising:

[0025] A first coupling layer, the first coupling layer being disposed on the printed circuit board in a portion of the first region that does not overlap the second region.

[0026] Note 3. The display device according to Note 2, wherein the first coupling layer includes a second hole.

[0027] Note 4. The display device according to Note 3, wherein the second hole overlaps the first hole.

[0028] Note 5. The display device according to Note 4, wherein the first hole has a first size, and the second hole has a second size equal to the first size.

[0029] Note 6. The display device according to Note 4, wherein the second hole is larger than the first hole.

[0030] Note 7. The display device according to Note 6, wherein the second hole covers the first hole.

[0031] Note 8. The display device according to Note 7, the display device further comprising:

[0032] A second coupling layer, the second coupling layer being disposed below the first coupling layer in the portion of the first region that does not overlap the second region, the second coupling layer including a third hole.

[0033] Supplement 9. The display device according to Supplement 8, wherein the third hole has a third size greater than the second size of the second hole and covers the second hole to define a second step between the first coupling layer and the second coupling layer.

[0034] Supplement 10. The display device according to Supplement 6, wherein the second hole overlaps with the controller.

[0035] Supplement 11. A display device, comprising:

[0036] A display panel including a first region, a second region overlapping with the first region, and a third region located between the first region and the second region;

[0037] A printed circuit board disposed in the first region and the second region; and

[0038] A controller disposed on the printed circuit board,

[0039] wherein the display panel is bent in the third region,

[0040] wherein the printed circuit board includes a first hole, and

[0041] wherein the controller includes a first controller and a second controller spaced apart from the first controller.

[0042] Supplement 12. The display device according to Supplement 11, wherein the first hole is disposed between the first controller and the second controller.

[0043] Supplement 13. The display device according to Supplement 11, further comprising:

[0044] A first coupling layer disposed on the printed circuit board in a portion of the first region that does not overlap with the second region,

[0045] wherein the first coupling layer includes a pressure-sensitive adhesive, and

[0046] wherein the first coupling layer includes a second hole that cooperates with the first hole to define a step.

[0047] Supplement 14. The display device according to Supplement 11, further comprising:

[0048] A first coupling layer disposed on the printed circuit board in a portion of the first region that does not overlap with the second region,

[0049] a layer, the layer being disposed below the first connection layer in the first region.

[0050] Remark 15. A display device, the display device comprising:

[0051] a display panel, the display panel including a first region, a second region overlapping with the first region, and a third region located between the first region and the second region;

[0052] a printed circuit board, the printed circuit board being disposed at the first region and the second region; and

[0053] a first connection layer, the first connection layer being disposed in a portion of the first region that does not overlap with the second region and being disposed below the printed circuit board,

[0054] wherein, the printed circuit board includes a first hole,

[0055] wherein, the first connection layer includes a second hole,

[0056] wherein, the first hole and the second hole overlap with each other, and

[0057] wherein, the first hole and the second hole have different sizes to define a step.

[0058] Remark 16. The display device according to Remark 15, wherein, the width of the second hole is greater than the width of the first hole.

[0059] Remark 17. The display device according to Remark 16, the display device further comprising a second connection layer, the second connection layer being disposed below the first connection layer in the portion of the first region that does not overlap with the second region,

[0060] wherein, the second connection layer includes a third hole overlapping with the first hole and the second hole.

[0061] Remark 18. The display device according to Remark 17, wherein, the second hole and the third hole have different sizes to define a further step.

[0062] Remark 19. The display device according to Remark 18, wherein, the width of the third hole is greater than the width of the second hole.

[0063] Remark 20. The display device according to Remark 17, the display device further comprising:

[0064] a controller, the controller being disposed on the printed circuit board,

[0065] Among them, each of the second hole and the third hole overlaps with the controller.

[0066] Supplementary Note 21. The display device according to Supplementary Note 20, wherein the controller includes a first controller and a second controller spaced apart from the first controller, and

[0067] wherein the first hole is provided between the first controller and the second controller.

[0068] Supplementary Note 22. The display device according to Supplementary Note 15, wherein the first coupling layer includes a pressure-sensitive adhesive.

[0069] Supplementary Note 23. The display device according to Supplementary Note 15, further comprising a board layer disposed below the first coupling layer in the first region.

[0070] Supplementary Note 24. A display device, comprising:

[0071] A display panel;

[0072] A printed circuit board disposed above the display panel; and

[0073] A controller disposed on the printed circuit board,

[0074] wherein the printed circuit board includes a first hole, and

[0075] wherein the first hole overlaps with the controller.

[0076] Supplementary Note 25. The display device according to Supplementary Note 24, further comprising:

[0077] A first coupling layer disposed on the printed circuit board.

[0078] Supplementary Note 26. The display device according to Supplementary Note 25, wherein the first coupling layer includes a second hole.

[0079] Supplementary Note 27. The display device according to Supplementary Note 26, wherein the second hole overlaps with the first hole.

[0080] Supplementary Note 28. The display device according to Supplementary Note 26, wherein the first hole and the second hole have a step. Description of the Drawings

[0081] The drawings are included to provide a further understanding of the present disclosure and are incorporated into and constitute a part of the present disclosure. The drawings illustrate exemplary embodiments of the present disclosure and are used together with the description to explain the principles of the present disclosure.

[0082] Figure 1 It is a configuration diagram of a display device according to an exemplary embodiment of the present disclosure.

[0083] Figure 2 It shows a Figure 1 plan view of a display panel and a printed circuit board of a display device according to an exemplary embodiment of the present disclosure.

[0084] Figure 3 It shows a Figure 1 plan view of a touch panel and a printed circuit board of a display device according to an exemplary embodiment of the present disclosure.

[0085] Figure 4 It is a Figure 3 magnified plan view of region Q1 in

[0086] Figure 5 It is a cross-sectional view showing the bent state of a display device according to an exemplary embodiment.

[0087] Figure 6 It is Figure 5 a cross-sectional view of a display panel of

[0088] Figure 7 It is a rear view of a display device according to an exemplary embodiment of the present disclosure. Figure 5 of

[0089] Figure 8 , Figure 9 , Figure 10 , Figure 11 , Figure 12 , Figure 13 , Figure 14 and Figure 15 are views showing a method of manufacturing a display device according to an exemplary embodiment of the present disclosure.

[0090] Figure 16 It is a rear view of a display device according to another exemplary embodiment of the present disclosure.

[0091] Figure 17 It is a cross-sectional view along line C-C' in Figure 16 according to another exemplary embodiment of the present disclosure.

[0092] Figure 18 It is a cross-sectional view along line D-D' in Figure 16 according to another exemplary embodiment of the present disclosure.

[0093] Figure 19 It is a cross-sectional view showing the suction process of a display device according to another exemplary embodiment.

[0094] Figure 20 is a rear view of a display device according to another exemplary embodiment of the present disclosure.

[0095] Figure 21 is a cross-sectional view along line E-E' in Figure 20 in accordance with another exemplary embodiment.

[0096] Figure 22 is a cross-sectional view along line F-F' in Figure 20 in accordance with another exemplary embodiment.

[0097] Figure 23 is a cross-sectional view showing the suction process of a display device according to another exemplary embodiment.

[0098] Figure 24 is a rear view of a display device according to another exemplary embodiment.

[0099] Throughout the drawings and the detailed description, unless otherwise described, the same reference numerals should be understood to refer to the same elements, features, and structures. For clarity, illustration, and convenience, the relative sizes and descriptions of these elements may be exaggerated. Detailed Description

[0100] Now, reference will be made in detail to various aspects of the present disclosure, examples of which may be shown in the drawings. In the following description, when a detailed description of well-known methods, functions, structures, or configurations may unnecessarily obscure various aspects of the present disclosure, the detailed description of these known functions or configurations may have been omitted for brevity. In addition, repeated descriptions may have been omitted for brevity. The progress of the processing steps and / or operations is a non-limiting example.

[0101] The order of the steps and / or operations is not limited to the order described herein and may be changed to occur in an order different from the order described herein, except in cases where the steps and / or operations must occur in a specific order. In one or more examples, two consecutive operations may be performed substantially simultaneously, or these two operations may be performed in the reverse order or in a different order, depending on the functions or operations involved.

[0102] Unless otherwise specified, throughout the specification and the drawings, like reference numerals may represent like elements even if they are shown in different drawings. Unless otherwise specified, throughout the specification and the drawings, the same reference numerals may be used to represent the same or substantially the same elements. In one or more aspects, unless otherwise specified, the same elements (or elements with the same name) in different drawings may have the same or substantially the same functions and characteristics. The names of the various elements used in the following description are chosen for convenience only and may thus be different from the names used in actual products.

[0103] Advantages and features of the present disclosure and methods for realizing them are clarified by describing various aspects with reference to the drawings. However, the present disclosure may be embodied in different forms and should not be construed as limited to the example aspects set forth herein. On the contrary, these example aspects are examples, and these examples are provided so that the present disclosure may be thorough and complete and enable those skilled in the art to understand the inventive concept without limiting the scope of protection of the present disclosure.

[0104] When using terms such as "on", "above", "over", "under", "below", "beside", "beneath", "near", "close to", "adjacent to", "on the side of", "proximate to" to describe the positional relationship between two components, one or more components may be located between the two components, unless such terms are used together with the terms "immediately" or "directly".

[0105] For the description of an element (e.g., a layer, a film, a region, a component, a part, etc.) as being "connected", "coupled", "attached", "bonded", etc. to another element, unless otherwise specified, the element may not only be directly connected, coupled, attached, or bonded to the other element, but also indirectly connected, coupled, attached, or bonded to the other element, and one or more intermediate elements may be provided or interposed between the elements.

[0106] It should be understood that although terms such as "first", "second", etc. may be used herein to describe various elements (e.g., layers, films, regions, components, parts, etc.), these elements should not be limited by these terms. For example, there is no specific order, precedence order, or number of elements. These terms are only used to distinguish one element from another. For example, without departing from the scope of the present disclosure, the first element may be referred to as the second element, and similarly, the second element may be referred to as the first element. In addition, without departing from the scope of the present disclosure, the first element, the second element, etc. can be arbitrarily named according to the convenience of those skilled in the art. For clarity, the functions or structures of these elements (e.g., the first element, the second element, etc.) are not limited by the serial number or the name in front of the element. In addition, the first element may include one or more first elements. Similarly, the second element, etc. may include one or more second elements, etc.

[0107] Spatial relative terms, such as "below", "beneath", "lower", "above", "over", "upper", etc., may be used to describe the correlation between various elements (e.g., layers, films, regions, components, parts, etc.) shown in the figures. Spatial relative terms should be understood to include terms for different directions of an element in use or operation in addition to the directions shown in the figures. For example, if the element shown in the figure is flipped, the element described as "below" or "beneath" will be positioned "above" other elements. Thus, the term "below" as an example term can include all directions of "above" and "below". Similarly, the exemplary terms "above" or "over" can include both directions of "above" and "below". When terms such as "comprising", "having", "including", "containing", "constituting", "made of", "formed from", etc. are used for one or more elements, one or more other elements can be added unless terms such as "only" are used. The terms used in the present disclosure are only for describing exemplary aspects and are not intended to limit the scope of the present disclosure. Unless the context clearly indicates otherwise, singular terms may include plural forms.

[0108] When describing temporal relationships, terms such as "after", "subsequently", "next", "then", "before", etc. may include cases where any two events are not consecutive, unless terms such as "immediately", "exactly", or "directly" are explicitly used.

[0109] When an element or layer is disposed "on" another element or layer, another layer or another element may be directly interposed on the other element or interposed therebetween.

[0110] It should be understood that the term "at least one" includes all combinations related to any one item. For example, "at least one of the first element, the second element, and the third element" may include all combinations of two or more elements selected from the first element, the second element, and the third element, as well as each of the first element, the second element, and the third element.

[0111] As used herein, the term "device" may refer to a display device including a display panel and a driver for driving the display panel. Examples of the display device may include a light-emitting element and the like. Additionally, examples of the device may include a laptop computer, a television, a computer monitor, an automotive device, a wearable device, and an automotive equipment device, and a complete product or a final product set of electronic devices (or equipment) or a set of devices (or equipment) respectively including a light-emitting element and the like, for example, a mobile electronic device such as a smart phone or a tablet computer, but the embodiments of the present disclosure are not limited thereto.

[0112] The features of various aspects of the present disclosure may be partially or fully interconnected or combined, may be technically related to each other, and may operate, link, or drive together in various ways. Various aspects of the present disclosure may be implemented or executed independently of each other, or may be implemented or executed together in a mutually dependent or related relationship. In one or more aspects, the components of each device according to various aspects of the present disclosure may be operatively coupled and configured.

[0113] Unless otherwise defined, all terms (including technical terms and scientific terms) used herein have the same meaning as commonly understood by those of ordinary skill in the art to which the exemplary embodiments belong. It will be further understood that terms, such as those defined in a common dictionary, should be interpreted as having a meaning consistent with their meaning in the context of the relevant art, and should not be interpreted in an idealized or overly formal sense unless explicitly defined as such herein.

[0114] In the following description, various exemplary aspects of the present disclosure will be described in detail with reference to the accompanying drawings. Regarding the reference numerals of the elements of each drawing, unless otherwise specified, the same elements may be shown in other drawings, and similar reference numerals may refer to similar elements. The same or similar elements may be denoted by the same reference numerals even if they appear in different drawings. Additionally, for ease of description, the ratios, dimensions, sizes, and thicknesses of each element shown in the drawings may be different from the actual ratios, dimensions, sizes, and thicknesses. Therefore, various aspects of the present disclosure are not limited to the ratios, dimensions, sizes, and thicknesses shown in the drawings.

[0115] The dimensions, including the size and thickness, of the respective components shown in the drawings are shown for ease of description, and the present disclosure is not limited to the dimensions and thickness of the components shown. However, it should be noted that the relative dimensions, including the relative size, position, and thickness, of the components shown in the respective drawings submitted here are part of the present disclosure.

[0116] Even if not explicitly stated, the components are interpreted to include a normal error range.

[0117] Figure 1 is a configuration diagram of a display device according to an exemplary embodiment of the present disclosure.

[0118] A display device 10 according to an exemplary embodiment may perform an image display function and a touch detection function (touch input function).

[0119] Referring to Figure 1 , a display device 10 according to an exemplary embodiment may include a display panel DISP, a source driver circuit SDC, a gate driver circuit GDC, a display controller DSIP, etc. The exemplary embodiments of the present disclosure are not limited thereto. In addition, all components of each display device according to all embodiments of the present disclosure are operably coupled and configured.

[0120] The display panel DISP may have a plurality of data lines DL and a plurality of gate lines GL. The display panel DISP may include a plurality of pixels. The plurality of pixels may display an image. The plurality of pixels may be arranged by being defined by the plurality of data lines DL and / or the plurality of gate lines GL.

[0121] The source driver circuit SDC may drive the plurality of data lines DL. The gate driver circuit GDC may drive the plurality of gate lines GL.

[0122] The display controller DSIP may control the source driver circuit SDC and the gate driver circuit GDC. The display controller DSIP may control the source driver circuit SDC and the gate driver circuit GDC by supplying various drive control signals DCS and GCS to the source driver circuit SDC and the gate driver circuit GDC.

[0123] The display controller DSIP may start scanning according to the timing achieved in each frame, convert the externally input image data into a data signal format used in the data driver circuit SDC, output the converted image data Data, and control the data driving at an appropriate time according to the scanning.

[0124] The display controller DSIP may receive various timing signals and input image data, such as a vertical synchronization signal, a horizontal synchronization signal, an input data enable signal, a clock signal, etc., from an external device (e.g., a host system).

[0125] The display controller DSIP can not only convert input image data input from the outside to a data signal format suitable for use in the source driver circuit SDC and output the converted image data, but also control the source driver circuit SDC and the gate driver circuit GDC, receive timing signals such as a vertical synchronization signal, a horizontal synchronization signal, an input data enable signal, or a clock signal, and generate various driving control signals DCS and GCS and output them to the source driver circuit SDC and the gate driver circuit GDC.

[0126] The source driver circuit SDC can drive a plurality of data lines DL by receiving image data Data from the display controller DSIP and supplying data voltages to the plurality of data lines DL. The source driver circuit SDC may be a data driver circuit, but the exemplary embodiments of the present disclosure are not limited thereto.

[0127] The source driver circuit SDC can be implemented by including at least one source driver integrated circuit SDIC, but the exemplary embodiments of the present disclosure are not limited thereto.

[0128] The gate driver circuit GDC can drive a plurality of gate lines GL by supplying scan signals to the plurality of gate lines GL. The gate driver circuit GDC may be a scan driver circuit, but the exemplary embodiments of the present disclosure are not limited thereto.

[0129] The gate driver circuit GDC can be implemented by including at least one gate driver integrated circuit (GDIC), but the exemplary embodiments of the present disclosure are not limited thereto.

[0130] In addition, the display device may further include a timing controller, and the timing controller can control the source driver circuit SDC and the gate driver circuit GDC. For example, the timing controller can realign digital video data input from the outside to fit the resolution of the display panel and provide the video data to the source driver circuit SDC. The timing controller can generate a gate control signal and a data control signal based on timing signals (such as a dot clock signal, a data enable signal, and a horizontal / vertical synchronization signal) synchronized with the input image signal. Here, the horizontal synchronization signal is a signal indicating the time taken for one horizontal line of the display screen, and the vertical synchronization signal is a signal indicating the time taken for displaying one frame of the screen. The data enable signal may correspond to a signal indicating a period during which a data voltage is supplied to the pixels. The timing controller can control the operation timing of the gate driver circuit GDC and the source driver circuit SDC by supplying the gate control signal to the gate driver circuit GDC and supplying the data control signal to the source driver circuit SDC.

[0131] Refer to Figure 1, the display device 10 according to an exemplary embodiment may include a touch panel TSP, a touch driving circuit TDC, a touch controller TSIP, etc. to provide a touch detection function. The touch panel TSP may be disposed on the display panel DISP, but the exemplary embodiments of the present disclosure are not limited thereto. The source driving circuit SDC and the touch driving circuit TDC may be integrated and included in the integrated IC SRIC (see Figure 2 ), but the exemplary embodiments of the present disclosure are not limited thereto.

[0132] Figure 2 is a plan view showing the display panel and the printed circuit board of the display device according to Figure 1 .

[0133] Referring to Figure 1 and Figure 2 , the display panel DISP may include a display area DA and a non-display area NDA adjacent to the display area DA. The display area DA includes a plurality of pixels PX. The non-display area NDA is configured to be near, partially or completely surround the display area DA.

[0134] The display area DA may include a short side extending in a first direction DR1 and a long side extending in a second direction DR2. The non-display area NDA may surround the display area DA. The non-display area NDA may be located on one side of the display area DA in the first direction DR1, on the other side of the display area DA in the first direction DR1, on one side of the display area DA in the second direction DR2, and on the other side of the display area DA in the second direction DR2, but the exemplary embodiments of the present disclosure are not limited thereto.

[0135] The non-display area NDA located on the other side of the display area DA in the second direction DR2 may extend further from the central portion of the other side of the display area DA in the second direction DR2 toward the other side in the second direction DR2. The width of the non-display area NDA extending further from the central portion of the other side of the display area DA in the second direction DR2 toward the other side in the second direction DR2 in the first direction DR1 may be smaller than the width of the non-display area NDA adjacent to the other side of the display area DA in the second direction DR2 in the first direction DR1. However, the present disclosure is not limited thereto. For example, referring to Figure 2 , below the display area DA, the width of a part of the non-display area NDA adjacent to the display area DA in the first direction DR1 is greater than the width of other parts of the non-display area NDA below the display area DA. However, the present disclosure is not limited thereto.

[0136] The display device 10 may include a first region MR, a second region SR, and a third region BR located between the first region MR and the second region SR. The display area DA and the non-display area NDA surrounding the four surfaces of the display area DA may form the first region MR. A portion further extending from the central portion on the other side of the display area DA in the second direction DR2 toward the other side in the second direction DR2 may form the third region BR and the second region SR. The third region BR may be provided between the second region SR and the first region MR. The second region SR may include a second pad area PA2 and a first pad area PA1 located at the end on the other side of the second region SR in the second direction DR2. The touch panel TISP may have substantially the same size as the first region MR, but the exemplary embodiments of the present disclosure are not limited thereto. For example, the first region MR may be a main region or a display region, but is not limited thereto. For example, the second region SR may be a sub-region, but is not limited thereto. For example, the third region BR may be a bent region or a variable region, but is not limited thereto.

[0137] The display device 10 may further include an integrated circuit SRIC provided in the first pad area PA1 and a flexible printed circuit board FPCB attached to the second pad area PA2.

[0138] A plurality of pads connected to the integrated circuit SRIC and the flexible printed circuit board FPCB may be provided in each of the first pad area PA1 and the second pad area PA2. The integrated circuit SRIC may be formed, for example, in the form of a driver chip (IC), but is not limited thereto. One exemplary embodiment describes the integrated circuit SRIC being provided in a chip-on-plastic manner such that the integrated circuit SRIC is directly mounted on the display panel DISP.

[0139] The controller may be provided on the flexible printed circuit board FPCB. The controller may include a plurality of controllers. For example, the controller may include a first controller and a second controller spaced apart from the first controller. For example, the first controller may be a display controller DSIP, but the exemplary embodiments of the present disclosure are not limited thereto. The second controller may include a touch controller TSIP, but the exemplary embodiments of the present disclosure are not limited thereto. The flexible printed circuit board FPCB may further include a connector CN and may be electrically connected to a main circuit board or the like through the connector CN, but the exemplary embodiments of the present disclosure are not limited thereto.

[0140] Figure 3 is a plan view showing the touch panel and the flexible printed circuit board of the display device according to Figure 1 of the display device. Figure 4 is Figure 3 an enlarged plan view of the region Q1 in

[0141] Referring to Figures 1 to 4, the touch panel TSP may include a sensor area SA and a non-sensor area NSA near the sensor area SA. Touch electrodes 185 and 182 for capacitively detecting a user's touch are provided in the sensor area SA. The touch panel TSP may sense the user's touch by a self-capacitance method or a mutual-capacitance method, but the exemplary embodiments of the present disclosure are not limited thereto. In the present specification, the touch panel TSP is described as sensing the user's touch by a mutual-capacitance method, but the exemplary embodiments of the present disclosure are not limited thereto.

[0142] The plurality of touch electrodes 185 and 182 may generate mutual electrostatic capacitance or self-electrostatic capacitance to detect the touch of an object or a person. The plurality of touch electrodes 185 and 182 may include a first touch electrode 185 and a second touch electrode 182. The first touch electrode 185 may include a 1a touch electrode 185a extending along a second direction DR2 and a 1b touch electrode 185b extending along a first direction DR1 different from the second direction DR2. The 1a touch electrode 185a and the 1b touch electrode 185b may be coplanarly arranged, and adjacent 1a touch electrodes 185a may be electrically connected through the second touch electrode 182 to avoid short-circuiting with the 1b touch electrode 185b.

[0143] For example, a touch drive signal may be applied to the 1a touch electrode 185a, and a touch sensing signal may be detected from the 1b touch electrode 185b. The touch drive circuit TDC may detect the touch sensing signal and output sensing data, and the touch controller TSIP may detect the presence or absence of a touch and / or the touch coordinates based on the sensing data.

[0144] The touch panel TSP may be manufactured separately from the display panel DISP and combined with the display panel DISP or built into the display panel DISP, but the exemplary embodiments of the present disclosure are not limited thereto.

[0145] For ease of description, the following description will focus on the case where the touch panel TSP is built into the display panel DISP.

[0146] Figure 5 is a cross-sectional view showing the bent state of a display device according to an exemplary embodiment.

[0147] Refer to Figure 5, the display panel DISP can be bent in the third region BR. The second region SR of the display panel DISP can overlap with the first region MR in the thickness direction. A laminate MP can also be provided on the lower surface of the first region MR and the lower surface (the upper surface after bending) of the second region SR of the display panel DISP. The laminate MP may not be provided in the third region BR, but the exemplary embodiments of the present disclosure are not limited thereto. The laminate MP can include stainless steel, but the exemplary embodiments of the present disclosure are not limited thereto. A backplane layer can also be provided between the laminate MP and the display panel DISP, but the exemplary embodiments of the present disclosure are not limited thereto.

[0148] The display device 10 can also include a cover layer CG located on the display panel DISP and a coupling layer UBP that couples the cover layer CG to the display panel DISP. For example, the coupling layer UBP can include an adhesive. The adhesive can be an optically clear resin (OCR), an optically clear adhesive (OCA), or a pressure-sensitive adhesive (PSA), but the exemplary embodiments of the present disclosure are not limited thereto.

[0149] The cover layer CG can be formed of a glass material including glass or quartz, but the exemplary embodiments of the present disclosure are not limited thereto. The cover layer CG can be provided on the display panel DISP to protect the components (e.g., the lower structure) provided below the cover layer CG from external influences. The cover layer CG can be a cover layer formed by chemical strengthening, but the exemplary embodiments of the present disclosure are not limited thereto. The cover layer CG can be a cover window, a window cover, or a cover member, but the exemplary embodiments of the present disclosure are not limited thereto. A polarization layer can also be provided between the cover layer CG and the display panel DISP, but the exemplary embodiments of the present disclosure are not limited thereto.

[0150] The printed circuit board FPCB can overlap with the first region MR. The printed circuit board FPCB can be provided or attached to the laminate MP on the first region MR. A first coupling layer PSA1 can be provided between the printed circuit board FPCB and the laminate MP of the first region MR. The first coupling layer can include an optically clear resin (OCR), an optically clear adhesive (OCA), or a pressure-sensitive adhesive, but the exemplary embodiments of the present disclosure are not limited thereto.

[0151] The display controller DSIP can be provided on one side of the printed circuit board FPCB. One side of the printed circuit board FPCB can be the surface opposite to the other surface attached to the laminate MP. Although Figure 5 it is shown that only the display controller DSIP is provided on one side of the printed circuit board FPCB, but the touch controller TSIP can also be provided together.

[0152] The printed circuit board FPCB may include a first hole SH1. The first coupling layer PSA1 may include a second hole SH2. The first hole SH1 and the second hole SH2 may overlap each other. The first hole SH1 and the second hole SH2 may have the same size, but the exemplary embodiments of the present disclosure are not limited thereto. The size of the second hole SH2 may be larger than the size of the first hole SH1, but the exemplary embodiments of the present disclosure are not limited thereto. The second hole SH2 may cover the first hole SH1, but the exemplary embodiments of the present disclosure are not limited thereto. For example, the second hole SH2 may completely cover the first hole SH1, but the exemplary embodiments of the present disclosure are not limited thereto.

[0153] According to the present disclosure, the display panel DISP may include a third region BR, and the display panel DISP may be bent in the third region (bending region) BR. Accordingly, the bezel area of the display panel DISP may be reduced.

[0154] According to the present disclosure, the printed circuit board FPCB may be attached to an end portion of the bent display panel DISP, and the printed circuit board FPCB may be attached to the board layer MP through the first coupling layer PSA1. Accordingly, the movement of the printed circuit board FPCB may be minimized. Accordingly, the physical interference between the printed circuit board FPCB and the provided components may be minimized, the durability of the display device may be enhanced, and the lifespan of the display device may be increased.

[0155] Figure 6 is Figure 5 a cross-sectional view of the display panel.

[0156] Referring to Figure 6 , the display panel DISP may include a substrate 101, a first thin film transistor 120, a second thin film transistor 130, a light emitting unit 150, a packaging unit 170, and a touch unit 180.

[0157] The substrate 101 may include one or more plastic materials. For example, the substrate 101 may be a multi-substrate including various plastic materials such as polyimide, but the exemplary embodiments of the present disclosure are not limited thereto. In some exemplary embodiments, the substrate 101 may be formed of a flexible polymer film. For example, the flexible polymer film may be formed of any one of polyimide (PI), polyethylene terephthalate (PET), acrylonitrile-butadiene-styrene copolymer (ABS), polymethyl methacrylate (PMMA), polyethylene naphthalate (PEN), polycarbonate (PC), polyethersulfone (PES), polyarylate (PAR), polysulfone (PSF), cycloolefin copolymer (COC), triacetyl cellulose (TAC), polyvinyl alcohol (PVA), and polystyrene (PS). However, the present disclosure is not limited thereto.

[0158] The buffer layer 102 may be disposed on the substrate 101. The buffer layer 102 may minimize or reduce the diffusion of moisture or oxygen permeating the substrate 101. The buffer layer 102 may be formed by alternately laminating silicon nitride (SiNx) and silicon oxide (SiOx) at least once, but the exemplary embodiments of the present disclosure are not limited thereto.

[0159] The buffer layer 102 may have a single-layer or multi-layer structure. For example, the buffer layer 102 may have a laminated structure including a film formed of silicon nitride (SiNx) and a film formed of silicon oxide (SiOx). For example, the buffer layer 102 may be configured as a single layer or multiple layers formed of at least one of silicon nitride (SiNx) and silicon oxide (SiOx). For example, the buffer layer 102 may be formed of a single-layer or multi-layer inorganic film. For example, the single-layer inorganic film may be a silicon oxide (SiOx) film or a silicon nitride (SiNx) film, and the multi-layer inorganic film may be formed by alternately laminating one or more layers of silicon oxide (SiOx) film, one or more layers of silicon nitride (SiNx) film, and one or more layers of amorphous silicon (a-Si), but the present disclosure is not limited thereto. However, depending on the structure or characteristics of the display device, the buffer layer 102 may not be included. However, the present disclosure is not limited thereto.

[0160] The first light-blocking layer 126 may be disposed on the buffer layer 102. The first light-blocking layer 126 may prevent light from passing through the first semiconductor layer 123 of the first thin-film transistor 120. For example, the first semiconductor layer 123 may be disposed to overlap the first light-blocking layer 126. The first light-blocking layer 126 may be formed of a single layer or multiple layers formed of any one of molybdenum (Mo), aluminum (Al), chromium (Cr), nickel (Ni), neodymium (Nd), and copper (Cu) or an alloy thereof, but the exemplary embodiments of the present disclosure are not limited thereto.

[0161] The first insulating layer 103 may be disposed on the first light blocking layer 126. The first insulating layer 103 may prevent a short circuit between components of the first thin film transistor 120 and the first light blocking layer 126. The first insulating layer 103 may be formed of the same material as the buffer layer 102, but the exemplary embodiments of the present disclosure are not limited thereto. For example, the first insulating layer 103 may be formed of an inorganic material such as silicon nitride (SiNx) or silicon oxide (SiOx), but the exemplary embodiments of the present disclosure are not limited thereto. For example, the first insulating layer 103 may be configured as a single layer or multiple layers formed of at least one of silicon nitride (SiNx) and silicon oxide (SiOx). For example, the first insulating layer 103 may be formed by a single layer or multiple layers of an inorganic film. For example, the single layer of the inorganic film may be a silicon oxide (SiOx) film or a silicon nitride (SiNx) film, and the multiple layers of the inorganic film may be formed by alternately laminating one or more layers of silicon oxide (SiOx) film, one or more layers of silicon nitride (SiNx) film, and one or more layers of amorphous silicon (a-Si), but the present disclosure is not limited thereto.

[0162] The first thin film transistor 120 may be disposed on the first insulating layer 103. The first thin film transistor 120 may include a first source electrode 121, a first gate electrode 122, a first semiconductor layer 123, and a first drain electrode 124.

[0163] The first semiconductor layer 123 may be disposed on the first insulating layer 103. The first semiconductor layer 123 may be formed of a semiconductor material, such as an oxide semiconductor, an amorphous semiconductor, or a polycrystalline semiconductor, but the exemplary embodiments of the present disclosure are not limited thereto.

[0164] The oxide semiconductor material may have an excellent effect of preventing leakage current and a relatively low manufacturing cost. The oxide semiconductor may be formed of a metal oxide such as zinc (Zn), indium (In), gallium (Ga), tin (Sn), and titanium (Ti), or a combination of a metal such as zinc (Zn), indium (In), gallium (Ga), tin (Sn), or titanium (Ti) and its oxide. Specifically, the oxide semiconductor may include zinc oxide (ZnO), zinc tin oxide (ZTO), zinc indium oxide (ZIO), indium oxide (InO), titanium oxide (TiO), indium gallium zinc oxide (IGZO), indium zinc tin oxide (IZTO), indium zinc oxide (IZO), indium gallium tin oxide (IGTO), and indium gallium oxide (IGO), but is not limited thereto.

[0165] The polycrystalline semiconductor material has a fast moving speed of carriers such as electrons and holes, and thus has a high mobility, and has low power consumption and excellent reliability. The polycrystalline semiconductor may be formed of polycrystalline silicon (poly-Si) or low-temperature polycrystalline silicon, but is not limited thereto.

[0166] The amorphous semiconductor material may be formed of amorphous silicon (a-Si), but is not limited thereto.

[0167] The first semiconductor layer 123 may include a channel region, a source region, and a drain region.

[0168] Since the low-temperature polysilicon semiconductor layer or the polysilicon semiconductor layer has a higher mobility than the amorphous semiconductor layer and the oxide semiconductor layer, the power consumption can be low and the reliability can be excellent. Accordingly, the driving transistor may be formed of the low-temperature polysilicon semiconductor layer or the polysilicon semiconductor layer, but the exemplary embodiments of the present disclosure are not limited thereto.

[0169] The second insulating layer 104 may be disposed on the first semiconductor layer 123. The second insulating layer 104 may be formed of the same material as the first insulating layer 103, but the exemplary embodiments of the present disclosure are not limited thereto. For example, the second insulating layer 104 may be configured to be a single layer or multiple layers formed of at least one of silicon nitride (SiNx) and silicon oxide (SiOx). For example, the second insulating layer 104 may be formed of a single layer or multiple layers of an inorganic film. For example, the single layer of the inorganic film may be a silicon oxide (SiOx) film or a silicon nitride (SiNx) film, and the multiple layers of the inorganic film may be formed by alternately laminating one or more layers of silicon oxide (SiOx) film, one or more layers of silicon nitride (SiNx) film, and one or more layers of amorphous silicon (a-Si), but the present disclosure is not limited thereto. The second insulating layer 104 may prevent a short circuit between the first semiconductor layer 123 and other components of the first thin film transistor 120.

[0170] The first gate electrode 122 may be disposed on the second insulating layer 104. The first gate electrode 122 may be disposed on the second insulating layer 104 to overlap the channel region of the first semiconductor layer 123. The first gate electrode 122 may be formed of a single layer or multiple layers formed of molybdenum (Mo), copper (Cu), titanium (Ti), aluminum (Al), chromium (Cr), gold (Au), nickel (Ni), neodymium (Nd), or a compound thereof, but the exemplary embodiments of the present disclosure are not limited thereto. The first gate electrode 122 may be disposed together with the gate line, but the exemplary embodiments of the present disclosure are not limited thereto.

[0171] The third insulating layer 105 may be disposed on the first gate electrode 122. The third insulating layer 105 may be formed of the same material as the first insulating layer 103 or the second insulating layer 104, but the exemplary embodiments of the present disclosure are not limited thereto. For example, the third insulating layer 105 may be configured to be a single layer or multiple layers formed of at least one of silicon nitride (SiNx) and silicon oxide (SiOx). For example, the third insulating layer 105 may be formed by a single layer or multiple layers of inorganic films. For example, the single layer of inorganic film may be a silicon oxide (SiOx) film or a silicon nitride (SiNx) film, and the multiple layers of inorganic films may be formed by alternately laminating one or more layers of silicon oxide (SiOx) films, one or more layers of silicon nitride (SiNx) films, and one or more layers of amorphous silicon (a-Si), but the present disclosure is not limited thereto.

[0172] The first source electrode 121 and the first drain electrode 124 may be disposed on the third insulating layer 105.

[0173] The first source electrode 121 and the first drain electrode 124 may be electrically connected to the first semiconductor layer 123 through contact holes. The first source electrode 121 and the first drain electrode 124 may be formed of a metal material. For example, each of the first source electrode 121 and the first drain electrode 124 may be formed of a single layer or multiple layers formed of any one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu) or an alloy thereof, but the exemplary embodiments of the present disclosure are not limited thereto.

[0174] The first source electrode 121 and the first drain electrode 124 may be disposed together with the data line. For example, the data line may be formed of the same material as the first source electrode 121 and the first drain electrode 124 and formed coplanarly with the first source electrode 121 and the first drain electrode 124, but the exemplary embodiments of the present disclosure are not limited thereto. For example, the data line may be formed of a material different from that of the first source electrode 121 and the first drain electrode 124.

[0175] The storage electrode 140 may be disposed to be spaced apart from the first thin film transistor 120. The storage electrode 140 may include a first storage electrode 141, a second storage electrode 142, and a third storage electrode 143.

[0176] The first storage electrode 141 may be formed of the same material as the first gate electrode 122 and may be formed coplanarly with the first gate electrode 122, but the exemplary embodiments of the present disclosure are not limited thereto. For example, the first storage electrode 141 may be formed of a material different from that of the first gate electrode 122.

[0177] The second storage electrode 142 may be disposed on the first storage electrode 141. The second storage electrode 142 may be disposed on the third insulating layer 105, and the third insulating layer 105 between the first storage electrode 141 and the second storage electrode 142 may be used as a dielectric to generate capacitance. The second storage electrode 142 may be formed of the same material as the first storage electrode 141, but the exemplary embodiments of the present disclosure are not limited thereto. For example, the second storage electrode 142 may be formed of a material different from that of the first storage electrode 141.

[0178] The second thin film transistor 130 may be disposed to be spaced apart from the first thin film transistor 120 and the storage electrode 140. The second thin film transistor 130 may include a second source electrode 131, a second gate electrode 132, a second semiconductor layer 133, and a second drain electrode 134.

[0179] The second light blocking layer 136 may be disposed coplanarly with the second storage electrode 142.

[0180] Similar to the first light blocking layer 126, the second light blocking layer 136 may prevent light from being guided to the second semiconductor layer 133, thereby extending the lifespan of the second thin film transistor 130. For example, the second semiconductor layer 133 may be disposed to overlap with the second light blocking layer 136.

[0181] The fourth insulating layer 106 may be disposed on the second light blocking layer 136. The fourth insulating layer 106 may be formed of the same material as the first insulating layer 103, the second insulating layer 104, or the third insulating layer 105, but the exemplary embodiments of the present disclosure are not limited thereto. For example, the fourth insulating layer 106 may be configured to be a single layer or multiple layers formed of at least one of silicon nitride (SiNx) and silicon oxide (SiOx). For example, the fourth insulating layer 106 may be formed by a single layer or multiple layers of inorganic films. For example, the single layer of inorganic film may be a silicon oxide (SiOx) film or a silicon nitride (SiNx) film, and the multiple layers of inorganic films may be formed by alternately laminating one or more layers of silicon oxide (SiOx) films, one or more layers of silicon nitride (SiNx) films, and one or more layers of amorphous silicon (a-Si), but the present disclosure is not limited thereto.

[0182] The second semiconductor layer 133 may be disposed on the fourth insulating layer 106. The second semiconductor layer 133 may include a source region, a drain region, and a channel region between the source region and the drain region.

[0183] The second semiconductor layer 133 may be formed of a semiconductor material, such as an oxide semiconductor, an amorphous semiconductor, or a polycrystalline semiconductor, but the exemplary embodiments of the present disclosure are not limited thereto.

[0184] Oxide semiconductor materials can have excellent effects in preventing leakage current and relatively low manufacturing costs. Oxide semiconductors can be formed from metal oxides such as zinc (Zn), indium (In), gallium (Ga), tin (Sn), and titanium (Ti), or combinations of metals such as zinc (Zn), indium (In), gallium (Ga), tin (Sn), or titanium (Ti) and their oxides. Specifically, oxide semiconductors can include zinc oxide (ZnO), zinc tin oxide (ZTO), zinc indium oxide (ZIO), indium oxide (InO), titanium oxide (TiO), indium gallium zinc oxide (IGZO), indium zinc tin oxide (IZTO), indium zinc oxide (IZO), indium gallium tin oxide (IGTO), and indium gallium oxide (IGO), but are not limited thereto.

[0185] Polycrystalline semiconductor materials have fast moving speeds of carriers such as electrons and holes, and thus have high mobilities, and have low energy consumption and excellent reliability. Polycrystalline semiconductors can be formed from polycrystalline silicon (poly-Si) or low-temperature polycrystalline silicon, but are not limited thereto.

[0186] Amorphous semiconductor materials can be formed from amorphous silicon (a-Si), but are not limited thereto.

[0187] The fifth insulating layer 108 can be disposed on the second semiconductor layer 133. The fifth insulating layer 108 can be formed of the same material as the first insulating layer 103, the second insulating layer 104, the third insulating layer 105, or the fourth insulating layer 106, but the exemplary embodiments of the present disclosure are not limited thereto. For example, the fifth insulating layer 108 can be configured to be a single layer or multiple layers formed of at least one of silicon nitride (SiNx) and silicon oxide (SiOx). For example, the fifth insulating layer 108 can be formed by a single layer or multiple layers of inorganic films. For example, the single-layer inorganic film can be a silicon oxide (SiOx) film or a silicon nitride (SiNx) film, and the multi-layer inorganic film can be formed by alternately laminating one or more layers of silicon oxide (SiOx) films, one or more layers of silicon nitride (SiNx) films, and one or more layers of amorphous silicon (a-Si), but the present disclosure is not limited thereto.

[0188] The second gate electrode 132 can be disposed on the fifth insulating layer 108.

[0189] The second gate electrode 132 can be formed of the same material as the first gate electrode 122. For example, the second gate electrode 132 can be formed of a single layer or multiple layers formed of molybdenum (Mo), copper (Cu), titanium (Ti), aluminum (Al), chromium (Cr), gold (Au), nickel (Ni), neodymium (Nd), or a compound thereof, but the exemplary embodiments of the present disclosure are not limited thereto.

[0190] The sixth insulating layer 109 may be disposed on the second gate electrode 132. The sixth insulating layer 109 may be formed of the same material as the first insulating layer 103, the second insulating layer 104, the third insulating layer 105, the fourth insulating layer 106, or the fifth insulating layer 108, but the exemplary embodiments of the present disclosure are not limited thereto. For example, the sixth insulating layer 109 may be configured to be a single layer or multiple layers formed of at least one of silicon nitride (SiNx) and silicon oxide (SiOx). For example, the sixth insulating layer 109 may be formed by a single layer or multiple layers of inorganic films. For example, the single layer of inorganic film may be a silicon oxide (SiOx) film or a silicon nitride (SiNx) film, and the multiple layers of inorganic films may be formed by alternately laminating one or more layers of silicon oxide (SiOx) films, one or more layers of silicon nitride (SiNx) films, and one or more layers of amorphous silicon (a-Si), but the present disclosure is not limited thereto.

[0191] The first source electrode 121, the first drain electrode 124, the third storage electrode 143, the second source electrode 131, and the second drain electrode 134 may be disposed on the sixth insulating layer 109.

[0192] The third storage electrode 143, the second source electrode 131, and the second drain electrode 134 may be formed of the same material as the first source electrode 121 and the first drain electrode 124 and be coplanarly disposed with the first source electrode 121 and the first drain electrode 124, but the exemplary embodiments of the present disclosure are not limited thereto. For example, the third storage electrode 143, the second source electrode 131, and the second drain electrode 134 may be formed of a single layer or multiple layers formed of any one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu) or an alloy thereof, but the exemplary embodiments of the present disclosure are not limited thereto. For example, at least one of the third storage electrode 143, the second source electrode 131, and the second drain electrode 134 may be formed of a material different from that of the first source electrode 121 and the first drain electrode 124.

[0193] The first thin film transistor 120 may be a driving transistor, and the second thin film transistor 130 may be a switching transistor, but the exemplary embodiments of the present disclosure are not limited thereto.

[0194] A first protective layer 111 may be disposed on the first source electrode 121 and the first drain electrode 124.

[0195] The first protective layer 111 may planarize the upper portion of the first thin film transistor 120 and protect the first thin film transistor 120. The first protective layer 111 may be formed of an organic material. For example, the first protective layer 111 may be formed of an organic material including an acrylic resin, an epoxy resin, a phenolic resin, a polyamide resin, or a polyimide resin, but the exemplary embodiments of the present disclosure are not limited thereto.

[0196] The second protective layer 112 may be disposed on the first protective layer 111. The second protective layer 112 may be formed of the same material as the first protective layer 111. For example, the second protective layer 112 may be formed of an organic material including an acrylic resin, an epoxy resin, a phenolic resin, a polyamide resin, or a polyimide resin, but the exemplary embodiments of the present disclosure are not limited thereto. For example, the second protective layer 112 may be formed of a material different from that of the first protective layer 111.

[0197] The connection electrode 145 may be disposed between the first protective layer 111 and the second protective layer 112.

[0198] The connection electrode 145 may electrically connect the first thin film transistor 120 to the light emitting unit 150. The connection electrode 145 may be formed of the same material as the first source electrode 121 and the first drain electrode 124, but the exemplary embodiments of the present disclosure are not limited thereto. For example, the connection electrode 145 may be formed of a material different from that of the first source electrode 121 and the first drain electrode 124.

[0199] The connection electrode 145 may be formed of a single layer or multiple layers formed of any one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu) or an alloy thereof, but the exemplary embodiments of the present disclosure are not limited thereto.

[0200] The light emitting unit 150 may be disposed on the second protective layer 112. The light emitting unit 150 may include an anode electrode 151, an organic layer 152, and a cathode electrode 153.

[0201] The anode electrode 151 may be disposed on the second protective layer 112. The anode electrode 151 may be electrically connected to the first thin film transistor 120 through a contact hole formed in the second protective layer 112. The anode electrode 151 may be a reflective electrode that reflects light, but the exemplary embodiments of the present disclosure are not limited thereto. The anode electrode 151 may include a stacked structure of metal materials having a high reflectivity, such as a stacked structure of titanium (Ti) / aluminum (Al) / titanium (Ti), a stacked structure of indium tin oxide (ITO) / aluminum (Al) / ITO, or an APC alloy, and may be formed of a single layer or multiple layers, but the exemplary embodiments of the present disclosure are not limited thereto.

[0202] The organic layer 152 may be disposed on the anode electrode 151. The organic layer 152 may include one or more light-emitting structures (or light-emitting elements or elements) stacked on the anode electrode 151 in the order of a hole transport layer and an electron transport layer or in the reverse order. For example, the hole transport layer may include a hole transfer layer, a hole injection layer, an electron blocking layer, a p-type charge generation layer, etc., but the exemplary embodiments of the present disclosure are not limited thereto. For example, the electron transport layer may include an electron transfer layer, an electron injection layer, a hole blocking layer, an n-type charge generation layer, etc., but the exemplary embodiments of the present disclosure are not limited thereto. The organic layer 152 may be an organic light-emitting layer. Alternatively, the organic light-emitting layer may be replaced with an inorganic light-emitting layer, a quantum dot light-emitting layer, a micro light-emitting diode, a mini light-emitting diode, etc., but the exemplary embodiments of the present disclosure are not limited thereto. For example, the organic layer 152 of the display panel DISP according to an exemplary embodiment of the present disclosure may include an organic light-emitting layer. The organic layer 152 may include a red light-emitting layer, a green light-emitting layer, and a blue light-emitting layer. The organic layer 152 may be a white light-emitting layer, but the exemplary embodiments of the present disclosure are not limited thereto.

[0203] The cathode electrode 153 may be disposed on the organic layer 152. The cathode electrode 153 may be a transparent electrode that reflects light, but the exemplary embodiments of the present disclosure are not limited thereto. For example, the cathode electrode 153 may include a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO), or a metal that transmits visible light.

[0204] The bank 154 may be disposed to expose the anode electrode 151. The bank 154 may define an opening (or a light-emitting region) of the pixel and may be disposed to cover an edge portion of the anode electrode 151.

[0205] Each sub-pixel may include a red light-emitting region, a green light-emitting region, and a blue light-emitting region. Again, for example, the pixel may further include a white light-emitting region, but is not limited thereto. The bank 154 may be formed of a material containing a black pigment or an organic material such as benzocyclobutene resin, polyimide resin, acrylic resin, or photosensitive polymer, and the exemplary embodiments of the present disclosure are not limited thereto. When the bank 154 is formed of a material containing a black pigment or a black dye, it may be a black bank. When the bank is formed of a material containing a black pigment or a black dye, it may block light from the outside or light reflected from the outside, thereby further increasing the brightness of the display device.

[0206] The encapsulation part 170 may be disposed on the bank part 154 or the light-emitting part 150. The encapsulation part 170 may include one or more insulating layers. For example, the encapsulation part 170 may include a first encapsulation layer 171, a second encapsulation layer 172 disposed on the first encapsulation layer 171, and a third encapsulation layer 173 disposed on the second encapsulation layer 172. The encapsulation part 170 may include one or more inorganic layers and one or more organic layers. Accordingly, damage to the light-emitting elements of the display device caused by moisture and impact from the outside can be further effectively suppressed. For example, the first encapsulation layer 171 and the third encapsulation layer 173 may include inorganic materials, and the second encapsulation layer 172 may include organic materials, but the exemplary embodiments of the present disclosure are not limited thereto.

[0207] For example, the first to third encapsulation layers may be sequentially stacked on the cathode electrode 153. The first encapsulation layer and the third encapsulation layer may be formed of an inorganic film layer including an inorganic material, and the second encapsulation layer may be formed of an organic film layer including an organic material.

[0208] The first encapsulation layer may be formed at the lowermost end of the encapsulation layer to contact the upper surface of the cathode electrode 153. The first encapsulation layer may be formed of a material such as silicon nitride (SiNx), silicon oxide (SiOx), silicon oxynitride (SiON), or aluminum oxide (Al2O3).

[0209] The second encapsulation layer may be formed on the first encapsulation layer. The second encapsulation layer may be formed of a material such as an acrylic resin, an epoxy resin, polyimide (PI), polyethylene (PE), or silicon oxycarbide (SiOC).

[0210] The third encapsulation layer may be formed on the second encapsulation layer. The third encapsulation layer may be formed of the same material as the first encapsulation layer, but the present disclosure is not limited thereto, and the third encapsulation layer may be formed of a material different from the first encapsulation layer.

[0211] In addition, the encapsulation layer is not limited to three layers. For example, it may include n layers (where n is an integer greater than 3) in which inorganic encapsulation layers and organic encapsulation layers are alternately stacked.

[0212] The touch buffer layer 181 may be disposed on the encapsulation part 170. For example, the touch buffer layer 181 may be disposed on the third encapsulation layer 173. The touch buffer layer 181 may be formed of the same material as the buffer layer 102, but the exemplary embodiments of the present disclosure are not limited thereto. The touch insulation layer 184 may be disposed on the touch buffer layer 181. The touch insulation layer 184 may prevent short circuits between the touch electrodes. The touch insulation layer 184 may be formed of silicon oxide (SiOx), silicon nitride (SiNx), or a multi-layer thereof, but the exemplary embodiments of the present disclosure are not limited thereto. For example, the touch buffer layer 181 may be configured to be a single layer or a multi-layer formed of at least one of silicon nitride (SiNx) and silicon oxide (SiOx). For example, the touch buffer layer 181 may be formed by a single layer or a multi-layer of an inorganic film. For example, the single layer of the inorganic film may be a silicon oxide (SiOx) film or a silicon nitride (SiNx) film, and the multi-layer of the inorganic film may be formed by alternately laminating one or more layers of silicon oxide (SiOx) film, one or more layers of silicon nitride (SiNx) film, and one or more layers of amorphous silicon (a-Si), but the present disclosure is not limited thereto. The first touch electrode 185 may be disposed on the touch insulation layer 184.

[0213] The second touch electrode 182 may be disposed between the touch buffer layer 181 and the touch insulation layer 184.

[0214] The second touch electrode 182 may be electrically connected to the 1a touch electrode 185a through a contact hole formed in the touch insulation layer 184.

[0215] The first touch electrode 185 and the second touch electrode 182 may include a metal material. For example, the first touch electrode 185 and the second touch electrode 182 may be formed of titanium (Ti), nickel (Ni), aluminum (Al), or an alloy thereof, and may be formed of three layers, such as titanium (Ti) / aluminum (Al) / titanium (Ti), but the exemplary embodiments of the present disclosure are not limited thereto.

[0216] Figure 7 is a rear view of a display device according to Figure 5 the display device. Figure 7 shows after being bent as shown in Figure 5 and is a rear view of the display device 10 viewed from the back of the display device 10. Figure 2 Referring to

[0217] Referring to Figure 7 Figures 1 to 5 Figures 1 to 5

[0218] The display device 10 may include a first region MR and a second region SR. The second region SR may overlap with the first region MR.

[0219] The second region SR may include a first pad region PA1 and a second pad region PA2. An integrated IC SRIC may be disposed in the first pad region PA1. A flexible printed circuit board FPCB may be disposed in the second pad region PA2.

[0220] A display controller DSIP and a touch controller TSIP may be disposed on the flexible printed circuit board FPCB. However, the exemplary embodiments of the present disclosure are not limited thereto, and only one controller may be disposed on the flexible printed circuit board FPCB. The flexible printed circuit board FPCB may further include a connector CN, and may be electrically connected to a main circuit board or the like through the connector CN, but the exemplary embodiments of the present disclosure are not limited thereto.

[0221] The flexible printed circuit board FPCB may include a first hole SH1. The first hole SH1 may be formed between the display controller DSIP and the second pad region PA2. For example, the flexible printed circuit board FPCB may include the display controller DSIP, the touch controller TSIP, and the first hole SH1.

[0222] Figure 8 , Figure 9 , Figure 10 , Figure 11 , Figure 12 , Figure 13 , Figure 14 and Figure 15 are views showing a method of manufacturing a display device according to an exemplary embodiment. Figures 8 to 15 Show a bending operation of using a film, a first pushing operation, a peeling operation of the film, a second pushing operation, and a suction operation of a display panel DISP, respectively. In the description of the method of manufacturing a display device according to an exemplary embodiment of the present disclosure with reference to Figures 8 to 15 , reference may be made to Figures 1 to 7 together.

[0223] Reference will be made to Figure 8 and Figure 9 to describe an attachment operation of a film LF. Figure 9 is a cross-sectional view taken along line A-A' in Figure 8 .

[0224] As Figure 2 , Figure 5 , Figure 8 and Figure 9As shown, the film LF is attached to the flexible printed circuit board FPCB. The film LF may be a liner film / film LF, but is not limited thereto. The film LF may include polyethylene terephthalate (PET), polyimide (PI), or polycarbonate (PC), but the exemplary embodiments of the present disclosure are not limited thereto. The film LF may include a joint portion HP that protrudes to one side in the first direction DR1. For example, the film LF is a rectangular film having a length in the first direction DR1 and a width in the second direction DR2, and the joint portion HP extends along the first direction DR1 from the side where the width of the film LF is located. However, the present disclosure is not limited thereto. The joint portion HP may be formed of the same material as the film LF, but the exemplary embodiments of the present disclosure are not limited thereto.

[0225] Liner holes may be formed in the film LF. The liner holes may overlap with the controller on the flexible printed circuit board FPCB. For example, a plurality of liner holes may be provided, but the exemplary embodiments of the present disclosure are not limited thereto. The liner holes may include a first hole LH1 and a second hole LH2, but are not limited thereto. The first hole LH1 may overlap with the display controller DSIP. The second hole LH2 may overlap with the touch controller TSIP. The first hole LH1 and the second hole LH2 may be respectively larger than the widths of the overlapping display controller DSIP and touch controller TSIP, but are not limited thereto. The display controller DSIP and the touch controller TSIP may be exposed to the outside in each of the liner holes LH1 and LH2. Each of the liner holes LH1 and LH2 may be a first hole or a second hole, but is not limited thereto.

[0226] A first hole SH1 may be formed in the flexible printed circuit board FPCB, and a second hole SH2 may be formed in the first bonding layer PSA1.

[0227] The third connection layer LBP can be disposed between the film LF and the printed circuit board FPCB. The film LF can be disposed or attached to one surface of the printed circuit board FPCB through the third connection layer LBP. The film LF can also be disposed on the first hole SH1 and the second hole SH2. For example, the film LF can overlap with the first hole SH1 and the second hole SH2. For example, the film LF and the third connection layer LBP can be disposed on the printed circuit board FPCB, and the film LF and the third connection layer LBP can be disposed on the printed circuit board FPCB in the second region SR. For example, the film LF and the third connection layer LBP can be disposed on the printed circuit board FPCB, and the film LF and the third connection layer LBP can be disposed on the printed circuit board FPCB in the second pad region PA2. The printed circuit board FPCB can be thin and formed of a material having a low storage modulus. When the display panel DISP is bent (marked by an arrow) around the third region BR of the display panel DISP, the thin printed circuit board FPCB may be damaged when the printed circuit board FPCB is held. Therefore, in order to prevent damage to the printed circuit board FPCB, the display panel DISP can be bent by holding the film LF when the display panel DISP is bent.

[0228] Figure 10 A rear view of the display device 10 after the display panel DISP is bent according to Figure 9 is shown. Figure 11 is a cross-sectional view taken along line B - B' in Figure 10 .

[0229] As shown in Figure 10 and Figure 11 , the film LF can be located in the rearmost direction of the display device 10, and the display controller DSIP and the touch controller TSIP can be exposed toward the rear surface of the display device 10 through the first hole LH1 and the second hole LH2 of the film LF.

[0230] The printed circuit board FPCB can be disposed or attached to the board layer MP on the first region MR through the first connection layer PSA1.

[0231] The film LF on the first region MR can be disposed or attached to one surface of the printed circuit board FPCB through the third connection layer LBP. The film LF and the third connection layer LBP can be disposed on the printed circuit board FPCB, and the film LF and the third connection layer LBP can be disposed on the printed circuit board FPCB in the second region SR. For example, the film LF and the third connection layer LBP can be disposed on the printed circuit board FPCB, and the film LF and the third connection layer LBP can be disposed on the printed circuit board FPCB in the second pad region PA2.

[0232] Figure 12 and Figure 13Shows the first pushing operation FIRSTPUSHING between the flexible printed circuit board FPCB and the board layer MP.

[0233] As Figure 12 and Figure 13 shown, the first pushing operation can be performed after the film LF is disposed on top. In the first pushing operation, a predetermined pressure can be applied to one surface of the film LF. In the first pushing operation, the adhesion (attachment force) between the board layer MP and the flexible printed circuit board FPCB in the first region MR can be increased. The first coupling layer PSA1 can be a pressure-sensitive adhesive (PSA). For example, in the first pushing operation, the pressure applied to the film LF can be transmitted to the first coupling layer PSA1 to increase the adhesion (attachment force) between the board layer MP and the flexible printed circuit board FPCB in the first region MR. For example, the adhesion (attachment force) can be the adhesion strength or the like, but is not limited thereto.

[0234] In the first pushing operation, a predetermined pressure can not be applied to the first hole LH1 and the second hole LH2 of the film LF.

[0235] According to the present disclosure, in the pushing operation before the suction operation, the adhesion (attachment force) between the flexible printed circuit board FPCB and the board layer MP can be increased by applying a predetermined pressure to the upper part of the flexible printed circuit board FPCB.

[0236] Figure 14 Shows the peeling operation of the film LF and the second pushing operation SECOND PUSHING.

[0237] As Figure 14 shown, the film LF (see Figure 13 ) and the third coupling layer LBP (see Figure 13 ) can be peeled from the flexible printed circuit board FPCB. In order to peel the film LF and the third coupling layer LBP from the flexible printed circuit board FPCB, the adhesion (attachment force) between the third coupling layer LBP and the flexible printed circuit board FPCB should be reduced. For example, after reducing the adhesion (attachment force) between the third coupling layer LBP and the flexible printed circuit board FPCB by ultraviolet (UV) radiation, heat radiation, etc., the liner film / film LF and the third coupling layer LBP can be peeled from the flexible printed circuit board FPCB, but the exemplary embodiments of the present disclosure are not limited thereto.

[0238] A predetermined pressure can be applied to one surface of the flexible printed circuit board FPCB from which the film LF and the third coupling layer LBP have been removed. In the second pushing operation, the attachment strength between the board layer MP and the flexible printed circuit board FPCB in the first region MR can be increased. After the second pushing operation, the adhesion (attachment force) between the flexible printed circuit board FPCB and the board layer MP can be higher than the adhesion (attachment force) during the first pushing operation.

[0239] Even in the second pushing operation, the predetermined pressure may not be applied to the portion of the printed circuit board FPCB on which the display controller DSIP and the touch controller TSIP are provided (see FIG. Figure 12 ) area.

[0240] Therefore, bubbles may remain inside the first coupling layer PSA1, at the interface between the first coupling layer PSA1 and the printed circuit board FPCB, and at the interface between the first coupling layer PSA1 and the board layer MP. Figure 12 The adhesive force (attachment force) between the board layer MP and the printed circuit board FPCB in the area of ) may be insufficient. For example, in a pushing operation, due to the height of the controller TSIP and DSIP (see Figure 12 ), pressure may be applied only to the remaining area of the printed circuit board FPCB except for the area where the controller is provided. In this case, the adhesive force (attachment force) between the area where the controller of the printed circuit board FPCB is provided and the board layer MP may be reduced.

[0241] Figure 15 The operation of sucking bubbles inside the first coupling layer PSA1 , at the interface between the first coupling layer PSA1 and the printed circuit board FPCB, and at the interface between the first coupling layer PSA1 and the board layer MP by the suction device SP is shown.

[0242] like Figure 15 As shown, bubbles remaining in the first coupling layer PSA1, at the interface between the first coupling layer PSA1 and the printed circuit board FPCB, and at the interface between the first coupling layer PSA1 and the board layer MP can be sucked by the suction device SP through the second hole SH2 and the first hole SH1.

[0243] pass Figure 15 The suction operation can be increased by setting the controller TSIP and DSIP (see Figure 12 ) in the region of the printed circuit board FPCB and the board layer MP. Thus, lifting of the printed circuit board FPCB from the board layer MP can be minimized.

[0244] Furthermore, since bubbles remaining inside the first coupling layer PSA1, at the interface between the first coupling layer PSA1 and the printed circuit board FPCB, and at the interface between the first coupling layer PSA1 and the board layer MP are removed by the suction operation, it is possible to remove the bubbles remaining inside the first coupling layer PSA1, at the interface between the first coupling layer PSA1 and the printed circuit board FPCB, and at the interface between the first coupling layer PSA1 and the board layer MP. Figure 14 The uneven shapes formed on the surfaces of the printed circuit board FPCB and the first coupling layer PSA1 facing the board layer MP can be reduced. Therefore, the external visibility of the display device 10 can be improved.

[0245] According to an exemplary embodiment of the present disclosure, by adding a suction operation through the first hole SH1 of the printed circuit board FPCB after the pushing operation, adhesion (attachment force) between the area where the controller of the printed circuit board FPCB is provided and the board layer MP may be increased.

[0246] According to the present specification, since the printed circuit board FPCB includes the first hole SH1, bubbles remaining inside the first coupling layer PSA1, at the interface between the first coupling layer PSA1 and the printed circuit board FPCB, and at the interface between the first coupling layer PSA1 and the board layer MP can be removed during the suction operation. Therefore, lifting of the printed circuit board FPCB can be minimized. Hereinafter, display devices according to other exemplary embodiments will be described. In the following description of the exemplary embodiments, the following description of the exemplary embodiments will be omitted. Figures 1 to 15 Detailed description of components that are the same as or similar to those described in the accompanying drawings will be omitted.

[0247] Figure 16 is a rear view of a display device according to another exemplary embodiment of the present disclosure. Figure 17 It is along Figure 16 Cross-sectional view along line CC'. Figure 18 It is along Figure 16 Cross-sectional view along line D-D'. Figure 19 is a cross-sectional view illustrating a suction process of a display device according to another exemplary embodiment of the present disclosure.

[0248] Reference Figures 16 to 19 According to another exemplary embodiment of the present disclosure, a display device 11 may include a display panel DISP and a printed circuit board FPCB. The display device 11 may include a first region MR, a second region SR, and a third region BR. The second region SR may include a first pad region PA1 and a second pad region PA2. An integrated circuit SRIC may be provided in the first pad region PA1. The printed circuit board FPCB may include a first controller DSIP and a second controller TSIP. Due to the description and reference to the display panel DISP, the printed circuit board FPCB, the integrated IC SRIC, the first controller DSIP, and the second controller TSIP, Figures 1 to 15 The descriptions are basically the same, so their repeated descriptions can be omitted or simplified.

[0249] In the display device 11 according to another exemplary embodiment of the present disclosure, the first coupling layer PSA1_1 may include a second hole SH2_1 .

[0250] The second hole SH2_1 of the first connection layer PSA1_1 can overlap with the first hole SH1. The size of the second hole SH2_1 can be larger than the size of the first hole SH1. The second hole SH2_1 can cover the first hole SH1. For example, the second hole SH2_1 can completely cover the first hole SH1. As Figure 16 shown, the second hole SH2_1 can overlap with the first hole SH1 and further extend to one side in the second direction DR2 to overlap with the display controller DSIP. The second hole SH2_1 can overlap with the first hole SH1 and further extend to the other side in the first direction DR1 to overlap with the touch controller TSIP.

[0251] As Figure 18 shown, the first hole SH1 can have a first width W1, and the second hole SH2_1 can have a second width W2. The second width W2 can be larger than the first width W1. Since the second width W2 of the second hole SH2_1 is larger than the first width W1 of the first hole SH1 and the second hole SH2_1 covers the first hole SH1, the inner surface of the printed circuit board FPCB can protrude more inward (or in the direction toward the first hole SH1) than the inner surface of the first connection layer PSA1_1. The second hole SH2_1 can completely cover the first hole SH1. For example, the printed circuit board FPCB and the first connection layer PSA1_1 can have a step in the direction from the first connection layer PSA_1 to the printed circuit board FPCB near the first hole SH1 and the second hole SH2_1. For example, the step can be in the shape of an inverted step. In addition, the first hole SH1 and the second hole SH2_1 can have a step in the direction in which the second hole SH2_1 faces the first hole SH1. For example, the first hole SH1 and the second hole SH2_1 can have a stepped step in the direction in which the second hole SH2_1 faces the first hole SH1. For example, the step between the printed circuit board FPCB and the first connection layer PSA1_1 can have a different shape from the step between the first hole SH1 and the second hole SH2_1.

[0252] As Figure 19 shown, since the first hole SH1 and the second hole SH2_1 have a stepped step, in the suction operation using the suction device SP, the bubbles sucked by the suction device SP can generate a vortex (marked by the arrow) due to the stepped step, thereby increasing the suction force of the suction device SP.

[0253] In addition, since the second hole SH2_1 overlaps with the display controller DSIP and the touch controller TSIP, air bubbles remaining in the first bonding layer PSA1_1 that overlaps with the display controller DSIP and the touch controller TSIP and / or at the interface between the first bonding layer PSA1_1 and the member MP and the FPCB can be sucked by the suction device SP through the second hole SH2_1. Accordingly, the adhesion (attachment force) to the layer MP in the area of the controllers DSIP and TSIP provided with the printed circuit board FPCB can be further increased during the suction operation.

[0254] According to an exemplary embodiment of the present disclosure, the printed circuit board FPCB includes a first hole SH1 and a second hole SH2, and the second hole SH2 overlaps with the controllers DSIP and TSIP, so that the adhesion (attachment force) to the layer MP in the area of the controllers DSIP and TSIP provided with the printed circuit board FPCB can be increased.

[0255] Figure 20 is a rear view of a display device according to another exemplary embodiment of the present disclosure. Figure 21 is along according to another exemplary embodiment of the present disclosure Figure 20 a cross-sectional view taken along line E-E' in. Figure 22 is along according to another exemplary embodiment of the present disclosure Figure 20 a cross-sectional view taken along line F-F' in. Figure 23 is a cross-sectional view showing a suction process of a display device according to another exemplary embodiment.

[0256] Refer to Figures 20 to 23 , a display device 12 according to another exemplary embodiment of the present disclosure may include a display panel DISP and a printed circuit board FPCB. The display device 11 may include a first region MR, a second region SR, and a third region BR. The second region SR may include a first pad region PA1 and a second pad region PA2. The integrated IC SRIC may be disposed in the first pad region PA1. The printed circuit board FPCB may include a first controller DSIP and a second controller TSIP. Since the descriptions of the display panel DISP, the printed circuit board FPCB, the integrated IC SRIC, the first controller DSIP, and the second controller TSIP are substantially the same as those in the reference to Figures 1 to 19 , their repeated descriptions may be omitted or simplified.

[0257] A display device 12 according to another exemplary embodiment of the present disclosure may further include a second bonding layer PSA2.

[0258] The second bonding layer PSA2 may be disposed between the first bonding layer PSA1_1 and the layer MP. The second bonding layer PSA2 may include a third hole SH3.

[0259] The third hole SH3 can overlap with the second hole SH2_1. The third hole SH3 can be larger than the second hole SH2_1. The third hole SH3 can cover the second hole SH2_1. For example, the third hole SH3 can completely cover the second hole SH2_1.

[0260] As Figure 20 shown, the third hole SH3 can overlap with the first hole SH1 and the second hole SH2_1. The third hole SH3 can further extend to one side (or part) in the second direction DR2 and overlap with the display controller DSIP. The third hole SH3 can further extend to the other side (or another part) in the first direction DR1 and overlap with the touch controller TSIP.

[0261] As Figure 22 shown, the first hole SH1 can have a first width W1, the second hole SH2 can have a second width W2, and the third hole SH3 can have a third width W3. The third width W3 can be greater than the second width W2 and the first width W1. Since the third width W3 of the third hole SH3 is greater than the second width W2 of the second hole SH2_1 and the third hole SH3 covers the second hole SH2_1, the inner surface (inner side) of the first coupling layer PSA1_1 can protrude more inward (or in the direction toward the second hole SH2_1) than the inner surface of the second coupling layer PSA2. The third hole SH3 can completely cover the second hole SH2_1. For example, the printed circuit board FPCB, the first coupling layer PSA1_1, and the second coupling layer PSA2 can have a step in the direction from the second coupling layer PSA2 to the printed circuit board FPCB near the first hole SH1, the second hole SH2_1, and the third hole SH3. The step can be an inverted step shape. Additionally, the first hole SH1, the second hole SH2, and the third hole SH3 can have a step in the direction in which the third hole SH3 faces the first hole SH1. The step can be a step shape. For example, the steps of the printed circuit board FPCB, the first coupling layer PSA1_1, and the second coupling layer PSA2 can have a different shape from the steps of the first hole SH1, the second hole SH2_1, and the third hole SH3.

[0262] As Figure 23 shown, since the first hole SH1, the second hole SH2_1, and the third hole SH3 have stepped steps, during the suction operation using the suction device SP, the bubbles sucked by the suction device SP can generate a vortex (marked by arrows) due to the stepped steps, thereby increasing the suction force of the suction device SP.

[0263] In addition, since the second hole SH2_1 and the third hole SH3 overlap with the display controller DSIP and the touch controller TSIP, respectively, bubbles remaining in the first coupling layer PSA1_1 overlapping with the display controller DSIP and the touch controller TSIP and / or at the interface between the first coupling layer PSA1_1 and the components FPCB and PSA2, and bubbles remaining in the second coupling layer PSA2 overlapping with the display controller DSIP and the touch controller TSIP and / or at the interface between the second coupling layer PSA2 and the components PSA1 and MP can be sucked out by the suction device SP through the second hole SH2 and the third hole SH3, respectively. Therefore, the adhesion (attachment force) with the board layer MP in the area where the controller DSIP and TSIP of the printed circuit board FPCB are provided during the suction operation can be further increased.

[0264] According to an exemplary embodiment of the present disclosure, the second coupling layer PSA2 may include a third hole SH3, and the first hole SH1, the second hole SH2_1, and the third hole SH3 may have a step. During the suction operation, bubbles drawn by the suction device can generate eddy currents due to the step, thereby increasing the suction force of the suction device. As a result, the adhesion (attachment) to the board layer MP in the area where the controller DSIP and TSIP of the printed circuit board FPCB are located can be increased. Figure 24 is a rear view of a display device according to another exemplary embodiment.

[0265] Reference Figure 24 According to another exemplary embodiment, a display device 13 may include a display panel DISP and a printed circuit board FPCB. The display device 13 may include a first region MR, a second region SR, and a third region BR. The second region SR may include a first pad region PA1 and a second pad region PA2. An integrated circuit SRIC may be provided in the first pad region PA1. The printed circuit board FPCB may include a first controller DSIP and a second controller TSIP. Due to the description and reference to the display panel DISP, the printed circuit board FPCB, the integrated IC SRIC, the first controller DSIP, and the second controller TSIP, Figures 1 to 23 The descriptions are basically the same, so their repeated descriptions can be omitted or simplified.

[0266] In a display device 13 according to another exemplary embodiment, a first hole SH1 may be located between a display controller DSIP and a touch controller TSIP. A second hole SH2_2 is larger than the first hole SH1 and may cover the first hole SH1 or overlap with the first hole SH1. For example, the second hole SH2_2 may completely cover the first hole SH1. A third hole SH3_1 may be larger than the second hole SH2_2 and may cover the second hole SH2_2. For example, the third hole SH3_1 may completely cover the second hole SH2_2. The second hole SH2_2 and the third hole SH3_1 may each extend from a region where the first hole SH1 is provided to one side (or a part) in a second direction DR2. The second hole SH2_2 and the third hole SH3_1 extending to one side (or a part) in the second direction DR2 may extend to the other side (or another part) in a first direction DR1 and one side (or a part) in the first direction DR1, respectively, and overlap with the touch controller TSIP and the display controller DSIP.

[0267] In the display device 13 according to another exemplary embodiment of the present disclosure, since the first hole SH1, the second hole SH2_2, and the third hole SH3_1 are each provided between the touch controller TSIP and the display controller DSIP, the adhesion force (attachment force) between the region between the touch controller TSIP and the display controller DSIP on the printed circuit board FPCB and the layer MP can be further increased.

[0268] The display devices according to various exemplary embodiments of the present disclosure can be applied to mobile devices, video phones, smart watches, watch phones, wearable devices, foldable devices, rollable devices, bendable devices, flexible devices, curved devices, sliding devices, variable devices, electronic notebooks, e-books, portable multimedia players (PMPs), personal digital assistants (PDAs), MP3 players, mobile medical devices, desktop PCs, laptop PCs, netbook computers, workstations, navigation systems, in-vehicle display devices, theater display devices, televisions, wallpaper devices, sign devices, game devices, laptop computers, monitors, cameras, camcorders, household appliances, etc.

[0269] The display devices according to various exemplary embodiments of the present disclosure can be described as follows.

[0270] The display devices according to various exemplary embodiments of the present disclosure may include: a display panel including a first region, a second region overlapping with the first region, and a third region between the first region and the second region; a printed circuit board provided at the first region and the second region; and a controller provided on the printed circuit board. The display panel may be bent in the third region. The printed circuit board may include a first hole.

[0271] The display device according to various exemplary embodiments of the present disclosure may further include a first coupling layer disposed in a portion of the first region that does not overlap with the second region on the printed circuit board.

[0272] According to various exemplary embodiments of the present disclosure, the first coupling layer may include a second hole.

[0273] According to various exemplary embodiments of the present disclosure, the second hole may overlap with the first hole.

[0274] According to various exemplary embodiments of the present disclosure, the second hole may have the same size as the first hole.

[0275] According to various exemplary embodiments of the present disclosure, the second hole may be larger than the first hole.

[0276] According to various exemplary embodiments of the present disclosure, the second hole may cover the first hole.

[0277] The display device according to various exemplary embodiments of the present disclosure may further include a second coupling layer disposed below the first coupling layer in a portion of the first region that does not overlap with the second region, and the second coupling layer includes a third hole.

[0278] According to various exemplary embodiments of the present disclosure, the third hole may be larger than the second hole and may cover the second hole.

[0279] According to various exemplary embodiments of the present disclosure, the second hole may overlap with the controller.

[0280] According to various exemplary embodiments of the present disclosure, the controller may include a first controller and a second controller spaced apart from the first controller.

[0281] According to various exemplary embodiments of the present disclosure, the first hole is disposed between the first controller and the second controller.

[0282] According to various exemplary embodiments of the present disclosure, the first coupling layer may include a pressure-sensitive adhesive.

[0283] The display device according to various exemplary embodiments of the present disclosure may further include a board layer disposed below the first coupling layer in the first region.

[0284] A display device according to various exemplary embodiments of the present disclosure may include: a display panel including a first region, a second region overlapping the first region, and a third region between the first region and the second region; a printed circuit board disposed at the first region and the second region and including a first hole; and a first coupling layer disposed in a portion of the first region that does not overlap with the second region and below the printed circuit board. The printed circuit board may include the first hole. The first coupling layer may include a second hole. The first hole and the second hole may overlap each other. The first hole and the second hole may have a step.

[0285] According to various exemplary embodiments of the present disclosure, the width of the second hole may be greater than the width of the first hole.

[0286] A display device according to various exemplary embodiments of the present disclosure may further include a second coupling layer disposed below the first coupling layer in a portion of the first region that does not overlap with the second region. The second coupling layer may include a third hole overlapping the first hole and the second hole.

[0287] According to various exemplary embodiments of the present disclosure, a step may be formed between any two of the first hole, the second hole, and the third hole.

[0288] According to various exemplary embodiments of the present disclosure, the width of the third hole may be greater than the width of the second hole.

[0289] A display device according to various exemplary embodiments of the present disclosure may further include a controller disposed on the printed circuit board. The second hole and the third hole may overlap the controller.

[0290] According to various exemplary embodiments of the present disclosure, the controller may include a first controller and a second controller spaced apart from the first controller. The first hole may be disposed between the first controller and the second controller.

[0291] According to various exemplary embodiments of the present disclosure, the first coupling layer may include a pressure-sensitive adhesive.

[0292] According to various exemplary embodiments of the present disclosure, a board layer may be disposed below the first coupling layer in the first region.

[0293] A display device according to various exemplary embodiments of the present disclosure may include: a display panel; a printed circuit board disposed above the display panel; and a controller disposed on the printed circuit board. The printed circuit board may include a first hole. The first hole may overlap the controller.

[0294] According to various exemplary embodiments of the present disclosure, the first coupling layer may be disposed on the printed circuit board.

[0295] According to various exemplary embodiments of the present disclosure, the first coupling layer may include a second hole.

[0296] According to various exemplary embodiments of the present disclosure, the second hole may overlap with the first hole.

[0297] According to various exemplary embodiments of the present disclosure, the first hole and the second hole may have steps.

[0298] Those skilled in the art will appreciate that various modifications and variations can be made to the present disclosure without departing from the scope of the present disclosure. Accordingly, the present disclosure is intended to cover modifications and variations of the present disclosure within the scope of the appended claims and their equivalents.

[0299] Cross - reference to related applications

[0300] This application claims the priority of Korean Patent Application No. 10 - 2024 - 0012220, filed on January 26, 2024, the entire contents of which are hereby incorporated by reference herein for all purposes.

Claims

1. A display device, the display device comprising: A display panel, the display panel comprising a first region, a second region overlapping with the first region, and a third region located between the first region and the second region; A printed circuit board, the printed circuit board being disposed at the first region and the second region; And A controller, the controller being disposed on the printed circuit board, Wherein, the display panel is bent in the third region, and Wherein, the printed circuit board includes a first hole.

2. The display device according to claim 1, the display device further comprising: A first coupling layer, the first coupling layer being disposed on the printed circuit board in a portion of the first region that does not overlap with the second region.

3. The display device according to claim 2, wherein The first coupling layer includes a second hole.

4. The display device according to claim 3, wherein, The second hole overlaps with the first hole.

5. The display device according to claim 4, wherein, The first hole has a first size, and the second hole has a second size equal to the first size.

6. The display device according to claim 4, wherein, The second hole is larger than the first hole.

7. The display device according to claim 6, wherein, The second hole covers the first hole.

8. A display device, the display device comprising: A display panel, the display panel comprising a first region, a second region overlapping with the first region, and a third region located between the first region and the second region; A printed circuit board, the printed circuit board being disposed in the first region and the second region; And A controller, the controller being disposed on the printed circuit board, Wherein, the display panel is bent in the third region, Wherein, the printed circuit board includes a first hole, and Wherein, the controller includes a first controller and a second controller spaced apart from the first controller.

9. A display device, the display device comprising: A display panel, the display panel comprising a first region, a second region overlapping with the first region, and a third region located between the first region and the second region; A printed circuit board, the printed circuit board being disposed at the first region and the second region; And A first coupling layer, the first coupling layer being disposed in a portion of the first region that does not overlap with the second region and below the printed circuit board, Wherein, the printed circuit board includes a first hole, Wherein, the first coupling layer includes a second hole, Wherein, the first hole and the second hole overlap with each other, and Wherein, the first hole and the second hole have different sizes to define a step.

10. A display device, the display device comprising: A display panel; A printed circuit board, the printed circuit board being disposed above the display panel; And A controller, the controller being disposed on the printed circuit board, Wherein, the printed circuit board includes a first hole, and Wherein, the first hole overlaps with the controller.

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