Display device

Abstract

A display device is provided. The display device includes: a substrate including a first light emitting region and a second light emitting region spaced apart from each other; the pixel defining layer comprises side surfaces for defining a first light-emitting area and a second light-emitting area; a first light emitting element disposed on the substrate in the first light emitting region and including a first pixel electrode, a first light emitting layer, and a first common electrode; a second light emitting element disposed on the substrate in the second light emitting region and including a second pixel electrode, a second light emitting layer, and a second common electrode; the first dam is configured on the pixel defining layer; and a second bank disposed on the first bank and including a side surface protruding from a side surface of the first bank and recessed from a side surface of the pixel defining layer, the distance between the side face of the pixel defining layer adjacent to the first light-emitting area and the side face of the second dam is larger than the distance between the side face of the pixel defining layer adjacent to the second light-emitting area and the side face of the second dam.

Description

Technical Field

[0001] The present invention relates to a display device. Background Art

[0002] With the development of the information society, the demand for display devices for displaying images has increased in various forms. For example, display devices are applicable to various electronic devices such as smart phones, digital cameras, notebook computers, navigators, and smart TVs. The display device may be a flat panel display device such as a liquid crystal display device, a field emission display device, or an organic light emitting display device. In such a flat panel display device, a self-luminous display device can display an image even without a backlight unit that supplies light to the display panel through a light emitting element capable of self-luminating in each pixel including the display panel.

[0003] Recently, display devices are applicable to glasses-type devices for providing virtual reality and augmented reality. To be applicable to glasses-type devices, the display device is implemented in a very small size of 2 inches or less, but to achieve a high resolution, a high pixel integration degree is required. For example, the display device may have a high pixel integration degree of 400 PPI (Pixels Per Inch) or more.

[0004] As described above, the display device is implemented in a very small size, but when having a high pixel integration degree, since the area of the light emitting region configuring the light emitting element is reduced, it is difficult to implement a light emitting element separated for each light emitting region through a mask process. Summary of the Invention

[0005] The problem to be solved by the present invention is to provide a display device capable of forming a light emitting layer or a common electrode separated for each light emitting region without a mask process.

[0006] The problem to be solved by the present invention is to provide a high-resolution display device having a wide uniform light emitting region.

[0007] The problems of the present invention are not limited to the problems mentioned above, and those skilled in the art can clearly understand other technical problems not mentioned from the following description.

[0008] A display device according to an embodiment for solving the above problem includes: a substrate including a first light-emitting region and a second light-emitting region spaced apart from each other; a pixel defining layer including sides defining the first light-emitting region and the second light-emitting region; a first light-emitting element disposed on the substrate in the first light-emitting region and including a first pixel electrode, a first light-emitting layer, and a first common electrode; a second light-emitting element disposed on the substrate in the second light-emitting region and including a second pixel electrode, a second light-emitting layer, and a second common electrode; a first dam disposed on the pixel defining layer; and a second dam disposed on the first dam and including sides protruding more than the sides of the first dam and recessed more than the sides of the pixel defining layer, wherein a distance between the side of the pixel defining layer adjacent to the first light-emitting region and the side of the second dam is greater than a distance between the side of the pixel defining layer adjacent to the second light-emitting region and the side of the second dam.

[0009] It may be that the area of the second light-emitting region is greater than the area of the first light-emitting region.

[0010] It may be that a distance between the side of the second dam adjacent to the first light-emitting region and the side of the first dam is the same as a distance between the side of the second dam adjacent to the second light-emitting region and the side of the first dam.

[0011] It may be that in a plan view, the pixel defining layer includes an exposed region not covered by the second dam, and a width of the exposed region of the pixel defining layer surrounding the first light-emitting region is greater than a width of the exposed region of the pixel defining layer surrounding the second light-emitting region.

[0012] It may be that the substrate further includes a third light-emitting region, and an area of the third light-emitting region is greater than the areas of the first light-emitting region and the second light-emitting region.

[0013] It may be that a distance between the side of the pixel defining layer adjacent to the third light-emitting region and the side of the second dam is less than a distance between the side of the pixel defining layer adjacent to the first light-emitting region and the side of the second dam.

[0014] It may be that a distance between the side of the pixel defining layer adjacent to the third light-emitting region and the side of the second dam is less than a distance between the side of the pixel defining layer adjacent to the second light-emitting region and the side of the second dam.

[0015] It may be that the distance between the side surface of the pixel defining layer adjacent to the third light-emitting region and the side surface of the second dam is the same as the distance between the side surface of the pixel defining layer adjacent to the second light-emitting region and the side surface of the second dam.

[0016] It may be that the first light-emitting layer includes a first region having a thickness of 95% or more with respect to the thickness at the thickest point, and the area of the first region of the first light-emitting layer is 70% or more with respect to the area of the first light-emitting region.

[0017] It may be that the resolution of the display device is 1500 ppi (pixels per inch) or more.

[0018] It may be that the first common electrode and the second common electrode are separated from each other.

[0019] It may be that the pixel defining layer is separated from above the first pixel electrode and above the second pixel electrode.

[0020] It may be that the display device further includes: a residual pattern disposed between the first pixel electrode and the pixel defining layer and between the second pixel electrode and the pixel defining layer.

[0021] It may be that the display device further includes: a first inorganic layer disposed on the first common electrode and the second dam; and a second inorganic layer disposed on the second common electrode and the second dam and separated from the first inorganic layer.

[0022] It may be that the first inorganic layer is separated from the upper surface of the second dam, and the second inorganic layer is separated from the upper surface of the second dam.

[0023] It may be that the display device further includes: an organic encapsulation layer disposed in the separation space between the first inorganic layer and the second dam and in the separation space between the second inorganic layer and the second dam.

[0024] It may be that a display device according to an embodiment for solving the above problem includes: a substrate including a first light-emitting region and a second light-emitting region spaced apart from the first light-emitting region and having an area larger than that of the first light-emitting region; a pixel defining layer including sides defining the first light-emitting region and the second light-emitting region; a first light-emitting element disposed on the substrate in the first light-emitting region and including a first pixel electrode, a first light-emitting layer, and a first common electrode; a second light-emitting element disposed on the substrate in the second light-emitting region and including a second pixel electrode, a second light-emitting layer, and a second common electrode; a first dam disposed on the pixel defining layer; and a second dam disposed on the first dam and including a side surface protruding more than the side surface of the first dam and recessed more than the side surface of the pixel defining layer, wherein the width of the region where the pixel defining layer and the first light-emitting layer overlap in the thickness direction of the substrate is larger than the width of the region where the pixel defining layer and the second light-emitting layer overlap.

[0025] It may be that the first light-emitting layer includes a first region having a thickness of 95% or more with respect to the thickness at the thickest point, and the area of the first region of the first light-emitting layer is 70% or more with respect to the area of the first light-emitting region.

[0026] A display device according to an embodiment for solving the above problem includes: a substrate including a first light-emitting region, a second light-emitting region, and a third light-emitting region spaced apart from each other; a pixel defining layer including sides defining the first light-emitting region and the second light-emitting region; a first light-emitting element disposed on the substrate in the first light-emitting region and including a first pixel electrode, a first light-emitting layer, and a first common electrode; a second light-emitting element disposed on the substrate in the second light-emitting region and including a second pixel electrode, a second light-emitting layer, and a second common electrode; a first dam disposed on the pixel defining layer; and a second dam disposed on the first dam and including a side surface protruding more than the side surface of the first dam and recessed more than the side surface of the pixel defining layer, wherein the first light-emitting region, the second light-emitting region, and the third light-emitting region have different areas from each other, and the distances between the side surface of the pixel defining layer adjacent to the first light-emitting region and the side surface of the second dam, between the side surface of the pixel defining layer adjacent to the second light-emitting region and the side surface of the second dam, and between the side surface of the pixel defining layer adjacent to the third light-emitting region and the side surface of the second dam are all different.

[0027] It may be that the distances between the side surface of the second dam adjacent to the first light-emitting region and the side surface of the first dam, between the side surface of the second dam adjacent to the second light-emitting region and the side surface of the first dam, and between the side surface of the second dam adjacent to the third light-emitting region and the side surface of the first dam are all the same.

[0028] Details of other embodiments are included in the detailed description and the drawings.

[0029] According to an embodiment of the display device, the area where the pixel defining layer is exposed can be made different according to the light-emitting region, so as to reduce the ratio of the uneven light-emitting region in the narrow light-emitting region and increase the light-emitting efficiency.

[0030] The effects according to the embodiments are not limited to the above-exemplified contents, and more effects are included in this specification. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] Figure 1 is a perspective view showing a display device according to an embodiment.

[0032] Figure 2 is a cross-sectional view of the display device viewed from the side Figure 1 of.

[0033] Figure 3 is a plan view of a light-emitting element layer of a display device according to an embodiment.

[0034] Figure 4 is a cross-sectional view showing a part of a display device according to an embodiment.

[0035] Figure 5 is a cross-sectional view showing a light-emitting element layer and a thin film encapsulation layer of a display device according to an embodiment.

[0036] Figure 6 and Figure 7 is a cross-sectional view and a plan view of the light-emitting region showing uniform evaporation and non-uniform evaporation of the light-emitting element layer when the width of the exposed portion of the pixel defining layer is the same.

[0037] Figure 8 is a cross-sectional view and a plan view of the light-emitting region showing uniform evaporation and non-uniform evaporation of the light-emitting layer of a display device according to an embodiment.

[0038] Figure 9 is a plan view of a light-emitting element layer of a display device according to an embodiment.

[0039] Figure 10 is a cross-sectional view showing a light-emitting element layer and a thin film encapsulation layer of a display device according to an embodiment.

[0040] (Explanation of Reference Numerals)

[0041] 10: Display device 100: Display panel

[0042] EML: Light-emitting element layer ED: Light-emitting element

[0043] EA1, EA2, EA3: Light-emitting regions PDL: Pixel definition layer

[0044] BNS: Dam structure BN1, BN2: Dams

[0045] CAP: Cover layer RP: Residual pattern Detailed Description of the Embodiment

[0046] Referring to the accompanying Figure 1 The advantages and features of the present invention and the methods for realizing them will become clear with reference to the embodiments described in detail below. However, the present invention is not limited to the embodiments disclosed below and can be implemented in various different forms. These embodiments are provided only to make the disclosure of the present invention complete and to fully convey the scope of the invention to those of ordinary skill in the art to which the present invention pertains. The present invention is defined only by the scope of the claims.

[0047] When an element or layer is referred to as being "on" another element or layer, it includes all cases where it is directly on the other element or there is another layer or other element in between. Similarly, references to "below", "left", and "right" include all cases where it is directly adjacent to the other element or there is another layer or other element in between. Throughout the specification, the same reference numerals refer to the same components.

[0048] First, second, etc. are used to describe various components, but obviously these components are not limited to these terms. These terms are only used to distinguish one component from another. Therefore, it is obvious that the first component mentioned below can also be the second component within the technical concept of the present invention.

[0049] Hereinafter, embodiments will be described with reference to the accompanying drawings.

[0050] Figure 1 is a perspective view showing a display device 10 according to an embodiment.

[0051] Referring to Figure 1, the display device 10 according to an embodiment may be included in an electronic device to provide a screen for display in the electronic device. The electronic device may refer to all electronic devices that provide a display screen. For example, a television, a notebook computer, a monitor, a billboard, the Internet of Things, a mobile phone, a smartphone, a tablet PC (Personal Computer), an electronic watch, smart glasses, a smartwatch, a watch phone, a head-mounted display, a mobile communication terminal, an electronic notebook, an e-book, a PMP (Portable Multimedia Player), a navigator, a game console, a digital camera, a video camera, etc., which provide a display screen, may be included in the electronic device.

[0052] The shape of the display device 10 may be variously deformed. For example, the display device 10 may have a shape similar to a rectangle having a short side in a first direction DR1 and a long side in a second direction DR2. The corners where the short side in the first direction DR1 and the long side in the second direction DR2 intersect may be formed in a rounded shape with a curvature, but is not limited thereto, and may also be formed as a right angle. The planar shape of the display device 10 is not limited to a quadrilateral, and may be formed similar to other polygons, a circle, or an ellipse.

[0053] The display device 10 may include a display panel 100, a display driving unit 200, a circuit board 300, and a touch driving unit 400 (refer to Figure 2 ).

[0054] The display panel 100 may include a main area MA and a sub-area SBA.

[0055] The main area MA may include a display area DA having pixels for displaying an image and a non-display area NDA disposed around the display area DA. The display area DA may emit light from a plurality of light-emitting areas or a plurality of opening areas. For example, the display panel 100 may include a pixel circuit having a switching element, a pixel defining layer that defines a light-emitting area or an opening area, and a self-light emitting element.

[0056] For example, the self-light emitting element may include at least one of an organic light emitting diode having an organic light emitting layer, a quantum dot light emitting diode having a quantum dot light emitting layer, an inorganic light emitting diode having an inorganic semiconductor, and a micro light emitting diode, but is not limited thereto.

[0057] In the display area DA, a plurality of pixels, a plurality of scan lines, a plurality of data lines, and a plurality of power supply lines can be configured. Each of the plurality of pixels can be defined as the smallest unit that emits light, and each of the aforementioned self-emitting elements can be each pixel. The plurality of scan lines can supply the scan signals received from the scan driving unit to the plurality of pixels. The plurality of data lines can supply the data voltages received from the display driving unit 200 to the plurality of pixels. The plurality of power supply lines can supply the power supply voltages received from the display driving unit 200 to the plurality of pixels.

[0058] The non-display area NDA can be an outer area of the display area DA. The non-display area NDA can be defined as an edge area of the main area MA of the display panel 100. The non-display area NDA can include a scan driving unit that supplies scan signals to the scan lines and fan-out lines that connect the display driving unit 200 and the display area DA.

[0059] The sub-area SBA can be an area extending from one side of the main area MA. The sub-area SBA can include flexible materials such as bending, folding, and rolling. For example, when the sub-area SBA is bent, the sub-area SBA can overlap with the main area MA in the thickness direction (third direction DR3). The sub-area SBA can include the display driving unit 200 and a pad portion connected to the circuit board 300. In another embodiment, the sub-area SBA can be omitted, and the display driving unit 200 and the pad portion can be arranged in the non-display area NDA.

[0060] The display driving unit 200 can output signals and voltages for driving the display panel 100. The display driving unit 200 can supply data voltages to the data lines. The display driving unit 200 can supply power supply voltages to the power supply lines and supply scan control signals to the scan driving unit. The display driving unit 200 can be formed as an integrated circuit (IC) and mounted on the display panel 100 in a COG (Chip on Glass), COP (Chip on Plastic), or ultrasonic bonding manner. For example, the display driving unit 200 can be arranged in the sub-area SBA and can overlap with the main area MA in the thickness direction (third direction DR3) through the bending of the sub-area SBA. As another example, the display driving unit 200 can be mounted on the circuit board 300.

[0061] The circuit board 300 can be attached to the pad portion of the display panel 100 by using an anisotropic conductive film (ACF). The leads of the circuit board 300 can be electrically connected to the pad portion of the display panel 100. The circuit board 300 can be a flexible film such as a flexible printed circuit board, a printed circuit board, or a chip on film.

[0062] Figure 2 is a cross-sectional view of the display device 10 viewed from the side. Specifically, it relates to the side of the display device 10 in the folded state. Figure 1 Figure 1

[0063] Referring to Figure 2 , the display panel 100 can include a substrate SUB, a thin film transistor layer TFTL, a light emitting element layer EML, a thin film encapsulation layer TFEL, and a color filter layer CFL.

[0064] The substrate SUB can be a base substrate or a base component. The substrate SUB can be a flexible substrate that can be bent, folded, rolled, etc. For example, the substrate SUB can include a polymer resin such as polyimide (PI), but is not limited thereto. In another embodiment, the substrate SUB can include a glass material or a metal material.

[0065] The thin film transistor layer TFTL can be disposed on the substrate SUB. The thin film transistor layer TFTL can include a plurality of thin film transistors that constitute a pixel circuit of a pixel. The thin film transistor layer TFTL can further include a scan line, a data line, a power line, a scan control line, a fan-out line connecting the display driving unit 200 and the data line, and a lead connecting the display driving unit 200 and the pad portion. Each of the thin film transistors can include a semiconductor region, a source electrode, a drain electrode, and a gate electrode. For example, when the scan driving unit is formed on one side of the non-display area NDA of the display panel 100, the scan driving unit can include a thin film transistor.

[0066] The thin film transistor layer TFTL can be disposed in the display area DA, the non-display area NDA, and the sub-area SBA. The thin film transistors, scan lines, data lines, and power lines of each pixel of the thin film transistor layer TFTL can be disposed in the display area DA. The scan control line and the fan-out line of the thin film transistor layer TFTL can be disposed in the non-display area NDA. The leads of the thin film transistor layer TFTL can be disposed in the sub-area SBA.

[0067] The light-emitting element layer EML may be disposed on the thin-film transistor layer TFTL. The light-emitting element layer EML may include a first electrode, a second electrode, and a light-emitting layer, and may include a plurality of light-emitting elements that emit light and a pixel defining layer that defines pixels. The plurality of light-emitting elements of the light-emitting element layer EML may be disposed in the display area DA.

[0068] In one embodiment, the light-emitting layer may be an organic light-emitting layer including an organic substance. The light-emitting layer may include a hole transporting layer, an organic light emitting layer, and an electron transporting layer. If the first electrode receives a voltage through the thin-film transistor of the thin-film transistor layer TFTL and the second electrode receives a cathode voltage, holes and electrons may move toward the organic light-emitting layer through the hole transporting layer and the electron transporting layer respectively, and may recombine with each other in the organic light-emitting layer to emit light.

[0069] In another embodiment, the light-emitting element may include a quantum dot light-emitting diode having a quantum dot light-emitting layer, an inorganic light-emitting diode having an inorganic semiconductor, or a micro light-emitting diode.

[0070] The thin-film encapsulation layer TFEL may cover the upper surface and the side surfaces of the light-emitting element layer EML and may protect the light-emitting element layer EML. The thin-film encapsulation layer TFEL may include at least one inorganic film and at least one organic film for encapsulating the light-emitting element layer EML.

[0071] The color filter layer CFL may be disposed on the thin-film encapsulation layer TFEL. The color filter layer CFL may include a plurality of color filters corresponding to each of the plurality of light-emitting regions. Each of the color filters may selectively transmit light of a specific wavelength and block or absorb light of other wavelengths. The color filter layer CFL may absorb a part of the light flowing in from the outside of the display device 10 to reduce the reflected light caused by external light. Therefore, the color filter layer CFL may prevent color distortion caused by external light reflection.

[0072] The color filter layer CFL is directly disposed on the thin-film encapsulation layer TFEL, so that the display device 10 may not require a separate substrate for the color filter layer CFL. Therefore, the thickness of the display device 10 may be relatively small.

[0073] In some embodiments, the display device 10 may further include an optical device. The optical device may emit or receive light in the infrared, ultraviolet, and visible light bands. For example, the optical device may be an optical sensor such as a proximity sensor, an illuminance sensor, a camera sensor, a fingerprint sensor, or an image sensor that senses the light incident on the display device 10.

[0074] Figure 3 is a plan view showing the light-emitting element layer EML of the display device 10 according to an embodiment. Figure 3 It may be a top view of the light-emitting element layer EML in the display area DA of the display device 10 as viewed from the upper side of the display device 10.

[0075] Referring to Figure 3 , the second dam BN2 may cover the display area DA (refer to Figure 2 ), and the light-emitting areas EA1, EA2, EA3 and the pixel defining layer PDL are exposed. A part of the pixel defining layer PDL may be exposed between the boundaries of the light-emitting areas EA1, EA2, EA3 and the boundary of the second dam BN2. The exposed pixel defining layer PDL may be in the form of surrounding each of the light-emitting areas EA1, EA2, EA3. The exposed areas of the pixel defining layer PDL surrounding the light-emitting areas EA1, EA2, EA3 may have a predetermined width. Some or all of the widths d1, d2, d3 of the exposed areas of the pixel defining layer PDL surrounding each of the light-emitting areas EA1, EA2, EA3 may be different from each other.

[0076] The plurality of light-emitting areas EA1, EA2, EA3 may be alternately arranged with each other. For example, the first light-emitting area EA1, the second light-emitting area EA2, and the third light-emitting area EA3 may be arranged along the first direction DR1. The first light-emitting area EA1 and the third light-emitting area EA3 may be alternately arranged with each other along the second direction DR2. The arrangement of the light-emitting areas EA1, EA2, EA3 is not limited to Figure 3 . The light-emitting areas EA1, EA2, EA3 may also be arranged in a PENTILE TM type, for example, a diamond PENTILE TM type.

[0077] The first to third light-emitting areas EA1, EA2, EA3 may have different areas from each other. For example, the area of the first light-emitting area EA1 may be smaller than the area of the second light-emitting area EA2, and the area of the second light-emitting area EA2 may be smaller than the area of the third light-emitting area EA3.

[0078] Figure 3 In

[0079] Figure 4 only the light-emitting areas EA1, EA2, EA3 are illustrated as rounded quadrilaterals, but they may be circular or polygonal such as triangular, pentagonal or hexagonal. Accordingly, the shape of the exposed pixel defining layer PDL may also be changed. Figure 4 As Figure 3Cross-sectional view of the portion taken along the cutting line I-I′, showing the cross-sections of the substrate SUB, the thin film transistor layer TFTL, the light-emitting element layer EML, the thin film encapsulation layer TFEL, and the color filter layer CFL.

[0080] The thin film transistor layer TFTL may include a first buffer layer BF1, a second buffer layer BF2, a thin film transistor TFT, a gate insulating layer GI, a first interlayer insulating layer ILD1, a capacitor electrode CPE, a second interlayer insulating layer ILD2, a first connection electrode CNE1, a first protective layer PAS1, a second connection electrode CNE2, and a second protective layer PAS2.

[0081] The first buffer layer BF1 may be disposed on the substrate SUB. The first buffer layer BF1 may include an inorganic film capable of preventing the penetration of air or moisture. For example, the first buffer layer BF1 may include a plurality of inorganic films stacked alternately.

[0082] The second buffer layer BF2 may cover the first buffer layer BF1. The second buffer layer BF2 may include an inorganic film capable of preventing the penetration of air or moisture. For example, the second buffer layer BF2 may include a plurality of inorganic films stacked alternately.

[0083] The thin film transistor TFT may be disposed on the second buffer layer BF2 and may constitute the pixel circuit of each of a plurality of pixels. For example, the thin film transistor TFT may be a driving transistor or a switching transistor of the pixel circuit. The thin film transistor TFT may include a semiconductor layer ACT, a source electrode SE, a drain electrode DE, and a gate electrode GE.

[0084] The semiconductor layer ACT may be disposed on the second buffer layer BF2. The semiconductor layer ACT may overlap with the gate electrode GE in the thickness direction (third direction DR3) and may be insulated from the gate electrode GE through the gate insulating layer GI. A part of the semiconductor layer ACT may be formed into the source electrode SE and the drain electrode DE by conducting the material of the semiconductor layer ACT.

[0085] The gate electrode GE may be disposed on the gate insulating layer GI. The gate electrode GE may overlap with the semiconductor layer ACT in the thickness direction (third direction DR3) with the gate insulating layer GI therebetween.

[0086] The gate insulating layer GI may be disposed on the semiconductor layer ACT. For example, the gate insulating layer GI may cover the semiconductor layer ACT and the second buffer layer BF2 and may insulate the semiconductor layer ACT and the gate electrode GE. The gate insulating layer GI may include a contact hole through which the first connection electrode CNE1 passes.

[0087] The first interlayer insulating layer ILD1 may cover the gate electrode GE and the gate insulating layer GI. The first interlayer insulating layer ILD1 may include contact holes through which the first connection electrode CNE1 passes. The contact holes of the first interlayer insulating layer ILD1 may be connected to the contact holes of the gate insulating layer GI and the contact holes of the second interlayer insulating layer ILD2.

[0088] The capacitor electrode CPE may be disposed on the first interlayer insulating layer ILD1. The capacitor electrode CPE may overlap with the gate electrode GE in the thickness direction (the third direction DR3). The capacitor electrode CPE and the gate electrode GE may form a capacitance.

[0089] The second interlayer insulating layer ILD2 may cover the capacitor electrode CPE and the first interlayer insulating layer ILD1. The second interlayer insulating layer ILD2 may include contact holes through which the first connection electrode CNE1 passes. The contact holes of the second interlayer insulating layer ILD2 may be connected to the contact holes of the first interlayer insulating layer ILD1 and the contact holes of the gate insulating layer GI.

[0090] The first connection electrode CNE1 may be disposed on the second interlayer insulating layer ILD2. The first connection electrode CNE1 may electrically connect the drain electrode DE of the thin film transistor TFT and the second connection electrode CNE2. The first connection electrode CNE1 may be inserted into the contact holes formed in the second interlayer insulating layer ILD2, the first interlayer insulating layer ILD1, and the gate insulating layer GI to contact the drain electrode DE of the thin film transistor TFT.

[0091] The first protective layer PAS1 may cover the first connection electrode CNE1 and the second interlayer insulating layer ILD2. The first protective layer PAS1 may protect the thin film transistor TFT. The first protective layer PAS1 may include contact holes through which the second connection electrode CNE2 passes.

[0092] The second connection electrode CNE2 may be disposed on the first protective layer PAS1. The second connection electrode CNE2 may electrically connect the first connection electrode CNE1 and the pixel electrodes AE1, AE2, AE3 of the light emitting element ED. The second connection electrode CNE2 may be inserted into the contact holes formed in the first protective layer PAS1 to contact the first connection electrode CNE1.

[0093] The second protective layer PAS2 may cover the second connection electrode CNE2 and the first protective layer PAS1. The second protective layer PAS2 may include contact holes through which the pixel electrodes AE1, AE2, AE3 of the light emitting element ED pass.

[0094] The light-emitting element layer (EML) may be disposed on the thin-film transistor layer (TFTL). The light-emitting element layer (EML) may include light-emitting elements (ED), a pixel definition layer (PDL), a capping layer (CAP), and a bank structure (BNS). The light-emitting elements (ED) may include pixel electrodes (AE1, AE2, AE3), light-emitting layers (EL1, EL2, EL3), and common electrodes (CE1, CE2, CE3).

[0095] Figure 5 1 is a cross-sectional view showing a light emitting element layer EML and a thin film encapsulation layer TFEL in a display area DA of a display device according to an embodiment. Figure 4 sectional view of the light emitting element layer EML and the thin film encapsulation layer TFEL of the first to third light emitting areas EA1, EA2, and EA3.

[0096] Reference Figure 4 as well as Figure 5 , the display device 10 (refer to Figure 2 ) may include a display area DA (refer to Figure 2 ) multiple light-emitting areas EA1, EA2, EA3. The light-emitting areas EA1, EA2, EA3 can be defined as areas where the pixel electrodes AE1, AE2, AE3, the light-emitting layers EL1, EL2, EL3, and the common electrodes CE1, CE2, CE3 overlap in the thickness direction of the substrate SUB. The light-emitting areas EA1, EA2, EA3 may include areas where light is emitted from the light-emitting elements ED1, ED2, ED3, which are sequentially stacked, and pass through the color filter layer CFL in a third direction DR3. The light-emitting areas EA1, EA2, EA3 may include a first light-emitting area EA1, a second light-emitting area EA2, and a third light-emitting area EA3 that are separated from each other and emit light of the same or different colors.

[0097] In one embodiment, the areas or sizes of the first to third light-emitting areas EA1, EA2, and EA3 may be the same or different. For example, the first, second, and third light-emitting areas EA1, EA2, and EA3 in the display device 10 may have different areas. However, this is not limiting. The area of the third light-emitting area EA3 may be larger than the areas of the first and second light-emitting areas EA1 and EA2, and the area of the second light-emitting area EA2 may be larger than the area of the first light-emitting area EA1. The intensity of light emitted from the respective light-emitting areas EA1, EA2, and EA3 may vary depending on the area of the light-emitting areas EA1, EA2, and EA3. The areas of the light-emitting areas EA1, EA2, and EA3 may be adjusted to control the color of the image displayed on the display device 10.

[0098] One first light-emitting region EA1, one second light-emitting region EA2, and one third light-emitting region EA3, which are arranged adjacent to each other in the display device 10, may form a pixel group. A pixel group may include light-emitting regions EA1, EA2, and EA3 that emit lights of different colors from each other to express white grayscale. However, not limited thereto, the combination of the light-emitting regions EA1, EA2, and EA3 constituting a pixel group may be variously modified according to the arrangement of the light-emitting regions EA1, EA2, and EA3 and the colors of the lights they emit, etc.

[0099] The display device 10 may include a plurality of light-emitting elements ED1, ED2, and ED3 disposed in different light-emitting regions EA1, EA2, and EA3. The light-emitting elements ED1, ED2, and ED3 may include a first light-emitting element ED1 disposed in the first light-emitting region EA1, a second light-emitting element ED2 disposed in the second light-emitting region EA2, and a third light-emitting element ED3 disposed in the third light-emitting region EA3.

[0100] Each of the light-emitting elements ED1, ED2, and ED3 may include pixel electrodes AE1, AE2, and AE3, light-emitting layers EL1, EL2, and EL3, and common electrodes CE1, CE2, and CE3. The light-emitting elements ED1, ED2, and ED3 disposed in different light-emitting regions EA1, EA2, and EA3 emit lights of different colors from each other according to the materials of the light-emitting layers EL1, EL2, and EL3. For example, the first light-emitting element ED1 disposed in the first light-emitting region EA1 may emit green light having a peak wavelength in the range of 510 nm to 550 nm, the second light-emitting element ED2 disposed in the second light-emitting region EA2 may emit red light having a peak wavelength in the range of 610 nm to 650 nm, and the third light-emitting element ED3 disposed in the third light-emitting region EA3 may emit blue light having a peak wavelength in the range of 440 nm to 480 nm. The first to third light-emitting regions EA1, EA2, and EA3 constituting a pixel group may include light-emitting elements ED1, ED2, and ED3 that emit lights of different colors from each other to express white grayscale. Alternatively, the light-emitting layers EL1, EL2, and EL3 may include two or more materials that emit lights of different colors from each other, so that one light-emitting layer emits mixed light. For example, the light-emitting layers EL1, EL2, and EL3 may together include a substance that emits red light and a substance that emits green light to emit yellow light, or may all include a substance that emits red light, a substance that emits green light, and a substance that emits blue light to emit white light.

[0101] The pixel electrodes AE1, AE2, and AE3 may be disposed on the second protective layer PAS2. The pixel electrodes AE1, AE2, and AE3 may be respectively disposed in a plurality of light-emitting regions EA1, EA2, and EA3. The pixel electrodes AE1, AE2, and AE3 may include a first pixel electrode AE1 disposed in the first light-emitting region EA1, a second pixel electrode AE2 disposed in the second light-emitting region EA2, and a third pixel electrode AE3 disposed in the third light-emitting region EA3. The first pixel electrode AE1, the second pixel electrode AE2, and the third pixel electrode AE3 may be disposed separately from each other on the second protective layer PAS2.

[0102] The pixel electrodes AE1, AE2, and AE3 may be electrically connected to the drain electrode DE of the thin-film transistor TFT through the first and second connection electrodes CNE1 and CNE2. The edges of the separated pixel electrodes AE1, AE2, and AE3 may be covered by the pixel defining layer PDL so that the first to third pixel electrodes AE1, AE2, and AE3 are insulated from each other.

[0103] The pixel electrodes AE1, AE2, and AE3 may include a transparent electrode material or / and a conductive metal material and may be a single-layer or multi-layer structure. As the metal material, it may be one or more of silver (Ag), copper (Cu), aluminum (Al), nickel (Ni), lanthanum (La), titanium (Ti), and titanium nitride (TiN). As the transparent electrode material, it may be one or more of ITO (Indium Tin Oxide), IZO (Indium Zinc Oxide), and ITZO (Indium Tin Zinc Oxide).

[0104] The light-emitting layers EL1, EL2, and EL3 may be disposed on the pixel electrodes AE1, AE2, and AE3. The light-emitting layers EL1, EL2, and EL3 may be organic light-emitting layers made of organic substances and may be formed on the pixel electrodes AE1, AE2, and AE3 by an evaporation process. The light-emitting layers EL1, EL2, and EL3 may be multi-layer structures, and a hole injection material, a hole transport material, a light-emitting material, an electron transport material, or / and an electron injection material may respectively form layers. If the thin-film transistor TFT applies a predetermined voltage to the pixel electrodes AE1, AE2, and AE3 of the light-emitting elements ED1, ED2, and ED3, and the common electrodes CE1, CE2, and CE3 of the light-emitting elements ED1, ED2, and ED3 receive a common voltage or a cathode voltage, holes and electrons may be respectively injected and transported, and the holes and electrons recombine with each other in the light-emitting layers EL1, EL2, and EL3 to emit light.

[0105] The light-emitting layers EL1, EL2, and EL3 may include a first light-emitting layer EL1, a second light-emitting layer EL2, and a third light-emitting layer EL3 disposed in light-emitting regions EA1, EA2, and EA3 different from each other, respectively. It may be that the first light-emitting layer EL1 is disposed on the first pixel electrode AE1 in the first light-emitting region EA1, the second light-emitting layer EL2 is disposed on the second pixel electrode AE2 in the second light-emitting region EA2, and the third light-emitting layer EL3 is disposed on the third pixel electrode AE3 in the third light-emitting region EA3. The plurality of light-emitting layers EL1, EL2, and EL3 may emit lights of different colors from each other or one of the light-emitting layers EL1, EL2, and EL3 emits mixed light. In one embodiment, it may be that the first light-emitting layer EL1 emits green light, the second light-emitting layer EL2 emits red light, and the third light-emitting layer EL3 emits blue light.

[0106] The light-emitting layers EL1, EL2, and EL3 may be disposed on the upper surface of the pixel defining layer PDL. In one embodiment, the side surface of the residual pattern RP may be recessed more than the side surface of the pixel defining layer PDL, and a part of the light-emitting layers EL1, EL2, and EL3 may be disposed in the space between the pixel electrodes AE1, AE2, and AE3 and the pixel defining layer PDL. In one embodiment, the light-emitting layers EL1, EL2, and EL3 may be in contact with the pixel defining layer PDL, the residual pattern RP, and the pixel electrodes AE1, AE2, and AE3.

[0107] The common electrodes CE1, CE2, and CE3 may be disposed on the light-emitting layers EL1, EL2, and EL3. The common electrodes CE1, CE2, and CE3 may include a transparent conductive material to emit the generated light from the light-emitting layers EL1, EL2, and EL3. The common electrodes CE1, CE2, and CE3 may receive a common voltage or a low-potential voltage. If the pixel electrodes AE1, AE2, and AE3 receive voltages corresponding to data voltages and the common electrodes CE1, CE2, and CE3 receive low-potential voltages, a potential difference may be formed between the pixel electrodes AE1, AE2, and AE3 and the common electrodes CE1, CE2, and CE3, so that the light-emitting layers EL1, EL2, and EL3 emit light.

[0108] The common electrodes CE1, CE2, and CE3 may include a first common electrode CE1, a second common electrode CE2, and a third common electrode CE3 disposed in light-emitting regions EA1, EA2, and EA3 different from each other, respectively. It may be that the first common electrode CE1 is disposed on the first light-emitting layer EL1 in the first light-emitting region EA1, the second common electrode CE2 is disposed on the second light-emitting layer EL2 in the second light-emitting region EA2, and the third common electrode CE3 is disposed on the third light-emitting layer EL3 in the third light-emitting region EA3. Each of the first to third common electrodes CE1, CE2, and CE3 may be spaced apart from each other.

[0109] The cover layers CAP1, CAP2, and CAP3 may be disposed on the common electrodes CE1, CE2, and CE3. The cover layers CAP1, CAP2, and CAP3 may include an organic or inorganic insulating material to cover the patterns disposed on the light-emitting elements ED1, ED2, and ED3. The cover layers CAP1, CAP2, and CAP3 may prevent the light-emitting elements ED1, ED2, and ED3 from being damaged by external gases. In an exemplary embodiment, the cover layers CAP1, CAP2, and CAP3 may include an organic material such as a-NPD, NPB, TPD, m-MTDATA, Alq3, LiF, and / or CuPc, or an inorganic material such as aluminum oxide, titanium oxide, tantalum oxide, hafnium oxide, zinc oxide, silicon oxide, silicon nitride, and / or silicon oxynitride.

[0110] The cover layers CAP1, CAP2, and CAP3 may include a first cover layer CAP1, a second cover layer CAP2, and a third cover layer CAP3 that are respectively disposed in different light-emitting regions EA1, EA2, and EA3. The first to third cover layers CAP1, CAP2, and CAP3 may be spaced apart from each other.

[0111] The pixel defining layer PDL may be disposed on the second protective layer PAS2 and expose the upper surfaces of the pixel electrodes AE1, AE2, and AE3 to define the light-emitting regions EA1, EA2, and EA3. The pixel defining layer PDL may have a first side surface that defines the light-emitting regions EA1, EA2, and EA3, and the first side surface may be different from a second side surface of the pixel defining layer PDL that faces the side surfaces of the pixel electrodes AE1, AE2, and AE3.

[0112] The pixel defining layer PDL may include an inorganic insulating material. The pixel defining layer PDL may include at least one of silicon nitride, silicon oxynitride, silicon oxide, titanium oxide, aluminum oxide, tantalum oxide, hafnium oxide, zinc oxide, and an amorphous silicon layer, but is not limited thereto.

[0113] According to an embodiment, the pixel defining layer PDL may be disposed on the edges of the pixel electrodes AE1, AE2, and AE3 and spaced apart from the upper surfaces of the pixel electrodes AE1, AE2, and AE3. The pixel defining layer PDL may overlap a part of the upper surfaces of the pixel electrodes AE1, AE2, and AE3 in the thickness direction (third direction DR3) of the substrate SUB without directly contacting them, and a residual pattern RP may be disposed between the pixel defining layer PDL and the pixel electrodes AE1, AE2, and AE3. However, the pixel defining layer PDL may directly contact the side surfaces of the pixel electrodes AE1, AE2, and AE3. The side surface of the pixel defining layer PDL may protrude toward the light-emitting regions EA1, EA2, and EA3 more than the side surface of the second dam BN2.

[0114] The residual pattern RP may be disposed on the edges of each of the pixel electrodes AE1, AE2, and AE3. The pixel defining layer PDL may not be in direct contact with the upper surfaces of the pixel electrodes AE1, AE2, and AE3 through the residual pattern RP. The residual pattern RP may be formed by removing a part of the sacrificial layer disposed on the pixel electrodes AE1, AE2, and AE3 in the manufacturing process of the display device 10. The residual pattern RP may include a metal or an oxide semiconductor material. In the drawings, only the side surfaces of the light-emitting regions EA1, EA2, and EA3 facing the residual pattern RP are illustrated as being recessed from the first side surface of the pixel defining layer PDL, but it is not limited thereto. The side surfaces of the residual pattern RP may protrude from the first side surface of the pixel defining layer PDL or be aligned with the first side surface of the pixel defining layer PDL toward the light-emitting regions EA1, EA2, and EA3.

[0115] The display device 10 may include a plurality of dam structures BNS disposed on the pixel defining layer PDL. The dam structures BNS may have a structure in which dams BN1 and BN2 including different materials are stacked in sequence, may include a plurality of openings having the light-emitting regions EA1, EA2, and EA3, and may be disposed to overlap with the light-shielding regions of the color filters CF1, CF2, and CF3 described later.

[0116] The first dam BN1 may be disposed on the pixel defining layer PDL. The side surface of the first dam BN1 may be recessed from the first side surface of the pixel defining layer PDL in a direction opposite to the direction toward the light-emitting regions EA1, EA2, and EA3. The side surface of the first dam BN1 may be recessed from the side surface of the second dam BN2 described later in a direction opposite to the direction toward the light-emitting regions EA1, EA2, and EA3.

[0117] According to an embodiment, the first dam BN1 may include a metal material. In an exemplary embodiment, the first dam BN1 may include aluminum (Al), an oxide of aluminum (Al), or an alloy of aluminum (Al).

[0118] The common electrodes CE1, CE2, and CE3 may be in direct contact with the side surfaces of the first dam BN1. One end and the other end of the common electrodes CE1, CE2, and CE3 may be in contact with the side surfaces of the first dam BN1. The common electrodes CE1, CE2, and CE3 of the different light-emitting elements ED1, ED2, and ED3 may be in direct contact with the first dam BN1 respectively, and the first dam BN1 may include a conductive material, so that each of the common electrodes CE1, CE2, and CE3 is electrically connected to each other through the first dam BN1.

[0119] According to an embodiment, the light-emitting layers EL1, EL2, and EL3 may be in direct contact with the side surface of the first dam BN1. The area of contact between the common electrodes CE1, CE2, and CE3 and the side surface of the first dam BN1 may be larger than the area of contact between the light-emitting layers EL1, EL2, and EL3 and the side surface of the first dam BN1. The common electrodes CE1, CE2, and CE3 may be arranged to have a larger area on the side surface of the first dam BN1 or at a higher position in the side surface of the first dam BN1 than the light-emitting layers EL1, EL2, and EL3. The common electrodes CE1, CE2, and CE3 of the different light-emitting elements ED1, ED2, and ED3 are electrically connected through the first dam BN1, so it may be advantageous to contact the first dam BN1 over a larger area.

[0120] The first dam BN1 may have an upper surface at a position higher than the common electrodes CE1, CE2, and CE3 and the cover layers CAP1, CAP2, and CAP3. The height from the substrate SUB to the upper surface of the first dam BN1 may be greater than the height from the substrate SUB to the common electrodes CE1, CE2, and CE3.

[0121] The second dam BN2 may be arranged on the first dam BN1. The second dam BN2 may include openings overlapping the respective light-emitting regions EA1, EA2, and EA3, and each opening may include a side surface. The second dam BN2 may include a protruding region, i.e., a tip or an eaves, compared to the first dam BN1. The side surface of the second dam BN2 may protrude more towards the light-emitting regions EA1, EA2, and EA3 than the side surface of the first dam BN1.

[0122] Since the side surface of the second dam BN2 has a shape protruding more towards the light-emitting regions EA1, EA2, and EA3 than the side surface of the first dam BN1, an undercut structure of the first dam BN1 may be formed under the ends T1, T2, and T3 of the second dam BN2.

[0123] In the display device 10 according to an embodiment, the dam structure BNS may include protruding ends T1, T2, and T3 facing the light-emitting regions EA1, EA2, and EA3 to form the light-emitting layers EL1, EL2, and EL3 and the common electrodes CE1, CE2, and CE3 separated from each other through evaporation and etching processes rather than a mask process. Additionally, different layers may be separately formed in the different light-emitting regions EA1, EA2, and EA3 through an evaporation process. For example, even if the light-emitting layers EL1, EL2, and EL3 and the common electrodes CE1, CE2, and CE3 of the light-emitting elements ED1, ED2, and ED3 are formed through an evaporation process without using a mask, the evaporated material may be disconnected across the dam structure BNS through the ends T1, T2, and T3 of the second dam BN2 without being connected between the light-emitting regions EA1, EA2, and EA3. Different layers may be separately formed in the different light-emitting regions EA1, EA2, and EA3 through a process of forming a substance for forming a specific layer over the entire surface of the display device 10 and then removing the layer formed in the unnecessary regions through etching. The display device 10 can form different light-emitting elements ED1, ED2, and ED3 for the respective light-emitting regions EA1, EA2, and EA3 through evaporation and etching processes without using a mask process, can omit unnecessary components in the display device 10, and can minimize the area of the non-display region NDA.

[0124] The second dam BN2 may include a metal substance different from that of the first dam BN1. The metal substance of the second dam BN2 is removed together with the metal substance of the first dam BN1 through dry etching, and for wet etching, a substance with an etching rate significantly slower than that of the first dam BN1 or a substance that cannot be etched is preferred. In one embodiment, the first dam BN1 may include aluminum (Al), an oxide of aluminum (Al), or an alloy of aluminum (Al), and the second dam BN2 may include titanium (Ti), an oxide of titanium (Ti), or an alloy of titanium (Ti).

[0125] The second dam BN2 may include a first end portion T1 surrounding an area of the first light-emitting region EA1, a second end portion T2 surrounding an area of the second light-emitting region EA2, and a third end portion T3 surrounding an area of the third light-emitting region EA3. The widths f1, f2, f3 of the first to third end portions T1, T2, T3 may be defined as the distance between the side surface of the second dam BN2 adjacent to each light-emitting region EA1, EA2, EA3 and the side surface of the first dam BN1, and may be measured under the second dam BN2. For example, the width f1 of the first end portion T1 may be the distance between the side surface of the second dam BN2 and the side surface of the first dam BN1 under the second dam BN2. When all of the first to third end portions T1, T2, T3 are formed by one process, the first to third end portions T1, T2, T3 may have the same widths f1, f2, f3 as each other. The widths f1, f2, f3 of the first to third end portions T1, T2, T3 may be adjusted by adjusting the process of wet-etching the side surface of the first dam BN1. The end portions T1, T2, T3 of the second dam BN2 may overlap with the common electrodes CE1, CE2, CE3, the light-emitting layers EL1, EL2, EL3, and / or the pixel defining layer PDL in a third direction DR3 perpendicular to the substrate SUB. In this specification, in the case of multiple numerical values within a range, they may be regarded as the same.

[0126] The second dam BN2 may overlap with a partial area of the pixel defining layer PDL in the thickness direction (third direction DR3) of the substrate SUB and may not overlap with another partial area. The exposed portions P1, P2, P3 of the pixel defining layer PDL that do not overlap with the second dam BN2 may be Figure 3 the pixel defining layer PDL shown.

[0127] The pixel defining layer PDL may include a first exposed portion P1 adjacent to and surrounding the first light-emitting region EA1, a second exposed portion P2 adjacent to and surrounding the second light-emitting region EA2, and a third exposed portion P3 adjacent to and surrounding the third light-emitting region EA3. The widths d1, d2, d3 of the first to third exposed portions P1, P2, P3 may be defined as the width of the exposed area of the pixel defining layer PDL surrounding each light-emitting region EA1, EA2, EA3 on a plan view such as Figure 3 or the distance between the side surface of the second dam BN2 adjacent to each light-emitting region EA1, EA2, EA3 and the first side surface of the pixel defining layer PDL on a cross-sectional view such as Figure 4 For example, the width d1 of the first exposed portion P1 may be the distance between the first side surface of the pixel defining layer PDL adjacent to the first light-emitting region EA1 and the side surface of the second dam BN2, and may be the distance between the first end portion T1 and the first light-emitting region EA1.

[0128] The width d1 of the first exposed portion P1 may be greater than the width d2 of the second exposed portion P2. The width d2 of the second exposed portion P2 may be greater than the width d3 of the third exposed portion P3. The width d3 of the third exposed portion P3 may be less than the width d1 of the first exposed portion P1. The area of the first light-emitting region EA1 may be greater than the area of the second light-emitting region EA2. In Figure 5 it is shown that the width e1 of the first light-emitting region EA1 is less than the width e2 of the second light-emitting region EA2, and the width e2 of the second light-emitting region EA2 is less than the width e3 of the third light-emitting region EA3. However, the comparison of the sizes of the widths e1, e2, and e3 of the light-emitting regions EA1, EA2, and EA3 may vary depending on the intercepting direction.

[0129] On the other hand, the light-emitting layers EL1, EL2, and EL3 are entirely vapor-deposited on the substrate SUB. However, depending on the vapor-deposition angle, the vapor-deposition thickness may become thinner or the vapor-deposition may be uneven in the edge regions of the light-emitting regions EA1, EA2, and EA3.

[0130] Figure 6 and Figure 7 are cross-sectional views showing the uniform vapor-deposition and non-uniform vapor-deposition of the light-emitting layers EL1_1 and EL3_1 and plan views of the light-emitting regions EA1_1 and EA3_1 when the widths d1_1 and d3_1 of the exposed portions P1_1 and P3_1 of the pixel defining layer PDL are the same. It is related to the following situation: for the exposed portions P1_1 and P3_1 of the pixel defining layer PDL, different designs are not made according to the light-emitting regions EA1_1 and EA3_1 having different areas, but they are made to have the same width. Figure 6 The (a) of Figure 6 is a cross-sectional view showing the vapor-deposition of the first light-emitting layer EL1_1 in the small-area first light-emitting region EA1_1, Figure 7 The (a) of Figure 7 is a plan view (top-view) showing the uniformly vapor-deposited region 511 and the non-uniformly vapor-deposited region 512 in the light-emitting region EA1_1.

[0131] Referring to Figure 6 the (a) of Figure 7(a), near the center of the region overlapping with the opening of the second dam BN2_1, first regions 511 and 531 where the light-emitting layers EL1_1 and EL3_1 are uniformly vapor-deposited are disposed. The first regions 511 and 531 can be defined as regions having a thickness of 95% or more with respect to the thickness at the point where the thickness of the light-emitting layers EL1_1 and EL3_1 is thickest, and can be normal light-emitting regions. Second regions 512 and 532 can be disposed around the first regions 511 and 531. The second regions 512 and 532 can be defined as regions having a thickness of less than 95% with respect to the thickness at the point where the thickness of the light-emitting layers EL1_1 and EL3_1 is thickest, and can be abnormal light-emitting regions. When vapor-depositing the light-emitting layers EL1_1 and EL3_1, not only in the regions overlapping with the ends T1 and T3 of the second dam BN2, due to the shadow effect of the ends T1 and T3 of the second dam BN2, vapor-deposition may not occur sufficiently in the light-emitting regions EA1_1 and EA3_1, and second regions 512 and 532 with uneven vapor-deposition may exist. In the second regions 512 and 532, the thickness of the light-emitting layers EL1_1 and EL3_1 may decrease. The vapor-deposition angle θ can vary according to the position of the substrate SUB, and the second regions 512 and 532 can be enlarged or reduced.

[0132] In the case of the first light-emitting region EA1_1, compared with the third light-emitting region EA3_1, the shadow effect has a greater impact. Even when the widths d1_1 and d3_1 of the exposed portions P1_1 and P3_1 are the same, in the first light-emitting region EA1_1 with a small area, compared with the third light-emitting region EA3_1, the ratio of the second region 512 may be significantly larger (refer to Figure 6 (b) and Figure 7 (b)). It may be difficult to ensure a wide first region 511 in the first light-emitting region EA1_1 with a small area.

[0133] On the contrary, according to the light-emitting regions EA1, EA2, and EA3 (refer to Figure 5 ), when different parts of the exposed portions P1, P2, and P3 of the pixel defining layer PDL (refer to Figure 5 ) are designed differently to have different widths, even in the first light-emitting region EA1 with a small area, a first region 513 with uniform vapor-deposition can be provided. Figure 8 is a cross-sectional view showing uniform and non-uniform vapor-deposition of the light-emitting layer EL1 of the display device 10 (refer to Figure 2 ) according to an embodiment and a plan view of the light-emitting region EA1.

[0134] Refer to Figure 8In (a), if the width d1 of the first exposed portion P1 of the pixel defining layer PDL adjacent to the first light-emitting region EA1 with a narrow area is enlarged (d1 > d1_1), the first region 513 in the first light-emitting region EA1 increases and the second region 514 decreases. From Figure 8 As can be seen from (b), within the first light-emitting region EA1, the ratio of the first region 513 increases significantly. In one embodiment, the area of the first region 513 of the light-emitting layer EL1 can be 50% or more, 70% or more, or 80% or more with respect to the area of the light-emitting region EA1. Stable light-emitting elements ED1, ED2, and ED3 can be fabricated in the display device 10 that requires high resolution (refer to Figure 4 ). The display device 10 or the display panel 100 according to one embodiment (refer to Figure 1 ) can have a resolution of 1500 ppi (pixels per inch) or more.

[0135] In the thickness direction (the third direction DR3) of the substrate SUB, the width of the region where the pixel defining layer PDL and the first light-emitting layer EL1 overlap can be greater than the width of the region where the pixel defining layer PDL and the second light-emitting layer EL2 overlap. The width of the region where the pixel defining layer PDL and the second light-emitting layer EL2 overlap can be greater than the width of the region where the pixel defining layer PDL and the third light-emitting layer EL3 overlap. The region where the pixel defining layer PDL and the first light-emitting layer EL1 overlap can include the first exposed portion P1 of the pixel defining layer PDL and be greater than the first exposed portion P1.

[0136] Through Figures 6 to 8 , the shadow effect during the evaporation of the light-emitting layers EL1, EL2, and EL3 (refer to Figure 5 ) and the exposed portions P1, P2, and P3 of the pixel defining layer PDL (refer to Figure 5 ) are described. However, for the evaporation of the common electrodes CE1, CE2, and CE3 (refer to Figure 5 ), the description of the shadow effect and the exposed portions P1, P2, and P3 of the pixel defining layer PDL can also be applied in the same way. In one embodiment, the area of the first region of the common electrodes CE1, CE2, and CE3 can be 50% or more, 70% or more, or 80% or more with respect to the areas of the light-emitting regions EA1, EA2, and EA3 (refer to Figure 5 ). In the second region, the thickness of the common electrodes CE1, CE2, and CE3 can be reduced.

[0137] The pixel defining layer PDL adjacent to the relatively large-area second light-emitting region EA2 and third light-emitting region EA3 has a second exposed portion P2 and a third exposed portion P3, wherein the second exposed portion P2 and the third exposed portion P3 have a width smaller than the width d1 of the first exposed portion P1, so that the evaporation area of the common electrodes CE2 and CE3 on the side surface of the first dam BN1 (refer to Figure 5 ) can be sufficiently provided.

[0138] Refer to Figure 4 , the thin film encapsulation layer TFEL can be disposed on the light-emitting elements ED1, ED2, ED3 and the dam structure BNS, and cover the plurality of light-emitting elements ED1, ED2, ED3 and the dam structure BNS. The thin film encapsulation layer TFEL can include at least one inorganic film to prevent oxygen or moisture from penetrating into the light-emitting element layer EML. The thin film encapsulation layer TFEL can include at least one organic film to protect the light-emitting element layer EML from foreign substances such as dust.

[0139] In an exemplary embodiment, the thin film encapsulation layer TFEL can include a lower inorganic encapsulation layer TFE1, an organic encapsulation layer TFE2, and an upper inorganic encapsulation layer TFE3 stacked in sequence.

[0140] The lower inorganic encapsulation layer TFE1 and the upper inorganic encapsulation layer TFE3 can each include more than one inorganic insulator. The inorganic insulator can be any one of silicon oxide, silicon nitride, and silicon oxynitride. For example, it can be aluminum oxide, titanium oxide, tantalum oxide, hafnium oxide, zinc oxide, silicon oxide, silicon nitride, and / or silicon oxynitride.

[0141] The organic encapsulation layer TFE2 can include a polymer-based material. As the polymer-based material, it can include acrylic resins, epoxy resins, polyimides, and polyethylene, etc. For example, the organic encapsulation layer TFE2 can include acrylic resins, such as polymethyl methacrylate, polyacrylic acid, etc. The organic encapsulation layer TFE2 can be formed by curing monomers or coating polymers.

[0142] The lower inorganic encapsulation layer TFE1 can be disposed on the light-emitting elements ED1, ED2, ED3, and the dam structure BNS. The lower inorganic encapsulation layer TFE1 may include a first lower inorganic encapsulation layer TL1, a second lower inorganic encapsulation layer TL2, and a third lower inorganic encapsulation layer TL3 that are respectively disposed corresponding to different light-emitting regions EA1, EA2, EA3. The first lower inorganic encapsulation layer TL1, the second lower inorganic encapsulation layer TL2, and the third lower inorganic encapsulation layer TL3 may respectively include an inorganic insulating material to cover the light-emitting elements ED1, ED2, ED3. The first lower inorganic encapsulation layer TL1, the second lower inorganic encapsulation layer TL2, and the third lower inorganic encapsulation layer TL3 can prevent the light-emitting elements ED1, ED2, ED3 from being damaged by external gases.

[0143] The lower inorganic encapsulation layer TFE1 (TL1, TL2, TL3) can be formed by chemical vapor deposition (CVD), and thus can be formed along the steps of the evaporated layer. For example, the first lower inorganic encapsulation layer TL1, the second lower inorganic encapsulation layer TL2, and the third lower inorganic encapsulation layer TL3 can also form a thin film under the undercut caused by the end of the dam structure BNS. The lower inorganic encapsulation layers TL1, TL2, TL3 can be disposed along the upper surface, side surfaces and lower surface of the second dam BN2, the side surfaces of the first dam BN1, and the upper surfaces of the common electrodes CE1, CE2, CE3. The lower inorganic encapsulation layers TL1, TL2, TL3 can contact the lower surface of the second dam BN2 to prevent moisture permeation from external gases.

[0144] The first lower inorganic encapsulation layer TL1 may not overlap with the second light-emitting element ED2 and the third light-emitting element ED3, and is only disposed on the first light-emitting element ED1 and the surrounding dam structure BNS. The second lower inorganic encapsulation layer TL2 may not overlap with the first light-emitting element ED1 and the third light-emitting element ED3, and is only disposed on the second light-emitting element ED2 and the surrounding dam structure BNS. The third lower inorganic encapsulation layer TL3 may not overlap with the first light-emitting element ED1 and the second light-emitting element ED2, and is only disposed on the third light-emitting element ED3 and the surrounding dam structure BNS.

[0145] It may be that the first lower inorganic encapsulation layer TL1 is formed after the first common electrode CE1 is formed, the second lower inorganic encapsulation layer TL2 is formed after the second common electrode CE2 is formed, and the third lower inorganic encapsulation layer TL3 is formed after the third common electrode CE3 is formed. On the dam structure BNS, the first lower inorganic encapsulation layer TL1, the second lower inorganic encapsulation layer TL2, and the third lower inorganic encapsulation layer TL3 can be disposed at intervals from each other.

[0146] The lower inorganic encapsulation layers TL1, TL2, and TL3 can be disposed on the upper and lower surfaces of the light-emitting elements ED1, ED2, ED3 and the second dam BN2 around them, and are spaced apart from the upper surface of the second dam BN2. That is, the lower inorganic encapsulation layers TL1, TL2, and TL3 can have an undercut structure on the second dam BN2. The spaced-apart space between the lower inorganic encapsulation layers TL1, TL2, and TL3 and the upper surface of the second dam BN2 can be a space where the materials of the light-emitting layers EL1, EL2, EL3 and the common electrodes CE1, CE2, CE3 evaporated on the entire surface are removed.

[0147] The organic encapsulation layer TFE2 is disposed on the second dam BN2 and the lower inorganic encapsulation layers TL1, TL2, and TL3. A part of the organic encapsulation layer TFE2 can be disposed in the spaced-apart space between the lower inorganic encapsulation layers TL1, TL2, and TL3 and the upper surface of the second dam BN2. In the region where the second dam BN2 and the lower inorganic encapsulation layers TL1, TL2, and TL3 overlap, the second dam BN2, the organic encapsulation layer TFE2, and the lower inorganic encapsulation layers TL1, TL2, and TL3 can be disposed in sequence. It can be that in the end regions T1, T2, and T3, the organic encapsulation layer TFE2 and the lower inorganic encapsulation layers TL1, TL2, and TL3 are disposed in sequence above the second dam BN2, and the organic encapsulation layer TFE2 is disposed again above the lower inorganic encapsulation layers TL1, TL2, and TL3. In other words, it can be that a part of the organic encapsulation layer TFE2 is disposed between the upper surface of the second dam BN2 and the lower inorganic encapsulation layers TL1, TL2, and TL3 on the ends T1, T2, and T3 of the second dam BN2, and another part is disposed above the lower inorganic encapsulation layers TL1, TL2, and TL3.

[0148] In one embodiment, the entire upper surface of the second dam BN2 can be in contact with the organic encapsulation layer TFE2. The first lower surface of the lower inorganic encapsulation layers TL1, TL2, and TL3 can be the surface opposite to the upper surface of the second dam BN2, and the first lower surface of the lower inorganic encapsulation layers TL1, TL2, and TL3 can be in contact with the organic encapsulation layer TFE2. The organic encapsulation layer TFE2 can be in contact with the side surface of the second dam BN2.

[0149] The upper inorganic encapsulation layer TFE3 can be disposed on the organic encapsulation layer TFE2. The upper inorganic encapsulation layer TFE3 can include aluminum oxide, titanium oxide, tantalum oxide, hafnium oxide, zinc oxide, silicon oxide, silicon nitride, and / or silicon oxynitride.

[0150] A light-shielding layer (not shown) may be selectively disposed on the thin-film encapsulation layer TFEL. It may be located between the light-emitting regions EA1, EA2, and EA3. The light-shielding layer may include a light-absorbing material. For example, the light-shielding layer may include an inorganic black pigment or an organic black pigment. The inorganic black pigment may be carbon black, and the organic black pigment may include at least one of lactam black, perylene black, and aniline black, but is not limited thereto. The light-shielding layer may prevent visible light from intruding between the first to third light-emitting regions EA1, EA2, and EA3 and mixing colors, thereby improving the color reproducibility of the display device 10 (refer to Figure 2 ).

[0151] The display device 10 may include a plurality of color filters CF1, CF2, and CF3 disposed on the light-emitting regions EA1, EA2, and EA3. Each of the plurality of color filters CF1, CF2, and CF3 may include a filtering pattern region and a light-shielding region. The filtering pattern region may be formed to overlap with the light-emitting regions EA1, EA2, and EA3 or the openings of the dam structure BNS, and may form a light-emitting region through which light emitted from the light-emitting regions EA1, EA2, and EA3 exits. The light-shielding region is a region where the plurality of color filters CF1, CF2, and CF3 are stacked and light cannot be transmitted.

[0152] The color filters CF1, CF2, and CF3 may include a first color filter CF1, a second color filter CF2, and a third color filter CF3 disposed corresponding to the different light-emitting regions EA1, EA2, and EA3, respectively. The color filters CF1, CF2, and CF3 may include colorants such as dyes or pigments that absorb light in other wavelength ranges except for a specific wavelength range, and may be disposed corresponding to the colors of the light emitted from the light-emitting regions EA1, EA2, and EA3. For example, the first color filter CF1 may be disposed to overlap with the first light-emitting region EA1 and is a red color filter that transmits only the first red light. It may be that the second color filter CF2 is disposed to overlap with the second light-emitting region EA2 and is a green color filter that transmits only the second green light, and the third color filter CF3 is disposed to overlap with the third light-emitting region EA3 and is a blue color filter that transmits only the third blue light.

[0153] The display device 10 may reduce the intensity of reflected light caused by external light by overlapping the color filters CF1, CF2, and CF3. Furthermore, the color perception of the reflected light caused by external light may also be controlled by adjusting the arrangement, shape, and area of the color filters CF1, CF2, and CF3 on the plan view.

[0154] The outer coating OC can be disposed on the color filters CF1, CF2, CF3 to flatten the upper ends of the color filters CF1, CF2, CF3. The outer coating OC can be a colorless light-transmissive layer that does not have a color in the visible light band. For example, the outer coating OC can include a colorless light-transmissive organic substance such as an acrylic resin series.

[0155] Figure 9 is a plan view of the light-emitting element layer EML' of the display device 10 (refer to Figure 2 ) according to an embodiment. Figure 10 is a cross-sectional view showing the light-emitting element layer EML' (refer to Figure 2 ) and the thin film encapsulation layer TFEL (refer to Figure 9 ) of the display device 10 (refer to Figure 4 ) according to an embodiment, and is related to the light-emitting element layer EML' and the thin film encapsulation layer TFEL of the display device 10 taken along the cut line I-I' in Figure 9 .

[0156] Figure 9 And Figure 10 Compared with Figure 3 And Figure 5 , it is different in that the width d3' of the third exposed portion P3' of the pixel defining layer PDL is the same as the width d2 of the second exposed portion P2. The third light-emitting region EA3 has an area wider than that of the second light-emitting region EA2, but the widths d3', d2 of the adjacent exposed portions P3', P2 can be the same. Even if the second exposed portion P2 and the third exposed portion P3' have the same width, the third light-emitting region EA3 can have a wide area, so that the ratio of the first region is large.

[0157] The embodiments of the present invention have been described above with reference to the accompanying drawings, but those having ordinary knowledge in the technical field to which the present invention pertains should be able to understand that without changing the technical concept or essential features of the present invention, it can be implemented in other specific ways. Therefore, it should be understood that the above-described embodiments are exemplary in all aspects and not restrictive.

Claims

1. A display device, wherein, Comprising: A substrate, including a first light-emitting region and a second light-emitting region spaced apart from each other; A pixel defining layer, including sides defining the first light-emitting region and the second light-emitting region; A first light-emitting element, disposed on the substrate in the first light-emitting region, and including a first pixel electrode, a first light-emitting layer, and a first common electrode; A second light-emitting element, disposed on the substrate in the second light-emitting region, and including a second pixel electrode, a second light-emitting layer, and a second common electrode; A first dam, disposed on the pixel defining layer; And A second dam, disposed on the first dam, and including a side surface protruding more than the side surface of the first dam and recessed more than the side surface of the pixel defining layer, The distance between the side surface of the pixel defining layer adjacent to the first light-emitting region and the side surface of the second dam is greater than the distance between the side surface of the pixel defining layer adjacent to the second light-emitting region and the side surface of the second dam.

2. The display device according to claim 1, wherein, The area of the second light-emitting region is greater than the area of the first light-emitting region.

3. The display device according to claim 2, wherein, The distance between the side surface of the second dam adjacent to the first light-emitting region and the side surface of the first dam is the same as the distance between the side surface of the second dam adjacent to the second light-emitting region and the side surface of the first dam.

4. The display device according to claim 1, wherein, In a plan view, the pixel defining layer includes an exposed region not covered by the second dam, The width of the exposed region of the pixel defining layer surrounding the first light-emitting region is greater than the width of the exposed region of the pixel defining layer surrounding the second light-emitting region.

5. The display device according to claim 2, wherein, The substrate further includes a third light-emitting region, The area of the third light-emitting region is greater than the area of the first light-emitting region and the area of the second light-emitting region.

6. The display device according to claim 5, wherein, The distance between the side surface of the pixel defining layer adjacent to the third light-emitting region and the side surface of the second dam is less than the distance between the side surface of the pixel defining layer adjacent to the first light-emitting region and the side surface of the second dam.

7. The display device according to claim 6, wherein, The distance between the side surface of the pixel defining layer adjacent to the third light-emitting region and the side surface of the second dam is less than the distance between the side surface of the pixel defining layer adjacent to the second light-emitting region and the side surface of the second dam.

8. The display device according to claim 6, wherein, The distance between the side surface of the pixel defining layer adjacent to the third light-emitting region and the side surface of the second dam is the same as the distance between the side surface of the pixel defining layer adjacent to the second light-emitting region and the side surface of the second dam.

9. The display device according to claim 1, wherein, The first light-emitting layer includes a first region having a thickness of 95% or more of the thickness at the thickest point with respect to the thickness. The area of the first region of the first light-emitting layer is 70% or more with respect to the area of the first light-emitting region.

10. The display device according to claim 1, wherein The resolution of the display device is 1500 ppi or more.

11. The display device according to claim 1, wherein The first common electrode and the second common electrode are spaced apart from each other.

12. The display device according to claim 1, wherein The pixel defining layer is spaced apart from above the first pixel electrode and above the second pixel electrode.

13. The display device according to claim 12, wherein The display device further includes: Residual patterns disposed between the first pixel electrode and the pixel defining layer and between the second pixel electrode and the pixel defining layer.

14. The display device according to claim 1, wherein The display device further includes: A first inorganic layer disposed on the first common electrode and the second dam; and A second inorganic layer disposed on the second common electrode and the second dam and spaced apart from the first inorganic layer.

15. The display device according to claim 14, wherein The first inorganic layer is spaced apart from above the second dam, The second inorganic layer is spaced apart from above the second dam.

16. The display device according to claim 15, wherein The display device further includes: An organic encapsulation layer disposed in the spaced-apart space between the first inorganic layer and the second dam and in the spaced-apart space between the second inorganic layer and the second dam.

17. A display device, wherein, Comprising: A substrate including a first light-emitting region and a second light-emitting region spaced apart from the first light-emitting region and having an area larger than that of the first light-emitting region; A pixel defining layer including sides defining the first light-emitting region and the second light-emitting region; A first light-emitting element disposed on the substrate in the first light-emitting region and including a first pixel electrode, a first light-emitting layer, and a first common electrode; A second light-emitting element disposed on the substrate in the second light-emitting region and including a second pixel electrode, a second light-emitting layer, and a second common electrode; A first dam disposed on the pixel defining layer; And A second dam disposed on the first dam and including a side surface protruding more than the side surface of the first dam and recessed more than the side surface of the pixel defining layer, In the thickness direction of the substrate, the width of the region where the pixel defining layer and the first light-emitting layer overlap is greater than the width of the region where the pixel defining layer and the second light-emitting layer overlap.

18. The display device according to claim 17, wherein The first light-emitting layer includes a first region having a thickness of 95% or more of the thickness at the thickest point with respect to the thickness. The area of the first region of the first light-emitting layer is 70% or more with respect to the area of the first light-emitting region.

19. A display device, wherein, Comprising: ​ A pixel defining layer, including sides defining the first light-emitting region and the second light-emitting region; A first light-emitting element, disposed on the substrate in the first light-emitting region, and including a first pixel electrode, a first light-emitting layer, and a first common electrode; A second light-emitting element, disposed on the substrate in the second light-emitting region, and including a second pixel electrode, a second light-emitting layer, and a second common electrode; A first dam, disposed on the pixel defining layer; And A second dam, disposed on the first dam, and having a side surface that protrudes more than the side surface of the first dam and is recessed more than the side surface of the pixel defining layer, The first light-emitting region, the second light-emitting region, and the third light-emitting region have different areas from each other, The distances between the side surface of the pixel defining layer adjacent to the first light-emitting region and the side surface of the second dam, the distances between the side surface of the pixel defining layer adjacent to the second light-emitting region and the side surface of the second dam, and the distances between the side surface of the pixel defining layer adjacent to the third light-emitting region and the side surface of the second dam are all different.

20. The display device according to claim 19, wherein, The distances between the side surface of the second dam adjacent to the first light-emitting region and the side surface of the first dam, the distances between the side surface of the second dam adjacent to the second light-emitting region and the side surface of the first dam, and the distances between the side surface of the second dam adjacent to the third light-emitting region and the side surface of the first dam are all the same.

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